JP2002517820A - ダイレクトメモリアクセスを用いるシリアルポートデータおよびステータスの圧縮および復元 - Google Patents

ダイレクトメモリアクセスを用いるシリアルポートデータおよびステータスの圧縮および復元

Info

Publication number
JP2002517820A
JP2002517820A JP2000552593A JP2000552593A JP2002517820A JP 2002517820 A JP2002517820 A JP 2002517820A JP 2000552593 A JP2000552593 A JP 2000552593A JP 2000552593 A JP2000552593 A JP 2000552593A JP 2002517820 A JP2002517820 A JP 2002517820A
Authority
JP
Japan
Prior art keywords
data
dma
source
address
destination
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000552593A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002517820A5 (https=
Inventor
スピロ，デイビッド・エイ
ティパルドス，メラニー・ディ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JP2002517820A publication Critical patent/JP2002517820A/ja
Publication of JP2002517820A5 publication Critical patent/JP2002517820A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
JP2000552593A 1998-06-01 1999-03-01 ダイレクトメモリアクセスを用いるシリアルポートデータおよびステータスの圧縮および復元 Pending JP2002517820A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/088,133 US6385670B1 (en) 1998-06-01 1998-06-01 Data compression or decompressions during DMA transfer between a source and a destination by independently controlling the incrementing of a source and a destination address registers
US09/088,133 1998-06-01
PCT/US1999/004610 WO1999063447A1 (en) 1998-06-01 1999-03-01 Compression and decompression of serial port data and status using direct memory access

Publications (2)

Publication Number Publication Date
JP2002517820A true JP2002517820A (ja) 2002-06-18
JP2002517820A5 JP2002517820A5 (https=) 2006-03-30

Family

ID=22209549

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000552593A Pending JP2002517820A (ja) 1998-06-01 1999-03-01 ダイレクトメモリアクセスを用いるシリアルポートデータおよびステータスの圧縮および復元

Country Status (6)

Country Link
US (1) US6385670B1 (https=)
EP (1) EP1082666B1 (https=)
JP (1) JP2002517820A (https=)
KR (1) KR100546085B1 (https=)
DE (1) DE69900477T2 (https=)
WO (1) WO1999063447A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6816921B2 (en) 2000-09-08 2004-11-09 Texas Instruments Incorporated Micro-controller direct memory access (DMA) operation with adjustable word size transfers and address alignment/incrementing
US7861073B2 (en) * 2007-01-03 2010-12-28 Apple Inc. On-chip decompression engine
US10275375B2 (en) * 2013-03-10 2019-04-30 Mellanox Technologies, Ltd. Network interface controller with compression capabilities
US12066955B2 (en) * 2021-05-19 2024-08-20 Hughes Network Systems, Llc System and method for enhancing throughput during data transfer

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5208915A (en) * 1982-11-09 1993-05-04 Siemens Aktiengesellschaft Apparatus for the microprogram control of information transfer and a method for operating the same
US4700391A (en) * 1983-06-03 1987-10-13 The Variable Speech Control Company ("Vsc") Method and apparatus for pitch controlled voice signal processing
US4642791A (en) * 1983-09-15 1987-02-10 Pitney Bowes Inc. Interface for mailing system peripheral devices
US4646261A (en) * 1983-09-27 1987-02-24 Motorola Computer Systems, Inc. Local video controller with video memory update detection scanner
JP2539058B2 (ja) * 1989-03-30 1996-10-02 三菱電機株式会社 デ―タプロセッサ
JP2527821B2 (ja) * 1989-09-14 1996-08-28 株式会社日立製作所 デ―タ処理方法及び入出力装置
US4974223A (en) * 1989-09-18 1990-11-27 International Business Machines Corporation Parallel architecture for high speed flag detection and packet identification
JPH04219859A (ja) * 1990-03-12 1992-08-10 Hewlett Packard Co <Hp> 並列プロセッサに直列命令ストリームデータを分散するハードウェアディストリビュータ
DE69128665T2 (de) * 1990-07-20 1998-07-16 Matsushita Electric Ind Co Ltd Datenmischendes Gerät
GB2250615B (en) * 1990-11-21 1995-06-14 Apple Computer Apparatus for performing direct memory access with stride
US5313454A (en) * 1992-04-01 1994-05-17 Stratacom, Inc. Congestion control for cell networks
JPH06133269A (ja) * 1992-09-02 1994-05-13 Pioneer Electron Corp 映像信号記録及び再生装置
FR2716276B1 (fr) * 1994-02-16 1996-05-03 Sgs Thomson Microelectronics Circuit de réorganisation de données.
US5588029A (en) * 1995-01-20 1996-12-24 Lsi Logic Corporation MPEG audio synchronization system using subframe skip and repeat
US5633865A (en) * 1995-03-31 1997-05-27 Netvantage Apparatus for selectively transferring data packets between local area networks
US5737638A (en) 1995-07-14 1998-04-07 International Business Machines Corporation System for determining plurality of data transformations to be performed upon single set of data during single transfer by examining communication data structure
US5761453A (en) * 1995-12-07 1998-06-02 Apple Computer, Inc. Method and system for increasing the throughput of serial data in a computer system
US5854640A (en) * 1996-01-02 1998-12-29 Intel Corporation Method and apparatus for byte alignment of video data in a memory of a host system
US5768445A (en) 1996-09-13 1998-06-16 Silicon Graphics, Inc. Compression and decompression scheme performed on shared workstation memory by media coprocessor
US5982373A (en) * 1996-11-12 1999-11-09 Chromatic Research, Inc. Dynamic enhancement/reduction of graphical image data resolution
US5896549A (en) * 1997-02-04 1999-04-20 Advanced Micro Devices, Inc. System for selecting between internal and external DMA request where ASP generates internal request is determined by at least one bit position within configuration register
US5958024A (en) * 1997-08-29 1999-09-28 Advanced Micro Devices, Inc. System having a receive data register for storing at least nine data bits of frame and status bits indicating the status of asynchronous serial receiver
US5944800A (en) * 1997-09-12 1999-08-31 Infineon Technologies Corporation Direct memory access unit having a definable plurality of transfer channels

Also Published As

Publication number Publication date
DE69900477D1 (de) 2001-12-20
US6385670B1 (en) 2002-05-07
KR20010052493A (ko) 2001-06-25
EP1082666B1 (en) 2001-11-14
WO1999063447A1 (en) 1999-12-09
DE69900477T2 (de) 2002-07-18
EP1082666A1 (en) 2001-03-14
KR100546085B1 (ko) 2006-01-26

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