JP2002516231A - ウェハカセットとともに用いる積み重ね可能なカセット - Google Patents

ウェハカセットとともに用いる積み重ね可能なカセット

Info

Publication number
JP2002516231A
JP2002516231A JP2000550744A JP2000550744A JP2002516231A JP 2002516231 A JP2002516231 A JP 2002516231A JP 2000550744 A JP2000550744 A JP 2000550744A JP 2000550744 A JP2000550744 A JP 2000550744A JP 2002516231 A JP2002516231 A JP 2002516231A
Authority
JP
Japan
Prior art keywords
cassette
wafer
processing
wafers
processed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000550744A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002516231A5 (enExample
Inventor
ロナルド アール. スティーヴン
ラヴィンダー アガーウォル
Original Assignee
エーエスエム アメリカ インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by エーエスエム アメリカ インコーポレイテッド filed Critical エーエスエム アメリカ インコーポレイテッド
Publication of JP2002516231A publication Critical patent/JP2002516231A/ja
Publication of JP2002516231A5 publication Critical patent/JP2002516231A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/10—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof using carriers specially adapted therefor, e.g. front opening unified pods [FOUP]
    • H10P72/18—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof using carriers specially adapted therefor, e.g. front opening unified pods [FOUP] characterised by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0604—Process monitoring, e.g. flow or thickness monitoring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/10—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof using carriers specially adapted therefor, e.g. front opening unified pods [FOUP]
    • H10P72/19—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof using carriers specially adapted therefor, e.g. front opening unified pods [FOUP] closed carriers
    • H10P72/1902—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof using carriers specially adapted therefor, e.g. front opening unified pods [FOUP] closed carriers specially adapted for a single substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/10—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof using carriers specially adapted therefor, e.g. front opening unified pods [FOUP]
    • H10P72/19—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof using carriers specially adapted therefor, e.g. front opening unified pods [FOUP] closed carriers
    • H10P72/1918—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof using carriers specially adapted therefor, e.g. front opening unified pods [FOUP] closed carriers characterised by coupling elements, kinematic members, handles or elements to be externally gripped
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00—Material or article handling
    • Y10S414/135—Associated with semiconductor wafer handling
    • Y10S414/137—Associated with semiconductor wafer handling including means for charging or discharging wafer cassette
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S414/00—Material or article handling
    • Y10S414/135—Associated with semiconductor wafer handling
    • Y10S414/14—Wafer cassette transporting

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Vacuum Packaging (AREA)
JP2000550744A 1998-05-22 1999-05-20 ウェハカセットとともに用いる積み重ね可能なカセット Pending JP2002516231A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/083,833 1998-05-22
US09/083,833 US6162006A (en) 1998-05-22 1998-05-22 Stackable cassette for use with wafer cassettes
PCT/US1999/011188 WO1999061320A1 (en) 1998-05-22 1999-05-20 Stackable cassette for use with wafer cassettes

Publications (2)

Publication Number Publication Date
JP2002516231A true JP2002516231A (ja) 2002-06-04
JP2002516231A5 JP2002516231A5 (enExample) 2006-07-06

Family

ID=22180987

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000550744A Pending JP2002516231A (ja) 1998-05-22 1999-05-20 ウェハカセットとともに用いる積み重ね可能なカセット

Country Status (6)

Country Link
US (1) US6162006A (enExample)
EP (2) EP1129010A4 (enExample)
JP (1) JP2002516231A (enExample)
KR (1) KR20010043728A (enExample)
TW (1) TW432579B (enExample)
WO (1) WO1999061320A1 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4253189B2 (ja) * 2001-02-16 2009-04-08 周司 宮崎 半導体評価装置のユーザインターフェース
KR100426810B1 (ko) * 2001-03-21 2004-04-08 삼성전자주식회사 웨이퍼 캐리어
DE10120701A1 (de) 2001-04-27 2002-10-31 Infineon Technologies Ag Verfahren zur Steuerung eines Prozeßgerätes zur sequentiellen Verarbeitung von Halbleiterwafern
JP3757844B2 (ja) * 2001-10-19 2006-03-22 ソニー株式会社 半導体製造方法
US6756243B2 (en) 2001-10-30 2004-06-29 Advanced Micro Devices, Inc. Method and apparatus for cascade control using integrated metrology
US8440048B2 (en) 2009-01-28 2013-05-14 Asm America, Inc. Load lock having secondary isolation chamber
US8587331B2 (en) * 2009-12-31 2013-11-19 Tommie E. Berry Test systems and methods for testing electronic devices
EP2538713B1 (en) 2011-06-24 2014-08-06 Alcatel Lucent Performing measurements in a digital cellular wireless telecommunication network
DE102017204910B4 (de) 2017-03-23 2018-10-04 Singulus Technologies Ag Trägerkassette und Trägerkassettenstapel

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4775281A (en) * 1986-12-02 1988-10-04 Teradyne, Inc. Apparatus and method for loading and unloading wafers
US5217340A (en) * 1989-01-28 1993-06-08 Kokusai Electric Co., Ltd. Wafer transfer mechanism in vertical CVD diffusion apparatus
DE4024973C2 (de) * 1990-08-07 1994-11-03 Ibm Anordnung zum Lagern, Transportieren und Einschleusen von Substraten
US5685684A (en) * 1990-11-26 1997-11-11 Hitachi, Ltd. Vacuum processing system
ES2229247T3 (es) * 1995-03-28 2005-04-16 Brooks Automation Gmbh Estacion de carga y descarga para instalaciones de tratamiento de semiconductores.
JP3654684B2 (ja) * 1995-05-01 2005-06-02 東京エレクトロン株式会社 処理方法及び処理装置
JP3507587B2 (ja) * 1995-06-09 2004-03-15 東京エレクトロン株式会社 熱処理装置
DE19540963C2 (de) * 1995-11-03 1999-05-20 Jenoptik Jena Gmbh Transportbehälter für scheibenförmige Objekte
US5940175A (en) * 1996-11-01 1999-08-17 Msp Corporation Method and apparatus for surface inspection in a chamber

Also Published As

Publication number Publication date
EP1129010A1 (en) 2001-09-05
US6162006A (en) 2000-12-19
EP1129010A4 (en) 2005-07-06
WO1999061320A1 (en) 1999-12-02
TW432579B (en) 2001-05-01
EP1876640A2 (en) 2008-01-09
KR20010043728A (ko) 2001-05-25

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