JP2002369553A - Gate drive circuit of semiconductor device for power - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the time rate of change (dv/dt) of voltage, in reverse recovery of a diode at an opposite arm side, when driving a semiconductor device which configur a power converter. SOLUTION: The voltage (a differentiated value) of a lower-arm side element T2 of a power converter comprising an IGBT and the like is detected, by a resistor 12 of the serial circuit of a capacitor 11 and the resistor 12 for comparing with a reference value Vr by a comparator 13. When the differentiated value of voltage in the element T2 is larger, the value of resistance of an upper- arm side drive circuit is set to a value only of a resistance 8, instead of a value of parallel resistance of the resistors 8 and 18 for increasing resistance, and dv/dt is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gate drive circuit for a power semiconductor device such as an IGBT (insulated gate bipolar transistor) constituting a power converter such as an inverter.

[0002]

2. Description of the Related Art FIG. 3 shows a main circuit diagram of an inverter using such an IGBT.

In FIG. 1, reference numeral 1 denotes a DC power supply (in the case of AC input, a rectifier + electrolytic capacitor is used);
2 is an inverter for converting DC to AC, and each arm is I
It comprises a GBT and a diode connected in anti-parallel to the GBT. Reference numerals 3A and 3B denote gate drive circuits of the IGBT (provided for each element), and reference numeral 4 denotes a load such as a motor.

FIG. 4 shows a specific example of a gate drive circuit. A symbol a indicates an upper arm element or signal, and a symbol b indicates a lower arm element or signal.

[0005] 5 is a drive circuit power supply, and 6 and 7 are IGBTs.
(T1, T2) switch elements for turning on and off, respectively, 8 and 9 are turn-on and turn-off gate resistors, and switch elements 6 and 7 are a command signal S from the host and an on command from control unit 10. It operates according to the signal N or the off command signal F.

FIG. 5 shows an example of a collector current (Ic) waveform when the IGBT (T1) is turned on, and an example of a reverse recovery voltage (Vf) waveform of the opposite arm side diode (D2).

[0007]

Generally, among radiation noises generated from a power converter such as an inverter, a dominant noise source is a voltage change rate (dv) during reverse recovery of a diode on the opposite arm side when the IGBT is turned on.
/ Dt). If dv / dt is high, a high level of electromagnetic waves will be radiated, causing a problem that peripheral devices malfunction. Qualitatively, if the gate resistance for turn-on is increased, dv / dt can be reduced, but if it is unnecessarily increased, the IGBT turn-on loss increases and the efficiency is reduced. In addition, internal constants of the IGBT and the gate drive circuit have characteristic fluctuations due to characteristic fluctuations and temperature changes, and furthermore, the dv / dt value changes depending on the main circuit structure and the wiring method. The current situation is that it is not possible to perform any kind of management.

Therefore, an object of the present invention is to provide an IGBT
D at the time of reverse recovery of the diode on the opposite arm at turn-on
It is to reduce v / dt.

[0009]

According to a first aspect of the present invention, there is provided a gate drive circuit for a power semiconductor device constituting a power converter, wherein the voltage is applied to the power semiconductor device. Detecting means for detecting a differential value of the voltage; comparing means for comparing the detected value with a set value and outputting a predetermined output when the detected value exceeds the set value; Means for increasing the turn-on gate resistance value of the gate drive circuit of the power semiconductor element, or increasing the gate-emitter capacitance of the power semiconductor element on the opposite arm side.

That is, dv / dt (differential value of the voltage applied to the element) at the time of reverse recovery of the opposing arm side diode is detected, and when this value is higher than a certain set value, the IGBT on the opposing arm side is detected. By increasing the turn-on gate resistance value or the gate-emitter capacitance, the dv / dt can be suppressed to a set value or less.
Even when a high dv / dt is applied due to characteristic variations or temperature changes, dv / dt can be quickly reduced.

[0011]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

As shown in the figure, a series circuit of a capacitor 11 and a resistor 12 is connected between the collector and the emitter of the IGBT. When dv / dt is generated, a displacement current almost proportional to dv / dt flows, and a voltage is generated in the resistor 12. I do. This voltage (differential value) is compared by the comparator 13 with a voltage value Vr corresponding to a reference value of dv / dt. The output signal of the comparator 13 is transmitted to the upper arm side by the transmission circuit 14, and this transmission circuit 14 can be realized by a photocoupler or a level shift circuit. Reference numeral 15 denotes a set / reset flip-flop (SRFF) which is set when dv / dt is higher than a set value, and always turns off the switch 17 via the AND gate 16.

As a result, the turn-on gate resistance becomes the value of only the resistor 8 from the parallel resistance of the resistors 8 and 18, and a high resistance can be realized.

As a result, di / dt at the time of turning on the IGBT (T1) is reduced, and the diode (D2)
Dv / dt is reduced. In addition, SRFF1
The output of the one-shot circuit 19 is introduced to its reset terminal 5 so that it is reset when the signal T is not inputted for a certain period of time (inverter operation stop state).

FIG. 2 is a circuit diagram showing a modification of FIG.

The basic operation is the same as in FIG.
The feature is that the capacitor 20 is used to reduce dv / dt.

That is, when the SRFF 15 is set, the switch 21 is turned on, and the capacitor 20 is connected to the IGBT (T
The connection is made between the gate and the emitter in 1). As a result, dv / dt of the diode (D2) is reduced in the same manner as described above.

In the above embodiment, only the case where the dv / dt of the lower arm side diode is detected and the gate drive circuit of the upper arm side is operated has been described, but the dv / dt of the upper arm side diode is detected. A circuit for operating the gate drive circuit on the lower arm side is actually provided, and it is needless to say that the circuit is operated in the same manner as described above.

[0019]

According to the present invention, dv / d is obtained even when there is a characteristic variation of the IGBT, the diode and the gate drive circuit, a characteristic variation due to a temperature change, or a difference between phases due to a main circuit structure or a wiring method. dt can be set to a certain value or less, which makes it possible to prevent malfunction of peripheral devices due to a high radiation noise level.

Further, the cause of the main circuit structure in the case of parallel connection of IGBTs in a large capacity device,
According to the present invention, dv / dt can be reduced even when high dv / dt is applied only to a specific element due to imbalance in characteristics or driving of the diode.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing a first embodiment of the present invention.

FIG. 2 is a configuration diagram showing a second embodiment of the present invention.

FIG. 3 is a configuration diagram showing a conventional example of an inverter using an IGBT.

FIG. 4 is a circuit diagram illustrating an example of the gate drive circuit of FIG. 3;

FIG. 5 is a waveform diagram for explaining a reverse recovery voltage in the diode of FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... DC power supply, 2 ... Inverter circuit, 3A, 3B ... Gate drive circuit, 4 ... Motor (load), 5 ... Gate drive circuit power supply, 6,7,17,21 ... Switch, 8,9,18
... gate resistance, 10 ... control circuit, 11, 20 ... capacitor, 12 ... resistance, 13 ... comparator, 14 ... transmission circuit, 15 ... set / reset flip-flop (SRF
F), 16: AND gate, 19: One shot circuit,
T1, T2: IGBT, D1, D2: diode.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H03K 17/56 H03K 17/56 Z F-term (Reference) 5H007 AA03 BB06 CA01 CB04 CB05 CC07 CC23 DB03 5H740 AA05 BA11 BB01 BB05 BB09 BB10 HH05 MM05 5J055 AX25 BX16 CX07 DX09 DX72 EY01 EY10 EY12 EZ10 EZ25 EZ27 EZ32 FX18 FX32 GX01 GX04

Claims (1)

[Claims] 1. A gate drive circuit for a power semiconductor device constituting a power converter, comprising: detecting means for detecting a differential value of a voltage applied to the power semiconductor device; and comparing the detected value with a set value. A comparing unit that outputs a predetermined output when the detected value exceeds a set value, and increasing the turn-on gate resistance value of the gate drive circuit of the power semiconductor element on the opposite arm side based on the output from the comparing unit, or Means for increasing the gate-emitter capacitance of the power semiconductor device on the side of the opposing arm.