JP2002368153A - Substrate for mounting with electronic component - Google Patents
Substrate for mounting with electronic componentInfo
- Publication number
- JP2002368153A JP2002368153A JP2001167178A JP2001167178A JP2002368153A JP 2002368153 A JP2002368153 A JP 2002368153A JP 2001167178 A JP2001167178 A JP 2001167178A JP 2001167178 A JP2001167178 A JP 2001167178A JP 2002368153 A JP2002368153 A JP 2002368153A
- Authority
- JP
- Japan
- Prior art keywords
- band
- pattern
- bonding pad
- patterns
- shaped
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4943—Connecting portions the connecting portions being staggered
- H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
Abstract
Description
【０００１】[0001]
【技術分野】本発明は，電子部品搭載用基板に関し，特
に電子部品搭載部周辺回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for mounting electronic components, and more particularly to a peripheral circuit for mounting electronic components.
【０００２】[0002]
【従来技術】従来，電子部品搭載用基板としては，図４
に示すごとく，電子部品９８１を搭載するための搭載部
９８と，搭載部９８の周辺を囲むように形成された帯状
パターン９６，９７と，該帯状パターン９６，９７の外
側に形成された配線パターン９５とを設けたものがあ
る。配線パターン９５はボンディングパッド９５１を有
している。ボンディングパッド９５１には，電子部品９
８１との間を電気的に接続するためのワイヤー９３が接
合される。また，帯状パターン９６，９７は，ワイヤー
ボンディングに必要な幅，即ちボンディングパッドの長
さとほぼ同じ幅を有している。そして，ワイヤー９３は
帯状パターン９６，９７に接合される。2. Description of the Related Art Conventionally, as a substrate for mounting electronic components, FIG.
As shown in FIG. 7, a mounting portion 98 for mounting an electronic component 981, band-like patterns 96 and 97 formed so as to surround the periphery of the mounting portion 98, and a wiring pattern formed outside the band-like patterns 96 and 97 95. The wiring pattern 95 has a bonding pad 951. The bonding pad 951 has electronic components 9
A wire 93 for electrical connection between the wire 81 is connected. The strip patterns 96 and 97 have a width required for wire bonding, that is, a width substantially equal to the length of the bonding pad. Then, the wire 93 is joined to the belt-shaped patterns 96 and 97.
【０００３】帯状パターン９６，９７のうち，搭載部側
９４１の帯状パターン９６は接地回路であり，基板周縁
側９４２の帯状パターン９７は電源回路である。配線パ
ターン９５は信号回路である。帯状パターン９６，９７
及び配線パターン９５は，絶縁基板９４の表面に形成さ
れている。[0003] Of the strip patterns 96 and 97, the strip pattern 96 on the mounting portion side 941 is a ground circuit, and the strip pattern 97 on the substrate peripheral side 942 is a power supply circuit. The wiring pattern 95 is a signal circuit. Belt patterns 96, 97
The wiring pattern 95 is formed on the surface of the insulating substrate 94.
【０００４】[0004]
【解決しようとする課題】しかしながら，上記従来の電
子部品搭載用基板においては，帯状パターン９６，９７
が，ボンディングパッドの長さと同じかまたはそれ以上
の幅を有している。このため，基板周縁側９４２の帯状
パターン９７のワイヤーボンディング部９７１が，搭載
部側９４１の帯状パターン９６のワイヤーボンディング
部９６１よりも，ボンディングパッドの長さ以上の長さ
だけ，搭載部９８から離れた位置に配置されることにな
る。それゆえ，基板周縁側９４２の帯状パターン９７と
電子部品９８１とを繋ぐワイヤー９３が，搭載部側９４
１の帯状パターン９６と電子部品９８１とを繋ぐワイヤ
ーよりも，ボンディングパッドの長さ以上分だけ長くな
ってしまう。However, in the above-mentioned conventional electronic component mounting substrate, the band-shaped patterns 96 and 97 are not provided.
Have a width equal to or greater than the length of the bonding pad. For this reason, the wire bonding portion 971 of the strip pattern 97 on the substrate peripheral side 942 is separated from the mounting portion 98 by a length longer than the length of the bonding pad than the wire bonding portion 961 of the strip pattern 96 on the mounting portion side 941. It will be arranged in the position where it was set. Therefore, the wire 93 connecting the band-shaped pattern 97 on the substrate peripheral side 942 and the electronic component 981 is connected to the mounting section side 94.
The length is longer than the length of the bonding pad by more than the length of the wire connecting the first band-shaped pattern 96 and the electronic component 981.
【０００５】また，帯状パターン９６，９７に必要な合
計幅は，ボンディングパッドの長さの２倍以上になる。
このため，帯状パターン９６，９７の基板周縁側９４２
における配線パターン９５の配線スペースが小さくな
る。[0005] The total width required for the strip patterns 96 and 97 is at least twice the length of the bonding pad.
For this reason, the substrate peripheral side 942 of the band-shaped patterns 96 and 97
In this case, the wiring space of the wiring pattern 95 is reduced.
【０００６】本発明はかかる従来の問題点に鑑み，ワイ
ヤー長さを短くでき，かつ配線スペースの広大化を図る
ことができる電子部品搭載用基板を提供しようとするも
のである。The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to provide an electronic component mounting substrate capable of reducing a wire length and expanding a wiring space.
【０００７】[0007]
【課題の解決手段】本発明は，電子部品を搭載するため
の搭載部と，その周囲に沿って並列に配置された複数の
帯状パターンとを有する電子部品搭載用基板において，
上記複数の帯状パターンのうち少なくとも互いに隣合う
２つの帯状パターンは，該帯状パターンからその側方に
突出するボンディングパッドを有し，一方の上記帯状パ
ターンの上記ボンディングパッドと，他方の上記帯状パ
ターンの上記ボンディングパッドとは，隣合う上記帯状
パターンにより挟まれた領域に配置されていることを特
徴とする電子部品搭載用基板である（請求項１）。According to the present invention, there is provided an electronic component mounting board having a mounting portion for mounting an electronic component and a plurality of band-shaped patterns arranged in parallel along the periphery thereof.
At least two strip patterns adjacent to each other among the plurality of strip patterns have bonding pads protruding to the side from the strip patterns, and the bonding pads of one strip pattern and the other of the strip patterns of the other strip pattern are formed. The bonding pad is an electronic component mounting board, which is arranged in a region sandwiched between the adjacent strip patterns.
【０００８】本発明においては，搭載部に沿って形成さ
れた複数の帯状パターンのうちの少なくとも２つが，そ
の側方に突出する１または２以上のボンディングパッド
を有している。そして，一方の帯状パターンのボンディ
ングパッドと，他方の帯状パターンのボンディングパッ
ドとは，隣合う上記帯状パターンにより挟まれた領域に
配置されている。このため，基板周縁側の帯状パターン
におけるボンディングパッドは，搭載部側の帯状パター
ンのボンディングパッドとほぼ同じ位置に配置されるこ
とになる。それゆえ，基板周縁側の帯状パターンのボン
ディングパッドと搭載部との距離が，搭載部側の帯状パ
ターンのボンディングパッドと搭載部との距離とほぼ同
じになる。したがって，基板周縁側の帯状パターンのボ
ンディングパッドと搭載部に搭載した電子部品との間を
接続するワイヤーの長さは，従来の帯状パターンに比べ
て短くなる。In the present invention, at least two of the plurality of strip patterns formed along the mounting portion have one or more bonding pads protruding to the side. The bonding pad of one band-shaped pattern and the bonding pad of the other band-shaped pattern are arranged in a region sandwiched between the adjacent band-shaped patterns. For this reason, the bonding pads in the strip pattern on the peripheral edge of the substrate are arranged at substantially the same positions as the bonding pads in the strip pattern on the mounting portion. Therefore, the distance between the bonding pad of the belt-shaped pattern on the peripheral side of the substrate and the mounting portion is substantially equal to the distance between the bonding pad of the belt-shaped pattern on the mounting portion and the mounting portion. Therefore, the length of the wire connecting between the bonding pad of the strip pattern on the peripheral edge of the substrate and the electronic component mounted on the mounting portion is shorter than that of the conventional strip pattern.
【０００９】また，隣合う帯状パターンから側方に突出
したボンディングパッドを，その長さ方向に近づけて配
置することができる。しかも，帯状パターンの幅を従来
よりも小さくすることができる。したがって，ボンディ
ングパッド及び帯状パターンに要するスペースを従来よ
りも小さくし，その分だけ余剰スペースをあけることが
できる。この余剰スペースには，帯状パターン以外の配
線パターンを形成できる。したがって，配線パターンの
配線スペースが従来よりも多く確保できる。Further, the bonding pads protruding laterally from the adjacent belt-shaped patterns can be arranged close to the length direction thereof. In addition, the width of the strip pattern can be made smaller than before. Therefore, the space required for the bonding pad and the band-shaped pattern can be made smaller than before, and an extra space can be opened accordingly. A wiring pattern other than the strip pattern can be formed in this surplus space. Therefore, a larger wiring space for the wiring pattern than before can be secured.
【００１０】以上のように本発明によれば，ワイヤー長
さを短くでき，かつ配線スペースを広大化を図ることが
できる電子部品搭載用基板を提供することができる。As described above, according to the present invention, it is possible to provide an electronic component mounting board capable of reducing the wire length and increasing the wiring space.
【００１１】[0011]
【発明の実施の形態】本発明において，搭載部の周囲に
は，搭載部に沿って２または３以上の帯状パターンが並
列に配置している。帯状パターンは，搭載部の周囲全体
を囲んでいてもよいし，また搭載部の一部に形成されて
いてもよい。DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, two or three or more strip-shaped patterns are arranged in parallel around a mounting portion along the mounting portion. The band-shaped pattern may surround the entire periphery of the mounting portion, or may be formed on a part of the mounting portion.
【００１２】少なくとも互いに隣合う２つの上記帯状パ
ターンのうち，一方の上記帯状パターンから側方に突出
する上記ボンディングパッドの先端部は，他方の上記帯
状パターンに対して，他方の該帯状パターンから側方に
突出する上記ボンディングパッドの先端部よりも近くに
配置されていることが好ましい（請求項２）。これによ
り，ボンディングパッド同士がその長さ方向に近づき，
帯状パターン間の間隔を狭くできる。このため，その基
板周縁側により広い配線スペースを確保でき，またワイ
ヤー長を短縮化できる。[0012] Of at least two adjacent band-shaped patterns, the tip of the bonding pad projecting laterally from one of the band-shaped patterns is closer to the other band-shaped pattern than the other band-shaped pattern. It is preferable that the bonding pad is disposed closer to the tip of the bonding pad than the tip of the bonding pad. This causes the bonding pads to approach each other in the length direction,
The interval between the strip patterns can be reduced. Therefore, a wider wiring space can be secured on the peripheral side of the substrate, and the wire length can be reduced.
【００１３】上記帯状パターンは，電源回路または接地
回路である場合が多いが，信号回路であってもよい。帯
状パターンの基板周縁側には，たとえば配線パターンが
形成されている。この配線パターンは信号回路である場
合が多いが，接地回路または電源回路であってもよい。The above-mentioned band-like pattern is often a power supply circuit or a ground circuit, but may be a signal circuit. For example, a wiring pattern is formed on the peripheral side of the substrate of the belt-shaped pattern. This wiring pattern is often a signal circuit, but may be a ground circuit or a power supply circuit.
【００１４】[0014]
【実施例】（実施例１）本発明の実施形態に係る電子部
品搭載用基板について図１を用いて説明する。本例の電
子部品搭載用基板は，図１に示すごとく，電子部品８１
を搭載するための搭載部８と，その周囲に沿って配置さ
れた複数の帯状パターン６，７とを有する。帯状パター
ン６，７は，その側方に突出する複数のボンディングパ
ッド６１，７１を有している。一方の帯状パターン６の
ボンディングパッド６１と，他方の帯状パターン７のボ
ンディングパッド７１とは，２つの帯状パターン６，７
により挟まれた領域１に配置されている。一方の帯状パ
ターン６のボンディングパッド６１の先端部６１１は，
他方の帯状パターン７に対して，他方のボンディングパ
ッド７１の先端部７１１よりも近くに位置している。一
方の帯状パターン６のボンディングパッド６１と，他方
帯状パターン７のボンディングパッド７１とは，１つず
つ交互に近接して配置されている。(Embodiment 1) An electronic component mounting board according to an embodiment of the present invention will be described with reference to FIG. As shown in FIG. 1, the electronic component mounting board of this example has an electronic component 81.
And a plurality of band-shaped patterns 6 and 7 arranged along the periphery thereof. Each of the strip patterns 6 and 7 has a plurality of bonding pads 61 and 71 protruding to the side thereof. The bonding pad 61 of one band-shaped pattern 6 and the bonding pad 71 of the other band-shaped pattern 7 are two band-shaped patterns 6 and 7.
Are arranged in a region 1 sandwiched between the. The tip 611 of the bonding pad 61 of one strip pattern 6 is
It is located closer to the other band-shaped pattern 7 than the tip 711 of the other bonding pad 71. The bonding pads 61 of one strip pattern 6 and the bonding pads 71 of the other strip pattern 7 are arranged alternately close to each other.
【００１５】搭載部側４１の帯状パターン６は接地回路
であり，基板周縁側４２の帯状パターン７は電源回路で
ある。搭載部側４１の帯状パターン６は，基板周縁側４
２に延長パターン７２を有している。延長パターン７２
は，図示しない電源装置と電気的に接続している。基板
周縁側４２の帯状パターン７はビアホール６２を有し，
図示しない内部回路と接続し，接地している。帯状パタ
ーン６，７の基板周縁側４２には，配線パターン５が設
けられている。配線パターン５の搭載部側４１の先端部
にはボンディングパッド５１を有している。配線パター
ン５は信号回路であり，図示しない端子部を通じて外部
基板と接続して互いに信号の授受をしている。ボンディ
ングパッド６１，７１，５１には，電子部品８１に接続
されたワイヤー３を接合している。帯状パターン６，７
及び配線パターン５は，絶縁基板４の表面に形成されて
いる。The band-shaped pattern 6 on the mounting portion side 41 is a ground circuit, and the band-shaped pattern 7 on the substrate peripheral side 42 is a power supply circuit. The strip pattern 6 on the mounting portion side 41 is
2 has an extension pattern 72. Extension pattern 72
Are electrically connected to a power supply device (not shown). The band-shaped pattern 7 on the peripheral side 42 of the substrate has a via hole 62,
Connected to an internal circuit (not shown) and grounded. A wiring pattern 5 is provided on the peripheral side 42 of the strip-shaped patterns 6 and 7. A bonding pad 51 is provided at the tip of the mounting portion 41 of the wiring pattern 5. The wiring pattern 5 is a signal circuit, which is connected to an external board through a terminal unit (not shown) to exchange signals with each other. The wires 3 connected to the electronic component 81 are bonded to the bonding pads 61, 71, 51. Strip pattern 6,7
The wiring pattern 5 is formed on the surface of the insulating substrate 4.
【００１６】本例においては，一方の帯状パターン６の
ボンディングパッド６１と，他方の帯状パターン７のボ
ンディングパッド７１とは，帯状パターン６，７により
挟まれた領域１に配置されている。このため，基板周縁
側４２の帯状パターン７におけるボンディングパッド７
１は，搭載部側４１の帯状パターン６とほぼ同じ位置に
配置されることになる。それゆえ，基板周縁側４２の帯
状パターン７のボンディングパッド７１と搭載部８との
距離が，搭載部側４１の帯状パターン６のボンディング
パッド６１と搭載部８との距離とほぼ同じになる。した
がって，基板周縁側４２の帯状パターン７のボンディン
グパッド７１と搭載部８に搭載した電子部品８１との間
を接続するワイヤー３の長さは，従来の帯状パターンに
比べて短くなる。In this embodiment, the bonding pad 61 of one strip pattern 6 and the bonding pad 71 of the other strip pattern 7 are arranged in a region 1 sandwiched between the strip patterns 6 and 7. For this reason, the bonding pad 7 in the band-shaped pattern 7
1 is arranged at substantially the same position as the band-shaped pattern 6 on the mounting portion side 41. Therefore, the distance between the bonding pad 71 of the band-shaped pattern 7 on the substrate peripheral side 42 and the mounting portion 8 is substantially the same as the distance between the bonding pad 61 of the band-shaped pattern 6 on the mounting portion 41 and the mounting portion 8. Therefore, the length of the wire 3 connecting the bonding pad 71 of the strip pattern 7 on the substrate peripheral side 42 and the electronic component 81 mounted on the mounting portion 8 is shorter than that of the conventional strip pattern.
【００１７】一方の帯状パターン６から側方に突出する
ボンディングパッド６１の先端部６１１は，他方の帯状
パターン７に対して，他方の該帯状パターン７から側方
に突出するボンディングパッド７１の先端部７１１より
も近くに配置されている。このため，ボンディングパッ
ド６１，７１同士が，その長さ方向に近づき，帯状パタ
ーン６，７間の間隔を狭くできる。このため，その基板
周縁側４２により広い配線スペースを確保でき，またワ
イヤー長を短縮化できる。The tip 611 of the bonding pad 61 projecting laterally from one band-shaped pattern 6 is the tip of the bonding pad 71 projecting laterally from the other band-shaped pattern 7 with respect to the other band-shaped pattern 7. 711. For this reason, the bonding pads 61 and 71 approach each other in the length direction thereof, and the interval between the strip patterns 6 and 7 can be reduced. For this reason, a wide wiring space can be secured by the substrate peripheral side 42, and the wire length can be shortened.
【００１８】なお，本例においては，搭載部側４１の帯
状パターン６はビアホール６２を通じて内部回路と接続
しているが，壁面パターンを介して接続していてもよ
い。また，基板周縁側４２の帯状パターン７は，延長パ
ターン７２を通じて電源装置と接続していてもよいが，
帯状パターン７に直接接続する端子部を通じて電源装置
と接続していてもよい。In the present embodiment, the band-shaped pattern 6 on the mounting portion 41 is connected to the internal circuit through the via hole 62, but may be connected via a wall pattern. Further, the belt-shaped pattern 7 on the substrate peripheral side 42 may be connected to a power supply through the extension pattern 72.
It may be connected to a power supply device through a terminal portion directly connected to the belt-shaped pattern 7.
【００１９】（実施例２）本例は，図２に示すごとく，
搭載部側４１の帯状パターン６から側方に突出している
ボンディングパッド６１と，基板周縁側４２の帯状パタ
ーン７から側方に突出しているボンディングパッド７１
とを，互いに離れた位置に配置した例である。帯状パタ
ーン６から突出しているボンディングパッド６１の先端
部６１１は，帯状パターン７から突出しているボンディ
ングパッド７１の先端部７１１よりも，帯状パターン７
に対して近い位置にある。(Embodiment 2) In this embodiment, as shown in FIG.
A bonding pad 61 projecting laterally from the band-shaped pattern 6 on the mounting portion side 41 and a bonding pad 71 projecting laterally from the band-shaped pattern 7 on the substrate peripheral side 42.
Are arranged at positions separated from each other. The tip 611 of the bonding pad 61 protruding from the strip pattern 6 is larger than the tip 711 of the bonding pad 71 protruding from the strip pattern 7.
Close to
【００２０】その他は，実施例１と同様である。本例に
おいても，隣合う帯状パターン６，７のボンディングパ
ッド６１，７１が帯状パターン６，７により挟まれた領
域１に配置されており，また，一方のボンディングパッ
ド６１の先端部６１１は，他方のボンディングパッド７
１の先端部７１１に比べて，他方の帯状パターン７に近
い。このため，ボンディングパッドに接合するワイヤー
長さを短くでき，かつ配線スペースを広大化を図ること
ができる。The rest is the same as the first embodiment. Also in this example, the bonding pads 61 and 71 of the adjacent band-shaped patterns 6 and 7 are arranged in the region 1 sandwiched between the band-shaped patterns 6 and 7, and the tip 611 of one bonding pad 61 is connected to the other. Bonding pad 7
It is closer to the other band-shaped pattern 7 than the one tip 711. For this reason, the length of the wire connected to the bonding pad can be shortened, and the wiring space can be enlarged.
【００２１】（実施例３）本例は，図３に示すごとく，
帯状パターン６，７から側方に突出しているボンディン
グパッド６１，７１を，それぞれ複数まとめて，交互に
配置した例である。その他は，実施例２と同様である。
本例においても実施例２と同様の効果を得ることが出来
る。(Embodiment 3) In this embodiment, as shown in FIG.
In this example, a plurality of bonding pads 61 and 71 projecting laterally from the band-shaped patterns 6 and 7 are collectively and alternately arranged. Others are the same as the second embodiment.
In this embodiment, the same effect as in the second embodiment can be obtained.
【図１】実施例１の電子部品搭載用基板の平面図。FIG. 1 is a plan view of an electronic component mounting board according to a first embodiment.
【図２】実施例２の電子部品搭載用基板の要部平面図。FIG. 2 is a plan view of a main part of an electronic component mounting board according to a second embodiment.
【図３】実施例３の電子部品搭載用基板の要部平面図。FIG. 3 is a plan view of a main part of an electronic component mounting board according to a third embodiment.
【図４】従来例の電子部品搭載用基板の平面図。FIG. 4 is a plan view of a conventional electronic component mounting substrate.
３．．．ワイヤー， ４．．．絶縁基板， ４１．．．搭載部側， ４２．．．基板周縁側， ５．．．配線パターン， ５１，６１，７１．．．ボンディングパッド， ６，７．．．帯状パターン， ８．．．搭載部， 3. . . Wire, 4. . . Insulating substrate, 41. . . Mounting part side, 42. . . 4. Peripheral side of substrate, . . Wiring pattern, 51, 61, 71. . . Bonding pad, 6,7. . . 7. band-like pattern; . . Mounting part,
Claims (2)
の周囲に沿って並列に配置された複数の帯状パターンと
を有する電子部品搭載用基板において，上記複数の帯状
パターンのうち少なくとも互いに隣合う２つの帯状パタ
ーンは，該帯状パターンからその側方に突出するボンデ
ィングパッドを有し，一方の上記帯状パターンの上記ボ
ンディングパッドと，他方の上記帯状パターンの上記ボ
ンディングパッドとは，隣合う上記帯状パターンにより
挟まれた領域に配置されていることを特徴とする電子部
品搭載用基板。An electronic component mounting board having a mounting portion for mounting an electronic component and a plurality of band-shaped patterns arranged in parallel along the periphery thereof, wherein at least one of the plurality of band-shaped patterns is adjacent to each other. The two matching band-shaped patterns have bonding pads projecting laterally from the band-shaped pattern, and the bonding pad of one of the band-shaped patterns and the bonding pad of the other band-shaped pattern are adjacent to each other. An electronic component mounting board, which is arranged in a region sandwiched by patterns.
合う２つの上記帯状パターンのうち，一方の上記帯状パ
ターンから側方に突出する上記ボンディングパッドの先
端部は，他方の上記帯状パターンに対して，他方の該帯
状パターンから側方に突出する上記ボンディングパッド
の先端部よりも近くに配置されていることを特徴とする
電子部品搭載用基板。2. The bonding pad according to claim 1, wherein a tip of the bonding pad protruding laterally from one of the at least two strip-shaped patterns adjacent to each other is positioned with respect to the other strip-shaped pattern. An electronic component mounting substrate, which is disposed closer to a tip portion of the bonding pad protruding laterally from the other band-shaped pattern.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001167178A JP2002368153A (en) | 2001-06-01 | 2001-06-01 | Substrate for mounting with electronic component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001167178A JP2002368153A (en) | 2001-06-01 | 2001-06-01 | Substrate for mounting with electronic component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002368153A true JP2002368153A (en) | 2002-12-20 |
Family
ID=19009604
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001167178A Pending JP2002368153A (en) | 2001-06-01 | 2001-06-01 | Substrate for mounting with electronic component |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002368153A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2014119096A1 (en) * | 2013-02-01 | 2017-01-26 | ソニー株式会社 | Semiconductor integrated circuit |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11312705A (en) * | 1998-04-28 | 1999-11-09 | Nec Corp | Substrate for semiconductor device |
| JP2000260809A (en) * | 1999-03-12 | 2000-09-22 | Toshiba Corp | Package for semiconductor devices |
-
2001
- 2001-06-01 JP JP2001167178A patent/JP2002368153A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11312705A (en) * | 1998-04-28 | 1999-11-09 | Nec Corp | Substrate for semiconductor device |
| JP2000260809A (en) * | 1999-03-12 | 2000-09-22 | Toshiba Corp | Package for semiconductor devices |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2014119096A1 (en) * | 2013-02-01 | 2017-01-26 | ソニー株式会社 | Semiconductor integrated circuit |
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