JP2002366114A - Power unit and liquid crystal display device - Google Patents

Power unit and liquid crystal display device

Info

Publication number
JP2002366114A
JP2002366114A JP2001171888A JP2001171888A JP2002366114A JP 2002366114 A JP2002366114 A JP 2002366114A JP 2001171888 A JP2001171888 A JP 2001171888A JP 2001171888 A JP2001171888 A JP 2001171888A JP 2002366114 A JP2002366114 A JP 2002366114A
Authority
JP
Japan
Prior art keywords
voltage
power supply
circuit
common electrode
liquid crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001171888A
Other languages
Japanese (ja)
Other versions
JP3948224B2 (en
Inventor
Yasuyuki Kudo
泰幸 工藤
Riyoujin Akai
亮仁 赤井
Kazuo Daimon
一夫 大門
Kazunari Kurokawa
一成 黒川
Atsuhiro Higa
淳裕 比嘉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2001171888A priority Critical patent/JP3948224B2/en
Priority to KR10-2002-0031665A priority patent/KR100436405B1/en
Priority to TW091112191A priority patent/TW588315B/en
Publication of JP2002366114A publication Critical patent/JP2002366114A/en
Priority to US10/832,296 priority patent/US7078864B2/en
Priority to US11/223,049 priority patent/US20060007095A1/en
Application granted granted Critical
Publication of JP3948224B2 publication Critical patent/JP3948224B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve the problem of a conventional liquid crystal display device that a power circuit has large stationary power consumption, its component has to be replaced to vary a voltage level, and the number of components is large. SOLUTION: The liquid crystal display device is provided with a setting register 100 where the amplitudes and voltage levels of the driving voltage of a common electrode and the non-scanning period voltage of scanning lines are set, an amplitude reference generating circuit 101 which generates an amplitude reference voltage for the driving voltage of the common electrode and the non-scanning period voltage of the scanning lines according to the set values, a VcomH reference generating circuit 102 and a VcomL generating circuit 100 which performs the AC driving of the common electrode to the amplitude and voltage level determined according to the amplitude reference voltage and set values, and a VgoffH generating circuit 104 and a VgoffL reference generating circuit 105 which generate the non-scanning period voltage of the scanning lines in phase with and to the same amplitude with the driving voltage of the common electrode with the amplitude and voltage level determined by the amplitude reference voltage and set values.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、液晶表示装置の電
源を制御するための電源装置及びその電源装置を備えた
液晶表示装置に係わり、特にTFT(Thin Fil
m Transistor)方式の液晶表示装置の電源
制御装置及びその電源装置を備えた液晶表示装置に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device for controlling a power supply of a liquid crystal display device and a liquid crystal display device provided with the power supply device.
The present invention relates to a power supply control device for a liquid crystal display device of the (m Transistor) type and a liquid crystal display device including the power supply device.

【0002】[0002]

【従来の技術】従来の液晶表示装置の電源回路として
は、例えば、特開平10−301087号公報「液晶表
示装置」に開示される電源回路がある。図13を用いて
説明する。
2. Description of the Related Art As a conventional power supply circuit of a liquid crystal display device, there is, for example, a power supply circuit disclosed in Japanese Patent Application Laid-Open No. 10-31087 "Liquid crystal display device". This will be described with reference to FIG.

【0003】一般的に知られるように、液晶パネルにお
いては、液晶層の劣化を防止するため、コモン電極(対
向電極)に対する画素電極への書き込み電圧の極性を反
転する交流駆動が必要であり、TFT液晶パネルの駆動
方式の1つとして、コモン反転駆動方式がある。コモン
反転駆動方式を簡単に説明すれば、TFT液晶パネルの
コモン電極を一定時間毎に低電位と高電位に切り替えて
ドレイン電圧を画素電極に書き込む駆動方式である。
As is generally known, in a liquid crystal panel, in order to prevent the deterioration of a liquid crystal layer, an AC drive for inverting the polarity of a writing voltage to a pixel electrode with respect to a common electrode (counter electrode) is required. One of the driving methods of the TFT liquid crystal panel is a common inversion driving method. In brief, the common inversion driving method is a driving method in which a common electrode of a TFT liquid crystal panel is switched between a low potential and a high potential at regular intervals and a drain voltage is written to a pixel electrode.

【0004】また、TFT液晶の画素構造として、保持
容量を画素電極と1ライン前のゲート線に接続する構造
がある。コモン反転駆動方式を適用した場合、この画素
構造においては、コモン電圧と同振幅かつ同位相となる
ようにゲート線のオフ電圧を交流し、液晶容量の両端の
電位差を一定に保つ駆動方法が、保持容量及び液晶容量
の充放電電流を抑える効果があるため、一般的に使われ
ている。
Further, as a pixel structure of a TFT liquid crystal, there is a structure in which a storage capacitor is connected to a pixel electrode and a gate line one line before. When applying the common inversion driving method, in this pixel structure, a driving method in which the off voltage of the gate line is exchanged so as to have the same amplitude and the same phase as the common voltage, and the potential difference between both ends of the liquid crystal capacitor is kept constant, It is generally used because it has the effect of suppressing the charge / discharge current of the storage capacitor and the liquid crystal capacitor.

【0005】図13は従来の電源回路であり、前記コモ
ン電圧及びゲート線のオフ電圧を生成する。図13にお
いて、OPはオペアンプ、TR1はNPN型トランジス
タ及びTR2はPNP型トランジスタ、ZDはツェナー
ダイオード、R1から4は抵抗、C1はコンデンサであ
る。
FIG. 13 shows a conventional power supply circuit which generates the common voltage and the gate line off voltage. In FIG. 13, OP is an operational amplifier, TR1 is an NPN transistor, TR2 is a PNP transistor, ZD is a Zener diode, R1 to R4 are resistors, and C1 is a capacitor.

【0006】本回路では交流化信号Mを入力し、OPで
反転増幅して、TR1及びTR2で構成されるバッファ
で電流増幅してコモン電圧Vcomを生成している。ま
た、ZDにより負電圧VEE側にコモン電圧Vcomか
ら電圧をシフトしてゲートオフ電圧Vgoffを生成し
ている。
In this circuit, an AC signal M is input, inverted and amplified by OP, and current amplified by a buffer composed of TR1 and TR2 to generate a common voltage Vcom. Further, the gate-off voltage Vgoff is generated by shifting the voltage from the common voltage Vcom to the negative voltage VEE side by ZD.

【0007】[0007]

【発明が解決しようとする課題】TFT液晶パネルは従
来のノート型パソコンなどに用いられる大型TFT液晶
パネルに加えて、特に低消費電力が要求される小型の携
帯情報機器にも適用されている。
The TFT liquid crystal panel is applied not only to a large TFT liquid crystal panel used in a conventional notebook personal computer and the like, but also to a small portable information device which requires particularly low power consumption.

【0008】しかし、従来の電源回路はコモン電圧Vc
omからZDを介して定常的に電流が流れ、消費電力が
高かった。また、適用するTFT液晶パネルに応じてV
com及びVgoffの振幅や電圧レベルを変更するた
めには各抵抗値を変更したり、ZDなどの部品を置き換
えたりする必要があった。さらに、部品点数が多く、コ
スト的に不利であった。
However, the conventional power supply circuit has a common voltage Vc
The current steadily flowed from om via ZD, and the power consumption was high. Also, depending on the TFT liquid crystal panel to be applied, V
In order to change the amplitude and voltage level of “com” and “Vgoff”, it was necessary to change each resistance value and replace components such as ZD. Further, the number of parts is large, which is disadvantageous in cost.

【0009】本発明の目的は、液晶表示装置の消費電力
を低減することが可能な電源装置及びその液晶表示装置
を提供するである。
An object of the present invention is to provide a power supply device capable of reducing the power consumption of a liquid crystal display device and a liquid crystal display device thereof.

【0010】又は、本発明の目的は、ユーザの利便性を
向上することが可能な。電源装置及びその液晶表示装置
を提供することである。
[0010] Alternatively, it is an object of the present invention to improve user convenience. A power supply device and a liquid crystal display device thereof are provided.

【0011】[0011]

【課題を解決するための手段】本発明は、液晶表示装置
の共通電極の駆動電圧と走査線の非走査期間電圧との振
幅及び電圧レベルを設定する設定値保持回路と、設定値
に従って前記共通電極の駆動電圧と前記走査線の非走査
期間電圧との振幅基準電圧を生成する振幅基準電圧生成
回路と、前記振幅基準電圧と設定値から決まる振幅及び
電圧レベルで前記共通電極を交流駆動する共通電極駆動
回路と、前記振幅基準電圧と設定値から決まる振幅及び
電圧レベルで前記共通電極の駆動電圧と同位相かつ同振
幅の前記走査線の非走査期間電圧を生成する非走査期間
電圧生成回路とを具備する。好ましくは、前記共通電極
駆動回路は、設定値に従って一方の電位を生成し、一方
の電位から振幅基準電圧に従って他方の電位を生成し、
両電位を切り替えて共通電極の駆動電圧を生成する、好
ましくは、前記非走査期間電圧生成回路は、設定値に従
って一方の電位を生成し、一方の電位から振幅基準電圧
に従って他方の電位を生成し、両電位を切り替えて前記
走査線の非走査期間電圧を生成する、好ましくは、前記
共通電極の駆動電圧の低電位側電圧は負電位あるいは接
地(グランド)あるいは正電位のうちのいずれにも設定
可能である。
According to the present invention, there is provided a set value holding circuit for setting an amplitude and a voltage level of a drive voltage of a common electrode of a liquid crystal display device and a non-scanning period voltage of a scanning line, and the common value according to a set value. An amplitude reference voltage generation circuit for generating an amplitude reference voltage between an electrode drive voltage and a non-scanning period voltage of the scanning line; and a common AC drive for the common electrode with an amplitude and a voltage level determined from the amplitude reference voltage and a set value. An electrode driving circuit, a non-scanning period voltage generating circuit that generates a non-scanning period voltage of the scanning line having the same phase and the same amplitude as the driving voltage of the common electrode at an amplitude and a voltage level determined from the amplitude reference voltage and a set value. Is provided. Preferably, the common electrode drive circuit generates one potential according to a set value, and generates another potential from one potential according to an amplitude reference voltage,
Switching between both potentials to generate a drive voltage for the common electrode, preferably, the non-scanning period voltage generation circuit generates one potential according to a set value, and generates the other potential from one potential according to the amplitude reference voltage. Generating a non-scanning period voltage of the scanning line by switching both potentials. Preferably, the low potential side voltage of the driving voltage of the common electrode is set to a negative potential, a ground (ground) or a positive potential. It is possible.

【0012】又は、本発明は、液晶表示装置の共通電極
の駆動電圧と走査線の非走査期間電圧との電圧レベルを
設定する設定値保持回路と、一方の電位を固定し他方の
電位を設定値に従って生成して前記共通電極を交流駆動
する共通電極駆動回路と、一方の電位を設定値に従って
生成して他方の電位を共通電極の駆動電圧の電位差から
生成して前記共通電極の駆動電圧と同位相かつ同振幅の
前記走査線の非走査期間電圧を生成する非走査期間電圧
生成回路と、を具備する。好ましくは、前記共通電極の
駆動電圧の固定する一方の電位は接地(グランド)であ
る、又は、本発明は、データ線とスイッチング素子を介
して接続された画素電極と画素電極との間に液晶を挟持
する共通電極とを有する画素部を複数のデータ線および
複数の走査線の交点位置にマトリックス状に配列された
液晶パネルと、各種設定値を設定する中央処理装置と、
前記中央処理装置からの設定値を一時保持する液晶駆動
回路と、前記液晶駆動回路からの設定値及び制御信号に
従って液晶パネルの走査線を駆動する走査回路と、基準
電源を昇圧して前記液晶駆動回路の電源及び前記走査回
路の電源及び液晶パネルの共通電極の駆動電圧を前記液
晶駆動回路からの設定値に従って生成する電源回路とを
具備する。
According to another aspect of the present invention, there is provided a setting value holding circuit for setting a voltage level between a driving voltage of a common electrode of a liquid crystal display device and a non-scanning period voltage of a scanning line, and fixing one potential and setting the other potential. A common electrode drive circuit that generates according to a value and AC drives the common electrode, and generates one potential according to a set value and generates the other potential from a potential difference between the common electrode drive voltage and the common electrode drive voltage. A non-scanning period voltage generation circuit for generating a non-scanning period voltage of the scanning line having the same phase and the same amplitude. Preferably, the one potential for fixing the driving voltage of the common electrode is ground (ground), or the present invention provides a liquid crystal between a pixel electrode connected via a data line and a switching element. A liquid crystal panel in which a pixel portion having a common electrode sandwiching the same is arranged in a matrix at intersections of a plurality of data lines and a plurality of scanning lines, and a central processing unit for setting various setting values,
A liquid crystal drive circuit that temporarily holds a set value from the central processing unit; a scan circuit that drives a scan line of a liquid crystal panel according to a set value and a control signal from the liquid crystal drive circuit; A power supply circuit for generating a power supply for the circuit, a power supply for the scanning circuit, and a drive voltage for the common electrode of the liquid crystal panel in accordance with a set value from the liquid crystal drive circuit.

【0013】[0013]

【発明の実施の形態】(第1の実施の形態)以下、図1
から図3を用いて、本発明の一実施形態による電源回路
の構成および動作について説明する。最初に、図1を用
いて、本実施形態による電源回路の全体構成について説
明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG.
The configuration and operation of the power supply circuit according to one embodiment of the present invention will be described with reference to FIGS. First, the overall configuration of the power supply circuit according to the present embodiment will be described with reference to FIG.

【0014】本実施形態による電源回路は、設定値を保
持する設定レジスタ100と、基準電圧Vregから設
定値に従って電圧Vampを生成する振幅基準発生回路
101と、基準電圧Vregから設定値に従って電圧V
comHを生成するVcomH基準発生回路102と、
前記VcomHと前記Vampから電圧VcomLを生
成するVcomL生成回路103と、基準電圧Vreg
から設定値に従って電圧VgoffLを生成するVgo
ffL基準発生回路104と、前記VgoffLと前記
Vampから電圧VgoffHを生成するVgoffH
生成回路105と、VcomH及びVcomL及びVg
offH及びVgoffLを受けて電流増幅するバッフ
ァ106から109と、交流化信号Mに従ってVcom
H及びVcomLを切り替えてコモン電圧Vcomを生
成する電圧セレクタ110と、交流化信号Mに従ってV
goffH及びVgoffLを切り替えてゲートオフ電
圧Vgoffを生成する電圧セレクタ111と、から構
成される。
The power supply circuit according to the present embodiment includes a setting register 100 for holding a set value, an amplitude reference generating circuit 101 for generating a voltage Vamp from a reference voltage Vreg in accordance with the set value, and a voltage V in accordance with the set value from the reference voltage Vreg.
a VcomH reference generation circuit 102 that generates a comH;
A VcomL generating circuit 103 for generating a voltage VcomL from the VcomH and the Vamp, and a reference voltage Vreg
Generates a voltage VgoffL according to a set value from Vgo
ffL reference generation circuit 104, and VgoffH for generating voltage VgoffH from VgoffL and Vamp.
The generation circuit 105, VcomH, VcomL, and Vg
The buffers 106 to 109 receive currents offH and VgoffL and amplify the current.
A voltage selector 110 that switches between H and VcomL to generate a common voltage Vcom;
and a voltage selector 111 that switches between goffH and VgoffL to generate a gate-off voltage Vgoff.

【0015】次に本実施形態による電源回路の動作につ
いて説明する。まず、設定レジスタ102には振幅基準
発生回路101と、VcomH基準発生回路102と、
VgoffL基準発生回路104の各回路が生成する電
圧を決定するための設定値が保持されている。各設定値
を変更すると、変更された設定値に従って各回路の生成
する電圧が変化する。振幅基準発生回路101は、基準
電圧Vregを基準として設定値に従って、VcomL
生成回路103及びVgoffH生成回路105の基準
電圧である電圧Vampを生成して、コモン電圧Vco
m及びゲートオフ電圧Vgoffの電圧振幅を決定す
る。VcomH基準発生回路102は、基準電圧Vre
gを基準として設定値に従って、コモン電圧Vcomの
高電位側電圧となる電圧VcomHを生成する。Vco
mL生成回路103は、VcomHを基準としてVam
pに従って、コモン電圧Vcomの低電位側電圧となる
電圧VcomLを生成する。VcomH及びVcomL
はバッファ106及びバッファ107により、TFT液
晶パネルのコモン電極を駆動するのに十分な電流を供給
するように、電流増幅される。バッファ106とバッフ
ァ107により増幅されたVcomHとVcomLは電
圧セレクタ110に入力され、交流化信号Mにより切り
替えて一方をコモン電圧Vcomとして出力する。例え
ば交流化信号Mがローレベルのとき液晶パネルの駆動電
圧が正極性とすると、電圧セレクタ110はVcomL
を選択して出力する。VgoffL基準発生回路104
は、基準電圧Vregを基準として設定値に従って、ゲ
ートオフ電圧Vgoffの低電位側電圧となる電圧Vg
offLを生成する。VgoffH生成回路105は、
VgoffLを基準としてVampに従って、ゲートオ
フ電圧Vgoffの高電位側電圧となる電圧Vgoff
Hを生成する。なお、電圧VgoffHはVgoffL
との電位差がコモン電圧Vcomの振幅と同じになるよ
うにする。VgoffH及びVgoffLはバッファ1
08及びバッファ109により、TFT液晶パネルのゲ
ート電極のオフ期間を駆動するのに十分な電流を供給す
るように、電流増幅される。バッファ108とバッファ
109により増幅されたVgoffHとVgoffLは
電圧セレクタ111に入力され、交流化信号Mにより切
り替えて一方をゲートオフ電圧Vgoffとして出力す
る。例えば交流化信号Mがローレベルのとき液晶パネル
の駆動電圧が正極性とすると、電圧セレクタ111はV
goffLを選択して出力する。従ってコモン電圧Vc
omと、ゲートオフ電圧Vgoffは同位相かつ同振幅
の電圧波形となる。
Next, the operation of the power supply circuit according to the present embodiment will be described. First, an amplitude reference generation circuit 101, a VcomH reference generation circuit 102,
A set value for determining a voltage generated by each circuit of the VgoffL reference generation circuit 104 is held. When each set value is changed, the voltage generated by each circuit changes according to the changed set value. The amplitude reference generation circuit 101 uses the reference voltage Vreg as a reference in accordance with a set value and VcomL.
A voltage Vamp, which is a reference voltage of the generation circuit 103 and the VgoffH generation circuit 105, is generated to generate a common voltage Vco.
m and the voltage amplitude of the gate-off voltage Vgoff are determined. The VcomH reference generation circuit 102 outputs the reference voltage Vre
A voltage VcomH that is a high-potential-side voltage of the common voltage Vcom is generated according to a set value with g as a reference. Vco
The mL generation circuit 103 calculates VamH based on VcomH.
According to p, a voltage VcomL that is a low-potential-side voltage of the common voltage Vcom is generated. VcomH and VcomL
Is amplified by the buffers 106 and 107 so as to supply a current sufficient to drive the common electrode of the TFT liquid crystal panel. VcomH and VcomL amplified by the buffers 106 and 107 are input to the voltage selector 110 and switched by the AC signal M to output one as the common voltage Vcom. For example, if the drive voltage of the liquid crystal panel is positive when the AC signal M is low, the voltage selector 110
Select and output. VgoffL reference generation circuit 104
Is a voltage Vg that is a low-potential-side voltage of the gate-off voltage Vgoff according to a set value with reference to the reference voltage Vreg.
generate offL. The VgoffH generation circuit 105
A voltage Vgoff that is a high-potential-side voltage of the gate-off voltage Vgoff according to Vamp with VgoffL as a reference.
Generate H. Note that the voltage VgoffH is VgoffL
Is made equal to the amplitude of the common voltage Vcom. VgoffH and VgoffL are in buffer 1
08 and the buffer 109, the current is amplified so as to supply a current sufficient to drive the off period of the gate electrode of the TFT liquid crystal panel. VgoffH and VgoffL amplified by the buffers 108 and 109 are input to the voltage selector 111, and are switched by the AC signal M to output one as the gate-off voltage Vgoff. For example, if the drive voltage of the liquid crystal panel is positive when the AC signal M is low, the voltage selector 111
goffL is selected and output. Therefore, the common voltage Vc
om and the gate-off voltage Vgoff have the same phase and the same amplitude.

【0016】次に図2を用いて本実施形態による電源回
路のコモン電圧Vcomを生成する回路について具体例
を挙げて詳細に説明する。図2において、振幅基準電圧
発生回路101は、オペアンプOP1と、可変抵抗R1
aと、抵抗R1bと、から構成される。VcomH基準
発生回路102は、オペアンプOP2と、可変抵抗R2
aと、抵抗R2bと、から構成される。VcomL生成
回路103は、オペアンプOP3と、抵抗R3aからR
3dと、から構成される。バッファ106はオペアンプ
OP6から構成される。バッファ107はオペアンプO
P7から構成される。なお、VcomHは通常正の電源
電圧DDVDH付近の電圧値に設定されるため、OP2
とOP6の正の電源はDDVDH、負の電源はグランド
GNDとする。また、VcomLは通常GND付近の電
圧値に設定されるため、OP3とOP7の正の電源はD
DVDH、負の電源は負の電源電圧VCLとする。また
電圧振幅に係わる電圧Vampを生成するOP1の正の
電源はDDVDH、負の電源はグランドGNDとする。
Next, a circuit for generating the common voltage Vcom of the power supply circuit according to the present embodiment will be described in detail with reference to FIG. 2, an amplitude reference voltage generating circuit 101 includes an operational amplifier OP1 and a variable resistor R1.
a and a resistor R1b. The VcomH reference generation circuit 102 includes an operational amplifier OP2 and a variable resistor R2
a and a resistor R2b. The VcomL generation circuit 103 includes an operational amplifier OP3 and resistors R3a to R3a.
3d. The buffer 106 includes an operational amplifier OP6. The buffer 107 is an operational amplifier O
P7. Since VcomH is usually set to a voltage value near the positive power supply voltage DDVDH, OP2
, OP6 have a positive power supply of DDVDH and a negative power supply of ground GND. Also, since VcomL is normally set to a voltage value near GND, the positive power supply of OP3 and OP7 is
DVDH, the negative power supply is a negative power supply voltage VCL. The positive power supply of OP1 that generates the voltage Vamp related to the voltage amplitude is DDVDH, and the negative power supply is ground GND.

【0017】振幅基準電圧発生回路101では、基準電
圧Vregから可変抵抗R1a及び抵抗R1bで分圧し
て得られる電圧をボルテージフォロアを成すオペアンプ
OP1でバッファして電圧Vampを生成する。可変抵
抗R1aは抵抗とMOSスイッチから構成されるいわゆ
る電子式のボリューム抵抗で、設定レジスタ100の設
定値により抵抗値が変更可能である。また、VcomH
基準電圧発生回路102では、基準電圧Vregから可
変抵抗R2a及び抵抗R2bで分圧して得られる電圧を
ボルテージフォロアを成すオペアンプOP2でバッファ
して電圧VcomHを生成する。可変抵抗R2aは可変
抵抗R1aと同様に、設定レジスタ100の設定値によ
り抵抗値が変更可能である。VcomL生成回路103
は差動増幅回路を成し、VcomHとVampからVc
omLを生成する。VcomLの電圧は次式により表さ
れる。
In the amplitude reference voltage generation circuit 101, a voltage obtained by dividing the reference voltage Vreg by the variable resistor R1a and the resistor R1b is buffered by an operational amplifier OP1 forming a voltage follower to generate a voltage Vamp. The variable resistor R1a is a so-called electronic volume resistor composed of a resistor and a MOS switch, and the resistance value can be changed by a setting value of the setting register 100. Also, VcomH
In the reference voltage generation circuit 102, a voltage obtained by dividing the reference voltage Vreg by the variable resistor R2a and the resistor R2b is buffered by an operational amplifier OP2 forming a voltage follower to generate a voltage VcomH. The resistance value of the variable resistor R2a can be changed by the setting value of the setting register 100, similarly to the variable resistor R1a. VcomL generation circuit 103
Forms a differential amplifier circuit, and VcH is derived from VcomH and Vamp.
Generate omL. The voltage of VcomL is represented by the following equation.

【0018】 VcomL = A・VcomH−B・Vamp …(1) (但し、A={(R3c+R3d)・R3b}/{(R
3a+R3b)・R3d}、B=R3c/R3d、とす
る。) バッファ106では、ボルテージフォロアを成すオペア
ンプOP6でVcomHをバッファする。また、バッフ
ァ107では、ボルテージフォロアを成すオペアンプO
P7でVcomLをバッファする。以上のように、Vc
omHとVampからVcomLを生成することが可能
であり、VcomHとVampを設定値により調節して
Vcomの振幅及び電圧レベルを容易に調節可能であ
る。
VcomL = A · VcomH−B · Vamp (1) (where, A = {(R3c + R3d) · R3b} /} (R
3a + R3b) · R3d}, and B = R3c / R3d. In the buffer 106, VcomH is buffered by the operational amplifier OP6 forming a voltage follower. In the buffer 107, an operational amplifier O forming a voltage follower is used.
Buffer VcomL at P7. As described above, Vc
VcomL can be generated from omH and Vamp, and the amplitude and voltage level of Vcom can be easily adjusted by adjusting VcomH and Vamp according to set values.

【0019】ここで、コモン電圧Vcomの振幅を、V
comHの設定によらずVampの設定だけで生成する
ための条件を示すと、R3a=R3c、R3b=R3
d、であり、これを式(1)に代入して次式を得る。
Here, the amplitude of the common voltage Vcom is
If the conditions for generating only with the setting of Vamp irrespective of the setting of comH are shown, R3a = R3c, R3b = R3
d, which is substituted into equation (1) to obtain the following equation.

【0020】 VcomH−VcomL = (R3a/R3b)・Vamp …(2) すなわちコモン電圧Vcomの振幅はVampに比例し
た電圧となる。
VcomH−VcomL = (R3a / R3b) · Vamp (2) That is, the amplitude of the common voltage Vcom is a voltage proportional to Vamp.

【0021】ここでVcomLの電圧値について説明す
る。VcomLは(R3a/R3b)とVampの積で
決まり、GND付近の値を取る。OP3とOP7の正の
電源はDDVDH、負の電源は負の電源電圧VCLであ
るため、VcomLは、負の電圧、GND、正の電圧の
いずれかにすることが可能であり、種々の液晶パネルに
対応することが可能である。
Here, the voltage value of VcomL will be described. VcomL is determined by the product of (R3a / R3b) and Vamp, and takes a value near GND. Since the positive power supply of OP3 and OP7 is DDVDH and the negative power supply is negative power supply voltage VCL, VcomL can be any one of negative voltage, GND, and positive voltage. It is possible to correspond to.

【0022】次に図3を用いて本実施形態による電源回
路のゲートオフ電圧Vgoffを生成する回路について
具体例を挙げて詳細に説明する。図3において、Vgo
ffL基準発生回路104は、オペアンプOP4と、可
変抵抗R4aと、抵抗R4bと、から構成される。Vg
offH生成回路105は、オペアンプOP5と、抵抗
R5aからR5dと、から構成される。バッファ108
はオペアンプOP8から構成される。バッファ109は
オペアンプOP9から構成される。なお、VgoffH
及びVgoffLはグランドGNDから負の電源電圧V
GLの範囲にあるものとする。
Next, a circuit for generating the gate-off voltage Vgoff of the power supply circuit according to the present embodiment will be described in detail with reference to FIG. In FIG. 3, Vgo
The ffL reference generation circuit 104 includes an operational amplifier OP4, a variable resistor R4a, and a resistor R4b. Vg
The offH generation circuit 105 includes an operational amplifier OP5 and resistors R5a to R5d. Buffer 108
Is composed of an operational amplifier OP8. The buffer 109 includes an operational amplifier OP9. Note that VgoffH
And VgoffL are the negative power supply voltage V from ground GND.
It is assumed to be in the range of GL.

【0023】VgoffL基準電圧発生回路104で
は、VgoffLと正の電源電圧DDVDHから可変抵
抗R4a及び抵抗R4bで分圧して得られる電圧が基準
電圧Vregに等しくなるようにオペアンプOP4がV
goffLを生成する。可変抵抗R4aは可変抵抗R1
aと同様に、設定レジスタ100の設定値により抵抗値
が変更可能である。VgoffH生成回路105は差動
増幅回路を成し、VgoffLとVampからVgof
fHを生成する。VgoffHの電圧は次式により表さ
れる。
In the VgoffL reference voltage generating circuit 104, the operational amplifier OP4 operates so that the voltage obtained by dividing the voltage VgoffL and the positive power supply voltage DDVDH by the variable resistors R4a and R4b becomes equal to the reference voltage Vreg.
Generate goffL. The variable resistor R4a is the variable resistor R1
Similarly to a, the resistance value can be changed by the set value of the setting register 100. The VgoffH generating circuit 105 forms a differential amplifier circuit, and calculates Vgoff from VgoffL and Vamp.
Generate fH. The voltage of VgoffH is represented by the following equation.

【0024】 VgoffH = C・VgoffL+D・Vamp …(3) (但し、C={(R4c+R4d)・R4a}/{(R
4a+R4b)・R4c}、D=R4b/R4c、とす
る。) バッファ108では、ボルテージフォロアを成すオペア
ンプOP8でVgoffHをバッファする。また、バッ
ファ109では、ボルテージフォロアを成すオペアンプ
OP9でVgoffLをバッファする。以上のように、
VgoffLとVampからVgoffHを生成するこ
とが可能であり、VgoffLとVampを設定値によ
り調節してVgoffの振幅及び電圧レベルを容易に調
節可能である。
VgoffH = C · VgoffL + D · Vamp (3) (where C = {(R4c + R4d) · R4a} / {(R
4a + R4b) · R4c}, and D = R4b / R4c. In the buffer 108, VgoffH is buffered by the operational amplifier OP8 forming a voltage follower. In the buffer 109, VgoffL is buffered by an operational amplifier OP9 forming a voltage follower. As mentioned above,
VgoffH can be generated from VgoffL and Vamp, and the amplitude and voltage level of Vgoff can be easily adjusted by adjusting VgoffL and Vamp according to set values.

【0025】ここで、ゲートオフ電圧Vgoffの振幅
を、VgoffLの設定によらずVampの設定だけで
生成するための条件を示すと、R4a=R4c、R4b
=R4d、であり、これを式(3)に代入して次式を得
る。
Here, conditions for generating the amplitude of the gate-off voltage Vgoff only by setting Vamp without depending on the setting of VgoffL are as follows: R4a = R4c, R4b
= R4d, which is substituted into equation (3) to obtain the following equation.

【0026】 VgoffH−VgoffL = (R4b/R4a)・Vamp …( 4) すなわちゲートオフ電圧Vgoffの振幅はVampに
比例した電圧となる。
VgoffH−VgoffL = (R4b / R4a) · Vamp (4) That is, the amplitude of the gate-off voltage Vgoff is a voltage proportional to Vamp.

【0027】さらにまた、コモン電圧Vcomの振幅
と、ゲートオフ電圧Vgoffの振幅とが、等しくなる
条件を示すと、(R3a/R3b)=(R4b/R4
a)である。
Further, if the condition that the amplitude of the common voltage Vcom and the amplitude of the gate-off voltage Vgoff are equal is shown, (R3a / R3b) = (R4b / R4
a).

【0028】従って以上に示した条件を全て満たすよう
に抵抗の比を選ぶことによって、VcomHの電圧と、
VgoffLの電圧と、を設定してコモン電圧Vcom
及びゲートオフ電圧Vgoffの基準電位を決めて、さ
らにVampの電圧を設定することで、同位相かつ同振
幅のコモン電圧Vcomと、ゲートオフ電圧Vgoff
を生成することが可能である。
Therefore, by selecting the ratio of the resistances so as to satisfy all of the above conditions, the voltage of VcomH and
VgoffL and the common voltage Vcom
By determining the reference potential of the gate-off voltage Vgoff and further setting the voltage of Vamp, the common voltage Vcom having the same phase and the same amplitude and the gate-off voltage Vgoff
Can be generated.

【0029】以上説明したように、振幅基準発生回路及
びVcomH基準発生回路及びVgoffL基準発生回
路の設定値により、同位相かつ同振幅のコモン電圧Vc
om及びゲートオフ電圧Vgoffを容易に生成するこ
とが出来る。
As described above, the common voltage Vc having the same phase and the same amplitude is determined by the set values of the amplitude reference generation circuit, the VcomH reference generation circuit, and the VgoffL reference generation circuit.
om and the gate-off voltage Vgoff can be easily generated.

【0030】さらに、本実施の形態による電源回路は、
抵抗やオペアンプなどで実現可能であるため、ICに集
積可能であり、部品点数を減らすことが出来る。
Further, the power supply circuit according to the present embodiment
Since it can be realized by a resistor, an operational amplifier, or the like, it can be integrated in an IC, and the number of components can be reduced.

【0031】さらに、抵抗比で各電圧レベル及び振幅を
決定するため、抵抗値を高くすれば定常的な電流を抑
え、低消費電力化が可能である。
Further, since each voltage level and amplitude are determined by the resistance ratio, a higher resistance value can suppress a steady current and reduce power consumption.

【0032】以上、第1の実施の形態による電源回路に
ついて説明を行ったが、第2の実施の形態による電源回
路は、より回路規模を縮小し、消費電力を削減する方法
を示す。 (第2の実施の形態)以下、本発明の第2の実施形態に
よる電源回路を、図4及び図5を用いて説明する。本実
施形態は、VcomLを固定したことに特徴を有してお
り、第1の実施の形態による電源回路のコモン電圧Vc
om及びゲートオフ電圧Vgoffの振幅の決定方法が
異なるものである。
The power supply circuit according to the first embodiment has been described above. The power supply circuit according to the second embodiment will show a method for further reducing the circuit scale and reducing power consumption. (Second Embodiment) Hereinafter, a power supply circuit according to a second embodiment of the present invention will be described with reference to FIGS. This embodiment is characterized in that VcomL is fixed, and the common voltage Vc of the power supply circuit according to the first embodiment is set.
om and the method of determining the amplitude of the gate-off voltage Vgoff are different.

【0033】図4において、VcomLはGND固定と
し、VcomHは第1の実施の形態による電源回路と同
様に、VcomH基準発生回路102から生成する。ま
た、VgoffLは第1の実施の形態による電源回路と
同様に、VgoffL基準発生回路105から生成す
る。VgoffHはVcomHとVgoffLをVgo
ffH生成回路に入力して生成する。すなわち第1の実
施の形態による電源回路でVgoffH生成回路に入力
していたVampの代わりにVcomHを入力する。各
回路の具体的な内部構成は第1の実施の形態による電源
回路と同じである。従って、VgoffHは次式で示さ
れる。
In FIG. 4, VcomL is fixed to GND, and VcomH is generated from the VcomH reference generation circuit 102 as in the power supply circuit according to the first embodiment. Further, VgoffL is generated from the VgoffL reference generation circuit 105 as in the power supply circuit according to the first embodiment. VgoffH is obtained by converting VcomH and VgoffL to Vgo
It is input to the ffH generation circuit and generated. That is, in the power supply circuit according to the first embodiment, VcomH is input instead of Vamp input to the VgoffH generation circuit. The specific internal configuration of each circuit is the same as the power supply circuit according to the first embodiment. Therefore, VgoffH is expressed by the following equation.

【0034】 VgoffH = C・VgoffL+D・VcomH …(5) (但し、C={(R4c+R4d)・R4a}/{(R
4a+R4b)・R4c}、D=R4b/R4c、とす
る。) ここで、ゲートオフ電圧Vgoffの振幅を、Vgof
fLの設定によらずVcomHの設定だけで生成するた
めの条件を示すと、R4a=R4c=R4b=R4d、
であり、これを式(5)に代入して次式を得る。
VgoffH = C · VgoffL + D · VcomH (5) (where C = {(R4c + R4d) · R4a} / {(R
4a + R4b) · R4c}, and D = R4b / R4c. Here, the amplitude of the gate-off voltage Vgoff is defined as Vgof
If the conditions for generating only with the setting of VcomH regardless of the setting of fL are shown, R4a = R4c = R4b = R4d,
This is substituted into equation (5) to obtain the following equation.

【0035】 VgoffH−VgoffL = VcomH …(6) 従ってVcomLをGNDに固定したとき、Vgoff
H生成回路の抵抗値を全て等しくすることで、Vcom
Hの電圧と、VgoffLの電圧と、を設定して、同位
相かつ同振幅のコモン電圧Vcomと、ゲートオフ電圧
Vgoffを生成することが可能である。
VgoffH−VgoffL = VcomH (6) Therefore, when VcomL is fixed to GND, Vgoff
By making all resistance values of the H generation circuit equal, Vcom
By setting the voltage of H and the voltage of VgoffL, it is possible to generate the common voltage Vcom and the gate-off voltage Vgoff having the same phase and the same amplitude.

【0036】さらに、本実施の形態による電源回路は、
第1の実施の形態による電源回路と比較して回路規模を
縮小し、消費電力を削減することが出来る。
Further, the power supply circuit according to the present embodiment
Compared with the power supply circuit according to the first embodiment, the circuit scale can be reduced and power consumption can be reduced.

【0037】次に、図5を用いて、第1の実施の形態に
よる電源回路と、図4に示した電源回路と、を切り替え
て使用できる電源回路について説明する。図5におい
て、本実施形態による電源回路は、VampとVcom
Hとを切り替え信号MODEによって切り替えてVgo
ffに与える電圧セレクタ201と、バッファ107で
増幅したVcomLとGNDを切り替え信号MODEに
よって切り替えて電圧セレクタ110に与える電圧セレ
クタ202を備えている。なお、VgoffH生成回路
の抵抗値を全て等しくする。すなわちR4a=R4c=
R4b=R4dとなる。また、VcomLをGND固定
にしたとき、振幅基準発生回路101と、VcomL生
成回路103と、バッファ107はそれぞれの電源を切
ることで消費電力を削減することが出来る。
Next, a power supply circuit that can be used by switching between the power supply circuit according to the first embodiment and the power supply circuit shown in FIG. 4 will be described with reference to FIG. In FIG. 5, the power supply circuit according to the present embodiment includes Vamp and Vcom.
H by the switching signal MODE and Vgo
The voltage selector 201 includes a voltage selector 201 for giving to ff, and a voltage selector 202 for switching between VcomL and GND amplified by the buffer 107 with the switching signal MODE and for giving to the voltage selector 110. Note that the resistance values of the VgoffH generation circuit are all equal. That is, R4a = R4c =
R4b = R4d. When VcomL is fixed to GND, the power consumption of the amplitude reference generation circuit 101, the VcomL generation circuit 103, and the buffer 107 can be reduced by turning off each power supply.

【0038】以上説明したように、VcomLをGND
に固定した場合、低消費電力であり、かつ振幅基準発生
回路及びVcomH基準発生回路及びVgoffL基準
発生回路の設定値により、同位相かつ同振幅のコモン電
圧Vcom及びゲートオフ電圧Vgoffを容易に生成
することが出来る。
As described above, VcomL is changed to GND.
, The common voltage Vcom and the gate-off voltage Vgoff having the same phase and the same amplitude can be easily generated by setting values of the low power consumption, the amplitude reference generation circuit, the VcomH reference generation circuit, and the VgoffL reference generation circuit. Can be done.

【0039】以上、第2の実施の形態による電源回路に
ついて説明を行ったが、第3の実施の形態による電源回
路では、基準電圧を変えても同様に同位相かつ同振幅の
容易に切り替える方法について述べる。 (第3の実施の形態)以下、本発明の第3の実施形態に
よる電源回路を、図6から図8を用いて説明する。最初
に、図6を用いて、本実施形態による電源回路の全体構
成について説明する。
The power supply circuit according to the second embodiment has been described above. However, in the power supply circuit according to the third embodiment, even if the reference voltage is changed, a method of easily switching between the same phase and the same amplitude is similarly used. Is described. (Third Embodiment) A power supply circuit according to a third embodiment of the present invention will be described below with reference to FIGS. First, the overall configuration of the power supply circuit according to the present embodiment will be described with reference to FIG.

【0040】本実施形態による電源回路は、設定値を保
持する設定レジスタ100と、基準電圧Vregから設
定値に従って電圧Vampを生成する振幅基準発生回路
101と、基準電圧Vregから設定値に従って電圧V
comLを生成するVcomL基準発生回路301と、
前記VcomLと前記Vampから電圧VcomHを生
成するVcomH生成回路302と、基準電圧Vreg
から設定値に従って電圧VgoffHを生成するVgo
ffH基準発生回路303と、前記VgoffHと前記
Vampから電圧VgoffLを生成するVgoffL
生成回路304と、VcomH及びVcomL及びVg
offH及びVgoffLを受けて電流増幅するバッフ
ァ106から109と、交流化信号Mに従ってVcom
H及びVcomLを切り替えてコモン電圧Vcomを生
成する電圧セレクタ110と、交流化信号Mに従ってV
goffH及びVgoffLを切り替えてゲートオフ電
圧Vgoffを生成する電圧セレクタ111と、から構
成される。
The power supply circuit according to the present embodiment includes a setting register 100 for holding a set value, an amplitude reference generating circuit 101 for generating a voltage Vamp from a reference voltage Vreg in accordance with the set value, and a voltage V in accordance with the set value from the reference voltage Vreg.
a VcomL reference generation circuit 301 that generates a comL;
A VcomH generation circuit 302 that generates a voltage VcomH from the VcomL and the Vamp, and a reference voltage Vreg.
Generates a voltage VgoffH according to a set value from Vgo
ffH reference generation circuit 303, and VgoffL for generating voltage VgoffL from VgoffH and Vamp
The generation circuit 304, VcomH, VcomL, and Vg
The buffers 106 to 109 receive currents offH and VgoffL and amplify the current.
A voltage selector 110 that switches between H and VcomL to generate a common voltage Vcom;
and a voltage selector 111 that switches between goffH and VgoffL to generate a gate-off voltage Vgoff.

【0041】次に本実施形態による電源回路の動作につ
いて説明する。振幅基準発生回路101は、基準電圧V
regを基準として設定値に従って、VcomH生成回
路302及びVgoffL生成回路304の基準電圧で
ある電圧Vampを生成して、コモン電圧Vcom及び
ゲートオフ電圧Vgoffの電圧振幅を決定する。Vc
omL基準発生回路301は、基準電圧Vregを基準
として設定値に従って、コモン電圧Vcomの低電位側
電圧となる電圧VcomLを生成する。VcomH生成
回路302は、VcomLを基準としてVampに従っ
て、コモン電圧Vcomの高電位側電圧となる電圧Vc
omHを生成する。バッファ106及びバッファ107
及び電圧セレクタ110は第1の実施形態による電源回
路と動作は同じである。VgoffH基準発生回路30
3は、基準電圧Vregを基準として設定値に従って、
ゲートオフ電圧Vgoffの高電位側電圧となる電圧V
goffHを生成する。VgoffL生成回路304
は、VgoffHを基準としてVampに従って、ゲー
トオフ電圧Vgoffの低電位側電圧となる電圧Vgo
ffLを生成する。なお、電圧VgoffLはVgof
fHとの電位差がコモン電圧Vcomの振幅と同じにな
るようにする。バッファ108及びバッファ109及び
電圧セレクタ111は第1の実施形態による電源回路と
動作は同じである。
Next, the operation of the power supply circuit according to the present embodiment will be described. The amplitude reference generation circuit 101 outputs the reference voltage V
A voltage Vamp, which is a reference voltage of the VcomH generation circuit 302 and the VgoffL generation circuit 304, is generated in accordance with a setting value with reference to reg, and the voltage amplitude of the common voltage Vcom and the gate-off voltage Vgoff is determined. Vc
The omL reference generation circuit 301 generates a voltage VcomL that is a low-potential-side voltage of the common voltage Vcom according to a set value with reference to the reference voltage Vreg. The VcomH generation circuit 302 generates a voltage Vc that is a high-potential-side voltage of the common voltage Vcom according to Vamp based on VcomL.
omH is generated. Buffer 106 and buffer 107
The operation of the voltage selector 110 is the same as that of the power supply circuit according to the first embodiment. VgoffH reference generation circuit 30
3 is based on the reference voltage Vreg and according to the set value,
A voltage V that is a high-potential-side voltage of the gate-off voltage Vgoff
Generate goffH. VgoffL generation circuit 304
Is a voltage Vgo that is a lower potential side voltage of the gate-off voltage Vgoff according to Vamp with VgoffH as a reference.
Generate ffL. Note that the voltage VgoffL is equal to Vgoff.
The potential difference from fH is made equal to the amplitude of the common voltage Vcom. The operations of the buffer 108, the buffer 109, and the voltage selector 111 are the same as those of the power supply circuit according to the first embodiment.

【0042】次に図7を用いて本実施形態による電源回
路のコモン電圧Vcomを生成する回路について具体例
を挙げて詳細に説明する。図7において、振幅基準電圧
発生回路101は、第1の実施形態による電源回路のそ
れと同じ構成である。VcomL基準発生回路301
は、VcomH基準発生回路102と同じ構成であり、
VcomHの代わりにVcomLを生成することが異な
る。VcomH生成回路302は、オペアンプOP10
と、抵抗R6aからR6dと、から構成される。なお、
VcomHは通常正の電源電圧DDVDH付近の電圧値
に設定されるため、OP2とOP6の正の電源はDDV
DH、負の電源はグランドGNDとする。また、Vco
mLは通常GND付近の電圧値に設定されるため、OP
3とOP7の正の電源はDDVDH、負の電源は負の電
源電圧VCLとする。また電圧振幅に係わる電圧Vam
pを生成するOP1の正の電源はDDVDH、負の電源
はグランドGNDとする。
Next, a circuit for generating the common voltage Vcom of the power supply circuit according to the present embodiment will be described in detail with reference to FIG. In FIG. 7, the amplitude reference voltage generation circuit 101 has the same configuration as that of the power supply circuit according to the first embodiment. VcomL reference generation circuit 301
Has the same configuration as the VcomH reference generation circuit 102,
The difference is that VcomL is generated instead of VcomH. The VcomH generation circuit 302 includes an operational amplifier OP10
And resistors R6a to R6d. In addition,
Since VcomH is normally set to a voltage value near the positive power supply voltage DDVDH, the positive power supply of OP2 and OP6 is DDV
DH and the negative power supply are ground GND. Also, Vco
Since mL is usually set to a voltage value near GND, OP
3 and OP7, the positive power supply is DDVDH, and the negative power supply is a negative power supply voltage VCL. The voltage Vam related to the voltage amplitude
The positive power supply of OP1 that generates p is DDVDH, and the negative power supply is ground GND.

【0043】VcomH生成回路302は差動増幅回路
を成し、VcomLとVampからVcomHを生成す
る。VcomHの電圧は次式により表される。
The VcomH generation circuit 302 forms a differential amplifier circuit, and generates VcomH from VcomL and Vamp. The voltage of VcomH is represented by the following equation.

【0044】 VcomH = E・VcomL+F・Vamp …(7) (但し、E={(R6c+R6d)・R6a}/{(R
6a+R6b)・R6c}、F=R6b/R6c、とす
る。) 以上のように、VcomLとVampからVcomHを
生成することが可能であり、VcomLとVampを設
定値により調節してVcomの振幅及び電圧レベルを容
易に調節可能である。
VcomH = E · VcomL + F · Vamp (7) (where E = {(R6c + R6d) · R6a} / {(R
6a + R6b) · R6c}, and F = R6b / R6c. As described above, VcomH can be generated from VcomL and Vamp, and the amplitude and voltage level of Vcom can be easily adjusted by adjusting VcomL and Vamp according to the set values.

【0045】ここで、コモン電圧Vcomの振幅を、V
comLの設定によらずVampの設定だけで生成する
ための条件を示すと、R6a=R6c、R6b=R6
d、であり、これを式(7)に代入して次式を得る。
Here, the amplitude of the common voltage Vcom is
If the conditions for generating only with the setting of Vamp irrespective of the setting of comL are shown, R6a = R6c, R6b = R6
d, which is substituted into equation (7) to obtain the following equation.

【0046】VcomH−VcomL = (R6b/
R6a)・Vamp …(8)すなわちコモン電圧
Vcomの振幅はVampに比例した電圧となる。
VcomH−VcomL = (R6b /
R6a) · Vamp (8) That is, the amplitude of the common voltage Vcom is a voltage proportional to Vamp.

【0047】次に図8を用いて本実施形態による電源回
路のゲートオフ電圧Vgoffを生成する回路について
具体例を挙げて詳細に説明する。図8において、Vgo
ffH基準発生回路303は、VgoffL基準発生回
路104と同じ構成であり、VgoffLの代わりにV
goffHを生成することが異なる。VgoffL生成
回路304は、オペアンプOP7と、抵抗R7aからR
7dと、から構成される。なお、VgoffH及びVg
offLはグランドGNDから負の電源電圧VGLの範
囲にあるものとする。
Next, the circuit for generating the gate-off voltage Vgoff of the power supply circuit according to the present embodiment will be described in detail with reference to FIG. In FIG. 8, Vgo
The ffH reference generation circuit 303 has the same configuration as the VgoffL reference generation circuit 104, and instead of VgoffL, V
GoffH is different. The VgoffL generation circuit 304 includes an operational amplifier OP7 and resistors R7a to R7a.
7d. Note that VgoffH and Vgoff
It is assumed that offL is in a range from the ground GND to the negative power supply voltage VGL.

【0048】VgoffL生成回路604は差動増幅回
路を成し、VgoffHとVampからVgoffLを
生成する。VgoffLの電圧は次式により表される。
The VgoffL generating circuit 604 forms a differential amplifier, and generates VgoffL from VgoffH and Vamp. The voltage of VgoffL is represented by the following equation.

【0049】 VgoffL = G・VgoffH−H・Vamp …(9) (但し、G={(R7c+R7d)・R7a}/{(R
7a+R7b)・R7c}、H=R7d/R7c、とす
る。) 以上のように、VgoffHとVampからVgoff
Lを生成することが可能であり、VgoffHとVam
pを設定値により調節してVgoffの振幅及び電圧レ
ベルを容易に調節可能である。
VgoffL = G · VgoffH−H · Vamp (9) (where G = {(R7c + R7d) · R7a} /} (R
7a + R7b) · R7c}, and H = R7d / R7c. As described above, from VgoffH and Vamp, Vgoff
L can be generated, and VgoffH and Vam
By adjusting p according to the set value, the amplitude and voltage level of Vgoff can be easily adjusted.

【0050】ここで、ゲートオフ電圧Vgoffの振幅
を、VgoffHの設定によらずVampの設定だけで
生成するための条件を示すと、R7a=R7c、R7b
=R7d、であり、これを式(9)に代入して次式を得
る。
Here, conditions for generating the amplitude of the gate-off voltage Vgoff only by the setting of Vamp irrespective of the setting of VgoffH are as follows: R7a = R7c, R7b
= R7d, which is substituted into equation (9) to obtain the following equation.

【0051】 VgoffH−VgoffL = (R7b/R7a)・Vamp …( 10) すなわちゲートオフ電圧Vgoffの振幅はVampに
比例した電圧となる。
VgoffH−VgoffL = (R7b / R7a) · Vamp (10) That is, the amplitude of the gate-off voltage Vgoff is a voltage proportional to Vamp.

【0052】さらにまた、コモン電圧Vcomの振幅
と、ゲートオフ電圧Vgoffの振幅とが、等しくなる
条件を示すと、(R6b/R6a)=(R7b/R7
a)である。
Further, when the condition that the amplitude of the common voltage Vcom and the amplitude of the gate-off voltage Vgoff are equal is shown, (R6b / R6a) = (R7b / R7
a).

【0053】従って以上に示した条件を全て満たすよう
に抵抗の比を選ぶことによって、VcomLの電圧と、
VgoffHの電圧と、を設定してコモン電圧Vcom
及びゲートオフ電圧Vgoffの基準電位を決めて、さ
らにVampの電圧を設定することで、同位相かつ同振
幅のコモン電圧Vcomと、ゲートオフ電圧Vgoff
を生成することが可能である。
Therefore, by selecting the ratio of the resistances so as to satisfy all of the above conditions, the voltage of VcomL and
VgoffH and the common voltage Vcom
By determining the reference potential of the gate-off voltage Vgoff and further setting the voltage of Vamp, the common voltage Vcom having the same phase and the same amplitude and the gate-off voltage Vgoff
Can be generated.

【0054】以上説明したように、VcomLを基準と
してVcomHを生成して、VgoffHを基準として
VgoffLを生成しても、同位相かつ同振幅のコモン
電圧Vcom及びゲートオフ電圧Vgoffを容易に生
成することが出来る。
As described above, even when VcomH is generated based on VcomL and VgoffL is generated based on VgoffH, the common voltage Vcom and the gate-off voltage Vgoff having the same phase and the same amplitude can be easily generated. I can do it.

【0055】以上、第3の実施の形態による電源回路に
ついて説明を行ったが、第4の実施の形態による電源回
路では、より少ないオペアンプで同位相かつ同振幅の2
つの電圧を容易に生成する方法を示す。 (第4の実施の形態)以下、本発明の第4の実施形態に
よる電源回路を、図9を用いて説明する。
Although the power supply circuit according to the third embodiment has been described above, the power supply circuit according to the fourth embodiment uses two or more operational amplifiers having the same phase and the same amplitude.
An example of how to easily generate two voltages is shown. (Fourth Embodiment) Hereinafter, a power supply circuit according to a fourth embodiment of the present invention will be described with reference to FIG.

【0056】本実施形態による電源回路は、第1の実施
形態による電源回路のVgoffH生成する回路が異な
るだけである。図9に示すように、第1の実施形態によ
る電源回路のVgoffH生成回路105とバッファ1
08の代わりに、コンデンサ901と、バッファ106
で増幅されたVcomHと電圧セレクタに接続するVg
offHとを交流化信号Mにより切り替えてコンデンサ
901の+電極と接続する電圧セレクタ902と、バッ
ファ107で増幅されたVcomLとバッファ109で
増幅されたVgoffLとを交流化信号Mにより切り替
えてコンデンサ901の−電極と接続する電圧セレクタ
903と、から構成される。
The power supply circuit according to the present embodiment is different from the power supply circuit according to the first embodiment only in the circuit for generating VgoffH. As shown in FIG. 9, the VgoffH generation circuit 105 of the power supply circuit according to the first embodiment and the buffer 1
08, the capacitor 901 and the buffer 106
And Vg connected to the voltage selector
offH and the voltage selector 902 connected to the + electrode of the capacitor 901 by switching with the AC signal M, and VcomL amplified by the buffer 107 and VgoffL amplified by the buffer 109 with the AC signal M to switch the capacitor 901. And a voltage selector 903 connected to the electrodes.

【0057】次に本実施形態による電源回路の動作につ
いて説明する。ここで、交流化信号Mがローレベルのと
き液晶パネルの駆動電圧を正極性とし、電圧セレクタ1
10及び111はそれぞれVcomL及びVgoffL
を選択して出力することにする。このとき、電圧セレク
タ902はコンデンサ902の+電極とVcomHを接
続し、電圧セレクタ903はコンデンサ902の−電極
とVcomLとを接続し、コンデンサ901を充電す
る。十分に充電されるとコンデンサ901の両端の電位
差はコモン電圧Vcomの振幅と等しくなる。また、こ
のとき、VgoffHは電圧セレクタ902で切り離さ
れているが、電圧セレクタ111がVgoffLを選択
して出力しているため、問題ない。次に、交流化信号M
がハイレベルとなり負極性になると、電圧セレクタ11
0及び111はそれぞれVcomH及びVgoffHを
選択して出力する。このとき、電圧セレクタ902はコ
ンデンサ902の+電極とVgoffHを接続し、電圧
セレクタ903はコンデンサ902の−電極とVgof
fLとを接続する。従って、VgoffHの電圧はVg
offLからコモン電圧Vcomの振幅の分高い電位と
なり、ゲートオフ電圧Vgoffはコモン電圧Vcom
と同振幅かつ同位相の電圧を出力することが可能であ
る。
Next, the operation of the power supply circuit according to the present embodiment will be described. Here, when the AC signal M is at a low level, the driving voltage of the liquid crystal panel is set to a positive polarity, and the voltage selector 1
10 and 111 are VcomL and VgoffL, respectively.
Will be selected and output. At this time, the voltage selector 902 connects the + electrode of the capacitor 902 to VcomH, the voltage selector 903 connects the − electrode of the capacitor 902 to VcomL, and charges the capacitor 901. When charged sufficiently, the potential difference between both ends of the capacitor 901 becomes equal to the amplitude of the common voltage Vcom. At this time, VgoffH is separated by the voltage selector 902, but there is no problem because the voltage selector 111 selects and outputs VgoffL. Next, the AC signal M
Becomes high level and becomes negative, the voltage selector 11
0 and 111 select and output VcomH and VgoffH, respectively. At this time, the voltage selector 902 connects the + electrode of the capacitor 902 to VgoffH, and the voltage selector 903 connects the − electrode of the capacitor 902 to VgoffH.
fL. Therefore, the voltage of VgoffH is Vg
offL to a potential higher by the amplitude of the common voltage Vcom, and the gate-off voltage Vgoff becomes higher than the common voltage Vcom.
It is possible to output a voltage having the same amplitude and the same phase.

【0058】以上説明したように、コンデンサを用い
て、同位相かつ同振幅のコモン電圧Vcom及びゲート
オフ電圧Vgoffを容易に生成することが出来る。コ
ンデンサ901はICの外付け部品と成り得るが、ゲー
ト線の負荷容量が小さければコンデンサ901の容量値
も小さくすることが可能であり、ICにも集積可能であ
る。 (第5の実施の形態)以下、本発明の第5の実施形態に
よる、電源回路を含む液晶表示装置を、図10から図1
2を用いて説明する。
As described above, the common voltage Vcom and the gate-off voltage Vgoff having the same phase and the same amplitude can be easily generated by using the capacitor. The capacitor 901 can be an external component of the IC. However, if the load capacity of the gate line is small, the capacitance value of the capacitor 901 can be reduced, and the capacitor 901 can be integrated in the IC. (Fifth Embodiment) Hereinafter, a liquid crystal display device including a power supply circuit according to a fifth embodiment of the present invention will be described with reference to FIGS.
2 will be described.

【0059】図10に本実施形態による電源回路を含む
液晶表示装置の概要構成を示す。図10において、液晶
表示装置は、マイクロプロセッサ(以下、MPU)10
と、電源回路20と、液晶駆動回路30と、走査回路4
0と、液晶パネル50と、から構成される。さらに、液
晶駆動回路30は、MPU10からの設定データを受け
取るインタフェース部31と、設定データを保持するレ
ジスタ部32を備える。また、電源回路100は、第1
から第4の実施形態による電源回路である。
FIG. 10 shows a schematic configuration of the liquid crystal display device including the power supply circuit according to the present embodiment. In FIG. 10, a liquid crystal display device includes a microprocessor (hereinafter, MPU) 10
, Power supply circuit 20, liquid crystal drive circuit 30, and scanning circuit 4
0 and a liquid crystal panel 50. Further, the liquid crystal drive circuit 30 includes an interface unit 31 that receives setting data from the MPU 10 and a register unit 32 that holds the setting data. In addition, the power supply circuit 100
To the power supply circuit according to the fourth embodiment.

【0060】次に本実施形態による電源回路を含む液晶
表示装置の動作について説明する。まず、電源投入後、
MPU10は、各回路の動作を設定する命令を、液晶駆
動回路30に出力する。インタフェース部31で命令を
受け取った液晶駆動回路30は、レジスタ部32に保持
する。レジスタ部32に保持した設定値のうち、電源回
路20と走査回路40の設定値に関しては、MPU10
からの送信命令で、各々に設定値を出力する。
Next, the operation of the liquid crystal display device including the power supply circuit according to the present embodiment will be explained. First, after turning on the power,
The MPU 10 outputs a command for setting the operation of each circuit to the liquid crystal drive circuit 30. The liquid crystal drive circuit 30 that has received the command at the interface unit 31 stores the command in the register unit 32. Of the setting values held in the register unit 32, the setting values of the power supply circuit 20 and the scanning circuit 40 are determined by the MPU 10
The set value is output to each by the transmission command from.

【0061】ここで、図11を用いて、電源回路20の
設定値を液晶駆動回路30から送信する方法について詳
細に説明する。まず、MPU10から書き込むデータの
インデックスが送られ、次にデータが送られ、インデッ
クス毎にレジスタ部32に書き込まれる。送られたデー
タのうち、電源回路20の設定値がインデックス01h
のビット1から0、インデックス02hのビット3から
2、インデックス03hのビット2から0、とすると、
MPU10からの送信命令が送られてきた時点で、前記
ビットを纏めて電源回路20に対して送信する。走査回
路40に対しても同様に設定値を送信することが出来
る。従って、MPU10とのインタフェース部を液晶駆
動回路30に集約して、電源回路20および走査回路4
0の回路規模を削減することが出来る。
Here, a method of transmitting the set value of the power supply circuit 20 from the liquid crystal drive circuit 30 will be described in detail with reference to FIG. First, an index of data to be written is sent from the MPU 10, and then data is sent and written to the register unit 32 for each index. Among the transmitted data, the set value of the power supply circuit 20 is index 01h.
, Bits 3 to 2 of index 02h and bits 2 to 0 of index 03h,
When the transmission command is sent from the MPU 10, the bits are collectively transmitted to the power supply circuit 20. The set value can be transmitted to the scanning circuit 40 in the same manner. Therefore, the interface section with the MPU 10 is integrated into the liquid crystal drive circuit 30, and the power supply circuit 20 and the scanning circuit 4
0 circuit scale can be reduced.

【0062】図10に示すように、液晶駆動回路30か
ら送信される設定値は、特に電源回路20では、設定レ
ジスタ100に設定値が保持される。このようにMPU
10が各回路の設定値を出力して必要なデータだけを液
晶駆動回路30から電源回路20及び走査回路40に出
力して各回路の動作を決める。
As shown in FIG. 10, the setting value transmitted from the liquid crystal driving circuit 30 is held in the setting register 100 in the power supply circuit 20 in particular. In this way, MPU
10 outputs a set value of each circuit and outputs only necessary data from the liquid crystal drive circuit 30 to the power supply circuit 20 and the scanning circuit 40 to determine the operation of each circuit.

【0063】また、液晶駆動回路30は、制御信号出力
し、コントローラの役目を担う。電源回路20に対して
は、昇圧用のクロックDCCLKと、交流化信号Mと、
を生成して出力する。電源回路20は液晶駆動回路30
からの設定値を設定レジスタ100に取り込み、電源回
路20内部の各電圧を設定する。走査回路40も同様に
設定値を受け取り、走査回路40内部の設定を行う。電
源回路20では設定レジスタの設定値に従って、基準電
源Vciから昇圧用のクロックDCCLKをもとに昇圧
して各電圧を生成し、液晶駆動回路30に対しては、階
調電圧用電源DDVDHと、階調基準電圧VDHを出力
する。さらに、走査回路40に対しては、正の高電圧電
源VGH(ゲートオン電圧Vgonとなる)と、負の高
電圧電源VGLを出力し、ゲートオフ電圧Vgoffを
出力する。さらに、液晶パネル50に対しては、液晶パ
ネル50のコモン電極にコモン電圧Vcomを出力す
る。
The liquid crystal drive circuit 30 outputs a control signal and plays the role of a controller. For the power supply circuit 20, a boosting clock DCCLK, an AC conversion signal M,
Is generated and output. The power supply circuit 20 is a liquid crystal drive circuit 30
Is input to the setting register 100 and each voltage inside the power supply circuit 20 is set. The scanning circuit 40 similarly receives the set value and performs the setting inside the scanning circuit 40. The power supply circuit 20 generates each voltage by boosting the voltage from the reference power supply Vci based on the boosting clock DCCLK in accordance with the setting value of the setting register. It outputs a gradation reference voltage VDH. Further, it outputs a positive high-voltage power supply VGH (to be a gate-on voltage Vgon), a negative high-voltage power supply VGL, and a gate-off voltage Vgoff to the scanning circuit 40. Further, for the liquid crystal panel 50, the common voltage Vcom is output to the common electrode of the liquid crystal panel 50.

【0064】次に、前記電源が安定になったところで、
MPU10は表示データを液晶駆動回路30に出力し、
液晶駆動回路30は、階調電圧用電源DDVDHを電源
とする階調電圧生成部(図示せず)において、階調基準
電圧VDHから各階調の電圧レベルを生成し、表示デー
タに従って階調電圧に変換し、液晶パネル50のデータ
線に出力する。
Next, when the power supply becomes stable,
The MPU 10 outputs display data to the liquid crystal drive circuit 30,
The liquid crystal drive circuit 30 generates a voltage level of each gradation from a gradation reference voltage VDH in a gradation voltage generation unit (not shown) using a power supply for gradation voltage DDVDH as a power supply, and converts the voltage level into a gradation voltage according to display data. The data is converted and output to the data line of the liquid crystal panel 50.

【0065】また、走査回路40は、正高電圧電源VG
Hと負高電圧電源VGLを電源とし、液晶駆動回路30
からのラインクロックCL1に従って、非走査期間はゲ
ートオフ電圧Vgoffを出力し、走査期間は正高電圧
電源VGHを走査電圧として、液晶パネル50のゲート
線の走査を行う。従って、液晶パネル50に表示がなさ
れる。
The scanning circuit 40 includes a positive high voltage power supply VG
H and a negative high voltage power supply VGL,
In response to the line clock CL1, the gate-off voltage Vgoff is output during the non-scanning period, and the scanning of the gate line of the liquid crystal panel 50 is performed using the positive high voltage power supply VGH as the scanning voltage during the scanning period. Therefore, a display is made on the liquid crystal panel 50.

【0066】次に、図12を用いて、電源回路20の内
部構成について詳細に説明する。図12において、電源
回路20は、100から111の第1の実施の形態によ
る電源回路の各要素と、加えて、電圧調整回路1100
と、レギュレータ1101と、昇圧回路1102から1
105と、VDH基準発生回路1106と、バッファ1
107と、昇圧用のコンデンサC11、C12、C2
1、C22、C23、C31、C32、とから構成され
る。なお、各電圧出力には安定化のためのコンデンサC
bを付加してある。
Next, the internal configuration of the power supply circuit 20 will be described in detail with reference to FIG. 12, a power supply circuit 20 includes 100 to 111 elements of the power supply circuit according to the first embodiment, and in addition, a voltage adjustment circuit 1100.
, The regulator 1101, and the booster circuits 1102 to 1
105, VDH reference generation circuit 1106, and buffer 1
107 and boosting capacitors C11, C12, C2
1, C22, C23, C31, and C32. Each voltage output has a capacitor C for stabilization.
b is added.

【0067】次に各部の動作について説明する。まず、
電圧調整回路1100は、基準電源Vciから基準電圧
VregP及び基準電圧VregNを生成して出力す
る。基準電圧VregP及び基準電圧VregNは第1
の実施の形態による電源回路の基準電圧Vregと同じ
機能を果たす。レギュレータ1101は基準電源Vci
を基準電圧VregPでレギュレートし、安定した電圧
Vci1を供給する。昇圧回路1102はチャージポン
プ回路であり、昇圧用コンデンサC11、C12を用い
て、電圧Vci1を2倍あるいは3倍に昇圧して、電源
電圧DDVDHとして出力する。また、昇圧回路110
3はチャージポンプ回路であり、昇圧用コンデンサC2
1、C22、C23を用いて、電源電圧DDVDHを2
倍あるいは3倍あるいは4倍に昇圧して、電源電圧VG
Hとして出力する。また、昇圧回路1104はチャージ
ポンプ回路であり、昇圧用コンデンサC31を用いて、
電圧VGHを−1倍して、電源電圧DDVDHとして出
力する。また、昇圧回路1105はチャージポンプ回路
であり、昇圧用コンデンサC41を用いて、基準電圧V
ciを−1倍して、電源電圧VCLとして出力する。V
DH基準発生回路1106は、基準電圧VregPから
設定値に従って電圧増幅する。増幅した電圧はバッファ
1107で電流増幅して、電圧VDHとして出力する。
符号104から111は第1の実施の形態による電源回
路と同一機能の回路であり、各回路の電源は、昇圧回路
1102から1105で生成した電源電圧を用いる。従
って安定した基準電圧Vci1から各電源電圧が生成さ
れ、コモン電圧Vcom及びゲートオフ電圧Vgoff
が生成されて、液晶駆動回路30及び走査回路40及び
液晶パネル50に供給され、表示がなされる。
Next, the operation of each unit will be described. First,
The voltage adjustment circuit 1100 generates and outputs a reference voltage VregP and a reference voltage VregN from the reference power supply Vci. The reference voltage VregP and the reference voltage VregN are the first
Performs the same function as the reference voltage Vreg of the power supply circuit according to the embodiment. The regulator 1101 is connected to the reference power supply Vci.
Is regulated by the reference voltage VregP to supply a stable voltage Vci1. The booster circuit 1102 is a charge pump circuit, and boosts the voltage Vci1 two or three times using the boosting capacitors C11 and C12 and outputs the boosted voltage Vci1 as the power supply voltage DDVDH. Also, the booster circuit 110
Reference numeral 3 denotes a charge pump circuit, which includes a step-up capacitor C2.
1, the power supply voltage DDVDH is increased by 2 using C22 and C23.
Double or triple or quadruple the power supply voltage VG
Output as H. The booster circuit 1104 is a charge pump circuit, and uses a booster capacitor C31 to
The voltage VGH is multiplied by -1 and output as the power supply voltage DDVDH. The booster circuit 1105 is a charge pump circuit, and uses a booster capacitor C41 to generate a reference voltage V
Ci is multiplied by -1 and output as the power supply voltage VCL. V
The DH reference generation circuit 1106 amplifies the voltage from the reference voltage VregP according to a set value. The amplified voltage is current-amplified by the buffer 1107 and output as a voltage VDH.
Reference numerals 104 to 111 are circuits having the same function as the power supply circuit according to the first embodiment, and the power supply of each circuit uses the power supply voltage generated by the booster circuits 1102 to 1105. Accordingly, each power supply voltage is generated from the stable reference voltage Vci1, and the common voltage Vcom and the gate-off voltage Vgoff
Is generated and supplied to the liquid crystal driving circuit 30, the scanning circuit 40, and the liquid crystal panel 50 to perform display.

【0068】以上説明したように、振幅基準発生回路及
びVcomH基準発生回路及びVgoffL基準発生回
路の設定値により、同位相かつ同振幅のコモン電圧Vc
om及びゲートオフ電圧Vgoffを容易に生成するこ
とが出来、またMPU10から設定データを更新すれ
ば、簡単に電圧レベル及び振幅を変更することが出来
る。
As described above, the common voltage Vc having the same phase and the same amplitude is set according to the set values of the amplitude reference generation circuit, the VcomH reference generation circuit, and the VgoffL reference generation circuit.
om and the gate-off voltage Vgoff can be easily generated, and if the setting data is updated from the MPU 10, the voltage level and the amplitude can be easily changed.

【0069】本発明は以上に示した実施の形態に限定さ
れるものではなく、その主旨を逸脱しない範囲で種々変
更可能であることはいうまでもない。例えば、第1の実
施の形態による電源回路の基準電圧Vregは振幅基準
発生回路101及びVcomH基準発生回路102及び
VgoffL基準発生回路105に共通の電圧とした
が、これを別々の電圧レベルに変えても何ら問題ない。
The present invention is not limited to the above-described embodiments, and it goes without saying that various modifications can be made without departing from the gist of the present invention. For example, although the reference voltage Vreg of the power supply circuit according to the first embodiment is a voltage common to the amplitude reference generation circuit 101, the VcomH reference generation circuit 102, and the VgoffL reference generation circuit 105, the reference voltage Vreg is changed to different voltage levels. No problem at all.

【0070】上記本発明の第1〜第5の実施の形態によ
れば、定常電流を抑えて低消費電力であり、かつVco
m及びVgoffの振幅や電圧レベルを容易に変更可能
にして使い勝手の良い、低コストな電源回路及びそれを
用いた液晶駆動回路を実現できる。
According to the first to fifth embodiments of the present invention, the steady-state current is suppressed, low power consumption is achieved, and Vco
An easy-to-use, low-cost power supply circuit and a liquid crystal drive circuit using the same can be realized by easily changing the amplitudes and voltage levels of m and Vgoff.

【0071】[0071]

【発明の効果】本発明によれば、液晶表示装置の定常電
流を抑えることができ、これにより、消費電力を低減す
るという効果を奏する。
According to the present invention, the steady-state current of the liquid crystal display device can be suppressed, and the power consumption can be reduced.

【0072】又は、本発明によれば、コモン電圧Vco
m及びゲートオフ電圧Vgoffの振幅や電圧レベルを
容易に変更可能にすることにより、ユーザの利便性を向
上するという効果を奏する。
Alternatively, according to the present invention, the common voltage Vco
By making it possible to easily change the amplitude and the voltage level of m and the gate-off voltage Vgoff, there is an effect that user convenience is improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施形態による電源回路の概略
構成を示す図である。
FIG. 1 is a diagram showing a schematic configuration of a power supply circuit according to a first embodiment of the present invention.

【図2】本発明の第1の実施形態による電源回路のコモ
ン電圧Vcomを生成する回路の詳細構成を示す図であ
る。
FIG. 2 is a diagram illustrating a detailed configuration of a circuit that generates a common voltage Vcom of the power supply circuit according to the first embodiment of the present invention.

【図3】本発明の第1の実施形態による電源回路のゲー
トオフ電圧Vgoffを生成する回路の詳細構成を示す
図である。
FIG. 3 is a diagram illustrating a detailed configuration of a circuit that generates a gate-off voltage Vgoff of the power supply circuit according to the first embodiment of the present invention.

【図4】本発明の第2の実施形態による電源回路の概略
構成を示す図である。
FIG. 4 is a diagram illustrating a schematic configuration of a power supply circuit according to a second embodiment of the present invention.

【図5】本発明の第2の実施形態による電源回路の概略
構成を示す図である。
FIG. 5 is a diagram illustrating a schematic configuration of a power supply circuit according to a second embodiment of the present invention.

【図6】本発明の第3の実施形態による電源回路の概略
構成を示す図である。
FIG. 6 is a diagram illustrating a schematic configuration of a power supply circuit according to a third embodiment of the present invention.

【図7】本発明の第3の実施形態による電源回路のコモ
ン電圧Vcomを生成する回路の詳細構成を示す図であ
る。
FIG. 7 is a diagram illustrating a detailed configuration of a circuit that generates a common voltage Vcom of a power supply circuit according to a third embodiment of the present invention.

【図8】本発明の第3の実施形態による電源回路のゲー
トオフ電圧Vgoffを生成する回路の詳細構成を示す
図である。
FIG. 8 is a diagram illustrating a detailed configuration of a circuit that generates a gate-off voltage Vgoff of a power supply circuit according to a third embodiment of the present invention.

【図9】本発明の第4の実施形態による電源回路の概略
構成を示す図である。
FIG. 9 is a diagram showing a schematic configuration of a power supply circuit according to a fourth embodiment of the present invention.

【図10】本発明の第5の実施形態による電源回路を含
む液晶表示装置の概略構成を示す図である。
FIG. 10 is a diagram illustrating a schematic configuration of a liquid crystal display device including a power supply circuit according to a fifth embodiment of the present invention.

【図11】本発明の第5の実施形態による電源回路を含
む液晶表示装置の設定データの送信方法を示す図であ
る。
FIG. 11 is a diagram illustrating a method for transmitting setting data of a liquid crystal display device including a power supply circuit according to a fifth embodiment of the present invention.

【図12】本発明の第5の実施形態による電源回路の内
部の詳細構成を示す図である。
FIG. 12 is a diagram showing a detailed internal configuration of a power supply circuit according to a fifth embodiment of the present invention.

【図13】従来の電源回路の概略構成を示す図である。FIG. 13 is a diagram showing a schematic configuration of a conventional power supply circuit.

【符号の説明】[Explanation of symbols]

100…設定レジスタ、101…振幅基準発生回路、1
02…VcomH基準発生回路、103…VcomL生
成回路、104…VgoffL基準発生回路、105…
VgoffH生成回路、106…バッファ、107…バ
ッファ、108…バッファ、109…バッファ、110
…電圧セレクタ、111…電圧セレクタ。
100: setting register, 101: amplitude reference generating circuit, 1
02 ... VcomH reference generation circuit, 103 ... VcomL generation circuit, 104 ... VgoffL reference generation circuit, 105 ...
VgoffH generation circuit, 106 buffer, 107 buffer, 108 buffer, 109 buffer, 110
... voltage selector, 111 ... voltage selector.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) G09G 3/20 624 G09G 3/20 624C (72)発明者 大門 一夫 東京都小平市上水本町五丁目20番1号 株 式会社日立製作所半導体グループ内 (72)発明者 黒川 一成 千葉県茂原市早野3300番地 株式会社日立 製作所ディスプレイグループ内 (72)発明者 比嘉 淳裕 神奈川県横浜市戸塚区吉田町292番地 株 式会社日立画像情報システム内 Fターム(参考) 2H093 NA16 NC03 NC18 NC23 NC34 ND39 ND42 ND49 NE07 5C006 AC11 AC22 BB16 BC06 BF42 FA01 FA47 FA51 5C080 AA10 BB05 DD26 DD27 FF11 JJ02 JJ03 KK02 KK04 KK08 KK43 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme court ゛ (Reference) G09G 3/20 624 G09G 3/20 624C (72) Inventor Kazuo Daimon 5-chome, Kamimizuhoncho, Kodaira-shi, Tokyo No. 1 Hitachi Semiconductor Group (72) Inventor Kazunari Kurokawa 3300 Hayano Mobara-shi, Chiba Prefecture Hitachi Display Group (72) Inventor Atsuhiro Higa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture F term in Hitachi Image Information System Co., Ltd. (reference)

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】液晶表示装置の共通電極の駆動電圧と走査
線の非走査期間電圧を交流駆動するための電源装置にお
いて、 前記共通電極の駆動電圧と前記走査線の非走査期間電圧
との振幅及び電圧レベルを設定する設定値保持回路と、 設定値に従って前記共通電極の駆動電圧と前記走査線の
非走査期間電圧との振幅基準電圧を生成する振幅基準電
圧生成回路と、 前記振幅基準電圧と設定値から決まる振幅及び電圧レベ
ルで前記共通電極を交流駆動する共通電極駆動回路と、 前記振幅基準電圧と設定値から決まる振幅及び電圧レベ
ルで前記共通電極の駆動電圧と同位相かつ同振幅の前記
走査線の非走査期間電圧を生成する非走査期間電圧生成
回路とを具備する電源装置。
1. A power supply device for AC driving a drive voltage of a common electrode and a non-scanning period voltage of a scanning line of a liquid crystal display device, wherein an amplitude of the driving voltage of the common electrode and a non-scanning period voltage of the scanning line is provided. And a setting value holding circuit for setting a voltage level; an amplitude reference voltage generating circuit for generating an amplitude reference voltage between a drive voltage of the common electrode and a non-scanning period voltage of the scanning line according to the set value; A common electrode drive circuit that AC drives the common electrode at an amplitude and a voltage level determined by a set value; and the same phase and the same amplitude as the drive voltage of the common electrode at an amplitude and a voltage level determined by the amplitude reference voltage and the set value. And a non-scanning period voltage generating circuit for generating a non-scanning period voltage of the scanning line.
【請求項2】前記共通電極駆動回路は、設定値に従って
一方の電位を生成し、一方の電位から振幅基準電圧に従
って他方の電位を生成し、両電位を切り替えて共通電極
の駆動電圧を生成する請求項1記載の電源装置。
2. The common electrode driving circuit generates one potential according to a set value, generates the other potential from one potential according to an amplitude reference voltage, and switches both potentials to generate a driving voltage for the common electrode. The power supply device according to claim 1.
【請求項3】前記非走査期間電圧生成回路は、設定値に
従って一方の電位を生成し、一方の電位から振幅基準電
圧に従って他方の電位を生成し、両電位を切り替えて前
記走査線の非走査期間電圧を生成する請求項1又は2記
載の電源装置
3. The non-scanning period voltage generating circuit generates one potential according to a set value, generates the other potential from one potential according to an amplitude reference voltage, and switches both potentials to perform non-scanning of the scanning line. The power supply according to claim 1, wherein the power supply generates a period voltage.
【請求項4】前記共通電極の駆動電圧の低電位側電圧は
負電位あるいはグランドあるいは正電位のうちのいずれ
にも設定可能である請求項1から3に記載の電源装置
4. The power supply device according to claim 1, wherein the low-potential-side voltage of the drive voltage of the common electrode can be set to a negative potential, a ground, or a positive potential.
【請求項5】液晶表示装置の共通電極の駆動電圧と走査
線の非走査期間電圧を交流駆動するための電源装置にお
いて、 前記共通電極の駆動電圧と前記走査線の非走査期間電圧
との電圧レベルを設定する設定値保持回路と、 一方の電位を固定し他方の電位を設定値に従って生成し
て前記共通電極を交流駆動する共通電極駆動回路と、 一方の電位を設定値に従って生成して他方の電位を共通
電極の駆動電圧の電位差から生成して前記共通電極の駆
動電圧と同位相かつ同振幅の前記走査線の非走査期間電
圧を生成する非走査期間電圧生成回路とを具備する電源
装置。
5. A power supply device for AC-driving a drive voltage of a common electrode and a non-scanning period voltage of a scanning line of a liquid crystal display device, wherein a voltage between the driving voltage of the common electrode and the non-scanning period voltage of the scanning line is provided. A set value holding circuit for setting a level; a common electrode driving circuit for fixing one potential and generating the other potential according to the set value to drive the common electrode in an alternating current; And a non-scanning period voltage generating circuit for generating a non-scanning period voltage of the scanning line having the same phase and the same amplitude as the driving voltage of the common electrode by generating the potential of the common electrode from the potential difference of the driving voltage of the common electrode. .
【請求項6】前記共通電極の駆動電圧の固定する一方の
電位はグランドである請求項5に記載の電源装置。
6. The power supply device according to claim 5, wherein one of the fixed potentials of the drive voltage of the common electrode is ground.
【請求項7】データ線とスイッチング素子を介して接続
された画素電極と、画素電極との間に液晶を挟持する共
通電極とを有する画素部を、複数のデータ線および複数
の走査線の交点位置にマトリックス状に配列された液晶
パネルを具備する液晶表示装置であって、 各種設定値を設定する中央処理装置と、 前記中央処理装置からの設定値を一時保持する液晶駆動
回路と、 前記液晶駆動回路からの設定値及び制御信号に従って液
晶パネルの走査線を駆動する走査回路と、 基準電源を昇圧して前記液晶駆動回路の電源及び前記走
査回路の電源及び液晶パネルの共通電極の駆動電圧を前
記液晶駆動回路からの設定値に従って生成する電源回路
と、を具備することを特徴とする液晶表示装置。
7. A pixel section having a pixel electrode connected to a data line via a switching element and a common electrode sandwiching a liquid crystal between the pixel electrode and an intersection of a plurality of data lines and a plurality of scanning lines. A liquid crystal display device comprising a liquid crystal panel arranged in a matrix at positions, a central processing unit for setting various set values, a liquid crystal driving circuit for temporarily holding set values from the central processing unit, and the liquid crystal A scanning circuit for driving a scanning line of a liquid crystal panel according to a set value and a control signal from a driving circuit; A liquid crystal display device, comprising: a power supply circuit that generates power according to a set value from the liquid crystal drive circuit.
JP2001171888A 2001-06-07 2001-06-07 Display device Expired - Fee Related JP3948224B2 (en)

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JP2001171888A JP3948224B2 (en) 2001-06-07 2001-06-07 Display device
KR10-2002-0031665A KR100436405B1 (en) 2001-06-07 2002-06-05 Display apparatus, and power supply and integrated circuit for the same
TW091112191A TW588315B (en) 2001-06-07 2002-06-06 Display apparatus and power supply device for displaying
US10/832,296 US7078864B2 (en) 2001-06-07 2004-04-27 Display apparatus and power supply device for displaying
US11/223,049 US20060007095A1 (en) 2001-06-07 2005-09-12 Display apparatus and power supply device for displaying

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KR100436405B1 (en) 2004-06-16
TW588315B (en) 2004-05-21
KR20020093599A (en) 2002-12-16

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