JP2002359323A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a structure in which a module for a semiconductor device is realized in thinned and minimum area and to provide a method for manufacturing the same. SOLUTION: The semiconductor device comprises a semiconductor element and a terminal connected to the element. The device further comprises a first wiring connected to the element, and a second embedding wiring disposed oppositely to the first wiring in a state in which the element is sandwiched together with the first wiring between the first wiring and the second wiring. In this case, at least the first wiring of the first and second wirings is the embedding wiring obtained by removing a substrate after forming a wiring pattern on the substrate. In the device, the terminals are provided on front and rear surfaces of the device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, a semiconductor device in which semiconductor devices are stacked in multiple stages, and a method of manufacturing the same. More particularly, the present invention relates to improvement in integration by enabling three-dimensional mounting.

[0002]

2. Description of the Related Art In recent years, electronic equipment has become smaller and more sophisticated.
Due to the miniaturization technology of LSI, the miniaturization, high integration, and high functioning of the semiconductor device itself are progressing.
LS of C (Application Specific Integrated Circuit)
Stack type semiconductor devices in which I are stacked and mounted are widely used in portable terminals and the like.

As a prior art for realizing the above-described semiconductor device, for example, Japanese Patent Laid-Open No. 2000-20869 is known.
As shown in FIG. 1 of the Japanese Unexamined Patent Publication, a module for a stack type semiconductor device in which a semiconductor element is mounted on a TAB tape, a flexible substrate, or a rigid substrate, and a plurality of packages whose thickness is reduced to about 100 μm by resin sealing is stacked and mounted. Also, as shown in FIG. 1 of JP-A-7-106509, a module in which external terminals are provided on both sides of a substrate, semiconductor elements are mounted in recesses of a wiring board, and external terminals are connected alternately on both sides of the substrate And JP-A-2000-18328
As shown in FIG.
The semiconductor device is flip-chip bonded, a stud bump is provided around the flip chip, and a wiring body of a second semiconductor device is connected to the stud bump and resin-sealed.

[0004]

Of the above-mentioned conventional examples, in the one disclosed in Japanese Patent Application Laid-Open No. 2000-20869, even if a plurality of thin and stacked types are mounted, the thickness of the module is not so large. However, the external connection terminals cannot be provided on the surface of the chip due to the structure, and the external connection terminals are provided around the chip. For example, in the case of a tape carrier package, there is a problem that the area occupied by the external connection terminals in a region of 3 to 5 mm outside the chip with respect to the area of the chip becomes very large.

The structure disclosed in Japanese Patent Application Laid-Open No. 7-106509 is a structure in which a chip is mounted in a concave portion of a wiring board. Since a plurality of chips are stacked in a stack structure, the overall thickness is increased. There is a problem. Further, the problem that the area in the plane direction becomes large is the same as that disclosed in Japanese Patent Application Laid-Open No. 2000-20869.

The conventional example disclosed in Japanese Patent Application Laid-Open No. 2000-183283 is thicker by the thickness of the wiring board.
There is a problem that the area in the plane direction does not become small similarly to the one disclosed in JP-A-106509.

As described above, there is a problem in that mounting in a stack structure increases the thickness and increases the mounting area in the planar direction.

The present invention has been made to solve the above-mentioned problems of the prior art, and has as its object to provide a method of manufacturing a semiconductor device capable of being mounted in a significantly small, thin, and high-density package. It is to provide a manufactured semiconductor device.

[0009]

The present invention for achieving the above object has the following arrangement. In the present invention, a wiring body obtained by forming a wiring pattern on a substrate and then removing the substrate is referred to as a buried wiring body. The first configuration of the semiconductor device according to the present invention is the first configuration.
A semiconductor element connected to the embedded wiring body,
A semiconductor device having a second buried wiring body connected to the buried wiring body and having the second embedded wiring body sandwiching the semiconductor element, wherein a terminal portion connected from the first buried wiring body has an entire front and back surface of the semiconductor device. And an end connecting portion formed of a conductor pillar orthogonal to the first embedded wiring body connected to the semiconductor element and disposed around the semiconductor element is fixed by being buried in an insulating resin. 2 is connected to an end connector of the first embedded wiring body, and the first embedded wiring body and the second embedded wiring body are connected to each other.
The terminal portions are provided on both sides of the embedded wiring body.

[0010] With such a structure, terminals can be provided on the back and front surfaces of the semiconductor device, so that the area of the semiconductor device can be reduced. It is possible to check the connection state and to further stack the semiconductor devices in multiple stages.

Further, the semiconductor device according to the second configuration includes a buried wiring body connected to an electrode of the semiconductor element, wherein the buried wiring body is connected to the semiconductor element and arranged around the semiconductor element. The provided embedded wiring body and the conductor pillar orthogonal to the embedded wiring body are embedded and fixed with an insulating resin, and the semiconductor element surface and the terminal part connection part of the conductor pillar are exposed from the resin, and the resin Terminal portions were provided on both sides of the sealed embedded wiring body.

With the above-described structure, the terminal portion is provided around the semiconductor element because the second wiring body is not used, and the area is slightly increased by that amount, but the thickness is reduced. .

In a third configuration, a first embedded wiring body for connecting a plurality of semiconductor elements is formed on a metal substrate, and a connecting member is attached to a connection portion of the embedded wiring body with a semiconductor element electrode. Connecting the plurality of semiconductor elements to the embedded wiring body and filling an underfill resin between the semiconductor elements and the metal substrate; and insulating between the plurality of semiconductor elements connected to the metal substrate. A step of filling and curing the resin, a step of grinding the filled resin and the semiconductor element to a predetermined thickness, a step of forming a through hole in the ground resin, and filling the inside of the through hole with metal particles. A step of attaching a connecting member to a tip end, a step of connecting a terminal of a second wiring body to a terminal of the first embedded wiring body, and a step of removing the metal substrate. Go between And configured to include a step of cutting the column direction and.

A fourth configuration is a step of forming a buried wiring body to which a plurality of semiconductor elements are connected on a metal substrate, and a step of attaching a connecting member to a connection portion between the buried wiring body and the semiconductor element electrode. Connecting the plurality of semiconductor elements to the embedded wiring body and filling an underfill resin between the semiconductor elements and the metal substrate; and supplying an insulating resin between the plurality of semiconductor elements connected to the metal substrate. A step of filling and curing, a step of grinding the filled resin and the semiconductor element to a predetermined thickness, a step of forming a through hole in the ground resin, and filling the inside of the through hole with metal particles, A method of manufacturing a semiconductor device includes a step of attaching a connecting member to a portion, a step of removing the metal substrate, and a step of cutting between semiconductor elements in a row direction and a column direction.

According to the above configuration, although the area of the semiconductor device is slightly increased because the second wiring body is not used, the thickness is reduced, the number of steps is reduced, and the semiconductor device can be manufactured at low cost.

According to a fifth configuration, a step of forming a first embedded wiring body for connecting a plurality of semiconductor elements on a metal substrate, and a connecting member at a connection portion of the first embedded wiring body with a semiconductor element electrode are provided. Forming a terminal portion made of a conductive pillar around the first embedded wiring body; connecting the plurality of semiconductor elements to the first wiring body to form the semiconductor element and metal A step of filling an underfill resin between the substrates, a step of filling and curing an insulating resin between a plurality of semiconductor elements connected to the metal substrate, and grinding the filled resin and the semiconductor elements to a predetermined thickness Performing a step of connecting a terminal portion of a second wiring body to a terminal portion of the first embedded wiring body, removing the metal substrate, and cutting between the semiconductor elements in a row direction and a column direction. And a manufacturing method including the step of

This method is a method of forming a terminal portion composed of a conductor pillar, connecting a semiconductor element and filling the resin, thereby simplifying a manufacturing process.

The sixth structure employs a method of manufacturing a semiconductor device without using the second wiring board in the manufacturing process of the fifth structure. The area is slightly larger but the thickness is thinner.

In a seventh configuration, a semiconductor element is connected to a first embedded wiring body formed on a metal substrate, and the second embedded wiring body is connected and formed to a terminal portion of a sealing body sealed with a resin. Forming a plurality of the second buried wiring bodies on a metal substrate, connecting terminal portions of the plurality of the sealing bodies to the second buried wiring bodies, A manufacturing method including a step of filling and curing an underfill resin between metal substrates, a step of removing the metal substrate, and a step of cutting between semiconductor elements in a row direction and a column direction.

The seventh configuration is a method in which the sealed body is connected to the wiring body of the second wiring board to remove the wiring board by etching, so that the manufacturing process can be omitted.

An eighth configuration is a step of forming a first embedded wiring body for connecting a plurality of semiconductor elements on a metal substrate, and connecting a connecting member to a connection portion of the plurality of embedded wiring bodies with a semiconductor element electrode. A step of attaching, a step of connecting the plurality of semiconductor elements to the embedded wiring body and filling an underfill resin between the semiconductor element and the metal substrate, and a step of connecting the plurality of semiconductor elements connected to the metal substrate. A step of filling and curing an insulating resin, a step of grinding the filled resin and the semiconductor element to a predetermined thickness, a step of forming a through hole in the ground resin, and a step of forming metal particles inside the through hole. Filling, attaching a connecting member to the tip, connecting the terminal of the second wiring body to the terminal of the first embedded wiring body, and mounting the semiconductor element obtained through the above step. Many substrates And a step of electrically connecting and bonding the terminal portions, and a step of cutting in a row direction and a column direction between the semiconductor elements of the multi-layered semiconductor element mounting substrate. . This configuration simplifies the method of manufacturing a semiconductor device having a three-dimensional structure.

The ninth configuration is manufactured by the manufacturing method of the eighth configuration using a sealing body without using the second wiring body.
With this configuration, the second wiring body is unnecessary, so that the cost and the number of steps can be reduced, but the area is slightly increased.

In a tenth configuration, a first wiring body to which a plurality of semiconductor elements are connected is formed on a metal substrate, and a connecting member is provided on a connection portion between the plurality of wiring bodies and the semiconductor element electrode. Attaching the plurality of semiconductor elements to the wiring body and filling an underfill resin between the semiconductor elements and the metal substrate; and insulating between the plurality of semiconductor elements connected to the metal substrate. A step of filling and curing the resin, a step of grinding the filled resin and the semiconductor element to a predetermined thickness, a step of forming a through hole in the ground resin, and filling the inside of the through hole with metal particles. A step of applying a connecting member to the tip, a step of laminating the semiconductor element mounting boards obtained through the above steps in multiple stages, and electrically connecting and bonding the terminal portions; Each of the mounting boards It is a manufacturing method of a semiconductor device including the step of cutting the inter-conductor elements in the row and column directions.

According to this structure, the semiconductor devices can be stacked and cut at a time before cutting, so that efficient manufacture can be achieved.

An eleventh configuration is characterized in that a plurality of the semiconductor devices are stacked and connected by terminals of the opposing embedded wiring body.
It is a three-dimensional semiconductor device.

With such a structure, a three-dimensional semiconductor device can be efficiently manufactured.

According to the twelfth configuration, when the semiconductor devices are stacked in multiple stages, the terminal portions are provided between the semiconductor elements, so that the layout of the terminals is increased and the area can be further reduced.

[0028]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a plan view of a semiconductor device according to the present invention, and FIG. 2 is a sectional view taken along line AA 'in FIG. FIG. 3 is a diagram for explaining a manufacturing process of the semiconductor device shown in FIG.

Here, the semiconductor device shown in FIGS. 1 and 2 will be described.

The first wiring 3 is connected to the electrode 5 of the semiconductor element 4, and the first wiring 3 is provided with a terminal portion 15 extending from the surface of the semiconductor element 4 to the outside. A plurality of terminal portions 15 of the first wiring body 3 are radially formed around the semiconductor element 4, have a thickness of about 15 μm, and are fixed with an insulating resin 6.

A wiring body 19 is provided on the surface of the semiconductor element 4 on the side opposite to the first wiring body, and the terminal portion 16 of the wiring body 19 is
The semiconductor element 4 is connected via a conductor pillar 10 provided around the semiconductor element 4 so as to penetrate the resin 6. Portions other than the terminal portion 16 are firmly bonded with an adhesive, for example, an epoxy-based adhesive.

Next, a method of manufacturing the semiconductor device shown in FIGS. 1 and 2 will be described with reference to FIG.

The substrate 1 shown in FIG. 3A is a flat copper substrate for forming the first wiring body 3 as the first wiring body, and the first wiring body formed on one substrate The quantity of 3 differs depending on the size of the semiconductor element. The size of the substrate 1 is approximately 100 mm in length and 300 mm in width, and the plate thickness is 0.25 mm. The thickness and size of the substrate 1 are the first
It is appropriately determined according to the number of wiring bodies 3 to be obtained.

Next, a method for forming a pattern of the first wiring body 3 on the substrate 1 shown in FIG. 3A will be described.

As one method, as shown in FIG. 3 (b), the entire surface of the copper plate is plated (or rolled) by plating (or rolling).
The Au / Ni / Au plating 2 laminated to a thickness of about 15 μm is formed. Thereafter, a photosensitive resist (not shown) is applied, and after mask exposure, it is developed. Thereby, patterning is performed so that the portion where the first first wiring body 3 is formed is covered, and the other portions are separated. Next, using a resist pattern as a mask, Ni is etched with, for example, Enstrip NP (alkaline) or Enstrip 165S (sulfuric acid type) manufactured by Meltex Co., Ltd., and a Ni wiring body is formed. To remove. Thereby, a plurality of first wiring bodies 3 are formed simultaneously. Thereafter, Au plating of about 0.1 μm is applied on the pattern of the first wiring body 3 to prevent oxidation at the time of connection.

As another method, a photosensitive resist is applied to the pattern of the wiring body, exposed by a mask, and developed to perform patterning so that the resist on the wiring body forming portion is removed. Then, on a thin Au plating, 10 to 15 μm
Is plated with Ni, and then Au is plated thereon to prevent oxidation during connection. Thereafter, the resist is removed by the same method as described above. Au plating may be about 0.1 μm.

Thereafter, the electrode 5 (see FIG. 2) of the semiconductor element 4 is aligned with the first wiring body 3 made of Au / Ni / Au on the substrate 1 as shown in FIG. Flip chip connection is performed. Then, the first wiring body 3
After filling and heat-curing a low-viscosity resin (for example, a large-chip low-stress resin such as CRP-4711A manufactured by Sumitomo Bakelite Co., Ltd.) as an underfill sealant between the semiconductor chip 4 and the semiconductor device 4 The resin 6 is filled around the semiconductor element by general transfer molding, and the semiconductor element and the substrate are bonded to have resistance to stress.

As a method different from the above-described method of injecting the underfill resin, a sheet-like or high-viscosity resin is adhered onto the metal substrate 1 and the first wiring body 3 so that the semiconductor element 4 is placed in the first state. It is also possible to replace the underfill resin with the adhesive by curing the adhesive at the same time as the connection by heating and pressing or melting and connecting to the connection portion of the wiring body 3.

Next, as shown in FIG. 3D, the semiconductor element 4 and the filled resin 6 are ground by a grinder 100. The thickness of the semiconductor element 4 before grinding is about 800 μm, and this is thinned together with the resin 6 to a thickness of about 10 μm. The grinding machine 100 used here can sufficiently grind and control to a desired thickness using a general device manufactured by DISCO.

Thereafter, since stress distortion, minute cracks and chippings occur on the ground surface of the semiconductor element 4, 50 to 6
Immerse in 3% NaOH at 0 ° C for 1-2 minutes,
about m.

Next, a through hole is formed in the resin 6.
FIGS. 3E to 3H show enlarged portions where through holes are formed for easy explanation. The vicinity of the periphery of the first wiring body 3 is irradiated with laser light 8 to evaporate the resin 6 on the first wiring body 3, thereby forming a through hole 9 in the resin 6 on the first wiring body 3. The diameter of this through hole 9 is 50 to 10
It is about 0 μm, and can be appropriately selected according to the wiring pitch.

Subsequently, the inside of the through hole 9 is filled with copper plating. This method will be described with reference to FIG. The substrate 1 is used as an anode electrode, the cathode electrode is connected to a copper plate (not shown), and the through hole 9 is filled with copper metal 11 using copper sulfate or copper cyanide as an electrolyte.
The plating layer is slightly projected from the resin surface to form a projection 12. Thereafter, the projection 12 is transferred to a tin plating bath, a solder plating bath, or a gold plating bath, and a tin plating, a solder plating, or a gold plating is applied to the protrusion 12. Thus, the terminal portion 10 made of a columnar conductor is formed.

Next, as shown in FIG. 3G, the back surface 13 of the ground semiconductor element 4 and the inside of the through-hole 9 are filled with copper metal, and the protruding portion 12 whose surface is plated with gold or the like is used.
Then, the internal electrodes of the tape wiring board 14 corresponding to the wiring body 19 in FIG. 2 are connected. The tape wiring board 14 has a conductor wiring pattern formed of copper on a base film, and the surface of the conductor wiring pattern is plated with nickel / gold. After the connection, the connection portion is sealed with the resin 101, and the terminal portion 103 is formed with solder or the like. The connection between the protruding portion 12 and the internal electrode of the tape wiring board is made by heating pressure welding or ultrasonic bonding when the protruding portion 12 is gold-plated, and 250 mm when the protruding portion 12 is solder-plated. A fusion connection can be made at a temperature of about ° C.

In addition to the above-described method using the tape wiring substrate 14 as the wiring body 19, there is also a method using a build-up method by a pattern forming method by applying, exposing, and developing a photosensitive resin. This method will be described later in detail.
In this case, the above-described methods of gold plating and solder plating are the same.

Thereafter, in this state, a kerf is provided between the semiconductor elements by a dicing apparatus for separating each semiconductor element (not shown).

Thereafter, as shown in FIG. 3 (h), a protective resin (not shown) at the time of etching is applied to the ground surface and the surface on which the through holes 9 are formed, and after being cured by heat, the copper as the substrate is formed. Is etched away with ferric chloride or cupric chloride to a thickness of about 10 to 50 μm.

Thereafter, the semiconductor elements are cut in a row direction and a column direction by a dicing apparatus, and then the protective resin is dissolved with a solvent. Is completed.

In the above description, a metal substrate is used as a substrate for forming a wiring body. However, a similar structure can be formed by using a substrate that can be etched or mechanically separated. .

Next, another method of manufacturing the terminal portion 10 composed of a conductor pillar will be described.

In the state shown in FIG. 3E, instead of forming through holes in the resin and filling metal particles by plating, after forming the first wiring body 3 in the step shown in FIG. When a gold wire having a diameter of 25 to 30 μm is connected to a predetermined position as a terminal portion 10 by wire bonding, the wire is deformed by heat, pressure and ultrasonic energy, and the wire is deformed by 5 to 60 μm.
A part of the gold wire becomes thinner with a diameter of μm, and is cut by a clamp operation therefrom to form the same one as the terminal portion 10.

Further, there is a method in which one or two stud bumps in which the height of the terminal portion 10 of the conductor pillar is stacked as necessary are formed and then filled with resin.

FIGS. 10A to 10G are views for explaining a method of forming a terminal portion using stud bumps.

As shown in FIG. 10A, a first wiring body 202 is formed on a substrate 201.

Next, as shown in FIG. 10B, the semiconductor element 203 is mounted so that its electrode is connected to the first wiring body 202.

Subsequently, as shown in FIG. 10C, stud bumps 204 as conductor pillars are laminated, and FIG.
As shown in the figure, the space between the semiconductor element 203 and the substrate 201 is filled with an underfill 205.

Next, the periphery of the semiconductor element 203 is sealed with a resin 206 as shown in FIG.

Thereafter, as shown in FIG.
01 is removed by etching, and the resin 206 is ground and removed as shown in FIG.

Another example of performing resin sealing after forming the conductor pillar will be described with reference to FIG.

In FIG. 11, reference numeral 301 denotes an IC chip,
Reference numeral 02 denotes an electrode of the IC chip 301, and reference numeral 303 denotes a planar wiring body to which the electrode 302 of the IC chip 301 is electrically connected. The wiring body 303 is fixedly provided on a substrate 304.

Reference numeral 306 denotes a conductor pillar provided on one surface 303a of the wiring body 303 on which the IC chip 301 is mounted, and 307 denotes a conductor pillar provided on the one surface 303a of the wiring body 303. Then, the IC chip 301
And an insulating resin filled in portions where the conductor pillars 306 are not provided.

Next, a method of manufacturing the semiconductor device having the above-described structure will be described.

First, as shown in FIGS. 11A and 11B, a wiring board composed of a wiring body 303 formed on a substrate 304 and conductor pillars (conductor projections) 306 provided on the wiring body 303. On one surface 303a of the wiring body 303 of 304,
The IC chip 301 is flip-chip connected, and then FIG.
(C) On one surface 303a of the substrate 304, the IC chip 301 and the conductor pillar 306 are placed on the insulating resin 30.
Cover with 7 and seal.

Next, as shown in FIG.
07, and the end face 308 of the conductor pillar 306 is exposed,
Further, the base material 305 is removed from the wiring body 304.

The above method can simplify the manufacturing process because the plating operation and the like do not enter in the middle of the process as compared with the manufacturing method using the plating operation.

Next, a description will be given of a method of forming the second wiring body by using a build-up method based on a pattern forming method by applying, exposing, and developing a photosensitive resin.

FIG. 5 shows a procedure of a manufacturing method for forming the second wiring body with an embedded wiring body.

On the second metal substrate 22 shown in FIG. 5A, a wiring body 25 similar to the first wiring body 3 shown in FIG. 3A is formed. When the memories are stacked in a stack structure, the patterns of the first wiring body and the second wiring body are often the same.

Next, as shown in FIG. 5B, the semi-finished semiconductor device 2 is placed on the metal substrate 12 at the terminal portion of the second wiring body.
4 is connected. The semiconductor device 24 is the semiconductor device in the state shown in FIG. 3F, and is aligned with a predetermined position of the protruding portion 12 of the terminal portion 10 connected to the first wiring body 3 in FIG. Connect.

Next, an underfill resin 26 is filled between the two parts and thermally cured. When the underfill resin is filled between the semiconductor device 24 and the wiring body 25, the distance between the semiconductor device 24 and the wiring body 25 is small, and the underfill resin must be injected from a side surface. An effective method is to inject a low-viscosity underfill resin from the opposite side while sandwiching and reducing the pressure, and to fill the entire surface between the substrates by the action of capillary action and reduced pressure.

Subsequently, the substrate 1 and the second metal substrate 22 are removed by etching, and then the first wiring body 3 is
And the terminal part 27 is formed in the wiring body 25, and it will be in the state shown in FIG.5 (c).

Instead of the method of injecting an underfill resin between the semiconductor device 24 and the wiring body 25, a sheet-like or high-viscosity adhesive is applied to the wiring body 25 to a suitable thickness in advance. The method of connecting the semiconductor device 24 to the wiring body 25 for pressure bonding and hardening the adhesive is also a commonly used method.

The specific dimensions of the semiconductor device manufactured by these methods are as follows: the wiring board 25 (second wiring body) and the first
The thickness of the wiring body 3 (first wiring body) is 10 to 15 μm, respectively.
m, the thickness of the semiconductor element is 10 μm, and the thickness of the underfill resin for bonding between the wiring board and the semiconductor element is about 5 to 10 μm. A semiconductor device having a maximum thickness of about 60 μm is completed.

When the tape wiring board 14 is used as the second wiring body shown in FIG. 3, the thickness of the tape wiring board 14 is about 50 to 80 μm, and the total thickness is 125 μm.

Next, a manufacturing method for forming the first wiring body and the second wiring body in multiple layers will be described.

After a Ni / Au pattern is formed on the metal substrate 1 shown in FIG. 3, a photosensitive adhesive such as polyimide is applied, exposed and developed to form contact holes, and then a copper wiring is formed by patterning. . By doing so, a multilayer wiring can be formed. This method is generally called a build-up method.

The semiconductor device having the first wiring substrate and the second wiring substrate manufactured as described above is connected by a combination of the above-described methods.

The first wiring body and the second wiring body are multi-layered by the above method, so that the terminal portion can be freely arranged around the semiconductor element and on the semiconductor element, and the area of the semiconductor device can be further reduced. Becomes possible.

Next, a second embodiment of the semiconductor device will be described with reference to FIG.

FIG. 4 omits the step of connecting the tape wiring substrate 14 corresponding to the second wiring body in FIG. 3G, and uses a wiring body using a thin film only on one side of the semiconductor element 4. This is a semiconductor device. In this case,
Although it can be formed thinner without using the second wiring body, a terminal portion (103 in FIG. 3G) cannot be provided on the back surface 13 of the element 4 and must be provided outside the semiconductor element 4 by that much. As a result, the size of the semiconductor device is slightly increased.

Next, a description will be given of a semiconductor module in which the semiconductor devices configured as described above are stacked in multiple stages.

FIG. 6 shows the semiconductor device 7 in the state shown in FIG.
No. 0 is superimposed on the positioning jig 21 in multiple stages and passed through a reflow furnace to connect the terminals. For this reason, although not shown in FIG. 6, the following description will be made using the reference numerals shown in FIG.

FIG. 6 shows the semiconductor device 7 in the state shown in FIG.
FIG. 4 is a cross-sectional view of a semiconductor module in which a plurality of 0s are stacked in a stack structure. Solder balls are provided in advance on the terminal portions 15 of the first wiring body 3 of the semiconductor device 70 shown in FIG. 2 by a printing method or a plating method. The wiring body 19 does not need to be provided with a material such as solder, and a material having good wettability with solder, for example, gold is adhered to about 0.1 μm. For example, when the tape wiring substrate 14 is used as the wiring body 19 as shown in FIG. 3, the material configuration is general from the manufacturing process, and there is no problem at all.

Next, the terminal of the semiconductor device 70 is connected to the jig 21.
And place it on the first semiconductor device.
When the first semiconductor device 70 overlaps with the first semiconductor device 70, the terminal portion 16 of the second wiring board 19 of the first semiconductor device 70
When the terminal portions 15 of the wiring board 3 come into contact with each other and are heated and melted by a solder reflow device in a nitrogen atmosphere, a stacked semiconductor device in which each terminal portion is electrically connected as shown in FIG. 6 is completed.

FIG. 7 shows the semiconductor device 8 in the state shown in FIG.
Nos. 0 are superimposed in multiple stages and passed through a reflow furnace to connect the terminals. For this reason, although not shown in FIG. 7, the following description will be made using the reference numerals shown in FIG.

FIG. 7 shows the semiconductor device 8 in the state shown in FIG.
0 is overlapped in the same manner, and the terminal portion is reflowed to make it electrically conductive. In this embodiment, a positioning jig is used as in the embodiment shown in FIG. 6, but is not shown. In the case of the present embodiment, the terminal unit 15 is
6 is different from the embodiment shown in FIG. 6 in that the thickness is smaller than that of the stacked semiconductor device shown in FIG. If the number of pins is the same, the planar area may increase.

Next, a method for efficiently manufacturing a stacked semiconductor device having a stack structure as shown in FIGS. 6 and 7 will be described with reference to a cross-sectional view of FIG. 8 and a plan view of FIG.

First, a semiconductor device having the structure shown in FIG. 2 is manufactured through the steps shown in FIGS. At this time, without performing a cutting step of cutting the semiconductor element from the substrate into individual pieces,
The semiconductor device 26 is a semi-finished product.

Next, the semi-finished semiconductor devices 26 are stacked in multiple stages, the terminals provided on the front surface and the back surface of the substrate are aligned, and the bonding member attached to the connection portion is passed through a reflow furnace. To make a fusion connection. The stacked substrates in this state are separated from each other by a dicing device, thereby completing a four-stage stacked semiconductor device.

In the above description, the connection method between the semiconductor devices has been described by using the fusion connection by the reflow method as an example. However, for example, by forming a gold bump on the terminal portion, the gold-gold bonding method, It is also possible to use a construction method such as a pressure welding method.

After the semiconductor devices are stacked, a resin is injected and cured between the semiconductor devices, or a sheet-like or liquid adhesive is supplied between the semiconductor devices in advance, so that the connection portion is formed. By sealing, a stacked semiconductor device with higher reliability can be obtained.

[0092]

Since the present invention is constituted as described above, the following hardening is achieved.

An extremely thin wiring body is arranged on both sides of the semiconductor element, and both wiring bodies are connected to each other by conductor pillars which stand in parallel with the semiconductor element with the semiconductor element interposed therebetween. A semiconductor device having a thickness of 100 μm or less can be realized.

In the case where the second wiring body is not used, a semiconductor device having a slightly larger area but a thickness of 60 μm or less can be realized.

In the case of a stacked semiconductor device in which single semiconductor devices are stacked and connected in multiple stages, a very thin highly integrated semiconductor device can be easily obtained.

The first wiring body is formed by buried wiring, and
When the wiring body is formed by a tape carrier wiring body, the process is simplified and a semiconductor device with a minimum area can be obtained.

When the formation time of the conductor pillar for connecting the first wiring body and the second wiring body to each other before the connection of the semiconductor element is formed, the plating process and the like are not performed in the middle of the manufacturing process. Is simplified.

When both the first wiring body and the second wiring body are formed by embedded wiring bodies, an extremely thin semiconductor device can be easily manufactured.

In the case where semi-finished semiconductor devices that are not singulated are stacked in multiple layers and the predetermined portion is cut together with the terminal portions connected and bonded, a stacked semiconductor device can be efficiently produced. it can.

By forming the first and second wiring bodies into multilayer wiring, the terminal portions can be freely arranged around the semiconductor element and on the semiconductor element, and the area of the semiconductor device can be further reduced.

[Brief description of the drawings]

FIG. 1 is a plan view of a semiconductor device according to the present invention.

FIG. 2 is a sectional view taken along the line AA 'in FIG.

FIGS. 3A to 3H are views for explaining a manufacturing process of the semiconductor device shown in FIG. 1;

FIG. 4 is a sectional view of a second embodiment of the present invention.

FIGS. 5A to 5C show a procedure of a manufacturing method for forming a second wiring body with an embedded wiring body.

FIG. 6 is a cross-sectional view of a stacked semiconductor device in which a plurality of semiconductor devices are stacked in a stack structure.

FIG. 7 is a cross-sectional view of a stacked semiconductor device in which a plurality of semiconductor devices are stacked in a stack structure.

FIG. 8 is a cross-sectional view of a substrate in which a plurality of substrates on which a plurality of semiconductor elements are mounted are further stacked in multiple stages.

FIG. 9 is a plan view of a substrate in which a plurality of substrates on which a plurality of semiconductor elements are mounted are further stacked in multiple stages.

FIGS. 10A to 10G are diagrams for explaining a method of forming a terminal portion using stud bumps.

FIG. 11 is a view for explaining another example in which resin sealing is performed after the formation of the conductor pillar.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Ni plating 3 First wiring body 4 Semiconductor element 5 Electrode 6 Resin 7 Underfill 8 Laser light 9 Through hole 10 Conductor pillar 11 Copper metal 12 Projection 13 Backside of semiconductor element 14 Tape wiring board 15, 16 Terminal 19 Second wiring body 21 Positioning jig 22 Second metal substrate 25 Wiring body 26 Semi-finished semiconductor device

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Jun Tsuno No. 5-7-1 Shiba, Minato-ku, Tokyo Inside NEC Corporation

Claims (18)

[Claims] 1. A semiconductor device comprising a semiconductor element and a terminal portion connected to the semiconductor element, wherein the semiconductor element is formed by forming a wiring pattern on a substrate and then removing the substrate from the embedded wiring body. A semiconductor device, wherein the terminal portion is provided on a front surface and a back surface of the semiconductor device. 2. A semiconductor device comprising a semiconductor element and a terminal portion connected to the semiconductor element, wherein the first wiring body connected to the semiconductor element and the semiconductor element are sandwiched together with the first wiring body. A second wiring body opposed to the first wiring body, wherein at least a first wiring body of the first and second wiring bodies is formed after forming a wiring pattern on a substrate. A semiconductor device, which is an embedded wiring body obtained by removing a substrate, wherein the terminal portion is provided on a front surface and a back surface of the semiconductor device. 3. An embedded wiring body obtained by forming a wiring pattern on a substrate and then removing the substrate,
A semiconductor element sealed with a resin disposed on the wiring body, comprising: a plurality of terminal portions formed in the embedded wiring body, wherein the embedded wiring body is connected to the semiconductor element. The terminal portion formed in the embedded wiring body is connected to the semiconductor element via the wiring body, is embedded in the resin at a position around the semiconductor element, is connected to the wiring body, and is A semiconductor device comprising: a conductor pillar exposed from a resin on a surface on a wiring body side. 4. The semiconductor device according to claim 1, wherein said buried wiring body is formed by a multilayer wiring. 5. A step of forming a first wiring body to which a plurality of semiconductor elements are connected on a metal substrate; a step of connecting or bonding the plurality of semiconductor elements to the first wiring body; A step of filling and curing an insulating resin between the plurality of semiconductor elements connected to the substrate; a step of grinding the filled resin and the semiconductor element to a predetermined thickness; and forming a through hole in the ground resin. Filling the inside of the through-hole with metal particles, and attaching a connecting member to the tip, and connecting the terminal of the second wiring body to the terminal of the first wiring body. And a step of removing the metal substrate. 6. A step of forming a wiring body to which a plurality of semiconductor elements are connected on a metal substrate; a step of connecting or bonding the plurality of semiconductor elements to the wiring body; Filling an insulating resin between the semiconductor elements and curing the resin; grinding the filled resin and the semiconductor element to a predetermined thickness; forming a through hole in the ground resin; A method of manufacturing a semiconductor device, comprising: filling a hole with metal particles, attaching a connecting member to a tip portion, and removing the metal substrate. 7. A step of forming a first wiring body to which a plurality of semiconductor elements are connected on a metal substrate, and forming a terminal portion made of a conductor pillar around the semiconductor element of the first wiring body. A step of connecting or bonding the plurality of semiconductor elements to the first wiring body; a step of filling and curing a resin between the plurality of semiconductor elements connected to the metal substrate; Grinding the resin and the semiconductor element filled in between to a predetermined thickness; connecting a terminal of the second wiring body to a terminal of the first wiring body; and removing the metal substrate. And a method of manufacturing a semiconductor device. 8. A step of forming a wiring body to which a plurality of semiconductor elements are connected on a metal substrate; a step of forming a terminal portion made of a conductor pillar around the semiconductor element in the wiring body; Connecting or bonding the semiconductor element to the wiring body; filling resin between the plurality of semiconductor elements connected to the metal substrate and curing; and filling the resin between the semiconductor elements with the semiconductor element. A step of grinding the metal substrate to a predetermined thickness, and a step of removing the metal substrate. 9. The method of manufacturing a semiconductor device according to claim 5, wherein a plurality of said second wiring substrates are formed on a metal substrate. 10. A step of forming a first wiring body to which a plurality of semiconductor elements are connected on a metal substrate; a step of connecting or bonding the plurality of semiconductor elements to the wiring body; and connecting to the metal substrate. Filling a resin between the plurality of semiconductor elements and hardening the resin, grinding the filled resin and the semiconductor element to a predetermined thickness, forming a through hole in the ground resin, Filling the inside of the through hole with metal particles and applying a connecting member to the tip end; connecting the terminal of the second wiring body to the terminal of the first wiring body; A step of laminating and bonding the semiconductor element mounting substrates obtained through the steps in multiple stages and electrically connecting the terminal portions. 11. The embedded wiring body according to claim 2, wherein the second wiring body is a buried wiring body obtained by forming a wiring pattern formed on a metal substrate and then removing the substrate. Semiconductor device. 12. The semiconductor device according to claim 2, wherein said second wiring body is a tape wiring board. 13. The semiconductor device according to claim 2, wherein said second wiring body is formed by a build-up method. 14. The semiconductor device according to claim 2, wherein said second wiring body is formed by a multilayer wiring. 15. A step of forming a wiring body on which a plurality of semiconductor elements are connected on a metal substrate; a step of connecting or bonding the plurality of semiconductor elements to the wiring body; Filling a resin between the semiconductor elements and curing the resin; grinding the filled resin and the semiconductor element to a predetermined thickness; forming a through hole in the ground resin; Filling with metal particles and applying a connecting member to the tip, and laminating and bonding the semiconductor element mounting boards obtained through the above steps in multiple stages, and electrically connecting the terminal portions. A method for manufacturing a semiconductor device, comprising: 16. The semiconductor device according to claim 5, further comprising a step of cutting a plurality of semiconductor elements connected to said wiring body in a row direction and a column direction. Manufacturing method. 17. A stacked semiconductor device, wherein a plurality of the semiconductor devices according to claim 1 are stacked and connected by opposing terminals. 18. The stacked semiconductor device according to claim 17, wherein a terminal portion for connecting the semiconductor devices is provided between semiconductor elements.