JP2002319673A - 半導体デバイスとゲート誘電体層の形成方法 - Google Patents

半導体デバイスとゲート誘電体層の形成方法

Info

Publication number
JP2002319673A
JP2002319673A JP2002020962A JP2002020962A JP2002319673A JP 2002319673 A JP2002319673 A JP 2002319673A JP 2002020962 A JP2002020962 A JP 2002020962A JP 2002020962 A JP2002020962 A JP 2002020962A JP 2002319673 A JP2002319673 A JP 2002319673A
Authority
JP
Japan
Prior art keywords
layer
silicon oxide
silicon
semiconductor device
sio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP2002020962A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002319673A5 (enExample
Inventor
David A Muller
エー ミュラー デーヴィット
Gregory L Timp
エル ティンプ グレゴリー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Publication of JP2002319673A publication Critical patent/JP2002319673A/ja
Publication of JP2002319673A5 publication Critical patent/JP2002319673A5/ja
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
    • H10D1/684—Capacitors having no potential barriers having dielectrics comprising perovskite structures the dielectrics comprising multiple layers, e.g. comprising buffer layers, seed layers or gradient layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/26—Web or sheet containing structurally defined element or component, the element or component having a specified physical dimension
    • Y10T428/263—Coating layer not in excess of 5 mils thick or equivalent
    • Y10T428/264—Up to 3 mils
    • Y10T428/265—1 mil or less

Landscapes

  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)
JP2002020962A 2001-02-01 2002-01-30 半導体デバイスとゲート誘電体層の形成方法 Abandoned JP2002319673A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/773443 2001-02-01
US09/773,443 US6693051B2 (en) 2001-02-01 2001-02-01 Silicon oxide based gate dielectric layer

Publications (2)

Publication Number Publication Date
JP2002319673A true JP2002319673A (ja) 2002-10-31
JP2002319673A5 JP2002319673A5 (enExample) 2005-07-07

Family

ID=25098272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002020962A Abandoned JP2002319673A (ja) 2001-02-01 2002-01-30 半導体デバイスとゲート誘電体層の形成方法

Country Status (2)

Country Link
US (2) US6693051B2 (enExample)
JP (1) JP2002319673A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007274002A (ja) * 2007-05-14 2007-10-18 Sony Corp 原子層蒸着法を用いた薄膜形成方法

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020102797A1 (en) * 2001-02-01 2002-08-01 Muller David A. Composite gate dielectric layer
US7037862B2 (en) * 2001-06-13 2006-05-02 Micron Technology, Inc. Dielectric layer forming method and devices formed therewith
AU2003261078A1 (en) * 2002-06-26 2004-01-19 Semequip Inc. A semiconductor device and method of fabricating a semiconductor device
US6723581B1 (en) * 2002-10-21 2004-04-20 Agere Systems Inc. Semiconductor device having a high-K gate dielectric and method of manufacture thereof
US6825538B2 (en) * 2002-11-20 2004-11-30 Agere Systems Inc. Semiconductor device using an insulating layer having a seed layer
CN100431103C (zh) * 2003-07-30 2008-11-05 因芬尼昂技术股份公司 高k介电膜,及其形成方法和相关的半导体器件
US20050137468A1 (en) * 2003-12-18 2005-06-23 Jerome Avron Device, system, and method for in-vivo sensing of a substance
US7138680B2 (en) * 2004-09-14 2006-11-21 Infineon Technologies Ag Memory device with floating gate stack
US7282773B2 (en) * 2004-09-14 2007-10-16 Advanced Micro Devices Inc. Semiconductor device with high-k dielectric layer
JP5220549B2 (ja) * 2008-10-20 2013-06-26 本田技研工業株式会社 アウタロータ型多極発電機のステータ構造体
US8394584B2 (en) 2008-12-19 2013-03-12 The Board Of Trustees Of The University Of Illinois Detecting and sorting methylated DNA using a synthetic nanopore
US8748091B2 (en) * 2009-12-18 2014-06-10 The Board Of Trustees Of The University Of Illinois Characterizing stretched polynucleotides in a synthetic nanopassage

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4783238A (en) * 1987-07-31 1988-11-08 Hughes Aircraft Company Planarized insulation isolation
DE4243410C2 (de) * 1992-12-17 1996-05-15 Mannesmann Ag Verfahren zur Herstellung eines Dünnfilmmeßwiderstandes
US5937303A (en) 1997-10-29 1999-08-10 Advanced Micro Devices High dielectric constant gate dielectric integrated with nitrogenated gate electrode
US6057584A (en) * 1997-12-19 2000-05-02 Advanced Micro Devices, Inc. Semiconductor device having a tri-layer gate insulating dielectric
JP2000106401A (ja) * 1998-09-29 2000-04-11 Sony Corp メモリ素子およびその製造方法ならびに集積回路
US6251800B1 (en) * 1999-01-06 2001-06-26 Advanced Micro Devices, Inc. Ultrathin deposited gate dielectric formation using low-power, low-pressure PECVD for improved semiconductor device performance
US6074919A (en) 1999-01-20 2000-06-13 Advanced Micro Devices, Inc. Method of forming an ultrathin gate dielectric
US6303047B1 (en) * 1999-03-22 2001-10-16 Lsi Logic Corporation Low dielectric constant multiple carbon-containing silicon oxide dielectric material for use in integrated circuit structures, and method of making same
JP2001085545A (ja) * 1999-09-16 2001-03-30 Sony Corp メモリ素子の製造方法
KR100378186B1 (ko) * 2000-10-19 2003-03-29 삼성전자주식회사 원자층 증착법으로 형성된 박막이 채용된 반도체 소자 및그 제조방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007274002A (ja) * 2007-05-14 2007-10-18 Sony Corp 原子層蒸着法を用いた薄膜形成方法

Also Published As

Publication number Publication date
US20040097026A1 (en) 2004-05-20
US6844076B2 (en) 2005-01-18
US20020100946A1 (en) 2002-08-01
US6693051B2 (en) 2004-02-17

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