JP2002314408A5 - - Google Patents
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- Publication number
- JP2002314408A5 JP2002314408A5 JP2001115282A JP2001115282A JP2002314408A5 JP 2002314408 A5 JP2002314408 A5 JP 2002314408A5 JP 2001115282 A JP2001115282 A JP 2001115282A JP 2001115282 A JP2001115282 A JP 2001115282A JP 2002314408 A5 JP2002314408 A5 JP 2002314408A5
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- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001115282A JP4540247B2 (ja) | 2001-04-13 | 2001-04-13 | Pll回路 |
US10/107,629 US6639475B2 (en) | 2001-04-13 | 2002-03-27 | PLL circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001115282A JP4540247B2 (ja) | 2001-04-13 | 2001-04-13 | Pll回路 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2002314408A JP2002314408A (ja) | 2002-10-25 |
JP2002314408A5 true JP2002314408A5 (ja) | 2008-05-08 |
JP4540247B2 JP4540247B2 (ja) | 2010-09-08 |
Family
ID=18966207
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2001115282A Expired - Fee Related JP4540247B2 (ja) | 2001-04-13 | 2001-04-13 | Pll回路 |
Country Status (2)
Country | Link |
---|---|
US (1) | US6639475B2 (ja) |
JP (1) | JP4540247B2 (ja) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4357674B2 (ja) * | 1999-11-24 | 2009-11-04 | 日本テキサス・インスツルメンツ株式会社 | 周波数シンセサイザ |
US6985708B2 (en) * | 2002-06-12 | 2006-01-10 | Broadcom, Corp. | Linearized fractional-N synthesizer having a gated offset |
JP4045978B2 (ja) * | 2003-02-25 | 2008-02-13 | 松下電器産業株式会社 | デジタル信号送受信機 |
US7053684B1 (en) * | 2004-04-28 | 2006-05-30 | Cirrus Logic, Inc. | Reduced jitter charge pumps and circuits and systems utilizing the same |
US7253671B2 (en) * | 2004-06-28 | 2007-08-07 | Intelliserv, Inc. | Apparatus and method for compensating for clock drift in downhole drilling components |
KR100632951B1 (ko) * | 2004-09-22 | 2006-10-11 | 삼성전자주식회사 | 리플 안정화 기능을 갖는 고전압 발생 회로 |
US7385429B1 (en) * | 2005-05-31 | 2008-06-10 | Altera Corporation | Charge pump with reduced current mismatch |
ES2680897T3 (es) | 2009-06-02 | 2018-09-11 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Método de fabricación de una lente |
JP5668082B2 (ja) | 2011-01-26 | 2015-02-12 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
RU2491713C1 (ru) * | 2012-10-01 | 2013-08-27 | Андрей Алексеевич Зайцев | Синтезатор сетки частот на базе контура фапч с компенсацией помех дробности |
KR102298158B1 (ko) | 2014-08-25 | 2021-09-03 | 삼성전자주식회사 | 반도체 장치와 이를 포함하는 위상 동기 회로 |
KR102422899B1 (ko) * | 2015-06-26 | 2022-07-19 | 엘지전자 주식회사 | 전력변환장치 및 이를 구비하는 공기조화기 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0770168B2 (ja) * | 1987-08-17 | 1995-07-31 | 日本電気株式会社 | 磁気ディスク装置用pll回路 |
JPH05206845A (ja) * | 1992-01-24 | 1993-08-13 | Hitachi Ltd | 位相同期回路 |
JP3653892B2 (ja) * | 1996-11-21 | 2005-06-02 | 富士通株式会社 | フラクショナルn周波数シンセサイザ |
JP3334565B2 (ja) * | 1997-07-01 | 2002-10-15 | 三菱電機株式会社 | 周波数シンセサイザ |
US5942949A (en) * | 1997-10-14 | 1999-08-24 | Lucent Technologies Inc. | Self-calibrating phase-lock loop with auto-trim operations for selecting an appropriate oscillator operating curve |
JP2000174616A (ja) * | 1998-12-04 | 2000-06-23 | Fujitsu Ltd | 半導体集積回路 |
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2001
- 2001-04-13 JP JP2001115282A patent/JP4540247B2/ja not_active Expired - Fee Related
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2002
- 2002-03-27 US US10/107,629 patent/US6639475B2/en not_active Expired - Lifetime