JP2002287716A - Electrooptical device, electronic equipment, and projection type display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To automatically correct color irregularity caused by aging or the like in a projection type display device using an electrooptical device such as a liquid crystal panel. SOLUTION: In an about rectangular display area in the electrooptical device, reference pixels are defined at 9 points in total at the center of the display area, at each vertex of the display area, and at the centers of each side of the display area. Moreover, in the neighborhood of the reference pixels at the 8 points in the circumferential part, a plurality of transistors for measurement are formed in the same process as the transistors for pixels. A coefficient correction part 25 determines a correction amount in each reference pixel based on leak current of these transistors for measurement. In a multiplying circuit 24, a correction amount can be obtained by interpolating the correction amounts of the circumferential reference pixels in the pixel data to be outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electro-optical device, an electronic apparatus, and a projection display device suitable for use in a projection display device.

[0002]

2. Description of the Related Art In recent years, a projection screen of a color projection display device has been increasing in size. With the enlargement of the projection screen, there is a problem that color unevenness occurs in a display image on the projection screen. As a cause of such color unevenness, there is variation in a projection light source, an image generation device (light valve), and the like.
Conventionally, as a method of correcting a defect of a display image in an entire display device including a projection display device, a method described below has been considered. That is, as one of the display image correction methods, for example, after detecting a singular point in the display image using an imaging unit, the optical data of the singular point is compared with a reference level to calculate a correction value. There is a method of correcting a display device based on a correction value.

Another method for correcting a display image is as follows. First, a video signal having a constant luminance level is input, an image is projected on an image display surface (screen), and the luminance level is measured by an image pickup means for each of the regions obtained by dividing the image display surface into a lattice shape. DC difference data from the reference level is recorded in the memory as luminance correction data. This memory is incorporated in the brightness correction circuit. The correction data is read out horizontally,
This is performed by calculating an address of a memory corresponding to a rectangular screen area divided at the time of luminance measurement from the vertical synchronization signal.

The correction data is converted into an analog value by a D / A conversion circuit, and an image signal obtained by adding the analog correction value to an input image signal using an addition circuit is output to the display device. At this time, in a liquid crystal display element constituting a projection type display device, for example, as a light valve, a display drive corrected based on the above-described image signal is performed. In this way, luminance unevenness and color unevenness on the image display surface are corrected. Also, instead of the rectangular screen area described above,
A technique using a triangular screen area is also known (JP-A-2000-316170).

[0005]

However, the above-described color unevenness correction can be performed at the time of shipment or maintenance of the projection display device, and cannot be performed when the mode of the color unevenness is changed due to aging or the like. The problem arises. The present invention has been made in view of the above circumstances, and has as its object to provide an electro-optical device, an electronic device, and a projection display device that can automatically correct color unevenness.

[0006]

Means for Solving the Problems In order to solve the above problems, the present invention is characterized by having the following constitution. Note that the contents in parentheses are examples. In the configuration according to the first aspect, the plurality of pixel electrodes (118) disposed on the element substrate (101) and to which the pixel voltage is applied are brought into a conductive state during a selection period to reduce the pixel voltage. A switching element that holds the pixel voltage at the pixel electrode by being applied to the pixel electrode to be in a non-conductive state during a non-selection period; A plurality of current sources including a dummy element (302) of the switching element (116), a positional relationship between a pixel to which a voltage is applied and each of the reference pixels, and a current flowing through a current source corresponding to each of the reference pixels. A correction circuit (color unevenness correction unit 203) for correcting a pixel voltage of a pixel to which the voltage is applied. Also,
In the configuration according to claim 2, the plurality of pixel electrodes arranged on the element substrate and to which the pixel voltage is applied are turned on during a selection period, so that the pixel voltage is applied to the pixel electrode. A non-conductive state during the non-selection period, a switching element (116) for holding the pixel voltage on the pixel electrode, a light shielding film (data line 114) for shielding the switching element from light irradiation, A plurality of current sources each including a dummy element (302) of the switching element (116), a positional relationship between a pixel to which a voltage is applied, and the reference pixels; A correction circuit (color unevenness correction unit 203) for correcting a pixel voltage of the pixel to which the voltage is applied according to a current flowing to a current source corresponding to the pixel. Furthermore, in the configuration according to the third aspect, in the electro-optical device according to the second aspect, a light-shielding film (light-shielding line 382) that shields the dummy element from light irradiation.
It is characterized by having. Further, in the configuration according to a fourth aspect, in the electro-optical device according to the first to third aspects, each of the current sources includes a plurality of the dummy elements connected in parallel. Further, according to a fifth aspect of the present invention, in the electro-optical device according to the first to fourth aspects, the switching element comprises a TFT. Further, according to a sixth aspect of the present invention, in the electro-optical device according to the first to fifth aspects, the dummy element is manufactured in the same process as the switching element. Furthermore, in the configuration according to claim 7, in the electro-optical device according to any one of claims 1 to 6, the current source is connected to the element substrate (101).
The first line (360) disposed above and the second line (3) disposed substantially parallel to the first line (360).
64), a third line (362) interposed between the first and second lines, and a third line (362).
A plurality of dummy elements (302) formed thereon, one of the first and second lines and the third line (3
62), and second lead wires (368,..., 36) connecting the first line (360) and the input terminals of the plurality of dummy elements.
8) and a third lead wire (374, 374) connecting the second line (360) and the output terminals of the plurality of dummy elements.
, 374). An eighth aspect of the invention is characterized by including the electro-optical device according to any one of the first to seventh aspects. In the configuration according to the ninth aspect, the light source (1431)
And a light modulator (100) for modulating light from the light source.
R, 100G, 100B) and a projection display device (1430) having a projection lens (1437) for projecting light modulated by the light modulation device, wherein the light modulation device is disposed on an element substrate (101). The plurality of pixel electrodes (118) to which a pixel voltage is applied are turned on during a selection period, so that the pixel voltage is applied to the pixel electrodes and turned off during a non-selection period. A switching element (116) for holding the pixel voltage on the pixel electrode, a light shielding film (data line 114) for shielding the switching element from light irradiation, and a switching element provided for each of a plurality of reference pixels; Element (11
6) a plurality of current sources including the dummy element (302), a positional relationship between a pixel to which a voltage is applied and the reference pixels, and a current flowing through a current source corresponding to the reference pixels. A correction circuit (color unevenness correction unit 203) for correcting a pixel voltage of a pixel to which a voltage is applied. Further, in the configuration according to claim 10,
The projection display device according to claim 9, further comprising a light-shielding film (light-shielding line 382) that shields the dummy element from light irradiation. Further, in the configuration according to claim 11, in the projection type display device according to claim 9 or 10, the current source has a plurality of the dummy elements connected in parallel. Further, in the configuration according to claim 12, in the projection display device according to claims 10 to 11, the switching element is a T type.
It is characterized by being made of FT. According to a thirteenth aspect of the present invention, in the projection display device according to the ninth to twelfth aspects, the dummy element is manufactured in the same step as the switching element. further,
According to a fourteenth aspect of the present invention, in the projection display according to any one of the ninth to thirteenth aspects, the current source is provided on a first line (1) provided on the element substrate (101). 360), a second line (364) disposed substantially parallel to the first line (360), and a third line (362) interposed between the first and second lines. )
And a plurality of dummy elements (302) formed on the third line (362), and a first lead wire connecting any of the first or second line to the third line ( 380) and second lead wires (368,...) Connecting the first line and the input terminals of the plurality of dummy elements.
, 368) and third lead wires (374,...) Connecting the second line and the output terminals of the plurality of dummy elements.
, 374).

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION Configuration of embodiment 1.1. Next, the configuration of the optical system of the projection display device according to one embodiment of the present invention will be described with reference to FIG. In the figure, 1431 is a light source, 1442 and 1444 are dichroic mirrors, 14
43, 1448, and 1449 are reflection mirrors, 1445 is an entrance lens, 1446 is a relay lens, 1447 is an exit lens, 100R, 100G, and 100B are liquid crystal light modulators, 1451 is a cross dichroic prism, and 143.
Reference numeral 7 denotes a projection lens. The light source 1431 includes a lamp 1440 such as a metal halide and a reflector 1441 that reflects light from the lamp.

The blue / green light reflecting dichroic mirror 1442 transmits red light of the light beam from the light source 1431 and reflects blue light and green light.
The transmitted red light is reflected by the reflection mirror 1443 and is incident on the liquid crystal light modulation device for red light 100R. On the other hand, green light among the color lights reflected by the dichroic mirror 42 is reflected by the dichroic mirror 1444 that reflects green light, and is incident on the liquid crystal light modulation device 100G for green light. On the other hand, the blue light is transmitted to the second dichroic mirror 144.
4 is also transmitted. For blue light, the incidence lens 1445 and the relay lens 14
A light guiding means including a relay lens system including an emission lens 46 and an emission lens 1447 is provided, and blue light is incident on the liquid crystal light modulation device for blue light 100B via the light guiding means.

[0009] The three color lights modulated by the respective light modulators enter a cross dichroic prism 1451.
This prism is formed by bonding four right-angle prisms, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface. The three color lights are combined by these dielectric multilayer films to form light representing a color image. The combined light is projected onto a projection screen 30 by a projection lens 1437 which is a projection optical system.
0, and the image is enlarged and displayed.

1.2. Next, the liquid crystal light modulators 100R, 100G, 100
The configuration of the electro-optical device used as B and its peripheral circuits will be described with reference to FIGS. FIG. 2 is a block diagram of a portion mainly mounted on an element substrate of the electro-optical device, and FIG. 1 is a block diagram of a portion mainly mounted separately from the element substrate. In FIG. 1, 8-bit video data, a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a pixel clock CLK, and an I ² C BUS (registered trademark) control signal are supplied from an upper-level device (not shown) to the projection display device. You. Reference numeral 202 denotes a secondary gamma correction circuit that corrects the gradation characteristics of the video data and outputs corrected video data whose gradation has been corrected with a 9-bit bus width. 20
Reference numeral 3 denotes a color nonuniformity correction unit that corrects color nonuniformity in each part of the projection surface. The details of the color unevenness correction unit 203 will be described later.

Reference numeral 204 denotes a multi-phase development circuit, which performs multi-phase development (here, six-layer development) of the corrected video data supplied from the color unevenness correction unit 203. That is, the duration of the pixel value of each dot in the corrected video data is extended six times, and these timings are corrected so that the pixel values of 6 dots can be latched simultaneously. Next, a data inversion / non-inversion selection circuit 206 inverts some of these pixel values so that the polarity of the pixel values is inverted every dot.
A digital / analog (D / A) converter 208 converts the pixel value output from the data inversion / non-inversion selection circuit 206 into multi-phase video data VID1 which is an analog signal.
And output. This multi-phase video data VID1
6 are amplified via video amplifiers 210-1 to 210-6.

Reference numeral 212 denotes an I ² C control circuit, and I ² C B
Each part in the electro-optical device is controlled based on the US control signal. An LCD timing generation circuit 214 generates various timing signals based on the horizontal synchronization signal Hsync and the vertical synchronization signal Vsync. The main ones among these timing signals will be described. In addition,
FIG. 8 shows waveform examples of these timing signals.

First, CLX is a clock signal for display of the electro-optical device, has a clock cycle that is the number of phases of the pixel clock CLK (here, six times), and has a duty ratio of 50.
% Signal. / CLX is its inverted signal (in this specification, the inverted signal is prefixed with "/"). DX is a line start pulse, which rises at the head of each line in the electro-optical device. NRG is a precharge signal, which rises slightly earlier than the timing at which precharge is to be performed, that is, the line start pulse DX. ENB1, EN
B2 is a latch enable signal, which rises to the H level alternately at the timing when the multi-phase video data VID1 to VID6 are stabilized. CLY is a line clock signal of the electro-optical device, has a predetermined line clock cycle, and has a duty ratio of 50%. DY is a frame start pulse, which rises at the beginning of each frame in the electro-optical device. BIASO and B
IASE is an odd dot polarity signal and an even dot polarity signal, and is a signal indicating the polarity of the voltage applied to the liquid crystal layer for the corresponding pixel (in other words, the polarity of the corresponding video data VID1 to VID6). That is, the polarity of the applied voltage indicates a positive polarity when these signals are at the L level and a negative polarity when these signals are at the H level.

Reference numeral 216 denotes a D / A converter, which is an I ² C
A necessary analog signal is generated from the BUS control signal.
Sub Brightness is a brightness adjustment signal, and is a signal indicating a brightness adjustment command based on a user's panel operation or the like. Bias_C
OM is a reference potential signal of the brightness adjustment signal Sub Brightness. NRSH is a precharge potential maximum value signal, NRSL
Is a precharge potential minimum value signal, which indicates the maximum value and the minimum value of the precharge potential, respectively. LCCOM is a counter electrode potential and is applied to the counter electrode.

Reference numeral 222 denotes a differential amplifier, which is a luminance adjustment signal.
Video amplifier 210 that amplifies the difference between Sub Brightness and reference potential signal Bias_COM, and outputs the result as a gain signal to output video data VID1, 3, 5 of odd-numbered dots.
-1, 3 and 5. Similarly, the differential amplifier 224 is
Brightness adjustment signal Sub Brightness and reference potential signal Bias_C
The difference of OM is amplified, and the result is given as a gain to video amplifiers 210-2, 4, 6 that output video data VID2, 4, 6 of even-numbered dots.

Reference numerals 218 and 220 denote switching circuits, which are a luminance adjustment signal Sub Brightness and a reference potential signal Bi.
As_COM is supplied to the differential amplifiers 222 and 224 through straight connection or cross connection. Switching circuit 21
8, 220 connection state (straight or cross)
Complementary switching is performed according to the polarity signals BIASO and BIASE. Thereby, the video amplifiers 210-1 and 210-1,
Gain signals having different polarities and equal absolute values are supplied to the video amplifiers 3 and 5 and the video amplifiers 210-2, 4 and 6, respectively.

Reference numerals 230 and 232 denote differential amplifiers, which amplify the difference between the precharge potential maximum value signal NRSH and the precharge potential minimum value signal NRSL, respectively. Outputs NRS2. Reference numerals 226 and 228 denote switching circuits.
As in the case of 20, the connection state (straight or cross) is switched complementarily in accordance with the polarity signals BIASO and BIASE to change the precharge potential maximum value signal NRSH and the precharge potential minimum value signal NRSL to the differential amplifier 230,
232. Thereby, the precharge potential NR
S1 and NRS2 have different polarities and equal potentials.

Next, in FIG. 2, in the display area 101a on the element substrate, a plurality of scanning lines 112 are formed extending in the X (row) direction in the figure. Also, a plurality of data lines 114 are formed extending along the Y (column) direction. The pixel 110 is connected to the scanning line 11
2 is provided corresponding to each intersection of the data line 114 and
They are arranged in a matrix. Here, for convenience of explanation, in this embodiment, the total number of the scanning lines 112 is m and the total number of the data lines 114 is n (m and n are integers of 2 or more), and m rows × n columns Will be described as a matrix type display device.

1.3. Configuration of Pixel As a specific configuration of the pixel 110, for example, FIG.
Examples shown in (a) are given. In this configuration, the gate end of the transistor (MOS type FET) 116 is connected to the scanning line 112, the source end is connected to the data line 114, the drain end is connected to the pixel electrode 118, and the pixel electrode 118 and the counter electrode 108 are connected to each other. A liquid crystal 105, which is an electro-optical material, is sandwiched therebetween to form a liquid crystal layer. Here, the opposing electrode 108 is a transparent electrode formed on one surface of the opposing substrate so as to actually face the pixel electrode 118 as described later. Further, the pixel electrode 118 is connected to one end of the storage capacitor 119, and predetermined voltages VSSX and VSSY are applied to the other end of the storage capacitor 119 to prevent leakage of electric charges stored in the liquid crystal layer. In this embodiment, the storage capacitor 119 is connected to the pixel electrode 118 and the predetermined voltage VS.
SX and VSSY, but between the pixel electrode 118 and the counter electrode 108, and between the pixel electrode 118 and the ground potential GND.
It may be formed between pixels or between the pixel electrode 118 and the gate line.

Here, in the configuration shown in FIG.
Since only one channel type is used as the transistor 116, an offset voltage is required. However, as shown in FIG. 3B, a P-channel transistor and an N-channel transistor are complementarily combined. With such a configuration, the influence of the offset voltage can be canceled. However, in this complementary configuration, it is necessary to supply mutually exclusive levels as scanning signals, so that the scanning lines 112a, 112
Two scanning lines b are required.

1.4. Configuration of Secondary Gamma Correction Circuit 202 Next, a detailed configuration of the secondary gamma correction circuit 202 will be described with reference to FIG.
The principle of illuminance measurement using a type FET) will be described. The gate end and drain end (or source end may be connected) of the transistor are connected, and between 0.3 and 2 [V]
When a voltage of about VDD is applied, almost no current flows to the drain end. However, when the transistor is irradiated with light, a leak current corresponding to the illuminance flows to the drain end.

The magnitude of the current varies depending on the transistor production process and the like. In an example of a transistor formed by the polysilicon process, the current is 500 [lx] at 20 [lx].
Leakage current of about 20 [pA] occurs at [fA], 500 [klx], and about 150 [pA] occurs at 1 [Mlx]. Therefore, it is possible to measure the illuminance by measuring the drain current.
However, since the leakage current per transistor is extremely low, it is preferable to measure several hundred to several thousand transistors in parallel to measure the leakage current.

In FIG. 5, 302,..., 302 are measurement transistors formed in the element substrate in the same process as the pixel drive transistors 116, and are connected in parallel in the order of hundreds to thousands. Therefore, when the element substrate is irradiated with light, a leak current Idl flows in a parallel circuit of these measurement transistors. 304 and 306 are resistors, and 308 is an operational amplifier, which forms an amplifier. That is, the amplifier outputs a voltage of “−Idl · R2” with respect to the leak current Idl.
.., 302, resistors 304 and 306 and operational amplifier 308 are provided in a plurality of blocks (f = 8 blocks), but only one block is shown in FIG.

Reference numerals 310-1 to 310-f denote A / D converters, which output the measured values of the leak currents Idl-1 to Idl-f as digital values based on the respective amplification results of the operational amplifier 308 of the f block. Reference numeral 312 denotes a look-up table which stores gradation correction characteristics of video data under the assumption that the sum ΣIdl of the leak currents Idl-1 to Idl-f is a predetermined reference value. That is, since the transmittance of the liquid crystal changes non-linearly according to the applied voltage as shown in FIG. 7A (in the case of normally white), as shown in FIG. The voltage command value to be applied to the liquid crystal layer corresponding to the gradation of the video data is stored in the look-up table 312 so that the transmittance changes linearly accordingly.

However, as shown in FIG.
The characteristic of (a) changes as shown in FIG. That is, when the leak current increases, it becomes necessary to apply a higher voltage to obtain the same transmittance. In FIG. 5, reference numeral 314 denotes a leak correction circuit that corrects the voltage command value based on the measured value of the sum of the leak currents ΣIdl, and supplies the result to the multiphase expansion circuit 204. This correction specifically changes the amplification factor of the voltage applied to the liquid crystal, and can be performed by digital calculation. Although FIG. 5 shows an example of digital calculation, correction can be made by analog amplification using the voltage value from the operational amplifier 308. However, the advantage of digital calculation is that nonlinear calculation is possible, finer adjustment is possible in consideration of the nonlinear characteristics of liquid crystal, and calculation data can be easily changed even when the liquid crystal material is changed. Having.

1.5. The description of the configuration of the driver and the like is returned to FIG. Reference numerals 252 and 254 denote Y drivers, each of which includes m latch circuits (the number of scanning lines 112). In the Y drivers 252 and 254,
Frame start pulse D supplied at the beginning of a frame
Y is sequentially transferred to each latch circuit in synchronization with the rising and falling timings of the line clock signal CLY,
The latched result is applied to each of the scan lines 112 by the scan signal G1,
, Gm are sequentially and exclusively supplied as G2, G3,..., Gm. Note that the Y drivers 252 and 254 have the same scanning signal G.
1, G2, G3,..., Gm are supplied from both ends of the scanning line 112 in order to minimize the influence of impedance, parasitic capacitance, and the like on the scanning line 112.

Reference numeral 250 denotes an X driver, which is composed of k (the number of data lines 114/6) latch circuits (not shown). In the X driver 250, the line start pulse DX supplied at the beginning of each line is sequentially transferred to each latch circuit in synchronization with the rising and falling timings of the clock signal CLX, and the latched result is output as signals P1, P2, Are output as P3,..., Pk. As shown in FIG. 8, signals P1, P2, P3,.
Pk overlaps every half cycle of the clock signal CLX.

Reference numerals 258-1 to 258-k denote AND circuits. When the subscript i of the signal Pi (where i = 1, 2, 3,..., K) is an odd number, the signal Pi and the latch enable signal ENB1 are connected. While the logical product is output as the latch signal Qi, if the subscript i is an even number, the signal Pi and the latch enable signal ENB are output.
The logical product of the two is output as the latch signal Qi. As a result, the latch signals Qi are sequentially and exclusively output.

Reference numeral 256 denotes a sample-and-hold circuit, which is constituted by a transistor provided for each data line 114. .., Qk are applied to the gate terminals of the transistors forming each group. The latch signals Q1, Q2,. Thus, the video data VID1 to VID6 at that time are applied to the corresponding six data lines 114. Reference numeral 260 denotes a precharge circuit, which includes a plurality of transistors provided for each data line 114. When a precharge signal NRG is applied to the gate terminals of these transistors, an odd dot precharge potential NRS1 is applied to the data line 114 corresponding to the odd dot, and an even dot precharge potential is applied to the data line 114 corresponding to the even dot. N
RS2 is applied simultaneously.

1.6. Next, the structure of the above-described electro-optical device will be described with reference to FIG.
This will be described with reference to (a) and (b). Here, FIG. 1A is a plan view showing the configuration of the electro-optical device 100, and FIG.
FIG. 2 is a sectional view taken along the line AA ′ in FIG. In these figures, reference numeral 101 denotes an element substrate on which a pixel electrode 118 and the like are formed. Reference numeral 102 denotes a counter substrate on which a counter electrode 108 is formed. The element substrate 101 and the counter electrode 108 are mutually
The liquid crystal 105 serving as an electro-optical material is sandwiched in this gap by keeping a certain gap. Actually, the sealing material 104 has a cutout portion, and after the liquid crystal 105 is sealed through the cutout portion, it is sealed with a sealing material, but is omitted in these drawings. Here, the element substrate 101 and the counter substrate 102 are amorphous substrates such as glass and quartz. The pixel electrodes 118 and the like are formed by TFTs formed by depositing a semiconductor thin film on the element substrate 101. That is, the electro-optical device 100 is used as a transmission type.

On the element substrate 101, various circuits are formed inside the sealing material 104 and outside the display area 101a. That is, the display area 1 on the drawing
Y drivers 252 and 254 are formed on the left and right of 01a, a precharge circuit 260 is formed above, and an X driver 250 is formed below. Further, regions 302a,... 302a are provided inside the sealing material 104 and outside the Y drivers 252, 254, the precharge circuit 260, and the X driver 250, and the measurement transistors 302,. .., 302 are formed. In the present embodiment, the region 302a
Are formed at the four inner corners of the sealant 104 and at the center of each of the upper, lower, left and right sides.

In the element substrate 101, outside the region where the X driver 250 is formed,
A plurality of connection terminals are formed in an area 107 separated from the area 04, from which a control signal and a power supply voltage from the outside are input. On the other hand, the counter electrode 108 of the counter substrate 102 is connected to a conductive material (not shown) provided in at least one of four corners of the substrate bonding portion and a connection terminal provided in the region 107. The potential LCCOM is applied to the counter electrode 108.

In addition, depending on the use of the electro-optical device 100, for example, in the case of a direct-view type, first, a color filter arranged in a stripe shape, a mosaic shape, a triangle shape, or the like is provided on the counter substrate 102. Second, a light-shielding film (black matrix) made of, for example, a metal material or a resin is provided. In the case of color light modulation,
That is, when used as a light valve of a projection display device, no color filter is formed. In the case of a direct-view type, a backlight for irradiating the electro-optical device 100 with light from the element substrate 101 side is provided as necessary.

Further, the element substrate 101 and the opposing substrate 1
An alignment film (not shown) rubbed in a predetermined direction is provided on the electrode forming surface of No. 02 to define the alignment direction of the liquid crystal molecules when no voltage is applied.
On the side of the counter substrate 102, a polarizer (not shown) corresponding to the orientation direction is provided. However, if a polymer-dispersed liquid crystal in which fine particles are dispersed in a polymer is used as the liquid crystal 105, the above-described alignment film, polarizer, and the like become unnecessary.
Since the light use efficiency is increased, it is effective in terms of high luminance and low power consumption.

1.7. Next, the structure of the transistor 116 for a pixel on the element substrate 101 will be described with reference to FIG. In FIG. 6A, the data lines 114 are provided to extend in the vertical direction, and the scanning lines 112 are provided to extend in the horizontal direction while being insulated from the data lines 114. A transistor 116 is formed above the scanning line 112 at the intersection of the two, and at the same time, the gate end of the transistor 116 is
2 are connected. Further, a contact 352 is formed on the data line 114 near the intersection, and a lead 354 is formed upward from the contact 352 to the upper side of the transistor 116.
6 is connected to the source end.

A contact 356 is also formed in the pixel electrode 118, and a lead 358 which is bent from the contact 356 on the way to the data line 114 and extends upward from the transistor 116 is formed. The tip of the lead wire 358 is connected to the drain of the transistor 116. When the electro-optical device 100 is used as a light valve of a projector described later, light is emitted from the element substrate 101 side. Therefore, the data line 114
Also functions as a light-shielding film that attenuates light applied to the transistor 116 and reduces leakage current.

Next, the measuring transistors 302,.
The structure of 302 will be described with reference to FIG. In the figure, 360 is a source line, 362 is a gate line, 364
Is a drain line, which is formed to extend in parallel. Contacts 376 and 378 are formed at the ends of the gate line 362 and the drain line 364, respectively.
Both lines are connected via a lead 380. On the gate line 362, measuring transistors 302,..., 302 are formed at substantially equal intervals.

The measuring transistors 302,...
The source line 360 and the drain line 364 have contacts 366,.
, 366 and 372, ..., 372 are formed. And contacts 366,..., 366 and 3
72,..., 372 to the measuring transistor 302,.
, 302, lead wires 368,.
, 374 and 374 are formed.
, 368 are connected to the source ends of the measuring transistors 302,..., 302, and the ends of the leads 374,..., 374 are connected to the drain ends of these transistors.

The source line 360 has a voltage VD
D is applied, and the measuring transistor 30 shown in FIG.
,..., 302 are realized. Also,
, 382 are formed below the measuring transistors 302,..., 302 in a direction orthogonal to the gate lines 362 and the like. The light shielding lines 382,..., 382 are provided in place of the data lines 114 in FIG. It becomes possible to give a substantially linear proportional relationship with the leak current characteristic.

1.8. First, in the present embodiment, the projection screen 300 is divided into eight triangular areas S1 to S8 in this embodiment, as shown in FIG. The partitioning method of the present embodiment uses the projection screen 300.
, The projection screen 300 is divided into four rectangles by two lines a and b orthogonal to each other in the Sx and Sy directions in the figure, and then each rectangle is divided into the ends of the lines a and b. The lines are divided by lines c, d, e, and f connecting each other, thereby obtaining eight triangular regions S1 to S8.

Then, the digital image data serving as a predetermined reference is directly input to the multi-phase expansion circuit 204, and the reference image is projected on the projection screen 300. More specifically, when, for example, a maximum of 256 gradations can be displayed on the projection screen 300, a halftone (gray) of 128 gradations is uniformly projected as a reference image. In this state, the color coordinates of the pixels at the positions of the three vertices of each of the triangular regions S1 to S8 (hereinafter referred to as reference pixels) are measured. For this measurement, a known color coordinate measuring instrument can be used. As shown in FIG. 11, for example, in the triangular area S1, the color coordinates of the reference pixels P1, P2, and P4 corresponding to three vertices are measured. Then, the luminance correction amounts at the reference pixels located at the three vertices of each triangular area are obtained. The luminance correction amount is set by adding a correction for matching the color coordinates obtained for the reference pixel to a position on a preset color coordinate or a correction for matching the average value of the color coordinates of all the reference pixels.

As shown in FIG. 13, a specific method of determining the amount of luminance correction according to the present embodiment is such that the measured color coordinates of the reference pixel indicated by a black circle match the target color coordinates.
The component and the blue (B) component are adjusted. It should be noted that the green (G 2) component is preferably adjusted using red and blue because it easily affects the light synthesis. In this embodiment,
When adjusting the color coordinates of the reference pixel to match the target color coordinates, it is appropriate to use the UCS color system in which the color difference and the distance on the color coordinates have a certain proportional relationship. . The UCS color system is Luv or L
It is common to display using u'v '. When the measured color coordinates are obtained in the XYZ color system, they are converted to the UCS color system using the following equation.

First, when Luv is used, L = Yu = 4X / (X + 15Y + 3Z) v = 6Y / (X + 15Y + 3Z). From these equations, u = 2x / (6y−x + 1.5). ) V = 3y / (6y-x + 1.5) is derived. When Lu'v 'is used, u' = uv '= 1. 5v.

FIG. 13 is an explanatory diagram of a correction operation for making the uncorrected color coordinates at the reference pixel on the uv coordinates coincide with the target color coordinates. With such an operation, the luminance correction amount at the reference pixel can be obtained. The specific operation is performed by adjusting the red component and the blue component as described above. Further, the left and right Sx (X) directions, up and down Sy (Y) directions shown in FIG.
The correction amount at an arbitrary pixel belonging to an arbitrary triangle area is represented by Sx
Considering the three-dimensional coordinates in the Sz (Z) direction perpendicular to Sy and Sy, since each triangular area includes three reference pixels, the correction amount Sz at an arbitrary position (pixel) in the triangular area is three reference pixels. It can be obtained by linear interpolation from the reference correction amount at the pixel. Since the plane is represented by Sz = aSX + bSY + c (generally, Z = aX + bY + c), if these coefficients a, b, and c are obtained from the reference correction amounts of the above three reference pixels, the respective planes within each triangle area Correction amount S at any pixel
z is obtained by the above equation.

Next, referring to FIG.
Will be described. In the figure, reference numeral 22 denotes a memory, and the coefficients a, b, and c applied to each of the triangular areas S1 to S8.
Is stored. Note that the memory 22 is configured by, for example, a rewritable flash memory or the like.
Reference numeral 21 denotes an area determination unit, to which of the triangular areas S1 to S8 the corrected video data supplied from the secondary gamma correction circuit 202 belongs based on the horizontal synchronization signal Hsync, the vertical synchronization signal Vsync, and the pixel clock CLK. Then, an operation of reading the coefficient data unique to the triangular area and temporarily writing the coefficient data to the register 23 is performed.

The writing of the coefficient data is performed prior to the correction video data to be projected on the triangular area for correction with the coefficient data. That is, when the corrected video data is input to the multiplication circuit 24, the register 2
3, coefficient data signals from the a register 23a, the b register 23b, and the c register 23c are input to the multiplication circuit 24,
The corrected video data is multiplied by a luminance correction amount Sz.

Therefore, the corrected video data reaches the polyphase expansion circuit 204 as a signal subjected to a correction process in the projected triangular area according to the address information. Reference numeral 25 denotes a coefficient correction unit, and the A / D converter 3
Leakage current Idl- output from 10-1 to 310-f
1 to Idl-f, each coefficient a,
Correct b and c. That is, the coefficient correction unit 25 stores the coefficients a, b, and c set at the time of product shipment (or at the time of maintenance) and the values of the leak currents Idl-1 to Idl-f at the time of setting. I have.

As described with reference to FIG. 4A, the regions 302a where the leak currents Idl-1 to Idl-f are generated are formed at the four inner corners of the sealing material 104 and at the center of each of the upper, lower, left and right sides. Therefore, it can be understood that these areas 302a are close to the reference pixels P1 to P4 and P6 to P9, respectively. Therefore, in the present embodiment, the leakage current Idl−
1 to Idl-f, each reference pixel P1 to Pdl
4, the reference correction amount in P6 to P9 is obtained,
The coefficients a, b, and c are corrected.

Here, since the reference pixel P5 is located at the center of the screen and there is no neighboring area 302a, the reference correction amount cannot be directly obtained. Therefore, the ratio between the average value of the reference correction amounts of the other reference pixels P1 to P4 and P6 to P9 and the reference correction amount of the reference pixel P5 is obtained at the time of product shipment (or at the time of maintenance), and based on the leak current. When correcting the reference correction amount, the reference correction amount of the reference pixel P5 may be set so as to maintain this ratio.

2. Next, the operation of the electro-optical device according to the above-described embodiment will be described. FIG. 8 is a timing chart for explaining the operation of the electro-optical device. First, when the frame start pulse DY is supplied to the Y drivers 252 and 254, the scanning signals G1, G2, G3,..., Gm are sequentially and exclusively output within one frame by the transfer according to the clock signal CLY. .

Now, the scanning signals G1, G2, G3,..., Gm
Have a pulse width corresponding to a half cycle of the clock signal CLY, and the first scanning line 11
The scanning signal G1 corresponding to 2 is output with a delay of at least a half cycle of the clock signal CLY after the clock signal CLY first rises after the start pulse DY is supplied. Then, each scanning signal G1, G2, G3,
, Gm rises, the precharge signal NRG and the line start pulse DX rise sequentially.

First, when the scanning signal G1 is supplied to the first scanning line 112 from the top, all the transistors 116 in the first-stage pixels 110 in the display area 101a are turned on. Are in a high impedance state, so that the storage capacitor 119 and the pixel electrode 1
The potential of 18 does not change. Here, the precharge signal NR
When G rises, all the transistors in the precharge circuit 260 are turned on. As a result, the odd-numbered dot precharge potential NRS1 is simultaneously applied to the data lines 114 corresponding to the odd-numbered dots, and the even-numbered dot precharge potential NRS2 is simultaneously applied to the data lines 114 corresponding to the even-numbered dots. Therefore, the precharge potential NRS1 or NRS2 is written to all the pixels 110 in the first stage.

Next, when the line start pulse DX is supplied to the X driver 250, the line start pulse DX is shifted in the X driver 250 in synchronization with the clock signal CLX. Then, the clock signal CLX 1
/ 2 period overlapping signals P1, P2, P3,
, Pk is the shifted line start pulse DX
Are sequentially output based on On the other hand, latch enable signal EN output from LCD timing generation circuit 214
B1 and ENB2 alternately rise to the H level at the timing when the multi-phase video data VID1 to VID6 are stabilized.

In the AND circuits 258-1 to 258-k, if the subscript i of the signal Pi (where i = 1, 2, 3,..., K) is an odd number, the signal Pi and the latch enable signal EN
While outputting the logical product with B1 as the latch signal Qi,
If the subscript i is an even number, the logical product of the signal Pi and the latch enable signal ENB2 is output as the latch signal Qi. As a result, the latch signal Qi becomes the video data VID.
During the period when 1 to 6 are stabilized, they are sequentially and exclusively output.

Here, the operation during the period when the scanning signal G1 rises and the signal P1 rises will be described in more detail. Some time after the rise of the signal P1, the latch enable signal ENB1 rises, and in synchronization with this, the latch signal Q1 rises. As a result, FIG.
, The leftmost or sixth transistor from the left in the sample hold circuit 256 is turned on, and the video data VID1 to 6 are the first to sixth data lines 1 from the left.
14 is applied.

At this time, since an H level voltage is applied to the first scanning line 112 from the top,
Via the six transistors 116 corresponding to the intersections of the first and sixth data lines 114 from the left with respect to the storage capacitor 119 and the pixel electrode 118.
-6, that is, a voltage is applied, and the storage capacitor 119 and the pixel electrode 118 are charged. The first scanning line 11
2 and the transistor 116 corresponding to the intersection of the seventh and subsequent data lines 114 from the left are also turned on. However, since these data lines 114 are in a high impedance state, the potentials of the storage capacitor 119 and the pixel electrode 118 are changed. Does not change.

Thereafter, similarly, latch signals Q2, Q3,.
As Qk sequentially rises, six video data VID1 to 6 are exclusively supplied to the data line 114, and these video data VID1 to 6 are written to the six transistors 116 in the first stage from the top. go. And
When all writing to the first-stage pixel 110 is completed, the scanning signal G2 is supplied to the second scanning line 112 from the top (H level voltage is applied), and the second-stage pixel 1
For 10, the video data VID1 to VID6 of the second stage are sequentially written. Thereafter, the same operation is repeated until the scanning signal Gm corresponding to the m-th scanning line 112 is output, and video data is written over the entire display area 101a. Furthermore, when the frame start pulse DY is supplied again, video data is written over the entire display area 101a. Hereinafter, the same operation is repeated every time the frame start pulse DY is supplied.

It is ideal that the video data (pixel voltage) written in the pixel 110 is held until it is precharged in the next frame. However, actually, as shown in the lowermost part of FIG. In addition, the absolute value of the pixel voltage decreases due to the leak current. Here, the solid line is the pixel voltage characteristic when the leak current is small, and the dashed line is the pixel voltage characteristic when the leak current is large. In the present embodiment,
The leakage current that is substantially proportional to the leakage current generated in the pixel transistor 116 is measured by the measurement transistors 302,.
The signal level is detected through 302, and the signal level is corrected by the leak correction circuit 314 in the secondary gamma correction circuit 202 so as to compensate for the shift in gradation.

Further, in the color unevenness correction unit 203,
Leak current Idl-1 detected from each region 302a
The coefficients a, b, and c are sequentially corrected for each of the triangular areas S1 to S8 based on .about.Idl-f. Thus, color unevenness on the projection screen 300 is also eliminated, and a high-quality image can be obtained.

3. Modifications The present invention is not limited to the embodiments described above,
For example, various modifications are possible as follows.

(1) The above-described embodiment shows an example in which the electro-optical device of the present invention is applied to a projection display device. However, the present electro-optical device can be applied to various devices other than the projection display device. is there. Some examples are described below. <Mobile Computer> First, an example in which the electro-optical device is applied to a mobile personal computer will be described. FIG. 9A is a front view showing the configuration of this personal computer. In the figure, a mobile computer 1200 includes a main body 1204 having a keyboard 1202 and a display unit 1206. The display unit 1206 is configured by adding a backlight behind the electro-optical device 100 described above.

<Portable Telephone> An example in which the above-described electro-optical device is applied to a cellular telephone will be described. FIG.
(b) is a perspective view showing a configuration of the mobile phone. In the figure, a mobile phone 1300 has a plurality of operation buttons 1
In addition to the receiver 302, the receiver 1304 and the transmitter 1306 as well as the electro-optical device 100 are provided. The electro-optical device 100 is also provided with a backlight at the rear as necessary.

As the electronic equipment, in addition to the above,
Examples include a liquid crystal television, a viewfinder type, a monitor direct-view type video tape recorder, a car navigation device, a pager, an electronic organizer, a calculator, a word processor, a workstation, a videophone, a POS terminal, and a device having a touch panel. It goes without saying that the above-described electro-optical device can be applied to these various electronic devices.

(2) In the above embodiment, the light shielding line 3 is provided below the measuring transistors 302,.
, 382, and the measuring transistor 30
.., 302 are made substantially proportional to the characteristics of the pixel transistor 116 (see FIG. 6B). However, the measuring transistors 302,.
If the relationship between the leakage current of the transistor 2 and the leakage current of the transistor 116 is known, the light shielding lines 382,..., 382 may be removed as shown in FIG. According to this configuration, the measuring transistors 302,.
Is directly irradiated with light, so that a larger leak current can be obtained.

(3) The driving circuit of the electro-optical device 100 is as follows.
The driving circuit is not limited to those shown in FIGS. 1 and 2 and various types of driving circuits can be used. One example is shown in FIG. In the figure, a secondary gamma correction circuit 202 and a color non-uniformity correction unit 203 are configured in the same manner as in the above embodiment. A one-phase / two-phase expansion circuit 404 expands the video data output from the color unevenness correction unit 203 into two-phase video data. A data inversion / non-inversion selection circuit 406 inverts one of the two-phase video data and sets the other to a non-inversion state.

Reference numerals 408 and 410 denote D / A converters, which convert the two-phase video data output from the 406 into analog signals. The converted video data is supplied to the sample and hold circuit 416 via the differential amplifiers 412 and 424. Sample hold circuit 41
6 latches these video data and outputs them as multi-phase video data VID1 to VID6. Also in this modification,
Based on the leakage currents Idl-1 to Idl-f output from the measuring transistors 302,..., 302, the gradation characteristics are corrected in the secondary gamma correction circuit 202 and the color unevenness is corrected in the color unevenness correction unit 203. Will be corrected. Thus, a high-quality image can be obtained as in the above embodiment.

(4) In the above embodiment, the element substrate 101 constituting the electro-optical device is an amorphous substrate such as glass or quartz.
Although T was formed, the present invention is not limited to this. For example, when the element substrate 101 is formed of an opaque semiconductor substrate, the pixel electrode 118 is formed of a reflective metal such as aluminum, and the counter substrate 102 is formed of glass or the like, the electro-optical device 100 can be used as a reflection type. .

(5) In the above embodiment, an example in which the present invention is applied to an electro-optical device using a liquid crystal has been described. However, other electro-optical devices, in particular, gradations according to a voltage applied to a pixel and the like are described. The present invention is applicable to all electro-optical devices that perform display. Such an electro-optical device includes an electroluminescence (EL) device and a plasma display (PD).
P) Apparatus and the like are conceivable. In particular, in the case of an organic EL, there is no need to perform AC driving like a liquid crystal, and there is no need to perform polarity inversion. In the case of an EL or PDP, intense light is not input from the outside because it is a self-luminous element. However, since the TFT is arranged at a position close to the self-luminous element, light leaks due to this light. In this case, by forming and controlling a light leak detection element for each pixel, it is possible to perform high-quality display without image quality deterioration due to light leak.

[0069]

As described above, according to the present invention, the voltage is applied in accordance with the positional relationship between the pixel to which the voltage is applied and each reference pixel, and the current flowing through the current source corresponding to each reference pixel. Since the pixel voltage of the pixel to be corrected is corrected, it is possible to automatically correct color unevenness in response to aging or the like.

[Brief description of the drawings]

FIG. 1 is a block diagram (1/2) illustrating an electrical configuration of an electro-optical device according to an embodiment of the present invention.

FIG. 2 is a block diagram (2/2) illustrating an electrical configuration of the electro-optical device according to the embodiment of the invention.

FIG. 3 is a diagram showing a configuration example of a pixel in the embodiment.

FIG. 4 is a structural diagram of the electro-optical device according to the embodiment.

FIG. 5 is a block diagram illustrating a detailed configuration of a secondary gamma correction circuit 202.

FIG. 6 is a structural diagram of a pixel transistor 116, measurement transistors 302,..., 302, and peripheral portions thereof.

FIG. 7 is a diagram illustrating the operation of the secondary gamma correction circuit 202.

FIG. 8 is a timing chart of the electro-optical device according to the embodiment.

FIG. 9 is a diagram illustrating examples of various electronic apparatuses to which the electro-optical device is applied.

FIG. 10 is a block diagram of a main part in a modified example of the embodiment.

FIG. 11 is a diagram showing a relationship between reference pixels P1 to P9 for color unevenness correction and triangular areas S1 to S8.

FIG. 12 is a schematic configuration diagram of a projector to which the electro-optical device is applied.

13 is an explanatory diagram of the operation of the color unevenness correction unit 203. FIG.

FIG. 14 is a block diagram of a color unevenness correction unit 203.

[Explanation of symbols]

21 area determining section 22 memory 24 multiplying circuit 25 coefficient correcting section 100 electro-optical device 100R, 100G, 100B liquid crystal light modulator 101 element substrate 101a display area 102 ... Counter substrate 104. Seal material 105. Liquid crystal 107... Region 108. Counter electrode 110. Pixel 112... Scan line 114... Data line 116... Pixel transistor (switching element) 118. 119: storage capacity 202: secondary gamma correction circuit 203: color unevenness correction section 204: polyphase expansion circuit 206: data inversion / non-inversion selection circuit 208: D / A converters 210-1 to 210-6 … Video amplifier 212… I ² C control circuit 214… LCD timing generation circuit 216… D / A converters 218, 220 ... Switching circuits 222, 224 ... Differential amplifiers 226, 228 ... Switching circuits 230, 232 ... Differential amplifiers 250 ... X drivers 252, 254 ... Y drivers 256 ... Sample-hold circuits 258-1 to 258-k ... AND circuit 260... Precharge circuit 302,..., 302... Measurement transistor (current source) 302 a ...... Region 304 306… Resistor 308… Operational amplifier 310… A / D converter 312… Look-up table 314 ... Leak correction circuit 352 ... Contact 354 ... Lead wire 356 ... Contact 358 ... Lead wire 360 ... Source line (first line) 362 ... Gate line (third line) 364 ...... Drain line (second line) 366, 366, 366 Contact 368,..., 368 Lead wire 372, 372, Contact 374, 374 Lead wire 376, 378 Contact 380 Lead wire 382, 382 Line 404: One-phase / two-phase expansion circuit 406: Data inversion / non-inversion selection circuit 408, 410 D / A converter 412, 424 Differential amplifier 416 Sample hold circuit 1430 Projector 1431 … Light source 1437 …… projection lens

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G02F 1/1368 G02F 1/1368 5C080 G09G 3/20 641 G09G 3/20 641P 642 642J 642A 670 670J 680 680C F Term (Reference) 2H088 EA15 MA04 MA05 2H091 FA05X FA05Z FA14Z FA26X FA26Z FA34Y FA41Z GA11 LA15 LA16 2H092 JA24 PA06 PA08 PA09 PA11 PA13 2H093 NA16 NA31 NA58 NC24 NC58 NC90 ND17 ND60 5C006 AF46 AF05 BC30 CB15 A080 EE29 JJ02 JJ03 JJ04 JJ05 JJ06

Claims (14)

[Claims] A plurality of pixel electrodes disposed on an element substrate to which a pixel voltage is applied; and a conductive state during a selection period, whereby the pixel voltage is applied to the pixel electrode, and a non-selection period is applied to the pixel electrode. A switching element for holding the pixel voltage in the pixel electrode by being in a conductive state; a plurality of current sources each including a dummy element of the switching element provided for each of a plurality of reference pixels; A correction circuit that corrects a pixel voltage of the pixel to which the voltage is applied according to a positional relationship between the applied pixel and each of the reference pixels and a current flowing to a current source corresponding to each of the reference pixels. An electro-optical device characterized by the above-mentioned. 2. A plurality of pixel electrodes which are arranged on an element substrate and to which a pixel voltage is applied are turned on during a selection period, so that the pixel voltage is applied to the pixel electrode and a non-selection period is applied to the pixel electrode. A switching element that holds the pixel voltage in the pixel electrode by being in a conductive state; a light-shielding film that shields the switching element from light irradiation; and a switching element provided corresponding to each of a plurality of reference pixels. A plurality of current sources including the dummy element of the above, the voltage is applied according to a positional relationship between a pixel to which a voltage is applied and each of the reference pixels, and a current flowing through a current source corresponding to each of the reference pixels. An electro-optical device comprising: a correction circuit for correcting a pixel voltage of a pixel. 3. The electro-optical device according to claim 2, further comprising a light-shielding film that shields the dummy element from light irradiation. 4. The electro-optical device according to claim 1, wherein each of the current sources has a plurality of the dummy elements connected in parallel. 5. The electro-optical device according to claim 1, wherein the switching element comprises a TFT. 6. The electro-optical device according to claim 1, wherein the dummy element is manufactured in the same process as the switching element. 7. The current source includes: a first line disposed on the element substrate; a second line disposed substantially in parallel with the first line; Connecting a third line interposed between the third line, a plurality of dummy elements formed on the third line, and the third line with one of the first or second line A first lead wire, a second lead wire connecting the first line to an input end of the plurality of dummy elements, and a second lead wire connecting the second line and an output end of the plurality of dummy elements. The electro-optical device according to claim 1, further comprising a third lead wire. 8. An electronic apparatus comprising the electro-optical device according to claim 1. 9. A projection display device comprising: a light source; a light modulation device that modulates light from the light source; and a projection lens that projects light modulated by the light modulation device, wherein the light modulation device comprises: A plurality of pixel electrodes disposed on a substrate and to which a pixel voltage is applied; and being in a conductive state during a selection period, the pixel voltage is applied to the pixel electrode, and being in a non-conductive state during a non-selection period. A switching element that holds the pixel voltage on the pixel electrode; a light-shielding film that shields the switching element from light irradiation; and a plurality of light-shielding films, each provided corresponding to a plurality of reference pixels, including a dummy element of the switching element. The voltage is applied in accordance with a current source, a positional relationship between a pixel to which a voltage is applied and each of the reference pixels, and a current flowing through a current source corresponding to each of the reference pixels. And a correction circuit for correcting a pixel voltage of the pixel. 10. The projection type display device according to claim 9, further comprising a light shielding film for shielding said dummy element from light irradiation. 11. The projection display device according to claim 9, wherein said current source has a plurality of said dummy elements connected in parallel. 12. The projection type display device according to claim 10, wherein said switching element comprises a TFT. 13. The projection display device according to claim 9, wherein the dummy element is manufactured in the same process as the switching element. 14. The current source, comprising: a first line disposed on the element substrate; a second line disposed substantially parallel to the first line; Connecting a third line interposed between the third line, a plurality of dummy elements formed on the third line, and the third line with one of the first or second line A first lead wire, a second lead wire connecting the first line to an input end of the plurality of dummy elements, and a second lead wire connecting the second line and an output end of the plurality of dummy elements. 14. The projection display device according to claim 9, further comprising a third lead wire.