JPH11196567A - Step-up circuit and liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a step-up circuit which can suppress decline of a step-up output voltage owing to increase of a power consumption caused by a light emission to a circuit to be a load. SOLUTION: A double-voltage step-up means 1 doubles a power supply voltage. A photosensor 2 outputs a voltage corresponding to a detected luminous power. A clock signal switching circuit 3 switches frequency of a clock signal supplied to the double-voltage step-up means 1 in accordance with the output signal of the photosensor 2. The step-up capability of the double-voltage step-up means 1 is changed in accordance with the frequency of the inputted clock signal. With this constitution, the step-up capability of the step-up circuit is increased when the photosensor 2 receives a light and the current consumption of the step-up circuit is reduced when a light is not received.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a booster circuit for boosting and outputting an input voltage, and more particularly to a booster circuit used for a controller or driver semiconductor integrated circuit for an LCD (Liquid Crystal Display). The invention also relates to an LCD (Liquid Crystal Display) including a backlight and a booster circuit.

[0002]

2. Description of the Related Art LCD controller or driver L
A double booster circuit shown in FIG. 11 is known as a booster circuit for SI.

As shown in FIG. 1, the double booster circuit includes a power supply VDD, switches S11 to S14 controlled by a clock signal Clock and its inverted signal, and a capacitor C1.
1 and C12. Switches S11 to S1
Reference numeral 4 denotes an N-channel MOS transistor. When the clock signal Clock goes high, the switch S11
And S13 are turned on, and switches S12 and S14 are turned off. As a result, the power supply VDD and the capacitor C11 are connected in parallel, and the capacitor C11 is charged to the voltage of the power supply VDD.

Thereafter, when the clock signal Clock goes low, the switches S11 and S13 are turned off and the switches S12 and S14 are turned on. As a result, the power supply VDD and the capacitor C11 are connected in series, and the capacitor C12 is connected in parallel to the series circuit of the power supply VDD and the capacitor C11. Accordingly, the power supply VDD is connected to the capacitor C12.
Is applied to the voltage of the capacitor C11. That is, a voltage approximately twice the voltage of the power supply VDD is applied to the capacitor C12.

The above operation is repeated by the clock signal Clock, whereby the capacitor C12 is charged.
A voltage approximately twice the voltage of the power supply VDD can be constantly output from the output terminal.

As a mounting method of a controller or a driver serving as a load of the booster circuit of FIG. 11, COG (chip on gl
ass) method is drawing attention.

In the COG method, as shown in a cross section in FIG.
This is a method in which an LSI 92 such as a controller or a driver is directly mounted on a glass substrate 91 of a liquid crystal panel, which contributes to miniaturization of a circuit and the like.

[0008]

However, according to the COG method, a backlight 93 disposed adjacent to a liquid crystal panel is used.
Light is directly applied to the LSI 92, the semiconductor layer inside the LSI 92 is activated, and the leakage current increases. Therefore, when the backlight 93 is turned on, the load on the booster circuit increases. The switch S of the booster circuit
Also in steps S11 to S14, a leakage current may occur and the boosting efficiency may be reduced. For this reason, when the backlight 93 is turned on, the output voltage of the booster circuit decreases.

In order to avoid a reduction in boosting efficiency and boosting voltage, the circuit must take into account the maximum load current, for example, by increasing the capacity of the boosting capacitor or increasing the boosting rate. The current consumption of the circuit itself increases.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a booster circuit capable of suppressing a decrease in boosted voltage even when a circuit serving as a load is irradiated with light. Another object of the present invention is to provide a liquid crystal display device including a booster circuit in which a boosted voltage does not decrease even when a load mounted by the COG method receives light from a backlight.

[0011]

In order to achieve the above object, a booster circuit according to a first aspect of the present invention inputs a voltage to be boosted and a control signal, and inputs the voltage with a boosting capability according to the control signal. Boosting means for boosting a voltage and supplying the boosted voltage to a semiconductor circuit serving as a load, a sensor for outputting a signal corresponding to an irradiation amount of light to the semiconductor circuit, and controlling the control signal based on an output of the sensor And a switching circuit for changing a boosting capability of the boosting means.

As described in the section of the prior art, when a semiconductor circuit as a load is irradiated with light, leakage current and the like increase internally, power consumption increases, and the output voltage of the booster decreases. I do. According to this booster circuit, when a large amount of light is irradiated on the semiconductor circuit based on the output of the sensor,
The switching circuit can control the control signal to increase the boosting capability. Therefore, it is possible to suppress a decrease in the boosted voltage due to an increase in the load of the consumed current due to light irradiation or the like. Also, when the load is not irradiated with light,
By reducing the boosting capability, the power consumption of the boosting unit can be reduced. As a sensor, an optical sensor that detects the actual intensity of light emitted to a semiconductor circuit, a sensor that detects on / off of a light source that emits light to a semiconductor circuit, or the like, directly or irradiates the amount of light emitted to the semiconductor circuit. Anything that can be indirectly determined may be used.

The boosting means is disposed between a power supply (which may be a terminal to which a voltage is externally applied) for supplying the voltage to be boosted, a capacitor, and the power supply and the capacitor. And a plurality of switches for connecting to a capacitor. In this case, the plurality of switches, for example, according to the control signal,
The power supply and the capacitor are connected in parallel, the capacitor is charged with the power supply voltage, the charged capacitor and the power supply are connected in series, and the voltage of the capacitor is added to the input voltage. As a result, a boosted voltage is output.

The switching circuit may control the frequency of the control signal based on an output of the sensor. In this case, the boosting means changes the boosting ability according to the frequency of the control signal. For example, in the booster having the above-described configuration, as the operation clock increases, the amount of charge that can be transferred from the power supply to the capacitor increases (there is a limit), and the boosting capability is improved. In order to control the frequency of the control signal, the frequency division ratio of the clock signal may be controlled.

Further, the switching circuit, based on the output of the sensor, when the amount of received light of the semiconductor circuit exceeds a predetermined reference value, indicates that the amount of received light is less than the predetermined reference value. By increasing the connection time between the power supply and the capacitor per unit time, the boosting capability may be improved. If the amount of charge sent to the capacitor is increased by increasing the connection time between the power supply and the capacitor per unit time, the boosting capability is improved. Therefore, the present invention is also applicable to this type of boosting means.

The control signal comprises a first clock signal which alternates between a first level and a second level alternately, and a second clock signal which alternately alternates between a third level and a fourth level. The switch includes a first switch that connects the power supply and the capacitor in parallel, and a second switch that connects the power supply and the capacitor in series, wherein the first switch is connected to the first clock signal. The second switch is turned off when the second clock signal is at the third level, and is turned on when the second clock signal is at the fourth level. The switching circuit, based on the output of the sensor, when the received light amount is equal to or less than a predetermined reference value, the first clock signal and the second clock signal A period in which the first clock signal and the third clock signal are provided is provided to prevent the first clock signal and the second clock signal from simultaneously becoming the second and fourth levels, and the amount of received light exceeds a predetermined reference value. If you have
The period during which both the first clock signal and the second clock signal are simultaneously at the first level and the third level is shorter than when the amount of received light is equal to or less than a predetermined reference value,
It may be something.

According to this booster circuit, for example, when the first and third levels are at high level and the second and fourth levels are at low level, the amount of light irradiated on the semiconductor circuit is less than the reference value. In some cases, a period in which both the first and second clock signals are at a low level is provided. This period is a period in which the power supply and the capacitor are not connected, the amount of electric charge sent from the power supply to the capacitor is reduced, and the current consumption of the booster circuit is also reduced. Further, the first switch and the second switch are not turned on at the same time. Thus, the current flowing through the first and second switches can be cut off, and the current consumption can be further reduced. Therefore, this booster circuit can operate with low power consumption when the semiconductor circuit is not irradiated with light.

On the other hand, when a large amount of light is irradiated on the semiconductor circuit, a period in which the first and second clock signals are simultaneously at the low level is eliminated. As a result, the period during which the power supply and the capacitor are connected is lengthened, more charge is sent to the capacitor, and the boosting capability of the booster circuit is improved.

The capacitor of the boosting means includes a plurality of capacitors (C1, C1 '), and the switching circuit
By controlling the control signal based on the output of the sensor, when the irradiation light amount to the semiconductor circuit exceeds a reference value, the semiconductor circuit is connected to the power supply more than when the irradiation light amount is less than the reference value. The number of capacitors may be increased to increase the boosting capability of the booster.

According to this booster circuit, when the output of the sensor is smaller than the predetermined reference value, the current consumption can be reduced by reducing the number of capacitors that perform the boost operation. When the output of the sensor is larger than a predetermined reference value, the number of capacitors that perform a boosting operation can be increased to increase the boosting capability.

The control signal controlled by the switching circuit is:
A first timing signal indicating a timing of connecting at least one of the plurality of capacitors of the booster and the power supply in series and a timing of connecting the power supply in parallel;
A second timing signal indicating a timing of connecting at least one of the other capacitors of the booster and the power supply in series and a timing of connecting the power supply in parallel;
The first timing signal and the second timing signal may have different phases.

[0022] The first timing signal and the second timing signal may have a phase difference of 180 degrees.

According to such a configuration, a plurality of capacitors of the boosting means are charged and discharged at different timings (for example, at timings which are 180 degrees out of phase). Then, at the timing when a certain capacitor is discharged, the timing when another capacitor is charged is reached. Each capacitor operates so as to supplement the charge / discharge operation of each other, and functions as a capacitor having higher boosting ability.

[0024] By substantially controlling the on-resistance of the switch based on the output of the sensor, the resistance between the power supply and the capacitor is reduced when the amount of light received by the semiconductor circuit exceeds a reference value. The boosting capability of the boosting means may be increased. As a method for substantially controlling the on-resistance of the switch, a method of connecting a plurality of switches in parallel and controlling the number of on-states, configuring the switch from a semiconductor switch or the like, and setting the on-resistance to a control signal (base) There is a method of controlling with current / gate voltage).

The boosting means may include a plurality of boosting units for inputting a voltage to be boosted and boosting and outputting the input voltage. In this case, the switching circuit switches the number of the boosting units performing the boosting operation based on the output of the sensor. In addition to switching the number of operating boosters, the boosting capability of each booster circuit may be changed.

The above-described booster circuit is mounted on a liquid crystal display panel having a backlight device by a COG method, and uses a semiconductor integrated circuit irradiated with light from the backlight when the backlight is turned on as a load. It is suitable for use.

A liquid crystal display device according to a second aspect of the present invention includes a liquid crystal display panel, a backlight which is disposed on one surface of the liquid crystal display panel and is turned on or off, a booster circuit, and a load of the booster circuit. And a semiconductor circuit mounted on the liquid crystal display panel by a COG method, and detection means for detecting on / off of the backlight, wherein the booster circuit controls the backlight according to the detection of the detection means. Means are provided for making the boosting capability higher when the backlight is on than when the backlight is off.

Since the semiconductor circuit is mounted by the COG method, when the backlight is turned on, the semiconductor circuit is irradiated with light. Therefore, the leakage current inside the semiconductor circuit increases, and the load on the booster circuit increases. For this reason, the output voltage of the booster decreases. However, according to the present invention,
When the backlight is turned on, the boosting capability of the booster circuit is improved, so that a decrease in output voltage can be suppressed and the operation of the semiconductor circuit can be maintained in a normal state. As a method of detecting on / off of the backlight, there is a method of detecting light from the backlight, a method of detecting on / off of power of the backlight, and the like.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a booster circuit according to a first embodiment of the present invention will be described. FIG. 1 shows a configuration of a booster circuit according to an embodiment of the present invention. As shown in the figure, the booster circuit includes a double booster 1 and an optical sensor 2.
And a clock signal switching circuit 3. This booster circuit is an LSI (controller or driver for LCD) mounted in the COG method as shown in FIG.
92 is the load. The LSI 92 is irradiated with light from a backlight 93.

The double boosting means 1 has substantially the same configuration as the conventional boosting circuit shown in FIG.
Boosts twice.

The optical sensor 2 comprises a photodiode 21, a resistor 22, and an inverter 23, as shown in FIG. 2, and outputs a binary voltage corresponding to the amount of received light. Here, when the photodiode 21 does not receive light,
The photodiode 21 is turned off, the input terminal of the inverter 23 becomes high level, and the optical sensor 2 outputs a low level voltage. On the other hand, when the photodiode 21 receives light, the reverse current of the pn junction of the photodiode 21 increases, and the input terminal of the inverter 23 becomes low level,
The optical sensor 2 outputs a high-level voltage. Note that FIG.
Is an example of the configuration of the optical sensor 2, and an optical sensor having another configuration such as one using a phototransistor may be used. In addition, not limited to the optical sensor, for example, a sensor that determines whether the power of the backlight 93 is on or off may be used.

The clock signal switching circuit 3 includes a T-type flip-flop 31, a D-type flip-flop 32, AND circuits 33 and 34, inverters 35, 36 and 37, and an OR circuit 38. The frequency of the clock signal supplied to the means 1 is switched.

The T-type flip-flop 31 receives the clock signal Clock 'via the inverter 35, divides the frequency of the clock signal Clock' by 倍, and outputs the frequency from the output terminal Q1. The D-type flip-flop 32 is connected to the optical sensor 2
In synchronization with the output signal of the T-type flip-flop 31, and the captured signal is output from the output terminal Q2.

The AND circuits 33 and 34 are of the open gate type, and their outputs are wired-ORed and further pulled up. The AND circuit 33 opens the gate when the output of the D-type flip-flop 32 is at a high level. The AND circuit 34 opens the gate when the output of the inverter 37 is at a high level, that is, when the output of the D-type flip-flop 32 is at a low level. open. Therefore, the AND circuit 33
And 34 switch and output the inverted signal of the clock signal Clock ′ and the output signal of the T-type flip-flop 31.

Therefore, when the optical sensor 2 is not receiving light, the clock signal switching circuit 3 outputs a signal obtained by dividing the frequency of the clock signal Clock 'by 倍, and outputs the signal.
Outputs a signal obtained by inverting the clock signal Clock '.

Next, the operation of the booster circuit will be described with reference to the time chart of FIG. The clock signal Clock ′ shown in FIG. 3A supplied to this booster circuit is frequency-divided by a factor of two by the T-type flip-flop 31, and is output as a signal shown in FIG. Output from

When the backlight 93 is off and the light sensor 2 is not irradiated with light (the irradiation light amount does not exceed the reference level), the output terminal Sout of the light sensor 2 is switched to the state shown in FIG. As shown in the figure, the voltage of the output terminal Q2 of the D-type flip-flop 32 is low as shown in FIG.
As shown in FIG. Since the voltage of the output terminal Q2 is at a low level, the output terminal of the AND circuit 33 is fixed in an open state, and the output of the AND circuit 34 is at the same level as the output terminal Q1. Therefore, double boosting means 1
As shown in FIG. 3 (E), the input clock signal is a signal having the same level as that of the output terminal Q1, that is, a signal obtained by dividing the frequency of the clock signal Clock 'by half.

On the other hand, when the backlight 93 is turned on and the light is irradiated on the optical sensor 2 (the irradiation light amount exceeds the reference value), the output terminal Sout of the optical sensor 2 is at the level shown in FIG.
It goes to a high level as shown in FIG. This high level is captured by the D-type flip-flop 32, and the output terminal Q2 of the D-type flip-flop 32 is also at the high level as shown in FIG. Since the output terminal Q2 is at a high level, the output terminal of the AND circuit 34 is fixed in an open state, and the output of the AND circuit 33 is at a level obtained by inverting the clock signal Clock '. Therefore, the clock signal Clock becomes a signal having the same frequency as the clock signal Clock 'as shown in FIG.

As described above, in this booster circuit, when the backlight 93 is on, the frequency of the drive clock signal Clock of the double booster 1 increases, and
Is off, the drive clock signal of the double booster 1
Clock frequency decreases.

In the double boosting means 1 shown in FIG. 1, the higher the frequency of the clock signal, the more the power supply VDD per unit time.
The amount of charge transferred from the capacitor C11 to the capacitor C11 increases, and the boosting capability is improved. Therefore, even if the leakage current inside the LSI 92 increases due to the light from the backlight 93 and the load increases, it is possible to prevent the boosted voltage (the power supply voltage of the LSI 92) from decreasing.

On the other hand, as the frequency of the clock signal supplied to the double booster 1 decreases, the current passing through the switches S12 and S13 decreases, the power consumed by each switch also decreases, and the power consumption decreases.

As described above, the booster circuit controls the frequency of the clock signal in accordance with the on / off state of the backlight 93, so that when the backlight 93 is off, the power consumption can be reduced. When the switch 93 is on, it is possible to alleviate a decrease in the output voltage of the double boosting means 1.

In this embodiment, the clock signal Cloc
Two division ratios of k ′ (1 and ２) are prepared, and the division ratio is switched to change the boosting capability of the double boosting means 1. The present invention is not limited to this configuration, and a large number of frequency division ratios may be prepared, and the frequency division ratio may be switched to multiple stages to change the boosting capability of the double boosting means 1 to multiple stages. In addition, the booster circuit may be configured to smoothly change the frequency of the clock signal output to the double boosting means 1 to smoothly change the boosting capability of the double boosting means 1.

(Second Embodiment) FIG. 4 shows a configuration of a booster circuit according to a second embodiment of the present invention. As shown, the booster circuit includes a booster 41, an optical sensor 2, and a clock signal switching circuit 43.
The optical sensor 2 is the same as the optical sensor used in the booster circuit according to the first embodiment.

The boosting means 41 has substantially the same configuration as the boosting means shown in FIG.
11 is not provided, and the signal Clock 'is input from the outside.
Different from the boosting means.

The clock signal switching circuit 43 includes a D-type flip-flop 44, inverters 45 and 46, a NAND circuit 47, and AND circuits 48 and 49. The D-type flip-flop 44 captures the output of the optical sensor 2 in synchronization with the clock signal CK1, outputs the captured signal from the output terminal Q, and supplies the signal to the NAND circuit 47 via the inverter 45.

The NAND circuit 47 takes the output of the inverter 45 and the NAND of the clock signal CK2 and outputs them. The AND circuit 48 outputs the output of the NAND circuit 47 and the clock signal C
The AND of the inverted signal of K1 is taken and the terminal of the booster 41 is
Output to Clock '. The AND circuit 49 includes a NAND circuit 47.
Of the clock signal CK1 and the output of the booster 41, and outputs the result to the terminal Clock of the booster 41.

Next, the operation of the booster circuit will be described with reference to the time chart of FIG. The clock signals CK1 and CK2 supplied to the clock signal switching circuit 43 are
As shown in (A) and (B), the frequency of the clock signal CK2 is twice as high as the frequency of the clock signal CK1, and the clock signal CK2 is in a high level period.
1 level changes.

When the backlight 93 is off,
As shown in FIG. 5C, the output terminal Sout of the optical sensor 2 is at a low level. As a result, as shown in FIG. 5D, the output terminal Q of the D-type flip-flop 44 goes low, and one input terminal of the NAND circuit 47 goes high. Therefore, the output of the NAND circuit 47 is an inverted signal of the clock CK2.

Therefore, the AND circuit 49 outputs the clock CK
2 and the AND of the clock CK1 are taken, and FIG.
The signal shown in (E) is output to the clock terminal Clock. On the other hand, the AND circuit 48 performs an AND operation on the inverted signal of the clock CK2 and the inverted signal of the clock CK1, and obtains the AND of FIG.
Is output. That is, as shown in FIGS. 5E and 5F, the clock input terminals Clock and Clock 'of the booster 41 are supplied with a signal in which the clock signal CK2 alternately goes high during the low level period.

As described above, in the booster circuit, when the backlight 93 is off, the signals applied to the terminals Clock and Clock 'do not go high at the same time. Therefore, the switches (corresponding to S12 and S13 in FIG. 11) constituting the through path from the power supply voltage of the booster 41 to the ground voltage are not both turned on, so that the generation of the through current is prevented and the consumption current is reduced. Can be reduced.

On the other hand, when the backlight 93 is turned on, as shown in FIG.
Sout goes high, and the output terminal Q of the D-type flip-flop goes high as shown in FIG.
When the output terminal Q goes high, the output of the NAND circuit 47 is fixed at high level. Therefore, the AND circuit 4
8 outputs an inverted signal of the clock signal CK1, and the AND circuit 49 outputs the clock signal CK1 as it is.

Therefore, as shown in FIGS. 5E and 5F, the signal applied to the terminal Clock and the signal applied to the terminal Clock 'are mutually inverted. As a result,
The clock signal Cl is higher than when the backlight 93 is off.
The period during which ock and Clock 'are at a high level becomes longer, the period during which the booster capacitor of the booster 41 is connected to the power supply becomes longer, and the amount of charge supplied to the booster capacitor increases. Boosting capacity increases.

If the timings at which the clock signals Clock and Clock 'go high simultaneously occur, a through current will occur. However, since the waveforms of the clock signals Clock and Clock' are inverted signals, such a problem occurs. Does not occur.

As described above, the booster circuit according to the second embodiment controls the waveform of the clock signal in accordance with the on / off state of the backlight 93 to thereby control the backlight 93.
When the backlight 93 is on, the operation can be performed with low power consumption. When the backlight 93 is on, a decrease in the boosted output voltage due to an increase in load can be mitigated.

(Third Embodiment) FIG. 6 shows a configuration of a booster circuit according to a third embodiment of the present invention. As shown, the booster circuit according to this embodiment includes a booster 61, an optical sensor 2, and a clock signal switching circuit 63.

The boosting means 61 includes a plurality of capacitors C1,
C1 ′ and C2, and a plurality of switches S1 to S8 using MOS transistors.
The capacitors C1, C1 ', C
2 and the power supply VDD is changed to increase the voltage of the power supply VDD.

Here, the capacitor C1 is connected to the switch S
2, and connected in parallel to the power supply VDD via S5, and connected in series to the power supply VDD via switches S1 and S6.

The capacitor C1 'is connected to switches S4, S7
Is connected in parallel to the power supply VDD through the switch S3,
It is connected in series to the power supply VDD via S8.

The capacitor C2 is connected to one end of the capacitor C1 via the switch S6 and the switch S8
Is connected to one end of the capacitor C1 ′. One end of the capacitor C2 is connected to the output terminal of the booster 61.

The clock signal switching circuit 63 comprises a D-type flip-flop circuit 64, an inverter 65, and two AND circuits 66 and 67.
And the output signal Sout of the optical sensor 2, and outputs clock signals CK3, CK4, CK5, and CK6. here,
The clock signal CK3 is obtained by directly outputting the clock signal Clock input to the clock signal switching circuit 63. That is, the clock signal CK3 and the clock signal Clock
And are the same. The clock signal switching circuit 63
Maintains the clock signals CK5 and CK6 at low level when the output signal Sout of the optical sensor 2 is at low level.

The D-type flip-flop 64 is
The output Sout of this is taken in synchronization with the clock signal Clock,
The fetched signal is output from the output terminal Q. The AND circuit 66 is connected to the output of the flip-flop 64 and the clock signal Cl.
AND is taken and output as a clock signal CK6. The AND circuit 67 ANDs the output of the flip-flop 64 and the inverted signal of the clock signal Clock, and outputs the result as the clock signal CK5. That is, the clock signal CK3 is supplied to the control terminals of the switches S2 and S5. The clock signal CK4 is supplied to control terminals of the switches S1 and S6. The clock signal CK5 is supplied to control terminals of the switches S3 and S8. The clock signal CK6 is supplied to the switch S4
And the control terminal of the switch S7.

Next, the operation of the booster circuit will be described with reference to the time chart of FIG. When the backlight 93 is off, as shown in FIG. 7B, the output terminal Sout of the optical sensor 2 is at a low level. As a result, as shown in FIG.
4 output terminal Q becomes low level, and the AND circuit 66,
67 closes the gate. Therefore, as shown in FIGS. 7 (F) and 7 (G), the clock signal C is normally used when there is no light irradiation.
K5 and CK6 are both held at low level.

When the clock signals CK5 and CK6 are held at the low level, the switches S3, S4, S7 and S8
Maintain the off state. Thereby, the capacitor C1 ′
Is not connected to the power supply VDD and the output terminal, and does not contribute to the boosting operation.

On the other hand, when the backlight 93 is turned on, as shown in FIG.
Sout goes high, and the output terminal Q of the D-type flip-flop 64 also goes high as shown in FIG. Therefore, the clock signals CK5 and CK6 output from the AND circuits 66 and 67 become the clock signal Clock and its inverted signal as shown in FIGS. 7F and 7G.

The switches S3, S4, S7, and S8 are opened and closed by the clock signals CK5 and CK6, and the capacitor C1 'is connected in parallel with the capacitor C1. Apparently, the capacity of the capacitor C1 is increased. Become.

Further, when the switches S3, S4, S7, S8 open and close, the on-resistance of each switch for changing the connection state of the capacitor C1 is apparently reduced.
That is, when the backlight 93 is turned on, the capacity of the boosting capacitor increases, and the on-resistance value of the switch that drives the boosting capacitor decreases. Therefore, the booster 61
Boosting capability is increased, and a decrease in boosted output voltage due to an increase in load is eased.

In this way, the booster circuit switches the capacitance of the boosting capacitor and the on-resistance of the switch between when the light is irradiated and when the light is not irradiated. In spite of this, it is possible to alleviate a decrease in the boosted output voltage due to the backlight being turned on and the load increasing.

A semiconductor switch (bipolar transistor, MOSFET, etc.) is used as a switch, and control signals (base current, gate voltage) are controlled based on the output of the optical sensor 2 so that the current paths of these switches are controlled. The resistance value may be controlled.

In the booster circuit shown in FIGS. 6 and 7,
When the backlight is off, the voltage is boosted using the capacitors C1 and C2 without using the capacitor C1 '. On the other hand, when the backlight is on, the capacitors C1 and C1
A boost operation is performed using 1 'and C2.

(Fourth Embodiment) FIG. 8 shows a configuration of a booster circuit according to a fourth embodiment of the present invention. As shown, the booster circuit according to this embodiment includes a booster 61 ′, an optical sensor 2, and a clock signal switching circuit 63.
It is composed of

The optical sensor 2 is the same as the optical sensor 2 shown in FIG. The clock signal switching circuit 63 is the same as the clock signal switching circuit 63 shown in FIG. Therefore, the clock signals CK3, C3 output from the clock signal switching circuit 63
K4, CK5, and CK6 have the same waveforms as those in the time chart shown in FIG. The clock signal CK3 and the clock signal Clock are the same.

The boosting means 61 'is provided with the boosting means 6 shown in FIG.
1, a plurality of capacitors C1, C1 ', C2,
Multiple switches S1 to S8 using MOS transistors
The connection state between the capacitors C1, C1 ', C2 and the power supply VDD is changed by changing the open / close states of the switches S1 to S8, and the voltage of the power supply VDD is boosted.

However, the boosting means 61 'of this embodiment is
The boosting means 61 shown in FIG. 6 includes control terminals of the switches S1 to S8 and clock signals CK3, CK4, and CK.
5, connection with each signal line of CK6 is different. That is, the clock signal CK3 is supplied to the control terminals of the switches S1 and S6. The clock signal CK4 is supplied to control terminals of the switches S2 and S5. The clock signal CK5 is supplied to control terminals of the switches S3 and S8. The clock signal CK6 is supplied to control terminals of the switches S4 and S7. The configuration other than the above of the booster circuit of the present embodiment is the same as the booster circuit shown in FIG.

Next, the operation of the booster circuit will be described with reference to the time chart of FIG. When the backlight 93 is off, as shown in FIG. 7B, the output terminal Sout of the optical sensor 2 is at a low level. As a result, as shown in FIG.
4 output terminal Q becomes low level, and the AND circuit 66,
67 closes the gate. Therefore, as shown in FIGS. 7 (F) and 7 (G), the clock signal C is normally used when there is no light irradiation.
K5 and CK6 are both held at low level.

When the clock signals CK5 and CK6 are held at the low level, the switches S3, S4, S7 and S8
Maintain the off state. Thereby, the capacitor C1 ′
Is not connected to the power supply VDD and the output terminal, and does not contribute to the boosting operation.

On the other hand, when the backlight 93 is turned on, as shown in FIG.
Sout goes high, and the output terminal Q of the D-type flip-flop 64 also goes high as shown in FIG. Therefore, the clock signals CK5 and CK6 output from the AND circuits 66 and 67 become the clock signal Clock and its inverted signal as shown in FIGS. 7F and 7G.

The switches S3, S4, S7, S8 are opened and closed by the clock signals CK5, CK6, and the capacitor C1 'is connected in parallel with the capacitor C1, and the capacity of the capacitor C1 is apparently increased. Become.

Here, the clock signals CK3 and CK4 for driving the capacitor C1 and the clock signals CK5 and CK6 for driving the capacitor C1 'are different in phase by 180 degrees. As a result, the capacitors C1 and C1 'are charged alternately with each other, and alternately supply charges to the capacitor C2. Therefore, the capacitors C1 and C1 'operate so as to supplement each other's charging and discharging operations, and function as capacitors having higher boosting ability.

As described above, this booster circuit has a low power consumption in normal times because the phase of the drive signal of the booster capacitor used when light is irradiated is different from that of the other booster capacitors. Although it is electric power, it is possible to more effectively mitigate a decrease in the boosted output voltage due to light irradiation.

(Fifth Embodiment) FIG. 9 shows a configuration of a booster circuit according to a fifth embodiment of the present invention. As shown, the booster circuit according to this embodiment includes three triple boosters 81, 82, and 83, an optical sensor 2, a capacitor C3, and a switch S using a MOS transistor.
9 and S10.

The output terminal of the triple boosting means 81 is directly connected to the capacitor 3. On the other hand, the output terminals of the triple boosters 82 and 83 are connected to the capacitor 3 via switches S9 and S10. Also, switches S9 and S1
0 opens and closes based on the output signal of the optical sensor 2. The triple boosting means 82 and 83 operate when the signal supplied to the control terminal Tcont is at a high level, and the control terminal Tcont
The operation stops when the signal supplied to is low.

Next, the operation of the booster circuit will be described. First, when the backlight 93 is off, the output terminal Sout of the optical sensor 2 is at a low level. As a result, the switches S9 and S10 are turned off, and the triple booster 8 is turned on.
Output terminals 2 and 83 are cut off from the output terminal of this booster circuit. The triple boosters 82 and 83 stop operating.
Therefore, only one triple booster 81 outputs a boosted voltage to the load.

On the other hand, when the backlight 93 is on,
The output terminal Sout of the optical sensor 2 goes high. As a result, the switches S9 and S10 are turned on, and the triple booster 8 is turned on.
2, 83 output terminals are connected to the output terminal of this booster circuit,
Three triple boosting means 81, 82 and 83 output boosted voltages to the load.

As described above, this booster circuit switches the number of booster means to be operated between when the backlight 93 is off and when the backlight 93 is on. It is possible to alleviate a decrease in the boosted output voltage due to an increase in load due to irradiation.

In the above-described embodiment, the step-up means is 2
Although the double or triple boosting means is used, this boosting circuit is not limited to the configuration, and a quadruple, five-times... N-fold boosting means may be used. In FIGS. 9 and 12, the power supply VDD is arranged in the boosting means. However, the power supply VDD may be a terminal to which a voltage is externally applied, and a power supply circuit is physically arranged in the boosting means. No need.

The configuration and arrangement of the optical sensor 2 are not limited to those described above, but are optional. For example, as shown in FIG. 10A, the optical sensor 2 may be arranged outside the LSI 92 serving as a load of the booster circuit, and the detection signal of the optical sensor 2 may be supplied to the booster in the LSI 92. Good. Further, as shown in FIG. 10B, an optical sensor may be arranged inside the LSI 72. In this case, it is desirable to dispose the optical sensor 2 on the surface of the LSI 72.
Further, the optical sensor 2 may be formed by disposing a photosensitive semiconductor layer on a semiconductor substrate constituting the LSI 72, or the like. By arranging the optical sensor 2 inside the LSI 72, it is possible to reduce the size of an LCD controller or driver LSI or the like.

Further, as shown in FIG.
A plurality of optical sensors 2 may be arranged inside and outside 92. By arranging a plurality of optical sensors 2 in this manner, the LSI
Can be detected with higher sensitivity.

When a plurality of optical sensors 2 are arranged, FIG.
As shown in (b), by taking the logical sum of the output signals of these optical sensors 2, the boosting capability of the boosting means can be improved even when only some of the optical sensors 2 detect light. .

The present invention is not limited to a booster circuit functioning as a power supply for a control circuit or a drive circuit of a liquid crystal display element having a backlight, but may be applied to any type of circuit whose power consumption is increased by light irradiation. It can be applied to the booster circuit described above.

[0091]

As described above, according to the present invention, the boosting capability of the boosting means is switched based on the output signal of the optical sensor. It is possible to alleviate a decrease in boosted output voltage due to light irradiation.

[Brief description of the drawings]

FIG. 1 is a diagram showing a basic configuration of a booster circuit according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration example of an optical sensor in the booster circuit illustrated in FIG. 1;

3 is a diagram showing an operation of each part of the booster circuit shown in FIG.

FIG. 4 is a diagram illustrating a basic configuration of a booster circuit according to a second embodiment of the present invention;

5 is a diagram showing the operation of each part of the booster circuit shown in FIG.

FIG. 6 is a diagram showing a basic configuration of a booster circuit according to a third embodiment of the present invention.

FIG. 7 is a diagram showing an operation of each part of the booster circuit shown in FIG. 6;

FIG. 8 is a diagram showing a basic configuration of a booster circuit according to a fourth embodiment of the present invention.

FIG. 9 is a diagram showing a basic configuration of a booster circuit according to a fifth embodiment of the present invention.

FIG. 10 is a diagram showing an example of the arrangement of optical sensors.

FIG. 11 is a diagram illustrating an example in which a plurality of optical sensors are arranged, and a method of processing a detection signal of the optical sensors in that case.

FIG. 12 is a diagram illustrating an example of a conventional booster circuit.

FIG. 13 is a schematic sectional view of a liquid crystal panel on which an LSI is mounted by a COG method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Double boosting means 2 Optical sensor 3 Clock signal switching circuit 31 T-type flip-flop 32 D-type flip-flop 41 Boosting means 43 Clock signal switching circuit 61, 61 'Boosting means 63 Clock signal switching circuit 71, 72, 73 LSI 81, 82,83 triple boosting means

Claims (12)

[Claims] A boosting means for inputting a voltage to be boosted and a control signal, boosting an input voltage with a boosting capability according to the control signal, and supplying the boosted voltage to a semiconductor circuit serving as a load; A booster circuit comprising: a sensor that outputs a signal corresponding to an irradiation amount; and a switching circuit that changes a boosting capability of the booster by controlling the control signal based on an output of the sensor. . 2. The power supply system according to claim 1, wherein the boosting means includes a power supply for supplying the voltage to be boosted, a capacitor, and a plurality of switches disposed between the power supply and the capacitor for connecting the power supply and the capacitor. According to the control signal, the plurality of switches connect the power supply and the capacitor in parallel, charge the capacitor with the input voltage, and connect the charged capacitor and the power supply in series. The boosting circuit according to claim 1, wherein a boosted voltage is output by adding a voltage of the capacitor to a voltage of the power supply. 3. The switching circuit changes a frequency of the control signal based on an output of the sensor, and the booster changes a boosting capability according to a frequency of the control signal. The booster circuit according to claim 1. 4. The switching circuit receives a clock signal, frequency-divides the clock signal, and outputs the frequency-divided clock signal as the control signal. The boosting circuit according to claim 3, further comprising means for changing a ratio. 5. The switching circuit according to claim 1, wherein when the amount of light received by the semiconductor circuit exceeds a reference value based on an output of the sensor, the amount of light per unit time is greater than when the amount of received light is less than the reference value. 3. The booster circuit according to claim 2, wherein the boosting capability is improved by increasing a connection time between a power supply and the capacitor. 6. The control signal comprises: a first clock signal alternately repeating a first level and a second level; and a second clock signal alternately repeating a third level and a fourth level. Comprises a first switch that connects the power supply and the capacitor in parallel, and a second switch that connects the power supply and the capacitor in series, wherein the first switch is connected to the first clock signal. Is the first
The second switch is turned off when the signal is at the second level and turned on when the signal is at the second level.
When the received light amount is equal to or less than a reference value, the switching circuit controls the control signal based on the output of the sensor. A period in which one clock signal and the second clock signal are simultaneously at the first level and the third level is provided, and the first clock signal and the second clock signal are simultaneously at the second level and the fourth level. And when the amount of received light exceeds the reference value, the period in which both the first clock signal and the second clock signal are simultaneously at the first and third levels is equal to or less than the reference value. The booster circuit according to claim 2, wherein the booster circuit is shorter than the case. 7. The booster includes a plurality of capacitors, and the switching circuit controls the control signal based on an output of the sensor so that the amount of light applied to the semiconductor circuit is reduced to a reference value. When the irradiation light amount is less than the reference value, the number of capacitors connected to the power supply is increased to increase the boosting capability of the boosting means. 3. The booster circuit according to 2. 8. The control signal controlled by the switching circuit,
A first timing signal indicating a timing of connecting at least one of the plurality of capacitors of the booster and the power supply in series and a timing of connecting the power supply in parallel;
A second timing signal indicating a timing of connecting at least one of the other capacitors of the booster and the power supply in series and a timing of connecting the power supply in parallel; the first timing signal and the second timing signal The booster circuit according to claim 7, wherein a phase is different from the phase. 9. The switching circuit substantially controls an on-resistance of the switch according to the control signal, and based on an output of the sensor, when a light reception amount of the sensor exceeds a reference value, Than when the received light amount is below the reference value,
9. The booster circuit according to claim 4, wherein a resistance value between the power supply and the capacitor is reduced to increase a boosting capability of the booster. 10. 10. The booster includes a plurality of boosters for inputting a voltage to be boosted and boosting and outputting the input voltage, and the switching circuit performs a boosting operation based on an output of the sensor. 2. The booster circuit according to claim 1, further comprising: means for switching the number of said boosters. 11. The booster circuit is mounted on a liquid crystal display panel having a backlight device by a COG method, and uses a semiconductor integrated circuit irradiated with light from the backlight when the backlight is turned on as a load. The booster circuit according to claim 1, wherein: 12. A liquid crystal display panel, and a backlight that is disposed on one surface of the liquid crystal display panel and that is turned on or off,
A booster circuit, a semiconductor circuit which is a load of the booster circuit, is mounted on the liquid crystal display panel by a COG method, and detecting means for detecting whether the backlight is on or off, the booster circuit includes: A liquid crystal display device comprising: a means for increasing a boosting capability of the backlight when the backlight is on, as compared with when the backlight is off, in accordance with detection of the means.