JP2002280254A - Surface mounting type stacked ceramic electronic component - Google Patents

Surface mounting type stacked ceramic electronic component

Info

Publication number
JP2002280254A
JP2002280254A JP2001082545A JP2001082545A JP2002280254A JP 2002280254 A JP2002280254 A JP 2002280254A JP 2001082545 A JP2001082545 A JP 2001082545A JP 2001082545 A JP2001082545 A JP 2001082545A JP 2002280254 A JP2002280254 A JP 2002280254A
Authority
JP
Japan
Prior art keywords
multilayer ceramic
electronic component
distance
ceramic electronic
inner edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001082545A
Other languages
Japanese (ja)
Other versions
JP3809575B2 (en
Inventor
Hiroki Sato
博樹 佐藤
Satoru Kurimoto
哲 栗本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP2001082545A priority Critical patent/JP3809575B2/en
Publication of JP2002280254A publication Critical patent/JP2002280254A/en
Application granted granted Critical
Publication of JP3809575B2 publication Critical patent/JP3809575B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PROBLEM TO BE SOLVED: To constitute a ceramic electronic component, so that it can be soldered accurately, fitting the direction of mounting, the attitude, etc., to the land parts of a wiring, even if it is a component of very small form. SOLUTION: External electrodes 11 and 12, which display circular form where the inner end fringe positioned within the plane from the end fringe of a ceramic element assembly 10 becomes its apex at the center in the width direction of the ceramic element assembly 10, are made, and they are soldered, fitting the direction of the mounting, the attitude, etc., to the lands 13 and 14 of the wiring pattern by the self alignment effect by which the fused solder is concentrated on the apex to which the distance is long.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、積層セラミックコ
ンデンサを主とする表面実装型積層セラミック電子部品
に関し、詳しくは積層セラミック電子部品を外部電極の
はんだ付けで回路基板の板面に表面実装する際のセルフ
アライメント効果を高めるための改良に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface mount type multilayer ceramic electronic component mainly including a multilayer ceramic capacitor, and more particularly, to a case where the multilayer ceramic electronic component is surface-mounted on a board surface of a circuit board by soldering external electrodes. And to improve the self-alignment effect.

【0002】[0002]

【従来の技術】一般に、積層セラミック電子部品は、図
5で示すように内部電極とセラミック層とを交互に複数
積層させて形成した積層セラミック素体1を備えると共
に、外部電極2,3を積層セラミック素体1の両端部に
設けることにより構成されている。その外部電極2,3
としては、積層セラミック素体1の端部縁より平面内に
位置する内端縁が幅方向に亘って直線状を呈するよう形
成されている。
2. Description of the Related Art In general, a multilayer ceramic electronic component comprises a multilayer ceramic body 1 formed by alternately laminating a plurality of internal electrodes and ceramic layers as shown in FIG. It is constituted by providing at both ends of the ceramic body 1. External electrodes 2 and 3
Is formed such that an inner edge located in a plane from an edge of the multilayer ceramic body 1 has a linear shape in the width direction.

【0003】その積層セラミック電子部品は、電子機器
等の小型化に伴って、表面実装タイプ部品で小型なもの
になっている。例えば、高低電圧の集積回路に用いられ
る積層セラミックコンデンサも、長さが0.6mm、幅
が0.3mm程度と極小化の要請が強くなっている。
[0003] The multilayer ceramic electronic component has been reduced in size to a surface mount type component as electronic devices and the like have become smaller. For example, multilayer ceramic capacitors used in high- and low-voltage integrated circuits are also required to be miniaturized to have a length of about 0.6 mm and a width of about 0.3 mm.

【0004】その積層セラミック電子部品は、各外部電
極を配線パターンのランド部とはんだ付けで固着するこ
とにより回路基板の板面に表面実装されるが、この形態
が小型化する程に装着向き,姿勢等を配線パターンのラ
ンド部に合わせてはんだ付けで正確に固着するのが難し
い。
The multilayer ceramic electronic component is surface-mounted on the board surface of the circuit board by fixing each external electrode to the land portion of the wiring pattern by soldering. It is difficult to accurately fix by soldering the posture etc. according to the land of the wiring pattern.

【0005】[0005]

【発明が解決しようとする課題】本発明は、極小な形態
のものでも、装着向き,姿勢等を配線パターンのランド
部に合わせてはんだ付けで正確に固着できるよう改良し
た表面実装型積層セラミック電子部品を提供することを
目的とする。
SUMMARY OF THE INVENTION The present invention relates to a surface-mounted multilayer ceramic electronic device in which the mounting orientation and posture can be accurately fixed by soldering in accordance with the land portion of the wiring pattern, even in a very small form. The purpose is to provide parts.

【0006】[0006]

【課題を解決するための手段】本発明の請求項1に係る
表面実装型積層セラミック電子部品においては、積層セ
ラミック素体の端部縁より平面内に位置する内端縁が積
層セラミック素体の幅方向中央で頂点となる円弧形を呈
する外部電極を形成することにより構成されている。
According to a first aspect of the present invention, there is provided a surface mount type multilayer ceramic electronic component, wherein an inner edge located in a plane from an edge of the multilayer ceramic body is formed of the multilayer ceramic body. It is configured by forming an external electrode having an arc shape that becomes a vertex at the center in the width direction.

【0007】本発明の請求項2に係る表面実装型積層セ
ラミック電子部品においては、積層セラミック素体の端
部縁より平面内に位置する内端縁の基点までが150μ
mの距離を有し、且つ、内端縁の基点から頂点までが3
0〜100μmの距離を有し、全体として180〜25
0μmの高さを有する外部電極を形成することにより構
成されている。
In the surface-mounted multilayer ceramic electronic component according to a second aspect of the present invention, the distance from the edge of the multilayer ceramic body to the base point of the inner edge located in the plane is 150 μm.
m, and the distance from the base point of the inner edge to the vertex is 3
It has a distance of 0-100 μm and a total of 180-25
It is constituted by forming an external electrode having a height of 0 μm.

【0008】[0008]

【発明の実施の形態】本発明は、積層セラミックコンデ
ンサ,積層セラミックインダクタ,積層バリスタ等の積
層セラミック電子部品の外部電極を形成するのに広く適
用できるものであり、以下、その代表例として積層セラ
ミックコンデンサを構成する場合に基づいて説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention can be widely applied to forming external electrodes of multilayer ceramic electronic components such as multilayer ceramic capacitors, multilayer ceramic inductors, multilayer varistors and the like. Description will be made based on the case where a capacitor is formed.

【0009】積層セラミックコンデンサは、Pd,P
t,Ag/Pd等の貴金属またはNi等の卑金属を用い
た導電性ペーストにより内部電極を誘電体グリーンシー
トに印刷し、その誘電体グリーンシートを内部電極と交
互に複数積層することにより、図1で示すように積層コ
ンデンサ素体10を形成すると共に、内部電極と電気的
に導通する外部電極11,12を両端部に設けることに
より構成されている。
The multilayer ceramic capacitor is composed of Pd, P
By printing an internal electrode on a dielectric green sheet with a conductive paste using a noble metal such as t or Ag / Pd or a base metal such as Ni, and alternately laminating a plurality of the dielectric green sheets with the internal electrode, as shown in FIG. As shown in the figure, the multilayer capacitor body 10 is formed, and external electrodes 11 and 12 that are electrically connected to the internal electrodes are provided at both ends.

【0010】その外部電極11,12は、内部電極と接
続させて積層コンデンサ素体10の両端に被着するAg
/PdまたはCuの下地電極層と、下地電極層の上に被
着する中間のNiメッキ層と、Niメッキ層の上に被着
する最外層のSnまたはSnを主成分とする合金のメッ
キ層とから積層形成されている。
The external electrodes 11 and 12 are connected to the internal electrodes and are connected to both ends of the multilayer capacitor body 10 by Ag.
/ Pd or Cu base electrode layer, an intermediate Ni plating layer deposited on the base electrode layer, and an outermost Sn or alloy-based alloy plating layer deposited on the Ni plating layer And are formed in layers.

【0011】その外部電極11,12は、積層コンデン
サ素体10の端部縁より平面内に位置する内端縁が積層
コンデンサ素体10の幅方向中央で頂点となる円弧形を
呈するよう形成されている。この電極形状は、配線パタ
ーンのランド部と相対する側の電極面を形取るもので、
天地向きの限定されないものでは天地いずれも同じ形状
に形取るよう形成できる。
The external electrodes 11 and 12 are formed such that an inner edge located in a plane from an edge of the multilayer capacitor body 10 has an arc shape having a vertex at the center in the width direction of the multilayer capacitor body 10. Have been. This electrode shape forms the electrode surface on the side opposite to the land portion of the wiring pattern.
If the orientation is not limited, the top and bottom can be formed to have the same shape.

【0012】その外部電極11,12は、寸法的に、長
さ0.6mm,幅0.3mm程度の極小な積層セラミッ
クコンデンサを例示すると、積層コンデンサ素体10の
端部縁より平面内に位置する内端縁の基点までが150
μmの距離(a)を有し、且つ、内端縁の基点から頂点
までが30〜100μmの距離(b)を有し、全体とし
て180〜250μmの高さ(c)を有する外部電極を
形成するとよい。
The external electrodes 11 and 12 are located within a plane from the end edge of the multilayer capacitor body 10 when a very small multilayer ceramic capacitor having a length of about 0.6 mm and a width of about 0.3 mm is exemplified. 150 to the starting point of the inner edge
An external electrode having a distance (a) of μm, a distance (b) from 30 to 100 μm from the base point of the inner edge to the vertex, and a total height (c) of 180 to 250 μm is formed. Good to do.

【0013】このように構成する積層セラミックコンデ
ンサでは、クリームはんだを配線パターンのランド部に
塗布し、図2で示すように外部電極11,12を配線パ
ターンのランド部13,14に合わせて載置後、クリー
ムはんだを溶融すると、その溶融はんだが積層コンデン
サ素体10を押し上げつつ、円弧形の内端縁に沿って面
内に上る。
In the multilayer ceramic capacitor constructed as described above, cream solder is applied to the lands of the wiring pattern, and the external electrodes 11 and 12 are placed in alignment with the lands 13 and 14 of the wiring pattern as shown in FIG. Thereafter, when the cream solder is melted, the melted solder rises in the plane along the inner edge of the arc while pushing up the multilayer capacitor body 10.

【0014】そのはんだの張力は、距離の長い積層コン
デンサ素体10の端部縁より平面内に位置する内端縁の
頂点に集中する。このため、配線パターンのランド部1
3,14に載置したとき、図3で示すようにθ方向のシ
フトズレが生じていても、また、図4で示すように所定
位置より横ズレが生じていても、距離の長い頂点に集中
するセルフアライメント効果により配線パターンのラン
ド部13,14に合わせて正確にはんだ付け固着でき
る。
The tension of the solder concentrates on the vertex of the inner edge located in a plane from the edge of the multilayer capacitor body 10 having a long distance. Therefore, the land portion 1 of the wiring pattern
When placed on the bases 3 and 14, even if a shift shift in the θ direction occurs as shown in FIG. 3 or a horizontal shift occurs from a predetermined position as shown in FIG. Due to the self-alignment effect, soldering and fixing can be performed accurately in accordance with the land portions 13 and 14 of the wiring pattern.

【0015】なお、上述した円弧形の内端縁に代えて、
積層セラミック素体の幅方向中央で頂点となる二等辺等
の斜辺を呈する非直線状に形成することもできる。但
し、この斜辺によるものに比べると、円弧形によるもの
は溶融はんだの上り流れが円弧形の内端縁に沿ってスム
ースに生ずることから、極小な積層セラミックコンデン
サをはんだ付け装着するのに、セルフアライメント効果
を一層効果的に発揮できる。
In place of the arc-shaped inner edge described above,
The multilayer ceramic body may be formed in a non-linear shape exhibiting an oblique side such as an isosceles which is a vertex at the center in the width direction. However, compared to the hypotenuse, the arc-shaped one is more suitable for soldering and mounting very small multilayer ceramic capacitors because the upward flow of molten solder occurs smoothly along the inner edge of the arc. The self-alignment effect can be more effectively exerted.

【0016】その有効性を確認するべく、長さ0.6m
m,幅0.3mmの積層セラミックコンデンサで、表1
で示すように積層コンデンサ素体10の端部縁より平面
内に位置する内端縁の基点までが150μmの距離
(a)を有し、且つ、内端縁の基点から頂点までが30
〜100μmの距離(b)を有し、全体として180〜
250μmの高さ(c)を有する外部電極(試料No2
〜7)を形成した。
In order to confirm its effectiveness, a length of 0.6 m
m, 0.3mm wide multilayer ceramic capacitor.
As shown in the figure, a distance (a) of 150 μm from the end edge of the multilayer capacitor element body 10 to the base point of the inner edge located in the plane, and the distance from the base point of the inner edge to the vertex is 30 μm.
Having a distance (b) of 100100 μm, and
External electrode having a height (c) of 250 μm (sample No. 2)
To 7).

【0017】その比較例として内端縁の基点から頂点ま
でが20μmの距離(b)を有し、全体として170μ
mの高さ(c)を有する外部電極(試料No1)を形成
すると共に、内端縁の基点から頂点までが110μmの
距離(b)を有し、全体として260μmの高さ(c)
を有する外部電極(試料No8)を形成し、図4で示す
ように各試料について所定位置より80μmを横ズレさ
せた状態ではんだ付け処理した。
As a comparative example, the distance from the base point of the inner edge to the vertex has a distance (b) of 20 μm, and the total distance is 170 μm.
An external electrode (sample No. 1) having a height (c) of m is formed, and a distance (b) from the base point of the inner edge to the apex is 110 μm, and a height (c) of 260 μm as a whole
An external electrode (Sample No. 8) having the following was formed, and soldering was carried out in a state where each sample was laterally shifted by 80 μm from a predetermined position as shown in FIG.

【0018】[0018]

【表1】 [Table 1]

【0019】その表1から明らかなように、試料1のも
のでは内端縁の基点から頂点までの距離(b)が低いこ
とにより1.7%程度の固着不良がみられた。一方、試
料8のものでは内端縁の基点から頂点までの距離(b)
が高いことから2.2%程度の固着不良がみられた。こ
れは円弧形の高さと溶融はんだの上り流との関係による
が、その固着不良率からすると、従来例に比べれば低く
抑えられている。これに対し、本発明の試料No2〜7
のものでは100%正常にはんだ付け固着できることが
判明した。
As is clear from Table 1, in the case of the sample 1, since the distance (b) from the base point of the inner edge to the apex was small, about 1.7% of defective adhesion was observed. On the other hand, in the case of sample 8, the distance from the base point of the inner edge to the vertex (b)
Of about 2.2%. This depends on the relationship between the height of the arc and the upward flow of the molten solder. However, from the viewpoint of the rate of defective fixation, it is suppressed to be lower than in the conventional example. On the other hand, Sample Nos. 2 to 7 of the present invention
It has been found that the sample can be soldered and fixed 100% normally.

【0020】[0020]

【発明の効果】以上の如く、本発明の請求項1に係る表
面実装型積層セラミック電子部品に依れば、積層セラミ
ック素体の端部縁より平面内に位置する内端縁が積層セ
ラミック素体の幅方向中央で頂点となる円弧形を呈する
外部電極を形成することから、溶融はんだが距離の長い
頂点に集中するセルフアライメント効果により、極小な
形態の部品でも、装着向き,姿勢等を配線パターンのラ
ンド部に合わせて正確にはんだ付け固着できる。
As described above, according to the surface mount type multilayer ceramic electronic component of the first aspect of the present invention, the inner edge located within a plane from the edge of the multilayer ceramic body has the multilayer ceramic element. Since the external electrode is formed in the shape of an arc that becomes the vertex at the center in the width direction of the body, the self-alignment effect that the molten solder concentrates on the vertex with a long distance allows the mounting orientation, posture, etc., even for extremely small parts. It can be soldered and fixed accurately according to the land of the wiring pattern.

【0021】本発明の請求項2に係る表面実装型積層セ
ラミック電子部品に依れば、積層セラミック素体の端部
縁より平面内に位置する内端縁の基点までが150μm
の距離を有し、且つ、内端縁の基点から頂点までが30
〜100μmの距離を有し、全体として180〜250
μmの高さを有する外部電極を形成することにより、極
小な形態の部品でも、溶融はんだが距離の長い頂点に集
中するセルフアライメント効果で100%正常にはんだ
付け固着できる。
According to the surface mount type multilayer ceramic electronic component of the present invention, the distance from the edge of the multilayer ceramic body to the base point of the inner edge located in the plane is 150 μm.
And the distance from the base point of the inner edge to the vertex is 30
距離 100 μm, 180 to 250 as a whole
By forming an external electrode having a height of μm, 100% normal soldering and fixing can be achieved even with a component having an extremely small form by a self-alignment effect in which molten solder is concentrated on a vertex having a long distance.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る表面実装型積層セラミック電子部
品を示す平面図である。
FIG. 1 is a plan view showing a surface-mounted multilayer ceramic electronic component according to the present invention.

【図2】本発明に係る表面実装型積層セラミック電子部
品のセルフアライメント効果を示す説明図である。
FIG. 2 is an explanatory view showing a self-alignment effect of the surface-mounted multilayer ceramic electronic component according to the present invention.

【図3】表面実装型積層セラミック電子部品の一例に係
る装着ズレを示す説明図である。
FIG. 3 is an explanatory view showing a mounting displacement according to an example of a surface-mounted multilayer ceramic electronic component.

【図4】表面実装型積層セラミック電子部品の別の例に
係る装着ズレを示す説明図である。
FIG. 4 is an explanatory view showing a mounting displacement according to another example of the surface-mounted multilayer ceramic electronic component.

【図5】従来例に係る表面実装型積層セラミック電子部
品を示す平面図である。
FIG. 5 is a plan view showing a surface mount type multilayer ceramic electronic component according to a conventional example.

【符号の説明】[Explanation of symbols]

10 積層セラミック素体 11,12 外部電極 13,14 回路基板のランド部 Reference Signs List 10 multilayer ceramic body 11, 12 external electrode 13, 14 land part of circuit board

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 内部電極とセラミック層とを交互に複数
積層させて形成したセラミック素体を備えると共に、内
部電極と電気的に導通する外部電極を積層セラミック素
体の両端部に設け、各外部電極を配線パターンのランド
部とはんだ付けで固定させて回路基板の板面に装着する
表面実装型積層セラミック電子部品において、積層セラ
ミック素体の端部縁より平面内に位置する内端縁が積層
セラミック素体の幅方向中央で頂点となる円弧形を呈す
る外部電極を形成してなることを特徴とする表面実装型
積層セラミック電子部品。
A ceramic body formed by alternately laminating a plurality of internal electrodes and ceramic layers; external electrodes electrically connected to the internal electrodes are provided at both ends of the multilayer ceramic body; In a surface-mounted multilayer ceramic electronic component in which the electrodes are fixed to the land of the wiring pattern by soldering and mounted on the board surface of the circuit board, the inner edge located within a plane from the edge of the multilayer ceramic body is laminated A surface-mounted multilayer ceramic electronic component characterized by forming an external electrode having an arc shape having a vertex at the center in the width direction of a ceramic body.
【請求項2】 積層セラミック素体の端部縁より平面内
に位置する内端縁の基点までが150μmの距離を有
し、且つ、内端縁の基点から頂点までが30〜100μ
mの距離を有し、全体として180〜250μmの高さ
を有する外部電極を形成してなることを特徴とする請求
項1に記載の表面実装型積層セラミック電子部品。
2. The laminated ceramic body has a distance of 150 μm from an end edge to a base point of an inner edge located in a plane, and a distance from the base point of the inner edge to a vertex of 30 to 100 μm.
2. The surface-mounted multilayer ceramic electronic component according to claim 1, wherein external electrodes having a distance of m and an overall height of 180 to 250 μm are formed.
JP2001082545A 2001-03-22 2001-03-22 Surface mount multilayer ceramic electronic components Expired - Lifetime JP3809575B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001082545A JP3809575B2 (en) 2001-03-22 2001-03-22 Surface mount multilayer ceramic electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001082545A JP3809575B2 (en) 2001-03-22 2001-03-22 Surface mount multilayer ceramic electronic components

Publications (2)

Publication Number Publication Date
JP2002280254A true JP2002280254A (en) 2002-09-27
JP3809575B2 JP3809575B2 (en) 2006-08-16

Family

ID=18938479

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3809575B2 (en)

Cited By (12)

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