JP2002270647A - Semiconductor chip mounting board and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor chip mounting board, having high reliability for electrical connection between the board and a semiconductor chip, such as an IC chip. SOLUTION: The board includes one or more projections, molded integrally with the board. A conductive layer is formed on the projections, and first bumps are thereby obtained. A semiconductor chip has terminals, protruding from the surface thereof as second bumps; the semiconductor chip is mounted on the board, so that the first bumps are brought into contact with the second bump; the specified contact pressure between the first bumps and the second bumps is maintained by a pressure-applying and maintaining means.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor chip mounting substrate having high reliability in electrical connection between a substrate and a semiconductor chip such as an IC chip, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventional methods for surface mounting (flip chip mounting) a semiconductor chip such as an IC on a substrate include:
For example, there is a work mounting method described in JP-A-10-199935. In this method, bumps, which are conductive protrusions, are formed on an IC chip and a substrate, and the bumps of the IC chip are pressed against the bumps of the substrate to plastically deform the bumps. To form an electrical connection.

[0003]

However, in the above method, since a large number of bumps are formed on the substrate, variations in the height of the bumps are likely to increase. In such a case, when the bumps on the substrate are bonded to the bumps on the IC chip, it becomes difficult to provide a constant contact pressure to each of the electrical connections between the bumps. Further, individually forming a plurality of bumps having a certain height on a substrate causes a significant increase in manufacturing time.

Further, as the degree of integration of IC chips increases, the total number of terminals of each IC chip increases.
To achieve good electrical connection at all of these terminals, it is necessary to strictly control the flatness of the IC chip mounting surface of the substrate. However, in reality, it is difficult to stably supply a substrate having high flatness due to the warpage of the substrate after molding, and as a result, the reliability of the electrical connection in the IC mounting substrate is reduced. There is fear.

On the other hand, when a resin substrate for MID is used as the substrate, the coefficient of linear expansion of the semiconductor chip (about 4 × 10
⁻⁶ / ° C.) is the coefficient of linear expansion of the substrate (about 20 to 50 × 10
^-6 / ° C). Due to such a large difference in the coefficient of linear expansion, a large thermal stress is generated at the interface between the substrate and the semiconductor chip. This thermal stress causes the reliability of the electrical connection between the substrate and the semiconductor chip to be further reduced.

[0006]

SUMMARY OF THE INVENTION Accordingly, the present invention has been made in view of the above problems, and has as its object to provide high reliability of electrical connection between a substrate and a semiconductor chip. An object of the present invention is to provide a semiconductor chip mounting substrate.

That is, a semiconductor chip mounting board according to the present invention comprises: a board having at least one projection integrally formed; a first bump obtained by forming a conductor layer on the projection;
A semiconductor chip having terminals protruding on the surface thereof as a second bump, the semiconductor chip being mounted on a substrate such that the first bump contacts the second bump, and The predetermined contact pressure therebetween is provided by the pressure holding means.

According to the present invention, when a plurality of projections are integrally formed with the substrate, the first bumps having small variations in height can be provided on the substrate at one time. This leads to a significant reduction in the manufacturing time of the semiconductor chip mounting substrate and an improvement in the yield. Further, even when the flatness of the semiconductor chip mounting surface of the substrate is not so high and the difference in linear expansion coefficient between the substrate material and the semiconductor chip material is relatively large, the distance between the first bump and the second bump is small. A predetermined contact pressure is provided and held by the pressure holding means. Therefore, the reliability of the electrical connection between the first bump and the second bump can always be ensured.

Preferably, the pressure holding means is a resin material filled and cured in a space between the substrate and the semiconductor chip.

A first surface used as a pressure holding means for contacting a surface of the semiconductor chip opposite to the second bump, and a second surface extending around the first surface. It is preferable to use a pressure holding member having the following. In this case, the substrate has a recess capable of housing the semiconductor chip therein. The first bump is formed integrally with the substrate on the bottom surface of the concave portion. The second surface of the pressure holding member is joined to the substrate such that the first surface of the pressure holding member presses the semiconductor chip mounted in the recess toward the substrate, thereby forming the first bump and the second bump. The predetermined contact pressure is provided between the bump and the bump.

Another object of the present invention is to provide a method for manufacturing a semiconductor chip mounting board. That is, the method comprises the steps of providing a substrate having at least one projection formed integrally, forming a conductive layer on the projection to obtain a first bump, and forming a second bump on the surface of the projection. Providing a semiconductor chip having protruding terminals; and pressing the second bump against the first bump by a pressure within the elastic deformation of the first bump and causing the second bump to undergo plastic deformation. A step of adhering to the second bump;
Adding a pressure holding means to maintain a predetermined contact pressure between the first bump and the second bump under the close contact state.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described based on preferred embodiments, but the present invention is not limited to these embodiments. Various changes can be made within the scope of the technical concept of the present invention. (First Embodiment) As shown in FIGS.
The semiconductor chip mounting board according to the embodiment includes a substrate 1 on which a plurality of protrusions 11 are integrally formed, a first bump 10 obtained by forming a conductor layer 12 on the protrusions 11, and a second bump 20 on the surface. And a semiconductor chip 2 having terminals 22 projecting upward. Numeral 21 is an electrode arranged between the semiconductor chip 2 and the terminal 22. For example, when the substrate 1 is formed of a resin, it is preferable to manufacture the substrate by injection molding. When the substrate 1 is made of a ceramic material, the substrate can be manufactured by performing injection molding using a mixture of a ceramic powder and a binder, and sintering the obtained molded product. The semiconductor chip 2 is mounted on the substrate 1 such that the first bump 10 contacts the second bump 20. In the present embodiment, a predetermined contact pressure between the first bumps 10 and the second bumps 20 is provided by pressure holding means made of a resin material 3c filled and cured in a space between the substrate and the semiconductor chip. Is done.

The second bump 20 preferably has a higher plastic deformability than the first bump 10. This is the first
This means that the plastic deformation of the second bump is more likely to occur than in the case of the bump. Due to the plastic deformation of the second bump, the first bump can be closely bonded to the second bump. In addition, even when the height of the first bump has a relatively large variation, a constant contact pressure can be provided to all the electrical connections between the first bump and the second bump. In other words, when the height of the first bump is larger than the average height, a larger amount of plastic deformation of the second bump occurs at the time of joining with the first bump. Conversely, if the height of the first bump is smaller than the average height, the smaller second
The amount of plastic deformation of the bump occurs at the time of bonding with the first bump. As described above, the amount of plastic deformation of the second bump is determined according to the variation in the height of the first bump, and each of the second bumps is adjusted to an appropriate height. The reliability of the electrical connection can be ensured.

The first bump 10 preferably has a higher elastic deformability than the second bump 20. This means that plastic deformation of the first bump 10 is less likely to occur than in the case of the second bump 20. The thermal stress generated at the bonding interface between the first bump and the second bump due to the difference in the coefficient of linear expansion between the substrate and the semiconductor chip is used to cause elastic deformation of the first bump. It is possible to prevent a decrease in the reliability of the electrical connection between the semiconductor chips.
From this viewpoint, the material of the first bump, that is, the substrate material preferably has an elastic modulus of 5 GPa, particularly 10 GPa or more.

As described above, the first material having high elastic deformation capability can be used.
The bumps are pressed against the second bumps having high plastic deformability to form an electrical connection therebetween, and a predetermined contact pressure between the first bumps and the second bumps is applied to the cured resin material 3c as pressure holding means. Therefore, the semiconductor chip mounting board of the present invention can provide high reliability of electrical connection for a long period of time.

In the present invention, the “predetermined contact pressure” means a pressure value required to ensure sufficient reliability of the electrical connection between the first bump and the second bump. In particular,
The predetermined contact pressure is 28 to 170 N / mm ² , especially 57 to 1
It is preferable to be within the range of 10 N / mm ² . As an example, the second bump is formed of gold, and the contact surface between the second bump and the corresponding first bump after bonding is about 75 μm.
In the case of a substantially circular shape having a diameter of m, applying a load of 0.5N to 3N, in particular, 1N to 2N can obtain good plastic deformation of the second bump without causing plastic deformation of the first bump. Is preferred. If the load exceeds 3N, the first bump may be plastically deformed.

The resin material used as the pressure holding means preferably has a higher coefficient of linear expansion than the material of the substrate. Specifically, the difference in the coefficient of linear expansion between the resin material and the substrate material (the first bump projection 11) is 5 × 10 ^−6.
/ ° C. to 60 × 10 ⁻⁶ / ° C., especially 10 × 10 ⁻⁶ / ° C. to 40
It is preferable to be within the range of × 10 ^-6 / ° C. If the difference in the coefficient of linear expansion is 5 × 10 ⁻⁶ / ° C. or less, the above-mentioned predetermined contact pressure may not be obtained. On the other hand, when the difference in the coefficient of linear expansion is 60 × 10 ⁻⁶ / ° C. or more, excessive shrinkage occurs in all directions such as vertical and horizontal directions due to the curing of the resin material.
Between them and the adhesive strength may be reduced.

As the substrate material, for example, polyphthalamide (PPA), polyphenylene sulfide, polyetherimide, polyethernitrile, polyetherketone can be used. Table 1 shows the coefficient of linear expansion and the modulus of elasticity of each of these substrate materials. If desired, these substrate materials may contain fillers such as inorganic fibers. Alternatively, ceramics such as alumina may be used for the substrate material. The type of resin material filled in the space between the substrate and the semiconductor chip is not particularly limited, but it is preferable to use a resin material having a difference in linear expansion coefficient satisfying the above range. For example, polyphthalamide (2
5 × 10 ⁻⁶ / ° C.) and an epoxy resin (5
5 × 10 ⁻⁶ / ° C.) is recommended.

[0019]

[Table 1]

With respect to the conductor layer 12, 5 μm
It is preferable to form a nickel film having a thickness of m or more, particularly 8 to 20 μm. This thick nickel film is effective for increasing the plastic deformation resistance of the first bump 10. Further, the conductor layer 12 is preferably composed of a copper film formed directly on the protrusion, a nickel thick film on the copper film, and a gold film on the nickel thick film.

In order to further improve the adhesion between the first bump and the second bump, one of the first bump and the second bump has a surface layer of a material selected from tin or a tin alloy,
It is preferred that the other has a gold layer. In this case, the first
A solid phase diffusion layer of tin and gold is formed at the interface between the bump and the second bump. For example, this solid-phase diffusion layer
It can be produced at a temperature of 50-200C.

The surface roughness (Ra) of at least the upper surface of the first bump 10 is preferably in the range of 0.1 to 3 μm. An improvement in adhesion due to the anchor effect can be achieved. When the upper surface and the side surface of the first bump have the surface roughness in the above range, the adhesion between the substrate 1 and the cured resin material 3c can be further improved.

With respect to the shape of the first bump 10, the first bump has a tapered shape having a flat upper surface, and is formed as shown in FIG.
As shown in the figure, the value obtained by dividing the height (H) of the first bump by the diameter (D) of a circle having substantially the same area on the bottom surface of the first bump is 0.5 or more, more preferably It is preferably 0.7 or more, especially 1 or more. For example, when the first bump 10 has a truncated cone shape, it is preferable that a value obtained by dividing the height of the truncated cone by the diameter of the bottom surface of the truncated cone is within the above range. When the first bump has a truncated pyramid shape such as a truncated pyramid, it is preferable that the value obtained by dividing the height of the truncated pyramid by the diameter of a circle having an area substantially equal to the bottom surface of the truncated pyramid is within the above range. Truncated cones and truncated pyramids are obtained by cutting the top of a cone or pyramid parallel to the bottom surface.

As for the shape of the second bump 20, it is preferable that the second bump has a tapered shape like a cone. When pressing the second bump against the first bump 10,
The second bumps 20 can be uniformly plastically deformed in any direction perpendicular to the pressing direction. of course,
Similarly to the first bump 10, the second bump 20 may be formed in a tapered shape having a flat upper surface. The diameter of the second bump 20 and the plastically deformed second bump 20d after bonding
Is preferably smaller than the diameter of the flat upper part of the first bump 10. For example, if the pitch between adjacent bumps is 20
In the case of 0 μm or more, the diameter of the bottom surface and the flat upper portion of the first bump 10 is about 125 μm and about 100 μm
The height of the first bump is about 90 μm, and the diameter and height of the deformed second bump 20d after bonding are about 7 μm each.
5 μm and about 30 μm are recommended.

On the other hand, when the pitch between adjacent bumps is 75 μm or less for high-density mounting, the diameter of the bottom surface of the first bump 10 and the diameter of the flat upper portion are each about 30 μm.
And about 20 μm, and the height of the first bump 10 is 40 μm.
m or more, and the height of the deformed second bump 20d after bonding is preferably 20 μm or more. Also, to implement even higher density mounting,
When the pitch between adjacent bumps is 50 μm or less, the bottom diameter of the first bump 10 and the diameter of the flat upper part are set to about 20 μm and about 15 μm, respectively.
Is preferably 20 μm or more, and the height of the deformed second bump 20 d after bonding is preferably 10 μm or more. When the first bump 10 is joined to the second bump 20, plastic deformation of the second bump occurs. Therefore, the height of the second bump after joining is about 10 to less than the height of the second bump before joining. It becomes smaller by about 15 μm.

As for the second bump 20 of the semiconductor chip 2, it is preferable that the second bump is made of a solder material.
In this case, the second bump can be plastically deformed by pressing the first bump against the second bump under a relatively small pressure. It is also preferable that the conductor layer 12 and the second bump of the first bump 10 be formed of gold. In this case, between the adjacent second bumps 20 and between the adjacent first bumps 20.
The semiconductor chip 2 can be mounted on the substrate 1 under the condition of a narrow pitch (<100 μm) between the bumps 10. Such high-density mounting is difficult with solder bonding.

The above-described semiconductor chip mounting board of the present invention can be manufactured by the following method. That is, the semiconductor chip 2 is mounted on the substrate 1 such that the first bump 10 contacts the second bump 20, and the resin material 3 is filled in the space between the semiconductor chip and the substrate. First, an intermediate assembly is manufactured. For example, as shown in FIG. 1A, a resin material 3 is coated on a substrate 1 having first bumps 10.
When the semiconductor chip 2 is arranged on the substrate 1 such that the first bumps 10 are in contact with the second bumps 20, an intermediate assembly can be obtained. Alternatively, after the semiconductor chip 2 is mounted on the substrate 1, the space between the substrate and the semiconductor chip may be filled with the resin material 3.

Next, the second bump 20 is
An optimal load is applied to the intermediate assembly such that the first bump is pressed against the first bump under a pressure which causes plastic deformation of the second bump within the elastic deformation region of the second bump. Adhere. In this close contact state, the resin material 3 in the intermediate assembly is cured. As shown by the arrow in FIG. 1B, the shrinkage due to the curing of the resin material 3 is:
A predetermined contact pressure between the first bump 10 and the second bump 20 in the semiconductor chip mounting board is maintained.

Alternatively, the semiconductor chip mounting board of the present invention may be manufactured by the following method. That is, the substrate 1
After the semiconductor chip 2 is mounted thereon, the first bump 10 is pressed by soldering while pressing the second bump 20 against the first bump 10.
The bump is bonded to the second bump. Then, the space between the substrate and the semiconductor chip is filled with the resin material 3 and cured.
The solder can be supplied by applying a cream solder to at least one of the second bumps corresponding to the first bumps with a dispenser. Further, only the upper surface of the first bump and / or the second bump may be immersed in the solder bath. Further, a solder coating may be formed on the upper surface of the first bump and / or the second bump by a conventional plating technique.

When the resin material is a thermosetting resin, the thermosetting resin material in the intermediate assembly is heat-cured under the above-mentioned close contact state, and then the cured resin material 3c is cooled to room temperature. It is particularly preferable that the thermosetting resin has a higher linear expansion coefficient than the substrate. When the amount of contraction due to the cooling of the cured resin is larger than the amount of contraction due to the cooling of the substrate material (= first bump), the predetermined contact pressure between the first bump and the second bump increases, and the electrical connection increases. Reliability is further improved.

The second bump 20 is formed of a solder material,
When the resin material 3 is a thermosetting resin, the resin material in the intermediate assembly is cured at a temperature lower than the melting point of the solder material, and then the intermediate assembly is heated to a temperature equal to or higher than the melting point of the solder material. And the first bump 10 and the second bump 20
Is preferably soldered. The second bump 20 made of a solder material can be formed by plating or dropping molten solder. Further, the second bump may be a solder wire stud bump. For example, if the curing temperature of the resin material 3 is in the range of 120 to 150 ° C. and the melting temperature of the solder material is about 183 ° C., the intermediate assembly is heat-cured under pressure at a temperature of about 160 ° C. . At this time, the resin material 3 between the first bump 10 and the second bump 20 is removed, and the first bump directly contacts the second bump. Then, heat the intermediate assembly to 183 ° C or higher,
The solder material of the second bump 20 is melted, and the first bump and the second bump are joined by soldering.

In each of the above-mentioned solder joints, it is preferable to perform the solder joints in a vacuum or in an inert gas atmosphere in order to avoid the use of flux. Alternatively, it is also preferable to perform a plasma treatment for removing the oxide film on the surfaces of the first and second bumps before the solder bonding.

The electrical connection between the first bump 10 and the second bump 20 may be formed by using a conductive paste. In this case, compared to soldering, 120 to 15
Since the electrical connection can be formed at a low temperature of 0 ° C., the occurrence of thermal damage to the semiconductor chip 2 can be prevented.

Further, the first bump 10 and the second bump 20
Ultrasonic bonding to increase the bonding strength between
Preferably, the bump is joined to the first bump. In particular,
It is preferable to perform ultrasonic bonding while heating and curing the resin material 3 in the intermediate assembly. When the conductive layer 12 and the second bump 20 of the first bump 10 are formed of gold, the electrical connection between the first bump and the second bump formed by ultrasonic bonding has particularly high reliability. Demonstrate.

In order to supply the resin material 3, a resin sheet may be arranged between the substrate 1 and the semiconductor chip 2. As the resin sheet, for example, it is preferable to use an anisotropic conductive film (ACF) in which conductive particles are dispersed. In this case, even if the resin material remains between the first bump and the second bump, the first bump 10 and the second bump 2
An electrical connection between zero is ensured by the presence of the conductive particles. Another advantage is that leakage of the resin material from the intermediate assembly can be prevented.

As a first modification of the above embodiment, FIG.
As shown in (b) and (b), the substrate 1 preferably has a depression 13 on the upper surface of the first bump 10 for receiving the second bump 20 of the semiconductor chip 2. Second bump 20
When bonding the first bump 10 to the first bump 10, the second bump
The semiconductor chip 2 with high positioning accuracy.
Can be mounted on the substrate 1. Also, the second bump 2
0 plastic deformation occurs in the depression 13 and the deformed second bump 20d fits the inner surface of the depression 13, so that the first
The contact area between the bump and the second bump increases. this is,
This further improves the reliability of the electrical connection between the bumps.

As a second modification of the above embodiment, FIG.
As shown in FIGS. 3B and 3B, when the semiconductor chip 2 is mounted on the substrate 1, the second protrusion 14 having a height for preventing the generation of an excessive contact pressure between the first bump 10 and the second bump 20 is formed as a stopper. It is preferred to have as. In this case, the substrate 1
A certain distance is secured between the second bump 20 and the semiconductor chip 2, and excessive plastic deformation of the second bump 20 can be prevented, thereby increasing the production yield.

As a third modification of the above embodiment, as shown in FIG. 4, a part of the side surface of the first bump 10 is
It is preferable to form the conductor layer-unformed surface 11a where a part of the side surface is exposed. Due to the formation of the conductor layer non-formed surface 11a, when the second bump 20 is pressed against the first bump 10, the first bump is easily elastically deformed.

As a fourth modification of the above embodiment, FIG.
As shown in FIGS. 3 and 4B, the substrate 1 is
It is preferable to have a recess 15 between which the resin material 3 is filled. By providing the concave portion 15, the semiconductor chip 2
More resin material 3 can be filled between the substrate and the substrate 1. As a result, the total shrinkage due to the curing of the resin material 3 in the concave portion 15 increases, so that a higher contact pressure between the first bump 10 and the second bump 20 can be provided. Thus, the formation of the concave portion 15 is effective for further improving the reliability of the electrical connection between the first bump and the second bump. Incidentally, the depth of the concave portion 15 is 20 μm or more, especially 3 μm.
It is preferably 0 μm or more. The depth of the recess is shown in FIG.
As shown in (a), it is defined as the difference between the height of the upper surface of the substrate between the inside and outside of the adjacent first bump.

FIG. 6A shows a fifth modification of the above embodiment.
As shown in (b) and (b), it is preferable that the second bump 20 be pressed against the first bump 10 via the buffer member 16 formed of a metal material having excellent plastic deformability. As the metal material, it is preferable to use gold, aluminum, and a solder material. For example, a gold stud bump, an aluminum stud bump, or a solder stud bump may be formed on the first bump 10 as the buffer member 16. The second bump 20 is formed on the buffer member 16 on the first bump 10.
6B, both the second bump and the cushioning member are plastically deformed. Therefore, as shown in FIG.
Close contact between the bump 20d and the cushioning member 16d can be obtained. The use of the cushioning member 16 is effective in ensuring the reliability of the electrical connection between the first bump and the second bump when the height variation of the first bump 10 is relatively large. Note that the thickness of the buffer member 16 is preferably 20 μm or more.

(Second Embodiment) As shown in FIGS. 7A and 7B, the semiconductor chip mounting board of the second embodiment comprises a substrate 1 on which a plurality of projections 11 are integrally formed, A first bump 10 obtained by forming a conductor layer 12 thereon;
The bump 20 mainly includes the semiconductor chip 2 having the terminal 22 protruding on the surface thereof. The substrate 1 has a concave portion 17 capable of accommodating the semiconductor chip 2 therein, and the projection 11 is formed integrally with the substrate on the bottom surface of the concave portion. Number 21
Is an electrode arranged between the semiconductor chip 2 and the terminal 22. The semiconductor chip 2 is mounted on the substrate 1 such that the first bump 10 contacts the second bump 20. In this embodiment, the predetermined contact pressure between the first bump 10 and the second bump 20 is: The semiconductor chip 2 is held by a pressure holding member 4 pressed against the rear surface.

The pressure holding member 4 has a first surface 41 for making contact with the rear surface of the semiconductor chip 2 and a second surface 42 extending around the first surface. The pressure holding member 4 of this embodiment has a step between the first surface 41 and the second surface 42, and the first surface 41 projects toward the inside of the concave portion 17 of the substrate. Is bonded to the substrate 1. As a result, the second bump 20 of the semiconductor chip 2 placed in the concave portion 17 is pressed against the first bump 10 of the substrate 1 by the first surface 41 of the pressure holding member,
A predetermined contact pressure is maintained between the bumps.

The pressure holding member 4 is preferably formed of a spring material. Mechanical damage to the semiconductor chip 2 can be reduced. Further, the pressure holding member 4 is joined to the substrate 1 by the joining material 43. The contraction force generated by the hardening of the bonding material 43 causes the first bump 10 and the second bump 2
It is effective to increase the contact pressure between zero.

As a first modification of the second embodiment, the pressure holding member 4 may be joined to the substrate 1 as shown in FIG.
That is, the pressure holding member 4 is provided on the first surface 41 by the conductive film 4.
5 and a first metal film 46 formed on the second surface 42, having an electrical connection with the conductive film.
The substrate 1 has a second metal film 18 on the upper surface around the recess 17. Therefore, the pressure holding member 4 is joined to the substrate 1 by the alloy layer generated at the interface between the first and second metal layers. The conductive film 45 and the second metal film 18 are preferably formed of gold. In order to form an alloy layer at a relatively low temperature, the first metal film 46 is preferably a tin film or a tin-containing film. When joining the first metal film 46 to the second metal film 18, a gold-tin alloy film can be formed at the interface. In this case, the electrical conduction between the pressure holding member 4 and the semiconductor chip 2 is ensured by the formation of the conductive film 45, so that the occurrence of noise can be reduced. The pressure holding member 4 having the conductive film 45 also functions as an electromagnetic shield. When the pressure holding member 4 is joined to the substrate 1 so that the inside of the recess 17 is hermetically sealed, it is possible to prevent the occurrence of dew condensation inside the recess 17.

As a second modification of the second embodiment, as shown in FIG. 9, when the semiconductor chip is an optical element such as an LED, an opening 47 is provided in the first surface 41 of the pressure holding member 4. Is preferred. Light can be transmitted between the optical element 2 placed in the concave portion 17 of the substrate 1 and the outside through the opening 47. Alternatively, a window (not shown) formed of a translucent material may be provided in the pressure holding member 4. Light can be transmitted between the optical element 2 placed in the recess 17 and the outside via the window.

(Third Embodiment) As shown in FIGS. 10A to 10C and FIG. 11, in this embodiment, at least a semiconductor mounting substrate having a structure substantially the same as that of the second embodiment is used. A part is sealed inside the second substrate 100 formed of a resin material. Two semiconductor chips 2 are mounted on the upper surface of the second substrate 100 by the same method as described in the first embodiment. As described above, the present embodiment provides a multichip module in which a plurality of semiconductor chips 2 are three-dimensionally mounted on the substrate 1 and inside the substrate. Second substrate 100
For the semiconductor chip mounted inside, the second substrate 1
The contact pressure between the first bump 10 and the second bump 20 via the pressure holding member 4 can be further increased by the contraction caused by the hardening of the resin material of No. 00.

This multi-chip module is, for example,
It can be manufactured by the following method. First, FIG.
As shown in (a), a first substrate 1 having substantially the same structure as the substrate of the second embodiment is manufactured except that a part of the upper surface is extended in the horizontal direction. The first bump 1 is provided on the protrusion 11 formed integrally with the substrate 1 on the bottom surface of the concave portion 17.
A conductive layer 12 is formed to obtain 0. Also, recess 1
A conductive pattern 19 is formed on the upper surface of the first substrate around 7.

Next, as shown in FIG. 10B, the semiconductor chip 2 is arranged in the concave portion 17 so that the first bump 10 contacts the second bump 20. Thereafter, the pressure holding member 4 is bonded to the first substrate 1 by the bonding material 43 so that the first surface 41 of the pressure holding member presses the semiconductor chip 2 toward the first substrate 1, thereby forming the first bump 10th and 2nd
A predetermined contact pressure is maintained between the bump 20 and the bump 20.

Next, as shown in FIG. 10C, a second substrate 100 is formed on the first substrate 1 by injection molding.
At least a part of the substrate is sealed inside the second substrate. In the present embodiment, the second substrate 100 is formed such that a part of the conductive pattern 19 on the extended upper surface is exposed. The contact pressure between the first bump 10 and the second bump 20 increases via the pressure holding member 4 due to shrinkage caused by the curing of the resin material of the second substrate 100, so that the reliability of the electrical connection between the bumps is reduced. Can be even higher. In this embodiment,
Conductive layer 120 with first bump 110 on second substrate 100
Are extended along a part of the side surface of the second substrate, and the first substrate 1
It is electrically connected to the upper conductive pattern 19.

Then, another semiconductor chip 2 is mounted on the upper surface of the second substrate 100 based on the same method as that of the first embodiment, and as shown in FIG. A multi-chip module constituted by a semiconductor chip mounting substrate having the following can be obtained.

As a modified example of the third embodiment, when the semiconductor chip 2 is an optical element such as an LED, as shown in FIG. And an opening 130 provided in the second substrate 100, the first
Light can be transmitted between the optical element 2 placed in the concave portion 17 of the substrate 1 and the outside.

[0052]

As described above, according to the present invention, the predetermined contact pressure between the first bump of the substrate and the second bump of the semiconductor chip is stably held by the pressure holding means. A semiconductor chip mounting substrate having high reliability in electrical connection between the first bump and the second bump can be provided.

In other words, when the pressure holding means is made of a resin material having a higher linear expansion coefficient than the substrate material, the contraction due to the hardening of the resin material filled in the space between the substrate and the semiconductor chip is caused by the first bump and the first bump. While maintaining the contact pressure between the two bumps,
High reliability of electrical connection between bumps is ensured for a long time.

On the other hand, when the resin material is not desired to be brought into contact with the semiconductor chip, it is preferable to use a pressure holding member instead of the resin material. In this case, the second bump of the semiconductor chip arranged in the concave portion of the substrate is pressed against the first bump of the substrate by the pressure holding member. Further, the shrinkage due to the curing of the adhesive used for joining the pressure holding member to the substrate further increases the contact pressure between the first bump and the second bump. Thus, high reliability of the electrical connection between the first bump and the second bump is also achieved by using the pressure holding member.

In particular, when a plurality of semiconductor chips including an optical element such as an LED are mounted three-dimensionally on and within a substrate, each semiconductor chip is selected by adopting an optimal combination of a resin material and a pressure holding member. A multi-chip module having high reliability of electrical connection between a chip and a substrate can be provided.

[Brief description of the drawings]

FIGS. 1A and 1B are schematic sectional views showing a method for manufacturing a semiconductor mounting board according to a first embodiment of the present invention.

FIGS. 2A and 2B are schematic cross-sectional views showing a first modification of the first embodiment.

FIGS. 3A and 3B are schematic cross-sectional views showing a second modification of the first embodiment.

FIG. 4 is a partial perspective view showing a third modification of the first embodiment.

FIGS. 5A and 5B are schematic cross-sectional views showing a fourth modification of the first embodiment.

FIGS. 6A and 6B are schematic cross-sectional views showing a fifth modification of the first embodiment.

FIGS. 7A and 7B are schematic cross-sectional views illustrating a method for manufacturing a semiconductor mounting substrate according to a second embodiment of the present invention.

FIG. 8 is a schematic sectional view showing a first modification of the second embodiment.

FIG. 9 is a schematic sectional view showing a second modification of the second embodiment.

FIGS. 10A to 10C are schematic cross-sectional views illustrating a method for manufacturing a semiconductor mounting board according to a third embodiment of the present invention.

FIG. 11 is a schematic sectional view showing a semiconductor mounting board of a third embodiment.

FIG. 12 is a schematic sectional view showing a modification of the third embodiment.

[Explanation of symbols]

 Reference Signs List 1 substrate 2 semiconductor chip 3 resin material 3c cured resin 10 first bump 11 protrusion 12 conductive layer 20 second bump 20d plastically deformed second bump 21 electrode 22 terminal

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Keiji Sanakawa 1048 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Works, Ltd. (72) Inventor Shigenari Takami 1048, Kadoma, Kadoma, Osaka Prefecture Inside Matsushita Electric Works Co., Ltd. (72) Inventor Kazunori Kuzuhara 1048, Odaka, Kazuma, Kadoma City, Osaka Pref. Yasushi Tanaka 1048 Kazuma Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works Co., Ltd. F-term (reference) 5F041 AA43 DA03 DA41 5F044 KK17 KK18 KK19 LL11 LL15 QQ03

Claims (26)

[Claims] 1. A semiconductor having at least one protrusion integrally formed thereon, a first bump obtained by forming a conductor layer on the protrusion, and a terminal as a second bump protruding on the surface. A semiconductor chip mounting substrate, comprising: a semiconductor chip mounted on the substrate such that the first bump contacts the second bump.
A semiconductor chip mounting substrate, comprising: pressure holding means for providing a predetermined contact pressure between a bump and a second bump. 2. The semiconductor chip mounting board according to claim 1, wherein the pressure holding means is a resin material filled and cured in a space between the substrate and the semiconductor chip. 3. The semiconductor chip mounting board according to claim 2, wherein the resin material has a higher linear expansion coefficient than a material of the board. 4. The difference in the coefficient of linear expansion between the resin material and the material of the substrate is 5 × 10 ⁻⁶ / ° C. to 60 × 10 ^−6.
4. The semiconductor chip mounting board according to claim 3, wherein the temperature is within the range of / ° C. 5. The semiconductor chip mounting board according to claim 1, wherein a surface roughness (Ra) of at least an upper surface of the first bump is in a range of 0.1 to 3 μm. 6. The semiconductor chip mounting substrate according to claim 1, wherein a part of the side surface of the first bump is a surface on which a part of the side surface of the protrusion is not formed and on which the conductor layer is not formed. . 7. The substrate has a second protrusion having a height that prevents an excessive contact pressure between the first bump and the second bump when the semiconductor chip is mounted on the substrate, as a stopper. The semiconductor chip mounting board according to claim 1, wherein: 8. The semiconductor chip mounting substrate according to claim 1, wherein the substrate has a depression on an upper surface of the first bump for receiving a second bump of the semiconductor chip. 9. One of the first bump and the second bump has a surface layer of a metal material selected from tin or a tin alloy, and the other has a gold layer. 9. The semiconductor chip mounting substrate according to claim 1, further comprising a solid-state diffusion layer of tin and gold formed at an interface between the first bump and the second bump. 9. 10. The semiconductor chip mounting substrate according to claim 1, wherein the material of the substrate has an elastic modulus of 5 GPa or more. 11. The semiconductor chip mounting board according to claim 1, wherein the conductor layer includes a nickel layer having a thickness of 5 μm or more. 12. The substrate according to claim 2, wherein the at least one protrusion comprises a plurality of protrusions, and the substrate has a recess between adjacent protrusions, the recess being filled with the resin material.
5. The semiconductor chip mounting substrate according to any one of items 1 to 4. 13. The semiconductor chip mounting board according to claim 1, wherein the first bump is pressed against the second bump via a buffer member made of a metal material having a high plastic deformation ability. . 14. The first bump has a tapered shape having a flat upper surface, and a value obtained by dividing the height of the first bump by the diameter of a circle having substantially the same area as the bottom surface of the first bump is 0.1. 14. The semiconductor chip mounting board according to claim 1, wherein the number is 5 or more. 15. The substrate has a concave portion capable of accommodating a semiconductor chip therein, the first bump is formed integrally with the substrate at a bottom surface of the concave portion, and the pressure holding means is provided on a second surface of the semiconductor chip. A pressure holding member having a first surface used to contact a surface located on the side opposite to the bump, and a second surface extending around the first surface. The second surface of the pressure holding member is bonded to the substrate such that the first surface of the first member presses the semiconductor chip placed in the concave portion toward the substrate, thereby forming a gap between the first bump and the second bump. The semiconductor chip mounting board according to claim 1, wherein the predetermined contact pressure is provided to the semiconductor chip mounting board. 16. The pressure holding member has a conductive film on at least the first surface and a first metal film formed on the second surface so as to make electrical connection with the conductive film. The substrate has a second metal film on the upper surface around the recess, and the pressure holding member is connected to the substrate via an alloy layer generated at an interface between the first metal film and the second metal film. The semiconductor chip mounting board according to claim 15, wherein the semiconductor chip mounting board is joined. 17. The semiconductor chip mounting board according to claim 15, wherein the pressure holding member is joined to the board so that the inside of the recess is hermetically sealed. 18. The semiconductor chip is an optical element,
The pressure holding member has an opening in the first surface, and light can be transmitted between the optical element mounted in the recess and the outside of the semiconductor chip mounting substrate through the opening. The semiconductor chip mounting board according to claim 15 or 16, wherein: 19. The semiconductor chip is an optical element,
The pressure holding member has a window formed of a translucent material, and the light between the optical element mounted in the recess of the substrate and the outside of the semiconductor chip mounting substrate via the window. 18. The semiconductor chip mounting board according to claim 15, wherein the semiconductor chip mounting board is capable of transmitting data. 20. At least a part of the semiconductor mounting substrate is sealed in a second substrate made of a resin material, and shrinkage caused by curing of the resin material is caused to contract with the first bump via the pressure holding member. 16. The semiconductor chip mounting board according to claim 15, wherein a contact pressure between the second bump and the second bump is increased. 21. The semiconductor chip is an optical element,
The pressure holding member has a window formed of a translucent material, the second substrate has an opening, and accordingly, the optical element mounted in the recess and the outside of the semiconductor chip mounting substrate. 21. The semiconductor chip mounting substrate according to claim 20, wherein transmission of light during the period is enabled through the window and the opening. 22. A step of providing a substrate having at least one projection formed integrally, a step of forming a conductor layer on the projection to obtain a first bump, and forming a second bump on a surface of the projection. Providing a semiconductor chip having protruding terminals; and pressing the second bump against the first bump by a pressure within the elastic deformation of the first bump and causing the second bump to undergo plastic deformation. Contacting the second bump with the second bump; and adding a pressure holding means for maintaining a predetermined contact pressure between the first bump and the second bump under the close contact state. Of manufacturing a semiconductor chip mounting substrate. 23. The semiconductor chip mounted on the substrate so that the first bump contacts the second bump, and heat applied to the space between the semiconductor chip and the substrate as the pressure holding means. After fabricating an intermediate assembly composed of a curable resin material, the second bump is first pressed within the elastic deformation of the first bump and under a pressure that causes plastic deformation of the second bump.
The first bumps are pressed against the bumps to bring the first bumps into close contact with the second bumps, and then the resin material in the intermediate assembly is heat-cured under the close contact state so that a predetermined distance between the first bumps and the second bumps is obtained. The method for manufacturing a semiconductor chip mounting board according to claim 22, wherein the contact pressure is maintained. 24. The resin material has a greater coefficient of linear expansion than the material of the substrate, so that the resin material in the intermediate assembly is cured by heating, and then the shrinkage caused by cooling of the cured resin material is reduced. 24. The method according to claim 23, wherein a predetermined contact pressure between the first bump and the second bump is further increased. 25. The second bump is formed of a solder material, and the resin material in the intermediate assembly is cured at a temperature equal to or lower than the melting point of the solder material. 25. The method for manufacturing a semiconductor chip mounting board according to claim 23, wherein the first and second bumps are soldered by heating to a temperature higher than that. 26. A resin material in the intermediate assembly is heated and cured while applying ultrasonic waves to the intermediate assembly for ultrasonic bonding between the first bump and the second bump. The method for manufacturing a semiconductor chip mounting substrate according to claim 23 or 24.