JP2002231856A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method capable of being packaged by a chip area without using a semiconductor manufacturing process, enhancing mounting reliability, and improving a degree of freedom of re-wiring. SOLUTION: A semiconductor chip 42 is stuck on a mold releasing body forming a recess-like pattern filling a conductive paste, the conductive paste 44 wired on a circuit face 42a to the circuit face 42a of the semiconductor chip 42 is transferred by embedding a metal protrusion 43 in the conductive paste, and the circuit face 42a and the conductive paste body 44 are sealed by a sealing resin. Thereafter, the surface of the sealing resin is ground until the top part (one end) 44a of the conductive paste body is exposed to constitute a resin layer 45.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a CSP (chip size package) type semiconductor device and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, with the trend of miniaturization and weight reduction of electronic devices, development of further miniaturization and weight reduction of semiconductor components, which are components thereof, has been promoted. One of the core semiconductor components is a CSP type semiconductor package component.

FIG. 6 shows a structural example of a CSP type semiconductor package component. The CSP type semiconductor package component 1 according to the present embodiment includes a semiconductor chip 2, an interposer substrate 3, bonding wires 4 for electrically connecting them, a sealing resin 5 covering the semiconductor chip 2 and the bonding wires 4, and an external electrode. And 6. The external electrode 6 is connected to the semiconductor chip 2 via the interposer substrate 3.
Are electrically connected to the respective electrodes (pads), and are arranged and formed corresponding to the land pitch of the mother substrate (not shown).
That is, the electrode pitch of the semiconductor chip 2 is changed or expanded in accordance with the land pitch of the mother substrate by the rewiring action of the interposer substrate 3.

As described above, the CSP type semiconductor package component has a package size similar to that of a semiconductor chip and has external electrodes (terminals) on its mounting surface.
QFP (Quad Flat Package) and SOP (Small Outline Pa
The component mounting area can be reduced as compared with a semiconductor package component in which external leads protrude from the side surface of the package body as in the case of the semiconductor package component.

[0005] However, the CSP type semiconductor package component 1 of the above-described embodiment is not suitable for mass production because semiconductor chips are handled one by one in the manufacture thereof, and at the same time, the production cost of the interposer substrate 3 is large. Take it. Further, since the interposer substrate is used, there is a problem that the package area is larger than the chip area.

On the other hand, recently, wafer level CS
A new method of manufacturing a semiconductor device called P has been proposed (Japanese Patent Laid-Open No. 2000-228457). this is,
As shown in FIG. 7, as a final step of the wafer process, formation of a sealing resin 13 layer made of polyimide and formation of external electrodes 14 are performed. Thereafter, the wafer is diced to complete the CSP type semiconductor package component 11. Is the way. Accordingly, mass production can be achieved, and the area of the sealing resin 13 is equal to the area of the semiconductor chip 12, so that the size of the entire component can be reduced.

However, the above method has the following problems.

As shown in FIG. 7, the sealing resin 13 also functions as an insulating layer between the plurality of bumps 17 arranged and formed on the upper surface of the chip 12. Each of these bumps 17 is mounted on chip 1
2 and the pad 15 and the wiring 16 are connected to each other.
The arrangement of the pads 15 is replaced by the arrangement of the bumps 17, and the same rewiring as that of the interposer substrate 3 (FIG. 6) is performed. However, the process of forming the wiring 16 and the bumps 17 is performed by repeating a series of semiconductor manufacturing processes such as film formation, resist coating, exposure, development, etching, and resist removal on the upper surface of the wafer. There is a problem that parts production cost increases.

Further, in the semiconductor package component 11 manufactured by the above method, the mounting reliability due to the difference in the coefficient of thermal expansion from the mother substrate is lower than that of the component 1 described with reference to FIG. There is. This is because the stress relaxation effect of the sealing resin 13 is lower than that of the interposer substrate 3.

As described above, while the component 1 handled by a single chip and the component 11 manufactured by the wafer process each have specific advantages, there are disadvantages that cannot be ignored from the viewpoint of mounting reliability and production cost. At present, it is desired to introduce a technology capable of solving these disadvantages.

On the other hand, Japanese Patent Laying-Open No. 2000-228457 describes a method for manufacturing a semiconductor device as shown in FIG. That is, the semiconductor chip 22 was arranged so that the circuit surface on which the pad 23 was formed faced upward, and the heat-resistant tape 24 on which the conductor pattern 25 made of metal foil corresponding to the pad 23 was formed was positioned above the semiconductor chip 22. Then, the conductor pattern 25 is pad 2 with the TAB tool 27.
3 (FIG. 8A). Next, the nozzle 30 of the dispenser 29 is set in the hole 28 of the heat-resistant tape 24, and the circuit surface of the semiconductor chip 22, the heat-resistant tape 24 and the stopper 2
4 is filled with the sealing resin 31 (FIG. 8B). Subsequently, the semiconductor chip 22 is moved downward with respect to the heat-resistant tape 24, and the sealing resin 31 is transferred to the circuit surface of the semiconductor chip 22 together with the conductor pattern 25 (FIG. 8).
C). Thereafter, a CSP type semiconductor package component 21 as shown in FIG. 9 is formed by forming a solder ball 32 serving as an external electrode on the upper end of the conductor pattern 25.

The semiconductor package component 21 manufactured as described above is advantageous in that a semiconductor package component having a package area substantially equal to a chip area can be obtained at low cost without using a semiconductor manufacturing process. is there.

[0013]

However, the semiconductor component 21 manufactured by the above method has a disadvantageous aspect from the viewpoint of rewiring of the pad 23. That is, Japanese Patent Application Laid-Open No. 2000-228457 describes the rewiring of the pad 23, which is described in FIGS.
It can only be obtained in the form shown in FIG. That is, the conductor pattern 25 is formed together with the position changing pattern 33, and the solder balls 32 are formed on the position changing pattern 33, so that rewiring is performed on the surface of the resin layer 31.

Therefore, as shown in FIG. 11, not only the solder balls 33 but also the position changing patterns 33 are exposed to the outside on the surface of the sealing resin 31, so that the adjacent solder balls 33 are exposed.
Need to be careful not to touch the position changing pattern 33. Therefore, the degree of freedom in designing the rewiring is reduced, and the solderability may be affected. Also, it will be difficult to cope with further miniaturization of semiconductor chips in the future.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and provides a semiconductor device which can be packaged in a chip area without using a semiconductor process, can improve mounting reliability, and can improve the degree of freedom of rewiring. And a method for manufacturing the same.

[0016]

In order to solve the above-mentioned problems, a semiconductor device according to the present invention comprises a semiconductor chip having a circuit surface on which a plurality of metal protrusions are formed and formed, and a resin for sealing the circuit surface. And a conductive paste which is wired on the circuit surface, one end of which is exposed to the outside from the surface of the resin layer, and the other end of which is embedded with the metal protrusion. I do.

In solving the above problems, a method of manufacturing a semiconductor device according to the present invention is directed to a semiconductor chip having a circuit surface on which a plurality of metal projections are formed and formed, or a wafer as an aggregate of the semiconductor chips. A step of preparing
A step of filling a conductive material into a predetermined concave pattern formed on one surface of the release body, embedding the metal protrusion in the conductive material, transferring the conductive material to the circuit surface, And a resin sealing step of forming a sealing resin on the circuit surface at the same level as or lower than the top of the conductor pattern.

According to the present invention, the conductive paste filled in the concave pattern of the release body is transferred to the circuit surface of the semiconductor chip to form a conductive paste body, which is sealed with a resin to manufacture a semiconductor device. Thereby, a semiconductor chip can be packaged in a chip area without using a semiconductor manufacturing process.

Further, since the sealing resin and the conductive paste function as a stress relaxation layer between the mother substrate and the semiconductor chip, the mounting reliability is improved, and the metal protrusions are embedded in the conductive paste. Since the connection is made in the form described above, conduction is ensured.

Further, since the conductive paste transferred from the concave pattern of the release member is routed and wired on the circuit surface of the semiconductor chip, the conductive paste exposed from the surface of the sealing resin has a top portion. This not only improves the degree of freedom in the rewiring design of the semiconductor chip, but also improves the soldering reliability.

[0021]

Embodiments of the present invention will be described below with reference to the drawings.

First, a semiconductor device according to a first embodiment of the present invention will be described with reference to FIG. 3. A semiconductor device 41 mainly includes a semiconductor chip 42, a conductive paste body 44, and a resin layer 45. Is done.

Electrode pads of semiconductor chip 42 (not shown)
A plurality of metal protrusions 43 are formed thereon, and a resin layer 45 made of epoxy resin is provided so as to cover the circuit surface 42a of the semiconductor chip 42 on which the metal protrusions 43 are formed. The conductive paste body 44 has one end 44a.
Is exposed to the outside from the surface of the resin layer 45, and the metal protrusion 43 is embedded in the other end portion 44b. In the present embodiment, the one end 44a of the conductive paste body 44 is configured as an external connection electrode as it is.

The conductive paste body 44 penetrates the resin layer 45 at the position where the metal protrusion 43 is formed, and forms a direct wiring layer 44A forming an external connection electrode at the same planar position as the position where the metal protrusion 43 is formed. And a redistribution layer 44B which penetrates the resin layer 45 at a position where the metal protrusion 43 is not formed and forms an external connection electrode at a planar position different from the position where the metal protrusion 43 is formed. In the rewiring layer 44B, the wiring portion 44c formed on the circuit surface 42a of the semiconductor chip 42
Thus, an electrical connection with the other end 44b is made.

In the present embodiment, the metal projection 43 is formed of a gold stud bump, but is not limited to this, and may be formed of, for example, a plated bump.

Next, a method of manufacturing the semiconductor device 41 configured as described above will be described with reference to FIGS.

First, one surface 50a of the release body 50 made of a thermoplastic resin sheet is heat-formed using a press mold 51, and the first concave portion 52A and the second concave portion 52B are formed on the surface 50a.
Then, a concave pattern 52 composed of the third concave portion 52C is formed (FIG. 1A).

Here, the first recess 52A is provided with the metal projection 43.
It is formed at a depth greater than the formation height of FIG.
The recess 52B is formed deepest. The third concave portion 52C is a concave portion communicating between the first concave portion 52A and the second concave portion 52B. In the present embodiment, the formation depth of the third concave portion 52C is minimized as compared with other concave portions. The conductive pattern 4 described above by these first to third concave portions 52A to 52C.
Four redistribution layers 44B will be formed. In addition, the direct wiring layer 44A is formed by a concave portion (indicated as 52A (52B) in the figure) that serves as the first concave portion 52A and the second concave portion 52B.

Subsequently, with respect to the surface 50a of the release body 50,
The conductive paste 53 is applied by printing so as to cover the first to third concave portions 52A to 52C (FIG. 1B). The conductive paste 53 is obtained by mixing metal fine particles (in this embodiment, silver) into a thermosetting resin such as an epoxy resin.

Next, the conductive paste 53 is heated to a temperature at which the conductive paste 53 becomes semi-cured, and the semi-cured conductive paste 53 is polished until the surface 50a of the release body 50 is exposed to the outside. A pattern of the conductive paste 53 is formed on the surface 50a (FIG. 1C).

Subsequently, after the semiconductor chip 42 prepared in advance is disposed so as to face the surface 50a of the release body 50 so that the circuit surface 42a faces downward, the two are pasted together to form a semiconductor chip 42 on the circuit surface 42a. The metal protrusion 43 is embedded in the conductive paste 53 filled in the first concave portion 52A of the concave pattern 52 of the release body 50 (FIG. 2A). In the step of embedding the metal projections 43 in the conductive paste 53, the semiconductor chip 42 (metal projections 43) is heated to a temperature at which the conductive paste 53 is completely cured, and the metal projections 43 are pressed into the conductive paste 53. (Thermocompression bonding). As a result, the metal projection 43 becomes conductive paste 53.
The inside of the semiconductor chip 42 is firmly held and conduction is secured, and the conductive paste 53 is adhered to the circuit surface 42 a of the semiconductor chip 42.

Next, the semiconductor chip 42 is peeled off from the surface 50a of the release body 50, and the cured conductive paste 53 in the concave pattern 52 is transferred to the circuit surface 42a of the semiconductor chip 42. Thus, the conductive paste body 44 described with reference to FIG. 3 is formed (FIG. 2B).

Here, since the release body 50 is composed mainly of a thermoplastic resin and the conductive paste 53 is composed mainly of a thermosetting resin, the work of releasing the conductive paste body 53 is easy.

Subsequently, the circuit surface 42a of the semiconductor chip 42
To protect the circuit surface 42a and the conductive paste 43
Are molded with a sealing resin 54 (corresponding to the resin layer 45 in FIG. 3) (FIG. 2C). Sealing resin 54
In the present embodiment, a thermosetting resin whose main component is an epoxy resin is used. Then, the molded sealing resin 5
4 is polished until the top (one end 44a in FIG. 3) of the conductive paste body 44 is exposed to the outside.
The semiconductor device 41 shown in FIG. 3 is manufactured.

As described above, according to the present embodiment, an LGA (Land Grid) can be realized at low cost without using a semiconductor manufacturing process.
Array type CSP type semiconductor package parts can be obtained.

Mounting on a mother board (not shown) can be performed by directly soldering one end 44a of the conductive paste body 44 exposed from the surface of the resin layer 45 to the land surface of the mother board. At this time, the resin layer 45
In addition, the conductive paste body 44 itself can exhibit a stress relaxing action, and can prevent a reduction in mounting reliability due to a difference in thermal expansion coefficient between the semiconductor chip 42 and the mother substrate. Further, since the metal projections 43 are joined in a form embedded in the conductive paste body 44, conduction is ensured.

According to the present embodiment, the redistribution layer 44B constituting the conductive paste body 44 is
Since it is formed on the second circuit surface 42a, the conductive portion exposed on the surface 45a of the resin layer 45 is only the top portion (one end portion 44a) of the conductive paste body 44. Thus, the degree of freedom in designing the layout of the conductive portions on the resin layer surface 45a (the degree of freedom in rewiring) can be increased, and the gap between the adjacent conductive portions can be widened to prevent a decrease in soldering reliability. be able to.

FIG. 4 shows a semiconductor device according to a second embodiment of the present invention. It should be noted that in FIG.
The same reference numerals are given to portions corresponding to the above-described embodiment, and the detailed description thereof will be omitted.

The semiconductor device 61 of the present embodiment mainly includes a semiconductor chip 42, a conductive paste body 44, and a resin layer 65. In the present embodiment, the resin layer 6
5 has a structure in which the top portion 44a of the conductive paste body 44 projects from the surface 65a by about 20 μm. With this configuration, the semiconductor device 41 in the first embodiment described above
Rather, the workability of mounting on a mother board is improved.

The protruding length (about 20 μm) of the conductive paste body 44 from the resin layer surface 65a is determined in consideration of the fact that the land thickness (the thickness of copper foil) of a general mother board is almost the same. It is, of course, not limited to this value.

Next, a method of manufacturing the semiconductor device 61 will be described. The semiconductor device 61 of the present embodiment is cut into individual pieces from the wafer 60 shown in FIG. 5 through a dicing process. That is, in the above-described first embodiment, the semiconductor chips 42 are packaged one by one, but in the present embodiment, the semiconductor chips 42 are packaged in a wafer state which is an aggregate of the semiconductor chips 42. More specifically, after performing the step of transferring the conductive paste body 44 onto the circuit surface 42a described in the first embodiment at the wafer level, the resin sealing step is performed by spin coating. Accordingly, the resin layer 65 having an arbitrary thickness can be formed, and the amount of protrusion of the conductive paste body 44 from the resin layer surface 65a can be controlled.

Although the embodiments of the present invention have been described above, the present invention is, of course, not limited thereto, and various modifications can be made based on the technical concept of the present invention.

For example, in each of the above embodiments, the silver paste is used as the conductive paste body 44. However, the present invention is not limited to this, and another metal paste such as a copper paste can be used.

In each of the above embodiments, one end (top) 44a of the conductive paste 44 exposed from the resin layer surfaces 45a, 65a is configured as an external connection electrode as it is. It is also possible to form a solder ball on the portion and use this as an external connection electrode.

Further, the manufacturing process of the semiconductor device described in the first embodiment can be performed at a wafer level. In this case, the resin sealing step is performed in the same manner as in the second embodiment. It can be performed by a spin coating method.

[0046]

As described above, according to the semiconductor device and the method of manufacturing the same of the present invention, the following effects can be obtained.

That is, according to the semiconductor device of the present invention, the sealing resin and the conductive paste serving as the wiring layer act as a stress relaxation layer between the mother substrate and the semiconductor chip. The mounting reliability is improved, and the metal projections are joined in a state of being embedded in the conductive paste body, so that conduction is ensured. Further, since the wiring layer is routed on the circuit surface of the semiconductor chip, not only the degree of freedom in rewiring design on the surface of the resin layer is improved, but also the reliability of soldering can be improved.

Further, according to the method of manufacturing a semiconductor device of the present invention, a semiconductor device having the above-described effects can be manufactured at low cost without using an expensive semiconductor manufacturing process. CSP with excellent reliability
Mold semiconductor components can be obtained.

According to the sixth aspect of the present invention, it is possible to form a conductive paste to be re-wired on the circuit surface of the semiconductor chip.

According to the seventh aspect of the present invention, it is possible to easily transfer the conductive paste pattern from the release member to the semiconductor chip circuit surface.

According to the eighth aspect of the present invention, the metal projection and the conductive paste can be firmly bonded,
The function of bonding the conductive paste to the semiconductor chip circuit surface can be exhibited.

According to the ninth aspect of the present invention, the top of the conductive paste can be easily formed on the same surface as the surface of the resin layer.

According to the tenth aspect of the present invention, the height of the resin layer for sealing the circuit surface of the semiconductor chip is controlled to easily form a conductive paste projecting from the surface of the resin layer with an arbitrary protrusion length. Can be.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a manufacturing process of a semiconductor device according to a first embodiment of the present invention, wherein A is a process of forming a concave pattern on a release body, and B is a step of applying a conductive paste to the release body. Step, C is a step of filling the conductive pattern into the concave pattern,
Are respectively shown.

FIGS. 2A and 2B are cross-sectional views showing a manufacturing process of the semiconductor device according to the first embodiment of the present invention, wherein A and B show a step of transferring a conductive paste body to a semiconductor chip, and B shows a resin sealing step, respectively. Is shown.

FIG. 3 is a sectional view showing the structure of the semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a sectional view showing a structure of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a perspective view showing a wafer state before the semiconductor device shown in FIG. 4 is separated into individual pieces.

FIG. 6 is a sectional view showing a structure of a conventional CSP type semiconductor component.

FIG. 7 is a sectional view showing the structure of another conventional CSP type semiconductor component.

FIG. 8 is a cross-sectional view showing a manufacturing process of still another conventional CSP type semiconductor component, wherein A is a thermocompression bonding process of a conductive pattern to a semiconductor chip, B is a resin sealing process, C is a conductive pattern and a sealing process to a semiconductor chip. 3 shows a step of transferring a stop resin.

9 is a cross-sectional view showing a structure of a semiconductor component manufactured by the manufacturing process shown in FIG.

FIG. 10 is a sectional view showing another example of the structure of the semiconductor component shown in FIG. 9;

FIG. 11 is a perspective view of the semiconductor component shown in FIG. 10;

[Explanation of symbols]

41, 61: semiconductor device, 42: semiconductor chip, 42a
... circuit surface, 43 ... metal protrusion, 44 ... conductive paste body,
44A: direct wiring layer, 44B: rewiring layer, 44a: one end (top), 44b: other end, 44c: wiring part, 45,
65: resin layer, 50: release body, 52: concave pattern, 5
2A: first concave portion, 52B: second concave portion, 52C: third concave portion, 53: conductive paste, 54: sealing resin.

Claims (10)

[Claims] A semiconductor chip having a circuit surface on which a plurality of metal protrusions are arranged and formed; a resin layer for sealing the circuit surface; wiring on the circuit surface; A semiconductor paste which is exposed to the outside and has, at the other end, a conductive paste in which the metal projection is embedded. 2. The semiconductor device according to claim 1, wherein the one end is located on the same plane as the surface of the resin layer. 3. The semiconductor device according to claim 1, wherein said one end protrudes from a surface of said resin layer. 4. The semiconductor device according to claim 1, wherein the one end is an electrode for external connection. 5. A step of preparing a semiconductor chip having a circuit surface on which a plurality of metal protrusions are arranged and formed, or a wafer which is an aggregate of the semiconductor chips; Filling a conductive paste into the concave pattern; embedding the metal protrusions in the conductive paste; transferring the conductive paste to the circuit surface to form a conductive paste body; and transferring the conductive paste to the circuit surface. On the other hand, a method of manufacturing a semiconductor device, comprising: a resin sealing step of forming a sealing resin at or below the top of the conductive paste body. 6. The concave pattern includes: a first concave portion in which the metal protrusion is embedded; a second concave portion forming a top of the conductor pattern; and a third concave portion connecting the first and second concave portions. 6. The method for manufacturing a semiconductor device according to claim 5, comprising: 7. The method for manufacturing a semiconductor device according to claim 5, wherein the release body is made of a thermoplastic resin, and the conductive paste is made by mixing metal fine particles into a thermosetting resin. . 8. The conductive paste is obtained by mixing metal fine particles into a thermosetting resin, and the transferring step includes: placing the metal protrusions heated to a curing temperature of the conductive paste in the conductive paste. The method for manufacturing a semiconductor device according to claim 5, wherein the method is performed by embedding. 9. The resin sealing step includes a step of covering the circuit surface and the conductive paste body with the sealing resin, and a step of polishing a surface of the coated sealing resin to form a top of the conductive paste body. 6. The method for manufacturing a semiconductor device according to claim 5, comprising a step of exposing the semiconductor device to the outside. 10. The method according to claim 5, wherein the resin sealing step is performed by a spin coating method.