JP2011204894A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device in which solder balls are provided on wiring consisting of copper, which further prevents tin in the solder ball from diffusing in the wiring.SOLUTION: The upper surface of a land in the wiring 7 is provided with a tin diffusion-preventing layer 12, on which the solder balls 13 are provided. Then, the tin diffusion-preventing layer 12 is formed of a tin-copper-based lead-free solder having a high copper content and having a noneutectic composition. The tin diffusion-preventing layer 12 is made of a material which is melted into a solid state at a heating temperature of 180°C or higher and 280°C or lower during reflow and which is then not remelted at the same heating temperature of 180°C or higher and 280°C or lower. Thus, even when the semiconductor device is a power supply IC or the like which deals with a high current, the presence of the tin diffusion-preventing layer 12 makes it possible to more inhibit the diffusion of the tin in the solder ball 13 into the wiring line 7 thereunder.

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  Some conventional semiconductor devices have solder balls provided on the lands of the uppermost layer wiring provided on the semiconductor substrate (see, for example, Patent Document 1). In this case, a plating film made of nickel or the like is provided on the upper surface of the land of the uppermost layer wiring made of copper in order to reduce contact resistance and promote the reactivity of the solder, and a solder ball is provided on the upper surface of the plating film. .

WO2003 / 012863

  By the way, although there is no description about the formation method of a plating film in the said patent document 1, other than the land of uppermost layer wiring is covered with an overcoat film, and it forms in the overcoat film in the part corresponding to the land of uppermost layer wiring. Since the plating film whose thickness is thinner than the thickness of the overcoat film is formed on the upper surface of the land of the uppermost wiring in the opening (see FIG. 7 of Patent Document 1), the plating film is formed by electroless plating. It seems to be.

  By the way, if tin in the solder balls diffuses to the inside of the uppermost layer wiring made of copper, a brittle alloy layer made of tin and copper is formed in the uppermost layer wiring or a void is generated, which may cause disconnection or the like. End up. Therefore, when a plating film made of nickel or the like is formed on the land upper surface of the uppermost layer wiring, the plating film functions as a tin diffusion suppressing layer.

  By the way, in a semiconductor device such as a power supply IC that handles a large current, the diffusion rate of tin in the solder ball into the uppermost layer wiring becomes very large due to the electromigration phenomenon. On the other hand, when the plating film is formed by electroless plating, the thickness of the plating film is relatively thin, even if it is thick, less than 5 μm because of the characteristics of electroless plating. Therefore, in a semiconductor device such as a power supply IC that handles a large current, there is a problem that even if a plating film by electroless plating is formed on the top surface of the land of the uppermost layer wiring, it cannot be said that the tin diffusion suppressing function is sufficient.

  In the above conventional semiconductor device, a flat and relatively thin plating film is formed on the upper surface of the land of the uppermost wiring having a flat upper surface, and the solder balls are formed on the upper surface of the plating film. With the relatively thin film, the stress applied to the solder ball is concentrated on the periphery of the joint with the plating film, and it cannot be said that the stress applied to the solder ball can be sufficiently relaxed by the plating film. is there.

  Therefore, the present invention can further suppress the diffusion of tin in the solder ball into the copper wiring thereunder, and can further reduce the stress applied to the solder ball, and a method for manufacturing the same The purpose is to provide.

According to a first aspect of the present invention, a semiconductor device includes: a semiconductor substrate; a wiring provided on the semiconductor substrate with an insulating film interposed therebetween; and a conductive paste provided on the wiring and heated at a predetermined temperature. And a tin diffusion suppressing layer which is not remelted at the predetermined temperature and a solder ball provided on the tin diffusion suppressing layer.
A semiconductor device according to a second aspect of the present invention is the overcoat film according to the first aspect, wherein the overcoat film is provided on the insulating film including the wiring and has an opening in a portion corresponding to the land of the wiring. It is characterized by comprising.
A semiconductor device according to a third aspect of the present invention is the semiconductor device according to the first aspect, wherein the predetermined temperature is 180 ° C. or higher and 280 ° C. or lower.
According to a fourth aspect of the present invention, there is provided the semiconductor device according to the first aspect, wherein the tin diffusion suppressing layer is made of a melting point raising type solder paste.
According to a fifth aspect of the present invention, in the semiconductor device according to the fourth aspect, the melting point raising type solder is made of a tin-copper-based lead-free solder having a non-eutectic composition with a high copper content. It is a feature.
A semiconductor device according to a sixth aspect of the present invention is the semiconductor device according to the first aspect, wherein the tin diffusion suppression layer is made of a copper paste.
A semiconductor device according to a seventh aspect of the present invention is the semiconductor device according to the sixth aspect, characterized in that the copper paste is made of copper particles dispersed in a thermosetting resin.
The semiconductor device according to an eighth aspect of the present invention is the semiconductor device according to the first aspect, wherein the solder ball is made of solder of a non-increasing melting point type.
According to a ninth aspect of the present invention, there is provided the semiconductor device according to the eighth aspect, wherein the non-increasing melting point type solder is a tin-silver-based lead-free solder having a eutectic composition. is there.
According to a tenth aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: heating a conductive paste at a predetermined temperature on the wiring on a semiconductor substrate having an insulating film on which the wiring is formed; A tin diffusion suppressing layer that does not remelt is formed, and solder balls are formed on the tin diffusion suppressing layer.
A method of manufacturing a semiconductor device according to an invention according to claim 11 is the overcoat according to the invention according to claim 10, wherein the insulating film including the wiring has an opening in a portion corresponding to a land of the wiring. A method of manufacturing a semiconductor device, wherein a film is formed.
According to a twelfth aspect of the present invention, in the semiconductor device manufacturing method according to the tenth aspect, the predetermined temperature is 180 ° C. or higher and 280 ° C. or lower.
According to a thirteenth aspect of the present invention, in the semiconductor device manufacturing method according to the tenth aspect of the present invention, the tin diffusion suppressing layer is formed by printing a metal paste to form a metal paste layer and heating. It is characterized by doing.
According to a fourteenth aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the thirteenth aspect of the present invention, wherein the metal paste is made of a melting point raising type solder paste.
According to a fifteenth aspect of the present invention, there is provided a semiconductor device manufacturing method according to the fifteenth aspect of the present invention, wherein the melting point raising type solder paste is a tin-copper-based lead-free solder having a non-eutectic composition with a high copper content. It is characterized by comprising a paste.
According to a sixteenth aspect of the present invention, in the semiconductor device manufacturing method according to the tenth aspect, the metal paste is made of a copper paste.
According to a seventeenth aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the sixteenth aspect of the invention, wherein the copper paste is made of copper particles dispersed in a thermosetting resin. It is.
According to an eighteenth aspect of the present invention, in the semiconductor device manufacturing method according to the tenth aspect of the present invention, the solder balls are formed of a non-increasing melting point type solder paste.
According to a nineteenth aspect of the present invention, in the semiconductor device manufacturing method according to the eighteenth aspect, the non-increasing melting point type solder paste is composed of a eutectic tin-silver-based lead-free solder paste. It is a feature.

  According to this invention, a tin diffusion suppression layer made of a conductive paste that does not remelt at the heating temperature at the time of formation is provided on the wiring, and the solder ball is provided on this tin diffusion suppression layer. It is possible to further suppress the diffusion of tin into the underlying wiring, and to further alleviate the stress applied to the solder balls.

The top view of the semiconductor device as one embodiment of this invention. Sectional drawing of the part which follows the II-II line of FIG. Sectional drawing of what was initially prepared in an example of the manufacturing method of the semiconductor device shown in FIG.1 and FIG.2. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. FIG. 9 is a cross-sectional view of the process following FIG. 8. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG.

  FIG. 1 is a plan view of a semiconductor device as an embodiment of the present invention, and FIG. This semiconductor device is generally called a CSP (chip size package) and includes a planar rectangular silicon substrate (semiconductor substrate) 1. On the upper surface of the silicon substrate 1, although not shown, elements constituting an integrated circuit having a predetermined function, for example, elements such as a transistor, a diode, a resistor, and a capacitor are formed. A plurality of connection pads 2 made of an aluminum-based metal or the like connected to each element of the integrated circuit are provided on the periphery of the upper surface of the silicon substrate 1.

  A passivation film (insulating film) 3 made of silicon oxide or the like is provided on the upper surface of the silicon substrate 1 excluding the peripheral portion of the silicon substrate 1 and the central portion of the connection pad 2, and the central portion of the connection pad 2 is provided on the passivation film 3. The exposed opening 4 is exposed. A protective film (insulating film) 5 made of polyimide resin or the like is provided on the upper surface of the passivation film 3. An opening 6 is provided in the protective film 5 in a portion corresponding to the opening 4 of the passivation film 3.

  A plurality of wirings 7 are provided on the upper surface of the protective film 5. The wiring 7 has a two-layer structure of a base metal layer 8 made of copper or the like provided on the upper surface of the protective film 5 and an upper metal layer 9 made of copper provided on the upper surface of the base metal layer 8. One end of the wiring 7 is connected to the connection pad 2 via the openings 4 and 6 of the passivation film 3 and the protective film 5. Here, as shown in FIG. 1, the wiring 7 is composed of an end 7 a connected to the connection pad 2, a planar circular land 7 b, and a lead line portion 7 c therebetween. The land 7 b of the wiring 7 is arranged in a matrix on the upper surface of the protective film 5.

An overcoat film 10 made of polyimide resin, solder resist or the like is provided on the upper surface of the peripheral portion of the silicon substrate 1 and the upper surface of the protective film 5 including the wiring 7 at portions other than the land of the wiring 7. In this state, a planar circular opening 11 is provided in the overcoat film 10 in a portion corresponding to the land of the wiring 7.

A planar circular dome-shaped tin diffusion suppression layer 12 is provided on the upper surface of the land 7 b of the wiring 7 in the opening 11 of the overcoat film 10. The tin diffusion suppressing layer 12 is formed of a melting point raising type solder that does not remelt at the same heating temperature of 180 ° C. or higher and 280 ° C. or lower after being melted and solidified at a heating temperature of 180 ° C. or higher and 280 ° C. or lower during reflow described later. Specifically, it is formed of a tin-copper lead-free solder having a non-eutectic composition with a high copper content.

Solder balls 13 are provided on the upper surface of the tin diffusion suppressing layer 12. The solder ball 13 is formed of non-increasing melting point solder which is melted and solidified at a heating temperature of 180 ° C. or higher and 280 ° C. or lower during reflow, which will be described later, and then remelted at the same heating temperature of 180 ° C. or higher and 280 ° C. or lower. Are formed of tin-silver-based lead-free solder having a eutectic composition.

  Next, an example of a method for manufacturing this semiconductor device will be described. First, as shown in FIG. 3, a plurality of connection pads 2 made of an aluminum-based metal, a passivation film 3 made of silicon oxide, etc., a polyimide resin, etc. on the upper surface of a silicon substrate (hereinafter referred to as a semiconductor wafer 21) in a wafer state. A protective film 5 is formed, and the connection pad 2 is exposed through the passivation film 3 and the openings 4 and 6 of the protective film 5.

  In this case, the semiconductor wafer 21 is thicker than the silicon substrate 1 shown in FIG. In FIG. 3, the area indicated by reference numeral 22 is a dicing street. Then, the passivation film 3 and the protective film 5 in the portions corresponding to the dicing street 22 and both sides thereof are removed.

  Next, as shown in FIG. 4, it corresponds to the upper surface of the protective film 5 including the upper surface of the connection pad 2 exposed through the openings 4 and 6 of the passivation film 3 and the protective film 5, and the dicing street 22 and both sides thereof. A base metal layer 8 is formed on the upper surface of the semiconductor wafer 21 at the portion to be formed. In this case, the base metal layer 8 may be only a copper layer formed by electroless plating, or may be only a copper layer formed by sputtering, and a thin film such as titanium formed by sputtering. A copper layer may be formed on the layer by sputtering.

  Next, a plating resist film 23 made of a positive liquid resist is patterned on the upper surface of the base metal layer 8. In this case, an opening 24 is formed in the plating resist film 23 in a portion corresponding to the upper metal layer 9 formation region. Next, when copper is electroplated using the base metal layer 8 as a plating current path, the upper metal layer 9 is formed on the upper surface of the base metal layer 8 in the opening 24 of the plating resist film 23.

  Next, the plating resist film 23 is peeled off, and then the base metal layer 8 in the region other than the region under the upper metal layer 9 is removed by etching using the upper metal layer 9 as a mask. As shown in FIG. The underlying metal layer 8 remains only under the layer 9. In this state, the upper metal layer 9 and the underlying metal layer 8 remaining below the upper metal layer 9 form a two-layer wiring 7.

  Next, as shown in FIG. 6, polyimide resin, solder resist, etc. are formed on the upper surface of the dicing street 22 and the upper surface of the semiconductor wafer 21 on both sides and the upper surface of the protective film 5 including the wiring 7 by spin coating, printing, or the like. An overcoat film 10 made of is formed. Next, a planar circular opening 11 is formed in the overcoat film 10 in a portion corresponding to the land of the wiring 7 by laser processing or photolithography that irradiates a laser beam.

  Next, as shown in FIG. 7, a solder paste printing mask 25 is disposed on the overcoat film 10. In this case, an opening 26 is formed in the solder paste print mask 25 in a portion corresponding to the opening 11 of the overcoat film 10. Next, the solder paste 12a is printed on the land upper surface of the wiring 7 in the openings 26 and 11 of the overcoat film 10 by a screen printing method in which the squeegee 27 is moved on the solder paste print mask 25. Then, the solder paste layer 12b is formed.

  In this case, the solder paste 12a is formed by a melting point raising type solder which is melted and solidified at a heating temperature of 180 ° C. or higher and 280 ° C. or lower during reflow, which will be described later, and does not remelt at the same heating temperature of 180 ° C. or higher and 280 ° C. or lower. Specifically, it consists of a tin-copper-based lead-free solder having a non-eutectic composition with a high copper content, and more specifically, tin particles and copper particles having a particle size of about 15 μm are dispersed in the flux to form a paste. It consists of solder paste.

Next, as shown in FIG. 8, when reflow is performed at a heating temperature of 180 ° C. or higher and 280 ° C. or lower, tin diffusion suppression in a flat circular shape on the land upper surface of the wiring 7 in the opening 11 of the overcoat film 10 is suppressed. Layer 12 is formed. In this case, the flux in the solder paste layer 12b evaporates, only the tin particles in the solder paste layer 12b melt, and the copper particles having a high melting point do not melt. Then, the copper particles react with the molten tin, and a copper tin alloy (Cu ₆ Sn ₅ ) is generated. As a result, the tin diffusion suppressing layer 12 is a mixture of a copper tin alloy, tin and copper, and will not be remelted even if heated at a heating temperature of 180 ° C. or higher and 280 ° C. or lower.

  Here, as an example, the thickness of the wiring 7 is about 5 μm. The thickness of the overcoat film 10 on the wiring 7 is 5 to 10 μm. The maximum height of the tin diffusion suppressing layer 12 can be made considerably higher than the thickness of the plating film formed by electroless plating, less than 5 μm, and is about 50 μm.

  Next, as shown in FIG. 9, a flux 28 is printed on the tin diffusion suppression layer 12 and the overcoat film 10 around it by a screen printing method, and a solder ball 13a is mounted thereon. In this case, the solder balls 13a are formed by non-increasing melting point solder that is melted and solidified at a heating temperature of 180 ° C. or higher and 280 ° C. or lower during reflow, which will be described later, and then remelted at the same heating temperature of 180 ° C. or higher and 280 ° C. or lower. Specifically, it is formed of tin-silver-based lead-free solder having a eutectic composition. Next, when reflow is performed at a heating temperature of 180 ° C. or higher and 280 ° C. or lower, the flux 28 evaporates, and the solder balls 13a are melted and then solidified. As shown in FIG. Solder balls 13 are formed on the surface.

  In this case, the tin diffusion suppressing layer 12 does not remelt at a heating temperature of 180 ° C. or higher and 280 ° C. or lower during reflow for forming the solder ball 13 and maintains the dome-shaped state as it is. The solder balls 13 may be formed by first printing a solder paste on the tin diffusion suppressing layer 12 by a screen printing method and then reflowing at a heating temperature of 180 ° C. or higher and 280 ° C. or lower.

  Next, as shown in FIG. 11, the lower surface side of the semiconductor wafer 21 is appropriately ground to reduce the thickness of the semiconductor wafer 21. Next, as shown in FIG. 12, when the overcoat film 10 and the semiconductor wafer 21 are cut along the dicing street 22, a plurality of semiconductor devices shown in FIGS. 1 and 2 are obtained.

In the semiconductor device thus obtained, the tin diffusion suppression layer 12 is formed on the land of the wiring 7 and the solder ball 13 is formed on the tin diffusion suppression layer 12. Even in a power supply IC or the like that handles, the presence of the tin diffusion suppression layer 12 can further suppress the diffusion of tin in the solder balls 13 to the wiring 7 underneath.

Further, in this semiconductor device, the maximum height of the dome-shaped tin diffusion suppressing layer 12 can be considerably higher than the thickness of the plating film formed by electroless plating, for example, about 50 μm. As a result, since the maximum height of the tin diffusion suppression layer 12 can be made relatively high in combination with the dome shape, the stress applied to the solder ball 13 is increased in the height direction of the tin diffusion suppression layer 12. Dispersed and the stress applied to the solder ball can be further relaxed.

Further, in the method of manufacturing a semiconductor device, when forming the dome-shaped tin diffusion suppressing layer 12, the solder paste 12a is printed on the land of the wiring 7 by the screen printing method and reflow is performed. The process cost can be reduced as compared with the case where the electroplating is used.

  In addition, although the said embodiment demonstrated the case where the tin diffusion suppression layer 12 was formed with a melting point rise type solder paste, it is not limited to this. The material for the tin diffusion suppressing layer 12 may be a metal paste that does not remelt at the heating temperature at the time of formation. For example, a copper paste in which copper particles are dispersed in a paste made of a thermosetting resin or the like is screen-printed. You may make it form a tin diffusion suppression layer by printing by the method and baking by about 150 degreeC of heating temperature.

1 Silicon substrate (semiconductor substrate)
2 Connection pad 3 Passivation film (insulating film)
5 Protective film (insulating film)
7 Wiring 10 Overcoat film 12 Tin diffusion suppressing layer 13 Solder ball 21 Semiconductor wafer 22 Dicing street

Claims (19)

A semiconductor substrate;
Wiring provided on the semiconductor substrate via an insulating film;
A tin diffusion suppression layer provided on the wiring, formed by heating a conductive paste at a predetermined temperature, and not remelted at the predetermined temperature;
Solder balls provided on the tin diffusion suppressing layer;
A semiconductor device comprising: 2. The semiconductor device according to claim 1, further comprising an overcoat film provided on the insulating film including the wiring and having an opening at a portion corresponding to a land of the wiring. The semiconductor device according to claim 1, wherein the predetermined temperature is 180 ° C. or higher and 280 ° C. or lower. 2. The semiconductor device according to claim 1, wherein the tin diffusion suppressing layer is made of a melting point raising type solder paste. 5. The semiconductor device according to claim 4, wherein the melting point raising type solder is made of a tin-copper-based lead-free solder having a non-eutectic composition with a high copper content. 2. The semiconductor device according to claim 1, wherein the tin diffusion suppressing layer is made of a copper paste. 7. The semiconductor device according to claim 6, wherein the copper paste is made of copper particles dispersed in a thermosetting resin. 2. The semiconductor device according to claim 1, wherein the solder ball is made of a non-increasing melting point type solder. 9. The semiconductor device according to claim 8, wherein the non-melting point-increasing type solder comprises a tin-silver-based lead-free solder having a eutectic composition. On the wiring on the semiconductor substrate having the insulating film on which the wiring is formed,
Conductive paste heating at a predetermined temperature to form a tin diffusion suppression layer that does not remelt at the predetermined temperature,
A method of manufacturing a semiconductor device, comprising forming solder balls on the tin diffusion suppressing layer. 11. The method of manufacturing a semiconductor device according to claim 10, wherein an overcoat film having an opening at a portion corresponding to a land of the wiring is formed on the insulating film including the wiring. 11. The method of manufacturing a semiconductor device according to claim 10, wherein the predetermined temperature is 180 ° C. or higher and 280 ° C. or lower. 11. The method of manufacturing a semiconductor device according to claim 10, wherein the tin diffusion suppressing layer is formed by printing a metal paste to form a metal paste layer and heating. 14. The method of manufacturing a semiconductor device according to claim 13, wherein the metal paste is a melting point raising type solder paste. 15. The method of manufacturing a semiconductor device according to claim 14, wherein the melting point raising type solder paste comprises a tin-copper-based lead-free solder paste having a non-eutectic composition with a high copper content. 11. The method of manufacturing a semiconductor device according to claim 10, wherein the metal paste is made of a copper paste. 17. The method of manufacturing a semiconductor device according to claim 16, wherein the copper paste is made of copper particles dispersed in a thermosetting resin. 11. The method of manufacturing a semiconductor device according to claim 10, wherein the solder ball is formed of a non-increasing melting point solder paste. 19. The method of manufacturing a semiconductor device according to claim 18, wherein the non-increasing melting point type solder paste is composed of a eutectic tin-silver-based lead-free solder paste.

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