JP2002211680A - Semiconductor storing member - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent semiconductors from moving in embossed parts provided in a semiconductor storing member which stores the semiconductors in the embossed parts of a carrier tape and in which a cover tape is stuck on the surface of the carrier tape. SOLUTION: Embossed parts 14 dented in a recessed shape, in which semiconductors 2 are stored, are provided in a carrier tape 13. The depth of each embossed part 14 is made deep so that an upper face of each semiconductor 2 stored in the embossed part 14 does not protrude therefrom. A portion between the adjoining embossed parts 14 is connected by grooves 15. The depth of each groove 15 is made lower than the upper face of the semiconductor 2 stored in the embossed part 14. Ribs 17 which abut against the upper face of the semiconductor 2 stored in each embossed part 14 to press the upper face thereof and which enter the grooves 15 between the adjoining embossed parts 14 are provided on a rear face of a cover tape 16 to be stuck on the surface of the carrier tape 13. On the surface of the cover tape 16, a groove 18 extending along the direction in which the cover tape 16 extends is provided at a substantially central portion of the cover tape 16 in the width direction thereof.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a carrier tape provided with a concavely concave embossed portion for accommodating a semiconductor,
A cover tape that is attached to the surface of the carrier tape to cover the opening of the embossed portion. Specifically, a convex portion is provided on the back surface of the cover tape, and the upper surface of the semiconductor housed in the embossed portion is pressed by the convex portion, thereby preventing the semiconductor from moving in the embossed portion, and preventing bending of the packaged semiconductor terminal. This is a semiconductor storage device that prevents damage and the like.

[0002]

2. Description of the Related Art FIG. 7 is an explanatory view showing a conventional semiconductor storage device. FIG. 7 (a) is a plan view showing a conventional semiconductor storage device, and FIG. 7 (b) is a semiconductor storage device shown in FIG. FIG. 7 (c) is a cross-sectional view of the semiconductor storage device shown in FIG. 7 (a) cut in the direction in which the carrier tape extends.

In FIG. 7, a carrier tape 1 is a continuous and elongated tape, and has an embossed portion 3 for accommodating a semiconductor 2. Here, the semiconductor 2 is a surface-mounted integrated circuit (IC) having leads, for example, a flat package in which the leads 2a are gull-wing type.

The embossed portions 3 are arranged in a line along the direction in which the carrier tape 1 extends, and a plurality of embossed portions 3 are provided at predetermined intervals, and a plurality of semiconductors 2 are individually stored in one carrier tape 1. It is possible. In the embossed portion 3, the semiconductor 2 is stored with its lead 2a facing downward. A convex portion 3a on which the package 2b of the semiconductor 2 is mounted is formed on the bottom surface of the embossed portion 3. The leads 2a of the semiconductor 2 are inserted on both sides of the convex portion 3a in the direction in which the carrier tape 1 extends. A concave portion 3b recessed from the convex portion 3 is formed.
Further, a hole 3c for detecting the presence or absence of the semiconductor 2 is formed in the convex portion 3a.

The depth from the surface of the carrier tape 1 to the convex portion 3a of the embossed portion 3 is made larger than the thickness of the package 2b of the semiconductor 2 by a predetermined amount.
The upper surface of b has a depth that does not protrude from the opening of the embossed portion 3.

[0006] The carrier tape 1 is provided with a sprocket 1a for transporting the carrier tape 1. The sprocket 1a is provided at one end in the width direction along the direction in which the carrier tape 1 extends.

[0007] The cover tape 4 is attached to the surface of the carrier tape 1 to cover the opening of the embossed portion 3, and is an elongated continuous tape like the carrier tape 1. The cover tape 4 is a flat tape on both the front surface and the back surface, and is attached by thermocompression bonding to the front surface of the carrier tape 1 in which the semiconductor 2 is housed in the embossed portion 3.

The carrier tape 1 and the cover tape 4 are attached to each other in the attaching range 5,
The pasting range 5 is on both sides in the width direction of the cover tape 4. FIG. 8 is an explanatory view showing an example of a taping facility for storing semiconductors in a carrier tape, pasting a cover tape, and packing.

An empty carrier tape 1 is wound on the first payout reel 6. While the first payout reel 6 rotates in the direction of arrow a, the empty carrier tape 1 is paid out and fed to the supply stage 7 by cooperation of rollers and the like. On the upper side of the supply stage 7,
A supply nozzle 8 for supplying the semiconductor 2 is provided.
The supply nozzle 8 catches the semiconductor 2 placed on a supply table (not shown), moves onto the supply stage 7, and stores the semiconductor 2 caught in the embossed portion 3 of the empty carrier tape 1. There is a mechanism for performing an operation of returning to the supply table.

The supply stage 7 is provided with a reflection sensor 9 for detecting whether or not the semiconductor 2 has been stored in the carrier tape 1. The reflection sensor 9 is provided below the supply stage 7 and irradiates light to a hole 3c of the carrier tape 1 at a predetermined position on the supply stage 7 and determines whether or not the reflected light is present. Then, it is detected whether or not the semiconductor 2 is stored in the semiconductor device 3.

An acryl guide 7a for covering the carrier tape 1 is provided on the supply stage 7, and the semiconductor 2 is accommodated by the supply nozzle 8 so that when the carrier tape 1 is transported before the cover tape 4 is attached, the semiconductor tape 2 Prevent jumping out.

A cover tape 4 is wound around the second reel 10. This second payout reel 10
While rotating in the direction of arrow b, by the cooperation of the roller group,
The cover tape 4 is fed out and fed by the supply nozzle 8 onto the carrier tape 1 in which the semiconductor 2 is stored.

After the cover tape 4 is placed on the carrier tape 1 in which the semiconductor 2 is accommodated, a thermocompression iron 11 thermocompresses the carrier tape 1 and the cover tape 4 in the area 5 to which the cover tape 4 is to be attached. The thermocompression iron 11 attaches the cover tape 4 to the carrier tape 1 by thermocompression. After the cover tape 4 fed from the second feed reel 10 is placed on the carrier tape 1 fed from the first feed reel 6 and containing the semiconductor 2 by the supply nozzle 8, the thermocompression iron 11 Then, the carrier tape 1 and the cover tape 4 are thermocompression-bonded to the carrier tape 1 and the cover tape 4 in the bonding area 5 shown in FIG.

The carrier tape 1 in which the semiconductor 2 is stored and the cover tape 4 is adhered is wound on a take-up reel 12 rotating in the direction of arrow c. Is stored in an aluminum laminate bag, and is packed in an inner box and then an outer box in the final shipping mode.

[0015]

FIG. 9 is an explanatory view showing a conventional problem, and FIG. 9 is a sectional view of a carrier tape cut in a direction in which the carrier tape extends. In the conventional semiconductor storage device, since there is a gap between the upper surface of the package 2b of the semiconductor 2 stored in the embossed portion 3 of the carrier tape 1 and the back surface of the cover tape 4, the carrier tape in which the semiconductor is packed is packed in a packing box. When the semiconductor 2 is transported, the semiconductor 2 moves within the embossed portion 3 due to vibration or impact at the time of transport or drop. As shown in FIG. 9, when the lead shape of the semiconductor 2 to be housed is a gull-wing type, there is a problem that the lead 2a comes into contact with the wall surface of the embossed portion 3 and deformation of the lead 2a occurs.

FIG. 10 is an explanatory view showing a conventional problem when the semiconductors to be housed are different in shape. The semiconductor 2 to be housed is a leadless ball grid array (Ball G).
(Rad Array).

When the semiconductor 2 to be stored is a leadless ball grid array, the embossed portion 3 of the carrier tape 1 has a flat bottom surface. Even in the case of a conventional semiconductor storage device in which the lead shape is a ball array, there is a gap between the package 2b of the semiconductor 2 stored in the embossed portion 3 of the carrier tape 1 and the back surface of the cover tape 4, and vibration during transportation or dropping Alternatively, there is a problem that the semiconductor moves in the direction of arrow d in the embossed portion 3 due to the impact, whereby the ball 2c rubs against the bottom surface of the embossed portion 3 and the ball 2c falls off.

As the leadless semiconductor, LGA (Land Grid Array), QFN
(Quad Flat Non-leaded Pac
kage), but in the above-described conventional semiconductor storage device, since there is a gap between the semiconductor and the cover tape, the semiconductor storage device is transported or dropped due to vibration or impact.
The semiconductor moves in the embossed portion 3, and as a result,
There is a problem that the land portion rubs against the bottom surface of the embossed portion 3 and the land portion is scratched or a foreign substance adheres. For this reason, in the past, in order to prevent damage to the semiconductor in the carrier tape, the carrier box of the carrier tape in which the semiconductor was packed was handled as having a high shock absorbing capacity, but the cost of the packing box was increased. was there.

FIG. 11 is an explanatory view showing another conventional problem. FIG. 11 (a) is a cross-sectional view of a carrier tape cut in the width direction, and FIG. 11 (b) is a state shown in FIG. 11 (a). FIG.

The carrier tape 1 in which the semiconductor tape 2 is accommodated in the embossed portion 3 and the cover tape 4 is adhered is wound on a take-up reel 12 as shown in FIG. The take-up reel 12 has a structure in which collars are provided at both ends of a cylindrical take-up portion. However, the take-up reel 12 may be deformed and the interval between the collars may be reduced. When the interval between the flanges of the take-up reel 12 is reduced, the carrier tape 1 wound on the take-up reel 12 is as shown in FIG.
As shown in the figure, the pressing force in the direction of the arrow e causes the embossed portion 3 to be deformed in the width direction in a bow shape in the protruding direction. At this time, since the cover tape 4 is deformed like a mountain in the width direction, the distance between the carrier tape 1 and the cover tape 4 is increased. The carrier tape 1 is provided with a plurality of embossed portions 3. When the space between the back surface of the cover tape 4 and the portion between the adjacent embossed portions 3 of the carrier tape 1 exceeds the package thickness of the semiconductor 2, FIG.
As shown in FIG. 1B, there is a problem that the semiconductor 2 jumps out between the adjacent embossed portions 3 to cause a storage abnormality.

According to the present invention, in a conventional semiconductor storage device, the semiconductor packaged therein is moved by a force applied from the outside during transportation, causing damage to the semiconductor or abnormal storage of the semiconductor due to deformation of the carrier tape. The object of the present invention is to provide a semiconductor storage device in which a semiconductor does not move even when subjected to external force and a semiconductor storage abnormality does not occur even if a carrier tape is deformed. Aim.

[0022]

SUMMARY OF THE INVENTION A semiconductor container according to the present invention is provided with a recessed embossed portion for accommodating a semiconductor, and the depth of the embossed portion corresponds to the upper surface of the semiconductor accommodated in the embossed portion. A semiconductor storage device comprising: a carrier tape having a depth that does not protrude from a tape surface; and a cover tape that is attached to the surface of the carrier tape and covers an opening of the embossed portion. A protruding portion which protrudes in a direction in which the embossed portion is depressed and has a height which comes into contact with the upper surface of the semiconductor housed in the embossed portion when the cover tape is attached to the carrier tape.

In the present invention, the semiconductor is accommodated in the embossed portion of the carrier tape, and the cover tape is attached to the surface of the carrier tape accommodating the semiconductor. On the back surface of the cover tape, when the cover tape was attached to the carrier tape, a convex portion having a height contacting the upper surface of the semiconductor housed in the embossed portion was provided. It is held down by this projection. Thus, the semiconductor housed in the embossed portion does not move in the embossed portion even when an external impact or the like is applied.

Further, the semiconductor storage device according to the present invention is provided with a concavely recessed embossed portion for storing the semiconductor, and the depth of the embossed portion is such that the upper surface of the semiconductor stored in the embossed portion protrudes from the tape surface. A semiconductor tape comprising a carrier tape having a non-depth and a cover tape that is attached to the surface of the carrier tape and covers the opening of the embossed portion, in the width direction of the surface of the cover tape. Is provided with a groove substantially in the center along the direction in which the cover tape extends.

In the present invention, the semiconductor is stored in the embossed portion of the carrier tape, and the cover tape is attached to the surface of the carrier tape in which the semiconductor is stored. On the surface of the cover tape, a groove is provided substantially in the center in the width direction along the direction in which the cover tape extends. When a pressing force is applied from both sides and the carrier tape is deformed in an arcuate shape in a direction in which the embossed portion protrudes in the width direction, the cover tape becomes a valley-folded state in the width direction due to the collapse of the groove. Thereby, no gap is opened between the semiconductor accommodated in the embossed portion of the carrier tape and the cover tape, and the semiconductor is prevented from jumping out of the embossed portion.

[0026]

FIG. 1 is an explanatory view showing an example of an embodiment of a semiconductor storage device of the present invention. FIG. 1 (a) is a plan view showing the semiconductor storage device of this embodiment, and FIG. 1 (b). Figure 1 (a)
Is a cross-sectional view of the semiconductor storage device shown in FIG. 1 cut in the width direction of the carrier tape, and FIG. 1C is a cross-sectional view of the semiconductor storage device shown in FIG. 1A cut in the direction in which the carrier tape extends.

In FIG. 1, a carrier tape 13 stores the semiconductor 2. In the present embodiment,
The semiconductor 2 is a surface mount type integrated circuit (I
In C), for example, a flat package in which the lead 2a is a gull wing type will be described.

The carrier tape 13 is a continuous elongated tape, and is made by, for example, heating and molding polystyrene or the like. The carrier tape 13 has an embossed portion 14 that is concavely recessed for housing the semiconductor 2.

FIG. 2 is an explanatory view showing the carrier tape of this embodiment. FIG. 2 (a) is a plan view of the carrier tape of this embodiment, and FIG. 2 (b) is a view of the carrier tape of FIG. 2 (a). It is AA sectional drawing. As shown in FIG. 2A, a plurality of embossed portions 14 are arranged in a line along a direction in which the carrier tape 13 extends, and a plurality of embossed portions 14 are provided at predetermined intervals. Semiconductors 2 can be individually stored.

As shown in FIG. 1, the embossed portion 14 stores the semiconductor 2 with its lead 2a facing downward. On the bottom surface of the embossed portion 14, a convex portion 14a on which the package 2b of the semiconductor 2 is placed is formed. The leads 2a of the semiconductor 2 are inserted on both sides of the convex portion 14a in the direction in which the carrier tape 13 extends. Concave portion 1 recessed from convex portion 14a
4b is formed. Further, the protrusion 14a has
As shown in (a), a hole 14c for detecting the presence or absence of the semiconductor 2 is formed.

The depth from the surface of the carrier tape 13 to the convex portion 14a of the embossed portion 14 is made larger than the thickness of the package 2b of the semiconductor 2 by a predetermined amount, and the upper surface of the package 2b is It does not project from the depth.

A groove 15 is provided between adjacent embossed portions 14.
Is provided. This groove 15 is formed on the carrier tape 13.
Embossed portions 14 extending along the direction in which
Between them. The depth from the surface of the carrier tape 13 to the bottom surface of the groove 15 is such that when the semiconductor 2 is stored in the embossed portion 14, the bottom surface of the groove 15 is lower than the upper surface of the package 2 b of the semiconductor 2 by a predetermined amount. And

The carrier tape 13 is provided with a sprocket 13a for transporting the carrier tape 13. The sprocket 13a is provided on one end side in the width direction along the direction in which the carrier tape 13 extends. A cover tape 16 for covering the opening of the embossed portion 14 is attached to the surface of the carrier tape 13.

On the back surface of the cover tape 16, that is, on the side facing the embossed portion 14 when the cover tape 16 is attached to the carrier tape 13, the embossed portion 14 is provided.
A convex rib portion 17 having a quadrangular cross-sectional shape is provided as a convex portion protruding in the concave direction.

FIG. 3 is an explanatory view showing the cover tape of this embodiment. FIG. 3 (a) is a plan view of the cover tape of this embodiment, and FIG. 3 (b) is a view of the cover tape of FIG. 3 (a). B-
It is B sectional drawing.

The cover tape 16 is a continuous and elongated tape, which is formed by heating and molding polyethylene terephthalate, for example, and is a transparent or translucent member. Two ribs 17 are provided in parallel along the direction in which the cover tape 16 extends.

The interval between the two ribs 17 is smaller than the width of the groove 15 of the carrier tape 13 so that the rib 17 is
To enter. The height of the rib portion 17 is equal to the height obtained by subtracting the thickness of the package 2b of the semiconductor 2 from the depth from the surface of the carrier tape 13 to the convex portion 14a of the embossed portion 14, that is, the cover tape 16 When attached to the tape 13, the rib 17 is brought into contact with the upper surface of the package 2 b of the semiconductor 2 housed in the embossed portion 14 so that the rib 17 can be pressed down.

The adjacent embossed portions 1 of the carrier tape 13
4, a groove 15 is provided. When the semiconductor 2 is housed in the embossed portion 14 as described above, the depth of the groove 15 is smaller than that of the upper surface of the package 2 b of the semiconductor 2. Since the bottom surface has a lower depth, when the cover tape 16 is attached to the carrier tape 13,
The rib 17 of the cover tape 16 abuts against the bottom surface of the groove 15 and the cover tape 16 does not lift. Further, the interval between the two rib portions 17 is determined so that both the rib portions 17 can push the upper surface of the package 2b of the semiconductor 2, so that the width of the groove 15 into which the rib portion 17 enters is equal to the embossed portion. It is narrower than 14.

The surface of the cover tape 16 is provided with a groove 18 having a V-shaped cross section substantially at the center in the width direction. One groove 18 is provided along the direction in which the cover tape 16 extends. When the cover tape 16 is attached to the carrier tape 13, the groove 18 is formed in the embossed portion 14.
Pass substantially on the center line of the semiconductor 2 housed in the semiconductor device.

In the attachment area 19 shown in FIG. 1, the carrier tape 13 and the cover tape 16 are attached. The bonding between the carrier tape 13 and the cover tape 16 is performed by thermocompression bonding, and the bonding range 19
Are the both sides in the width direction of the cover tape 13.

The above-described carrier tape 13 of the present embodiment
Using the cover tape 16 and the taping equipment shown in FIG. 8, the semiconductor 2 is packed. In the following description, the packing operation of the semiconductor 2 in the present embodiment will be described by replacing the carrier tape 1 with the carrier tape 13 of the present embodiment and the cover tape 4 with the cover tape 16 of the present embodiment in FIG. Is what you do.

In FIG. 8, the empty carrier tape 13 shown in FIG. 2 is wound around the first payout reel 6. An empty carrier tape 13 is fed out from the first payout reel 6 by cooperation of a roller group and the like, and is sent to the supply stage 7.

A supply nozzle 8 for supplying the semiconductor 2 is provided above the supply stage 7. The empty embossed portion 1 of the carrier tape 13 sent to the supply stage 7 is provided.
4, the semiconductor 2 is stored by the supply nozzle 8.

The supply stage 7 includes a carrier tape 13
2 is provided with a reflection sensor 9 for detecting whether or not the semiconductor 2 is stored in the embossed portion 14 of the carrier tape 13 at a predetermined position on the supply stage 7 as shown in FIG.
To the carrier tape 13 based on the presence or absence of the reflected light.
It is detected whether or not the semiconductor 2 is stored in the embossed portion 14.

A cover tape 16 shown in FIG. 3 is wound around the second payout reel 10. The cover tape 16 is paid out from the second payout reel 10 by the cooperation of the roller group, and is fed by the supply nozzle 8 onto the carrier tape 13 containing the semiconductor 2.

Carrier tape 13 containing semiconductor 2
After the cover tape 16 is placed thereon, the carrier tape 13 and the bonding area 19 of the cover tape 16 shown in FIG. 1 are thermocompression-bonded with the thermocompression iron 11, and the cover tape 16 is adhered to the carrier tape 13. Then, the carrier tape 13 in which the semiconductor 2 is stored and the cover tape 16 is stuck is taken up on the take-up reel 12. In addition,
The carrier tape 13 containing the semiconductor 2 wound on the take-up reel 12 is housed in an aluminum laminate bag, packed in an inner box, and then in an outer box, in a final shipping form.

In the above-described packing operation, the carrier tape 13 in which the semiconductor 2 is stored in the embossed portion 14 and the semiconductor tape 2 is packed by attaching the cover tape 16 by thermocompression bonding is shown in FIG.
The state shown in FIG.

On the back surface of the cover tape 16, a rib portion 17 is provided.
The height of the rib 17 is such that when the cover tape 16 is attached to the carrier tape 13, the rib 17 comes into contact with the upper surface of the package 2 b of the semiconductor 2 housed in the embossed portion 14. The semiconductor 2 is fixed between the ribs 17 of the cover tape 16 and the protrusions 14 a of the embossed portion 14 because the height is set to hold the semiconductor 2.
As a result, the semiconductor 2 packaged in the carrier tape 13 as shown in FIG. 1 does not move inside the embossed portion 14 even if vibration or impact is applied during transportation or dropping, and the lead 2a is moved to the embossed portion 14. Touching the wall of
It is possible to prevent the lead 2a from being deformed poorly.

FIG. 4 is an explanatory view showing a state in which the carrier tape in this embodiment is deformed. FIG. 4 is a cross-sectional view of the carrier tape 13 in which the semiconductor 2 is packed, in the width direction. The carrier tape 13 in which the semiconductor 2 is packed by storing the semiconductor 2 in the embossed portion 14 and pasting the cover tape 16 is wound on the take-up reel 12 as shown in FIG.
May be deformed, and the spacing between the collars may be reduced. When the spacing between the flanges of the take-up reel 12 is reduced, the carrier tape 13 wound by the take-up reel 12 receives a pressing force in the direction of arrow e as shown in FIG. Deforms into a bow in the direction in which it protrudes.

The cover tape 16 is provided with a groove 18 having a V-shaped cross section on the surface side so as to pass substantially along the center line of the semiconductor 2 along the direction in which the cover tape 16 extends.
The carrier tape 13 has an embossed portion 1 in its width direction.
When the cover tape 16 is deformed in the protruding direction, the force concentrates on the groove 18 in the cover tape 16 and the V-shape is collapsed.
The valley is folded in the width direction. When the groove 18 is provided on the surface of the cover tape 16 as described above, when the carrier tape 13 is deformed in the width direction in the direction in which the embossed portion 14 protrudes, the cover tape 16 always has a gap with the semiconductor 2. Deforms in the direction that does not open.

The rib 17 is provided on the back surface of the cover tape 16, and the rib 17 presses the upper surface of the package 2b of the semiconductor 2 as described above.
The carrier tape 13 has an embossed portion 1 in its width direction.
Even when the semiconductor 2 is deformed in the direction in which the
To prevent the semiconductor 2 from jumping out of the embossed portion 14.

In the above description of the present embodiment, the semiconductor 2
Although the shape of the lead 2a is a gull-wing type as an example, the present invention is applied to a leadless ball grid array (Ball Grid).
Array (hereinafter referred to as BGA) type semiconductor storage device. FIG. 5 is an explanatory view showing an embodiment in which the object to be packed is a BGA type semiconductor. FIG. 5 is a cross-sectional view of a carrier tape in which the semiconductor is packed in the width direction. FIG. FIG. 5B is a cross-sectional view showing a normal packing state of a grid array type semiconductor, and FIG. 5B is a cross-sectional view showing a state where the carrier tape is deformed.

In the embodiment shown in FIG. 5, the embossed portion 20 provided on the carrier tape 13 has a flat bottom surface 20a. The semiconductor 21 accommodated in the embossed portion 20 is of a ball grid array type, has a ball 21b as a lead on the lower surface of the package 21a, and accommodates the semiconductor 21 in the embossed portion 20 with the ball 21b facing downward.

As in the embodiment shown in FIG. 2, a plurality of embossed portions 20 are arranged in a line along the direction in which the carrier tape 13 extends, and a plurality of embossed portions are provided at predetermined intervals. Is formed with a hole 20b for detecting the presence or absence of the semiconductor 2.

Then, the depth from the surface of the carrier tape 13 to the bottom surface 20a of the embossed portion 20 is made a predetermined amount deeper than the sum of the thickness of the package 21a of the semiconductor 21 and the height of the ball 21b. The depth is such that the upper surface does not protrude from the opening of the embossed portion 20.

A groove 15 is provided between the adjacent embossed portions 20 as in the embodiment shown in FIG. The groove 15 extends along the direction in which the carrier tape 13 extends, and connects the adjacent embossed portions 20. The depth from the surface of the carrier tape 13 to the bottom of the groove 15 is determined when the semiconductor 21 is stored in the embossed portion 20.
The depth of the bottom surface of the groove 15 is lower than the upper surface of the package 21a of the semiconductor 21 by a predetermined amount.

A cover tape 16 for covering the embossed portion 20 is attached to the surface of the carrier tape 13. On the back surface of the cover tape 16, that is, on the side opposite to the embossed portion 20 when the cover tape 16 is attached to the carrier tape 12, a convex portion protruding in the direction in which the embossed portion 20 is depressed has a cross-sectional shape. Is provided with a convex rib portion 17 having a rectangular shape. The cover tape 16 is shown in FIG.
The same continuous tape as shown in
Two ribs 17 are provided in parallel along the direction in which the cover tape 16 extends.

The interval between the two ribs 17 is made smaller than the width of the groove 15 of the carrier tape 13 so that the rib 17 is
To enter. The height of the rib portion 17 is equal to the height obtained by subtracting the thickness of the package 21a of the semiconductor 21 plus the height of the ball 21b from the depth from the surface of the carrier tape 13 to the bottom surface 20a of the embossed portion 20. That is, when the cover tape 16 is attached to the carrier tape 13, the rib 17 is brought into contact with the upper surface of the package 21 a of the semiconductor 21 housed in the embossed portion 20 so that the rib 17 can be pressed down.

A groove 15 is provided between the embossed portions 20 of the carrier tape 13. The depth of the groove 15 is, as described above, when the semiconductor 21 is stored in the embossed portion 20. Since the depth of the bottom of the groove 15 is lower than that of the upper surface of the package 21a of the package 21, when the cover tape 16 is attached to the carrier tape 13,
The rib portion 17 of the cover tape 16 does not contact the bottom surface of the groove 15 to lift the cover tape 16. The interval between the two ribs 17 is determined so that both the ribs 17 can push the upper surface of the package 21a of the semiconductor 21, so that the width of the groove 15 in which the ribs 17 enter is equal to the width of the embossed portion. It is narrower than 20.

The surface of the cover tape 16 is provided with a groove 18 having a V-shaped cross section substantially at the center in the width direction. One groove 18 is provided along the direction in which the cover tape 16 extends. When the cover tape 16 is attached to the carrier tape 13, the groove 18 is formed in the embossed portion 20.
Pass almost on the center line of the semiconductor 21 stored in the semiconductor device.

The packing operation of the semiconductor 21 using the carrier tape shown in FIG. 5 also uses the taping equipment shown in FIG. 8, so that the description is omitted here. The carrier tape 13 in which the semiconductor 21 is packaged by affixing the semiconductor tape 16 by thermocompression bonding is mounted on the take-up reel 12 in the state shown in FIG.
Then, it is stored in an aluminum laminate bag, packed in an inner box, and then in an outer box in order, and becomes a final shipping form.

On the back surface of the cover tape 16, a rib portion 17 is provided.
The height of the rib 17 is such that when the cover tape 16 is attached to the carrier tape 13, the rib 17 comes into contact with the upper surface of the package 21 a of the semiconductor 21 stored in the embossed portion 20. Since the height is set so as to suppress this, the semiconductor 21 is placed on the rib 1 of the cover tape 16.
7 and the bottom surface 20 a of the embossed portion 20. As a result, as shown in FIG. 5A, the semiconductor 21 packaged in the carrier tape 13 does not move inside the embossed portion 20 even if vibration or impact is applied during transportation or dropping, and the ball 21b is moved. Embossed part 20
Of the ball 21b can be prevented from rubbing against the bottom surface 20a.

As a leadless semiconductor, LGA (Land Grid Array), QFN
(Quad Flat Non-leaded Pac
Kage) and the like, but the above-described storage device shown in FIG. 5 can be applied to these types of semiconductors.
If the semiconductor container of the embodiment shown in FIG. 1 is applied, although not shown, the semiconductor is held down by the rib portion 17 of the cover tape 16, so that the semiconductor can be held in the embossed portion 20 even when subjected to vibration or impact during transportation or dropping. The land of the semiconductor does not move, and the bottom of the embossed portion 20 is
To prevent the land portion from being scratched or foreign matter from adhering.

The semiconductor storage device of the embodiment shown in FIG. 5 can cope with the deformation of the carrier tape 13. That is, when the take-up reel 12 shown in FIG.
As shown in FIG. 5 (b), the carrier tape 13 wound up in the direction 2 is deformed into an arc shape in the width direction thereof in the direction in which the embossed portion 20 protrudes, when a pressing force is applied in the direction of arrow e.

The cover tape 16 is provided with a groove 18 having a V-shaped cross section on the front surface side so as to pass substantially along the center line of the semiconductor 21 along the direction in which the cover tape 16 extends. Is deformed in the width direction so that the embossed portion 20 protrudes, the cover tape 16
In this case, the force concentrates on the portion of the groove 18 and the V-shape is collapsed, so that the V-shape is folded in the width direction. Thus, if the groove 18 is provided on the surface of the cover tape 16,
The carrier tape 13 has an embossed portion 2 in its width direction.
0, the cover tape 16
Is always deformed in a direction in which a gap with the semiconductor 21 is not opened.

The rib 17 is provided on the back surface of the cover tape 16, and as described above, the rib 17 presses the upper surface of the package 21a of the semiconductor 21, so that the carrier tape 13 moves in the width direction. Even if the semiconductor 21 is pressed by the ribs 17 even if the semiconductor 21 is deformed in the direction in which the embossed portion 20 protrudes, the semiconductor 21 can be prevented from jumping out of the embossed portion 20.

FIG. 6 is an explanatory view showing a modification of the present invention. FIG. 6 (a) is a plan view of a carrier tape, and FIG. 6 (b) is a cross-sectional view of the carrier tape at an embossed portion in the width direction. FIG. 6C is a plan view of the carrier tape, and FIG.
6D is a cross-sectional view of the carrier tape in the width direction at the embossed portion, and FIG. 6E is a cross-sectional view of the cover tape in the width direction. FIG.
(A) to (d) show a carrier tape in a case where a semiconductor to be packed has a gull-wing type lead described with reference to FIG.

As described with reference to FIGS. 1 to 3, a continuous rib portion 17 is provided on the back surface of the cover tape 16 along the direction in which the cover tape 16 extends, and the semiconductor device 2 is pressed by the rib portion 17. In the carrier tape 13, a portion lower than the upper surface of the package 2 b of the semiconductor 2 housed in the embossed portion 14 is formed on the surface thereof, and the rib portion 17 is formed.
Therefore, the groove 15 is provided between the embossed portions 13, but the shape of the groove between the embossed portions is not limited to the shapes shown in FIGS.

For example, as shown in FIGS. 6 (a) and 6 (b), the groove 23 having a V-shaped cross section is aligned with the width direction of the rib 17 of the cover tape 16 as shown in FIG. Therefore, it may be provided so as to connect between the adjacent embossed portions 14.

The sectional shape of the groove 23 is such that the bottom of the V-shape is lower than the upper surface of the semiconductor package housed in the embossed portion 14 and the carrier tape 13 is covered with the cover tape 1.
6 is applied, the portion of the rib portion 17 facing the groove 23 enters the groove 23, and the portion facing the embossed portion 14 can abut on the upper surface of the semiconductor package and press it down. Shape.

As shown in FIGS. 6C and 6D,
The groove 24 having a semicircular cross section may be provided so as to connect between the adjacent embossed portions 14 in accordance with the position in the width direction of the rib portion 17 of the cover tape 16.

The sectional shape of the groove 24 is such that the bottom of the semicircle is lower than the upper surface of the semiconductor package housed in the embossed portion 14 and the carrier tape 13
6 is attached, the portion of the rib portion 17 opposite to the groove 23 enters the groove 24, and the portion of the rib portion 17 opposite to the embossed portion 14 can abut on the upper surface of the semiconductor package and press it down. Shape.

Further, the shape of the cover tape 16 is also shown in FIG.
The present invention is not limited to the configuration in which two ribs 17 are provided as shown in FIG.
As shown in (e), three ribs 17 may be provided.
Further, the number may be four or more. Further, when the cover tape 16 is adhered to the carrier tape 13, the cross-sectional shape of the rib 17
As long as it has a height capable of contacting and pressing the upper surface of b, it may be V-shaped or semi-circular in addition to square.

Further, as a convex portion provided on the back surface of the cover tape 16 and protruding in the concave direction of the embossed portion 14, the rib portion 1 continuous in the direction in which the cover tape extends is provided.
Instead of 7, an independent convex portion may be provided corresponding to each embossed portion 14 shown in FIG. 2. Each embossed part 1
In the case where an independent convex portion corresponding to 4 is provided, the convex portion has a size to enter the embossed portion 14, and the height thereof is set to a height in contact with the upper surface of the semiconductor 2 housed in the embossed portion 14. In addition, when providing an independent convex portion corresponding to each embossed portion 14, a groove 1 connecting each embossed portion 14 shown in FIG.
5 becomes unnecessary. Further, even when independent projections corresponding to each embossed portion 14 are provided, a groove 18 is provided on the surface of the cover tape 16 at the center in the width direction along the direction in which the cover tape 16 extends. Corresponds to the deformation of the carrier tape described with reference to FIG.

[0075]

As described above, according to the present invention, a concave embossed portion for accommodating a semiconductor is provided, and the depth of the embossed portion is such that the upper surface of the semiconductor accommodated in the embossed portion is above the tape surface. In a semiconductor storage device including a carrier tape having a depth that does not protrude, and a cover tape that is attached to the surface of the carrier tape and covers an opening of the embossed portion, the back surface of the cover tape includes: A projection is provided which protrudes in the direction of depression of the embossed portion, and has a height which comes into contact with the upper surface of the semiconductor housed in the embossed portion when the cover tape is attached to the carrier tape.

According to this, the semiconductor is accommodated in the embossed portion of the carrier tape, and the cover tape is attached to the surface of the carrier tape, so that the semiconductor accommodated in the embossed portion is pressed by the convex portion of the cover tape. Even if an external impact is applied during transportation or the like, the semiconductor device does not move in the embossed portion, so that damage to the semiconductor can be prevented. As described above, by preventing damage to the semiconductor during transportation, it is possible to prevent the occurrence of a complaint factor from a customer, thereby improving quality.

Conventionally, in order to prevent the semiconductor from being damaged in the carrier tape, the packing box of the carrier tape in which the semiconductor is packed has been dealt with as having a high shock absorbing ability. Since the semiconductor is stored in the carrier tape so as not to move, the man-hour for designing the packing box can be reduced, and the material cost of the packing box can be reduced.

Further, according to the present invention, there is provided a recessed embossed portion for accommodating a semiconductor, and the depth of the embossed portion is such that the upper surface of the semiconductor accommodated in the embossed portion does not protrude from the tape surface. Carrier tape,
A cover tape that is attached to the surface of the carrier tape and covers the opening of the embossed portion, wherein the cover tape extends almost at the center of the surface of the cover tape in the width direction. The groove is provided along the existing direction.

According to this, a pressing force is applied to the carrier tape on which the semiconductor is housed and the cover tape is attached from both sides in the width direction, so that the carrier tape is deformed into an arc shape in the direction in which the embossed portion projects in the width direction. Then, the cover tape is in a valley-folded state in the width direction due to the collapse of the groove portion. As a result, even if the carrier tape is deformed, no gap is opened between the semiconductor and the cover tape housed in the embossed portion of the carrier tape, and the semiconductor is prevented from jumping out of the embossed portion. Can be prevented.

[Brief description of the drawings]

FIG. 1 is an explanatory view showing an example of an embodiment of a semiconductor storage device of the present invention.

FIG. 2 is an explanatory diagram showing a carrier tape of the present embodiment.

FIG. 3 is an explanatory diagram showing a cover tape of the embodiment.

FIG. 4 is an explanatory view showing a state in which the carrier tape in the present embodiment is deformed.

FIG. 5 is an explanatory diagram showing an embodiment in a case where a BGA type semiconductor is used as a packaging object.

FIG. 6 is an explanatory view showing a modification of the present invention.

FIG. 7 is an explanatory view showing a conventional semiconductor storage device.

FIG. 8 is an explanatory diagram showing an example of a taping facility.

FIG. 9 is an explanatory diagram showing a conventional problem.

FIG. 10 is an explanatory diagram showing a conventional problem.

FIG. 11 is an explanatory diagram showing another conventional problem.

[Explanation of symbols]

2 ... Semiconductor, 2a ... Lead, 2b ... Package, 13 ... Carrier tape, 14 ... Embossed part, 15 ... Groove, 16 ... Cover tape, 17 ...
.Ribs, 18 ... grooves

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 3E067 AA24 AB46 AB47 AC04 AC11 AC18 BA36A BB14A BB15A CA24 EA06 EC08 EC40 FA01 FC01 3E096 AA06 BA09 BA14 BB08 CA15 DA05 DA30 EA02X FA09 GA05 GA07

Claims (4)

[Claims] 1. A carrier tape provided with a concavely recessed embossed portion for accommodating a semiconductor, the depth of the embossed portion being such that the upper surface of the semiconductor accommodated in the embossed portion does not protrude from the tape surface. And a cover tape that is attached to the surface of the carrier tape and covers the opening of the embossed portion. On the back surface of the cover tape, protrudes in the recessed direction of the embossed portion, A semiconductor storage device comprising a projection having a height which is in contact with an upper surface of the semiconductor housed in the embossed portion when the cover tape is attached to a carrier tape. 2. The semiconductor storage device according to claim 1, wherein a groove is provided substantially at the center of the surface of the cover tape in the width direction along the direction in which the cover tape extends. 3. The carrier tape, a plurality of the embossed portions are provided in a line at intervals, and a groove connecting the embossed portions is provided at a portion between the embossed portions. 2. The semiconductor storage device according to claim 1, wherein the depth is such that the bottom of the groove is lower than the upper surface of the semiconductor stored in the embossed portion. 4. A carrier tape provided with a concavely recessed embossed portion for accommodating a semiconductor, the depth of which is such that the upper surface of the semiconductor accommodated in the embossed portion does not protrude from the tape surface. And a cover tape that is attached to the surface of the carrier tape and covers the opening of the embossed portion. At the substantially center of the surface of the cover tape in the width direction,
A semiconductor storage device having a groove provided along a direction in which the cover tape extends.