JP2002184893A - Semiconductor element housing package - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that the bond strength of a bonding wire to a metallized wiring layer lowers in wire bonding. SOLUTION: The package for housing semiconductor elements has a gold layer 8 deposited to the surface of at least a region of a metallized wiring layer to which a bonding wire 5 is connected by the ultrasonic method. The gold layer 8 has a mean height of undulation of 200-800 nm measured over a range of 100 μm square, using an interatomic force microscope and a mean height of roughness of 40-200 nm over 10 μm square in the range of 100 μm square. The undulation in the range of 100 μm square suppresses the frictional energy loss, and the roughness of 10 μm square increases the adhesion area to efficiently generate a frictional energy enough to sufficiently diffuse metals, thereby reliably and tightly bonding the bonding wire 5 to a specified metallized wiring layer 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package for accommodating a semiconductor element, and more particularly to a package for accommodating a semiconductor element having a metallized wiring layer on its surface covered with a gold layer. .

[0002]

2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element is generally made of a sintered body of aluminum oxide, and has a concave portion for accommodating the semiconductor element and a peripheral portion of the concave portion in the center of the upper surface thereof. It consists of an insulating substrate having a plurality of metallized wiring layers led out to the outer periphery and a lid, and a semiconductor element is bonded to the bottom surface of the concave portion of the insulating substrate via an adhesive material such as glass, resin, brazing material or the like. While fixing, each electrode of this semiconductor element is connected to the metallized wiring layer via a bonding wire by an ultrasonic bonder, and then the lid is joined to the upper surface of the insulating base via a sealing material such as glass or resin, A semiconductor device as a final product is obtained by hermetically housing a semiconductor element in a container including an insulating base and a lid.

In such a conventional package for accommodating a semiconductor element, a nickel layer and a gold layer are sequentially deposited on the surface of a metallized wiring layer formed on an insulating substrate.
The nickel layer and the gold layer effectively prevent oxidation corrosion of the metallized wiring layer and make the bonding of the bonding wire to the metallized wiring layer strong.

[0004] The bonding of the bonding wire to the metallized wiring layer is generally performed by using an ultrasonic bonder. One end of the bonding wire is brought into contact with the surface of the metallized wiring layer and the ultrasonic bonder outputs. The bonding wire is bonded to the metallized wiring layer by sliding with ultrasonic waves, generating frictional energy between the bonding wire and the metal and causing the metal to diffuse between the bonding wire and the gold layer with the frictional energy. You.

However, in recent years, the density and integration of semiconductor elements have rapidly increased, and the number of electrodes of the semiconductor elements has become extremely large and several hundred to several thousand, and accordingly, the number of semiconductor elements has become extremely small and fine. As a result, the electrode portion of the metallized wiring layer of the semiconductor device housing package provided for electrically connecting each electrode of the semiconductor device via a bonding wire tends to be fine together with the electrodes of the semiconductor device.

For this reason, one end of the bonding wire in contact with the metallized wiring layer is crushed by the bonding load applied when joining to the metallized wiring layer, and becomes larger than the initial wire diameter. There has been a problem that the electrode protrudes from the electrode portion of the metallized wiring layer and short-circuits with another adjacent electrode.

In order to prevent a short-circuit with another electrode adjacent to the one end of the bonding wire which is in contact with the metallized wiring layer due to a large crush, a method of reducing the bonding load is considered. Is smaller, the bonding wire cannot be stably slid by the ultrasonic wave output from the ultrasonic bonder, and the generation of frictional energy between the bonding wire and the metal becomes unstable. And the bonding strength of the bonding wire varies, resulting in a problem that the electrical connection becomes unstable.

In order to solve such problems, the ultrasonic output of the ultrasonic bonder is increased to increase the generation of frictional energy between the bonding wire and the metal.
2. Description of the Related Art Bonding between electrodes of a semiconductor element and a metallized wiring layer of a package for accommodating a semiconductor element via a bonding wire has been strengthened and electrical connection has been stabilized.

[0009]

However, the surface morphology of the gold layer formed on the surface of the metallized wiring layer of the conventional package for housing a semiconductor element has a mechanical bonding strength with a bonding wire (anchor effect). The height of the undulation was large in order to increase the surface roughness, and the roughness was small in order to increase the glossiness in appearance, or both the height and the roughness of the undulation were small and the surface was smooth.

For this reason, when the generation of friction energy is increased by increasing the ultrasonic output of the ultrasonic bonder, the friction energy can be increased according to the ultrasonic output up to a certain ultrasonic output. Above that, the frictional energy loss increases, and as a result, no matter how much the ultrasonic output is increased, the frictional energy that can sufficiently diffuse the metal between the bonding wire and the gold layer cannot be given, and the bonding is not performed. As a result, the wire cannot be firmly bonded to the metallized wiring layer, resulting in a decrease in mechanical bonding strength such as peeling of a bonding wire, and the resulting electrical connection becomes unstable. was there.

The present invention has been devised to solve the above problems, and has as its object to connect each electrode of a semiconductor device to a metallized wiring layer of a package for housing a semiconductor device via a bonding wire. In this case, even if the bonding area of the bonding wire in contact with the metallized wiring layer becomes small, the bonding wire can be firmly bonded to the metallized wiring layer, and stable electrical connection is possible. An object of the present invention is to provide a package for housing a semiconductor element having excellent performance.

[0012]

In order to solve such a problem, the present inventor has developed a undulation height as a surface form of a gold layer capable of firmly bonding a bonding wire to a metallized wiring layer. Various investigations were made on the roughness and roughness. As a result, the present inventors have invented a package for housing a semiconductor element of the present invention.

That is, a package for housing a semiconductor element according to the present invention comprises an insulating base having a metallized wiring layer to which bonding wires connected to respective electrodes of the semiconductor element are connected by an ultrasonic method, and a lid. A semiconductor element housing package for hermetically housing a semiconductor element inside a container, wherein at least the surface of a region where the bonding wires of the metallized wiring layer are connected by an ultrasonic method is measured by an atomic force microscope. A gold layer having an average height of undulation in the range of 100 μm square of 200 nm to 800 nm and an average height of roughness in the range of 10 μm square within the range of 100 μm square being 40 to 200 nm was formed. It is characterized by the following.

According to the package for accommodating a semiconductor element of the present invention, the surface of the gold layer adhered to at least the surface of the region of the metallized wiring layer to which the bonding wires are connected by the ultrasonic method is examined by an atomic force microscope. 100 measured
Average height of undulation in the range of μm square is 200 nm to 800
nm, and the average height of the roughness in the range of 10 μm square within the range of 100 μm square was 40 to 200 nm, so when connecting the bonding wire to the metallized wiring layer using an ultrasonic bonder. Even when the bonding area of the bonding wire is small, extremely large frictional energy can be generated, and sufficient metal diffusion can be performed between the bonding wire and the gold layer. Can be securely and firmly joined.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a sectional view showing an example of an embodiment of a package for accommodating a semiconductor element according to the present invention, wherein 1 is an insulating base, and 2 is a lid. The insulating base 1 and the lid 2 constitute a container for housing the semiconductor element 3.

The insulating substrate 1 is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, and the semiconductor element 3 is accommodated in the center of the upper surface thereof. A recess 1a is formed to form a space for the semiconductor element 3 on the bottom surface of the recess 1a via an adhesive such as glass, resin, or brazing material.

If the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, an appropriate organic solvent / solvent is added to a ceramic raw material powder such as aluminum oxide / silicon oxide / calcium oxide / magnesium oxide. A ceramic green sheet (ceramic green sheet) is obtained by forming the sheet into a sheet shape by employing a conventionally known doctor blade method or calender roll method, and thereafter, the ceramic green sheet is appropriately punched. Approximately 1600 ° C
It is manufactured by firing.

A plurality of metallized wiring layers 4 are formed on the insulating substrate 1 from the periphery of the concave portion 1a to the outer peripheral portion. Each electrode of the semiconductor element 3 is bonded around the concave portion 1a of the metallized wiring layer 4 with a bonding wire. The external lead terminal 6 is electrically connected to the external lead terminal 5 via a brazing material such as silver brazing.

The metallized wiring layer 4 is made of a high melting point metal powder such as tungsten, molybdenum, manganese or the like. A metal paste obtained by adding a suitable organic solvent or solvent to the high melting point metal powder such as tungsten is mixed with the insulating base 1. By printing and applying a predetermined pattern on the ceramic green sheet to be formed in advance by a well-known screen printing method, the insulating green body 1 is adhered and formed from the periphery of the concave portion 1a to the outer peripheral portion.

On the exposed surface of the metallized wiring layer 4, a nickel layer 7 and a gold layer 8 are sequentially formed by plating or the like, as shown in an enlarged sectional view of a main part in FIG.

The nickel layer 7 functions as a base metal for depositing the gold layer 8 on the metallized wiring layer 4.
By adopting the electrolytic plating method, specifically, the insulating substrate 1 having the metallized wiring layer 4 is made of nickel sulfate 200
g / L · nickel chloride 50 g / L · boric acid 40 g / L in an electrolytic nickel plating solution and apply a predetermined plating power through a plating jig or the like.
Is formed on the surface of the metallized wiring layer 4 by depositing nickel on the metallized wiring layer 4.

The thickness of the nickel layer 7 is 0.5 μm.
If it is less than 10 mm, it becomes difficult to cover the metallized wiring layer 4 with the gold layer 8, and as a result, the bonding wire 5
May not be able to be firmly bonded to the metallized wiring layer 4.

The nickel layer 7 has a thickness of 15.0 μm.
When the nickel layer 7 is applied to the metallized wiring layer 4 by plating or the like, a large stress is present inside the nickel layer 7, and even when a small external pressure is applied, the nickel layer 7 is separated from the metallized wiring layer 4. There is a danger that it will be lost.

Therefore, the nickel layer 7 has a thickness of 0.5 to 1
It is preferable to set the range to 5.0 μm.

On the other hand, a gold layer 8 is formed on the surface of the nickel layer 7 and a bonding wire 5 is bonded to the gold layer 8 by metal diffusion, whereby the bonding wire 5 is electrically connected to the metallized wiring layer 4. Will be connected.

The surface morphology of the gold layer 8 has a mean undulation height of 200 nm to 800 nm in a range of 100 μm square measured by an atomic force microscope and a range of 10 μm square within the range of 100 μm square. Average height of roughness 40
It is important to set it to 200 nm.

The average height of the undulation is such that the larger the undulation, the larger the generated frictional energy, but the smaller the bonding area between the bonding wire 5 and the gold layer 8 is. On the other hand, the average height of the roughness is because the larger the average height of the roughness, the larger the bonding area and the more efficient the generation of friction energy.

That is, the two surface forms, the undulation and the roughness of the gold layer 8, determine the amount of generated friction energy,
The resulting metal diffusion state determines the bonding strength between the bonding wire 5 and the metallized wiring layer 4.

Here, in general, a maximum height (Rmax) and a ten-point average roughness (Rz) are used as a display method of the surface morphology of the gold layer 8.
-Surface roughness such as center line average roughness (Ra) measured by a stylus method is used. In these methods, irregularities or roughness occurring at small intervals and undulations repeated at intervals larger than this roughness are used. That is, it is difficult to distinguish from the swell height. Therefore, an atomic force microscope is used as a method for measuring the surface morphology of the gold layer 8 for determining the bonding strength between the bonding wire 5 and the metallized wiring layer 4, and the average height of the undulation is measured in a range of 100 μm square. It is preferable to measure the average height of the roughness in a range of 10 μm square.

Since the average height of the undulation in the measurement in the range of 100 μm square includes the average height of the roughness in the measurement in the range of 10 μm square, the average height of the roughness in the measurement in the range of 10 μm square is shown. Does not exceed the average swell height in the measurement in the range of 100 μm square.

Therefore, the gold layer 8 has a surface morphology of 200 to 800 nm as the average height of the undulation in a measurement in the range of 100 μm square using an atomic force microscope, and the 100 μm
It is necessary that the average height of the roughness in the measurement in the range of 10 μm square within the range of m square is 40 to 200 nm, and 100 μm
Only the average height of the swell in the measurement in the range of m angle is 200
The effect of the present invention cannot be obtained even if only the average height of the roughness in the measurement in the range of 800800 nm or 10 μm square is 40-200 nm.

Furthermore, the surface morphology of the gold layer 8 was increased by increasing the average height of the undulation in the range of 100 μm square using an atomic force microscope to over 800 nm, and the 10 μm square within the range of 100 μm square. When the average height of the roughness in the measurement of the range is less than 40 nm, when the bonding wire 5 is connected to the metallized wiring layer 4 using an ultrasonic bonder, the friction energy between the bonding wire 5 and the gold layer 8 is reduced. As a result, metal diffusion between the bonding wire 5 and the gold layer 8 becomes insufficient, and the bonding wire 5 cannot be firmly joined to the metallized wiring layer 4.

Accordingly, the surface morphology of the gold layer 8 is 200 to 800 nm as the average height of the undulation in the measurement in the range of 100 μm square using an atomic force microscope, and the 100 μm
The average height of the roughness in the measurement in the range of 10 μm square within the range of m square is specified to be 40 to 200 nm.

When the gold layer 8 is formed by, for example, an electrolytic plating method, a heavy metal such as lead and an amino acid-based solution are added to a solution comprising potassium gold cyanide, potassium cyanide, potassium dihydrogen phosphate, diammonium hydrogen phosphate and ammonium sulfate. It is preferable to use an electrolytic gold plating bath to which the above reagent is added. According to such an electrolytic gold plating bath, the deposition state of gold is adjusted by combining three kinds of complexing agents of potassium dihydrogen phosphate, diammonium hydrogen phosphate, and ammonium sulfate, and the deposited gold is formed. The average height of the waviness in the measurement of the surface morphology of the layer 8 in the range of 100 μm square using an atomic force microscope is 200 to 800 nm, and the 100
The average height of the roughness in the measurement in the range of 10 μm square within the range of μm square can be 40 to 200 nm.

After the gold layer 8 is formed by a conventionally known electrolytic gold plating method or electroless plating method, a desired surface morphology is obtained by a mechanical surface roughening method such as blasting. You may do it.

On the other hand, the gold layer 8 has a Vickers hardness of 50
When the value is less than 100 mm, the gold layer 8 is greatly deformed by the bonding load applied during the wire bonding, so that the bonding wire 5 cannot be firmly connected to the metallized wiring layer 4. When the bonding wire 5 slides on the surface of the gold layer 8, sufficient frictional energy cannot be obtained. Therefore, the gold layer 8 has its Vickers hardness
It is desirable to set it to 50 to 100.

Further, when the thickness of the gold layer 8 is less than 0.5 μm, when bonding the bonding wire 5 by metal diffusion, the absolute amount of the diffusion metal is reduced, and the bonding strength of the bonding wire 5 may be reduced. Therefore, the thickness is preferably set to 0.5 μm or more, and in consideration of economy, it is preferable to set the thickness to 0.5 to 3.0 μm.

The external lead terminal 6 brazed to the metallized wiring layer 4 has a function of connecting the semiconductor element 3 housed therein to an external electric circuit board, and connecting the external lead terminal 6 to the external electric circuit board. As a result, the semiconductor element 3 housed inside is electrically connected to the external electric circuit board via the bonding wire 5, the metallized wiring layer 4, and the external lead terminals 6.

The external lead terminal 6 is made of a metal material such as an iron-nickel-cobalt alloy.
The ingot is formed into a predetermined shape by applying a conventionally known metal working method such as a rolling method or a punching method to a cobalt alloy ingot.

Further, if the external lead terminal 6 is coated with a metal having good conductivity and excellent corrosion resistance made of nickel, gold or the like to a thickness of 1 to 20 μm by plating, the external lead terminal Oxidative corrosion can be effectively prevented, and good electrical connection between the external lead terminals 6 and the external electric circuit board can be achieved. Therefore, it is preferable that the external lead terminal 6 is coated with nickel, gold, or the like to a thickness of 1 to 20 μm on the surface.

As described above, according to the semiconductor element housing package of the present invention, the semiconductor element 3 is bonded and fixed to the bottom surface of the concave portion 1a of the insulating base 1 via an adhesive such as glass, resin or brazing material. Each electrode of the element 3 is electrically connected to the metallized wiring layer 4 via the bonding wire 5, and then the lid 2 is joined to the upper surface of the insulating base 1 with a sealing material such as glass or resin. The semiconductor device 3 as a final product is obtained by hermetically housing the semiconductor element 3 in a container formed of the semiconductor device 3 and the lid 2.

[0043]

[Example] 40 mm × aluminum oxide sintered body
A semiconductor element storage package was prepared by forming a metallized wiring layer having a 0.3 mm × 0.4 mm square wire bonding pad on the surface of a 40 mm square insulating base by tungsten powder metallization.

The surface of the metallized wiring layer is subjected to nickel-strike plating in a plating bath using an aqueous solution containing nickel chloride / hydrochloric acid as a main component, and then nickel chloride / nickel sulfate / boric acid as a main component. Immerse the Watts bath in a bath adjusted to a liquid temperature of 50-60 ° C and pH 4.0-5.0.
By supplying power of A / dm ^2, the thickness is 4.5 to 5.5.
A μm nickel layer was obtained.

A gold layer was formed on each of the insulating substrates having a nickel layer adhered to the surface of the metallized wiring layer as follows to obtain semiconductor element housing packages of the examples of the present invention and the comparative examples. .

First, gold-strike plating is performed in a plating bath using an aqueous solution containing gold potassium cyanide / tripotassium citrate / citric acid as a main component, and then gold potassium cyanide / potassium cyanide / phosphoric acid 2 An insulating substrate having a nickel layer adhered to a metallized wiring layer surface is immersed in an electrolytic gold plating bath in which a heavy metal such as lead and an amino acid-based reagent are added to a solution comprising potassium hydrogen, diammonium hydrogen phosphate and ammonium sulfate. , PH 4.5-5.5
・ While performing moderate stirring under the conditions of bath temperature 60-70 ° C,
By applying a charge of 0.3 A / dm ² for a predetermined time,
By depositing a gold layer having a thickness of about 1.8 μm, a package A for housing a semiconductor element according to an embodiment of the present invention was obtained.

When the surface morphology of the gold layer in the semiconductor element housing package A of the embodiment of the present invention was measured using an atomic force microscope, the average height of the undulation in the range of 100 μm square was 400 nm, and The average height of the roughness in the range of 10 μm square within the range of 100 μm square is 140.
nm.

In the same manner as the package A for accommodating the semiconductor device of the embodiment of the present invention, after the gold-strike plating is performed, a conventionally well-known electrolytic gold plating mainly containing potassium potassium cyanide / potassium citrate is performed. 1.2-
By depositing and forming a 1.8 μm gold layer, semiconductor device housing packages B and C of comparative examples were obtained. The surface morphology of the semiconductor device housing packages of these comparative examples is as follows.
In semiconductor device storage package B, 100μ
The average height of the waviness in the range of m-square was 1200 nm, and the average height of the roughness in the range of 10 μm-square within the range of 100 μm-square was 300 nm. Further, in the semiconductor element storage package C, the average height of the undulation in the range of 100 μm square is 500 nm, and the average height of the undulation is 100 μm.
The average height of the roughness in the range of 10 μm square in the range of m square was 20 nm.

These semiconductor device storage packages A and B
For C and C respectively
For each 300 pieces, perform bonding by ultrasonic bonder using φ0.25mm aluminum wire,
Thereafter, the tensile strength and the number of bonding wires peeled off from the metallized wiring layer were examined by a tensile test.

As a result, in the package B for semiconductor device storage of the comparative example, the average value of the tensile strength was 147 mN, and peeling occurred in 5 out of 300 packages. The value was 98 mN, and 16 peelings occurred out of 300. On the contrary,
In the package A for accommodating the semiconductor element according to the example of the present invention, the average value of the tensile strength was 176 mN, and no peeling of the bonding wire occurred. This allows
It was confirmed that the semiconductor element housing package A of the example of the present invention had excellent wire bonding properties.

Note that the present invention is not limited to the above-described embodiment, and various changes can be made without departing from the gist of the present invention. For example, in the above embodiment, the case where the base of the gold layer is nickel is described, but this may be another metal layer such as a nickel alloy or copper. Also, the description has been given of the product form in which the electrical connection with the external electric circuit board is made by the external lead terminals. The present invention may be applied to other uses such as an integrated circuit board.

[0052]

According to the semiconductor device housing package of the present invention, the surface morphology of the gold layer formed on the surface of at least the region of the metallized wiring layer to which the bonding wires are connected by the ultrasonic method is changed to the atomic ratio. The average height of the undulation in the range of 100 μm square measured by force microscope is 200 nm
800800 nm and 10 μm within the range of 100 μm square.
Since the average height of the roughness in the range of m-square is 40-200 nm, when connecting the bonding wire to the metallized wiring layer using an ultrasonic bonder, extremely large friction even if the bonding area of the bonding wire is small. Since energy can be generated and sufficient metal diffusion can be performed between the bonding wire and the gold layer, the bonding wire can be securely and firmly bonded to a predetermined metallized wiring layer.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing an example of an embodiment of a semiconductor element storage package according to the present invention.

2 is an enlarged cross-sectional view of a main part of the package for housing a semiconductor element shown in FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Insulating base 3 ... Semiconductor element 4 ... Metallized wiring layer 5 ... Bonding wire 8 ... Gold layer

Claims (1)

[Claims] 1. A semiconductor device is hermetically housed in a container including a cover and an insulating base having a metallized wiring layer to which bonding wires connected to respective electrodes of the semiconductor device are connected by an ultrasonic method. A package for storing a semiconductor element, wherein at least the surface of a region of the metallized wiring layer to which the bonding wire is connected by an ultrasonic method is 100 μm measured by an atomic force microscope.
Average height of undulation in the range of m angle is 200nm ~ 800n
m, and a gold layer having an average height of roughness of 40 to 200 nm in a range of 10 μm square within a range of 100 μm square.