JP2003037201A - Package for accommodating semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent reduction in the bonding strength of a bonding wire to a metallized wiring layer upon wire bonding. SOLUTION: In the package for airtightly accommodating a semiconductor element 3 within a container made of an insulating substrate 1, having a metallized wiring layer 4 connected by an ultrasonic method with a bonding wire connected to each electrode of the element 3 and of a lid member 2, a metal layer 8 is formed on at least the surface of a region of the metallized wiring layer 4 connected by the ultrasonic method with the bonding wire 5. The metal layer 8 has a root-mean-square waviness height of 240-850 nm in the undulated area of 100 μm square measured with use of an atomic force microscope and has a root-mean-square roughness height of 50-250 nm in a range of 10 μm angle within a range of 100 μm.

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device housing package for housing a semiconductor device, and more particularly to a package having a metallized wiring layer on the surface thereof covered with a gold layer. And a package for housing a semiconductor element. 2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element is generally made of an aluminum oxide sintered body, and a concave portion for housing the semiconductor element and a concave portion for housing the semiconductor element are provided at the center of the upper surface thereof. It consists of an insulating base having a plurality of metallized wiring layers extending from the periphery to the outer periphery of the recess, and a lid. The semiconductor element is placed on the bottom of the recess of the insulating base via an adhesive such as glass, resin, brazing material or the like. Each electrode of this semiconductor element is connected to the metallized wiring layer via a bonding wire by an ultrasonic bonder, and then the lid is joined to the upper surface of the insulating substrate via a sealing material such as glass or resin. Then, the semiconductor element is hermetically housed in a container formed of an insulating base and a lid, thereby obtaining a semiconductor device as a final product. In such a conventional package for housing a semiconductor element, a nickel layer and a gold layer are sequentially deposited on the surface of a metallized wiring layer formed on an insulating substrate.
The nickel layer and the gold layer effectively prevent oxidation corrosion of the metallized wiring layer and make the bonding of the bonding wire to the metallized wiring layer strong. [0004] The bonding of the bonding wire to the metallized wiring layer is generally performed by using an ultrasonic bonder. One end of the bonding wire is brought into contact with the surface of the metallized wiring layer and the ultrasonic bonder outputs. The bonding wire is bonded to the metallized wiring layer by sliding with ultrasonic waves, generating frictional energy between the bonding wire and the gold layer and causing the metal to diffuse between the bonding wire and the gold layer with the frictional energy. Is done. However, in recent years, semiconductor elements have rapidly increased in density and integration, and with this, the number of electrodes of the semiconductor element has become extremely large and several hundred to several thousand, and has become fine. As a result, the metallized wiring layer of the semiconductor device housing package electrically connected to each electrode of the semiconductor device via a bonding wire tends to be fine. For this reason, one end of the bonding wire in contact with the metallized wiring layer is crushed by the bonding load applied when bonding to the metallized wiring layer, and becomes larger than the initial wire diameter. It protrudes from the metallized wiring layer,
There are problems such as a short circuit with the adjacent metallized wiring layer. In order to prevent short-circuiting of the adjacent metallized wiring layer due to one end of the bonding wire being greatly crushed, a method of reducing the bonding load or the like is conceivable. Bonding wires cannot be stably slid by the ultrasonic wave output from the bonder, and the generation of frictional energy between the bonding wires and the gold layer becomes unstable. There is a problem that the strength varies and as a result, the electrical connection becomes unstable. In order to solve such a problem, the ultrasonic output of the ultrasonic bonder is increased to increase the generation of frictional energy between the bonding wire and the metal, and the electrodes of the semiconductor element and the package for housing the semiconductor element are increased. The bonding between the metallized wiring layer and the metallized wiring layer through a bonding wire is strengthened, and the electrical connection is stabilized. [0009] However, the surface morphology of the gold layer formed on the surface of the metallized wiring layer of the conventional package for housing semiconductor elements depends on the mechanical bonding strength with the bonding wire. In order to enhance the anchor effect), the swell height is about 500 nm in root-mean-square height
The roughness is large as described above, and the roughness is small as about 40 nm or less in terms of root mean square height in order to increase the glossiness in appearance, or the swell height is about 250 n in root mean square height.
m or less, and the surface was small and smooth with a root mean square height of about 40 nm or less. For this reason, when the generation of friction energy is increased by increasing the ultrasonic output of the ultrasonic bonder, the friction energy can be increased according to the ultrasonic output up to a certain ultrasonic output. Above that point, the loss of frictional energy increases, and as a result, no matter how much the ultrasonic output is increased, it is not possible to provide the frictional energy sufficient for metal diffusion between the bonding wire and the gold layer to be performed. As a result of the inability to firmly join the wire to the metallized wiring layer, there is a problem in that mechanical bonding strength such as peeling of the bonding wire is reduced and the electrical connection is thereby unstable. there were. The root mean square height is the square root of the value obtained by integrating and averaging the square of the deviation of the undulation or roughness curve from the average line in the measurement section, and is the value of the undulation or roughness from the center line. Shows variation. The present invention has been devised to solve the above problems, and has as its object to connect each electrode of a semiconductor element to a metallized wiring layer of a package for housing a semiconductor element via a bonding wire. At this time, even if the bonding area of the bonding wire in contact with the metallized wiring layer becomes small, the bonding wire can be firmly bonded to the metallized wiring layer, and stable electrical connection is possible. An object of the present invention is to provide a package for housing a semiconductor element having excellent performance. In order to solve such a problem, the present inventor has developed a surface morphology of a gold layer capable of firmly bonding a bonding wire to a metallized wiring layer. Various studies were made on the height and roughness of the steel. As a result, the inventors have invented a semiconductor device housing package of the present invention. That is, a package for housing a semiconductor element according to the present invention comprises an insulating base having a metallized wiring layer to which bonding wires connected to respective electrodes of the semiconductor element are connected by an ultrasonic method, and a lid. A semiconductor element housing package for hermetically housing a semiconductor element inside a container, wherein at least the surface of a region where the bonding wires of the metallized wiring layer are connected by an ultrasonic method is measured by an atomic force microscope. 100 μm
The root mean square height of the swell in the range of corners is 240
a gold layer having a root mean square height of 50 to 250 nm in a range of 10 μm square within a range of 100 μm. According to the semiconductor device housing package of the present invention, the surface of the gold layer formed at least on the surface of the region of the metallized wiring layer to which the bonding wires are connected by the ultrasonic method is examined by an atomic force microscope. Measured 10
Since the root mean square height of the undulation in the range of 0 μm square is 240 nm to 850 nm, and the root mean square height of the roughness in the range of 10 μm square within the range of 100 μm square is 50 to 250 nm, When connecting a bonding wire to a metallized wiring layer using an ultrasonic bonder, extremely large frictional energy can be generated even when the bonding area of the bonding wire is small, and sufficient metal exists between the bonding wire and the gold layer. Since the diffusion can be performed, the bonding wire can be securely and firmly bonded to a predetermined metallized wiring layer. Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing an example of an embodiment of a semiconductor element storage package according to the present invention, wherein 1 is an insulating base, and 2 is a lid. The insulating base 1 and the lid 2 constitute a container for housing the semiconductor element 3. The insulating substrate 1 is made of an aluminum oxide sintered body,
A concave portion 1 made of an electrically insulating material such as a mullite sintered body, an aluminum nitride sintered body, or a silicon carbide sintered body, and forming a cavity for accommodating the semiconductor element 3 in the center of the upper surface thereof.
The semiconductor element 3 is bonded and fixed to the bottom surface of the concave portion 1a via an adhesive such as glass, resin, brazing material or the like. If the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, an appropriate organic solvent and a solvent are added to a ceramic raw material powder such as aluminum oxide, silicon oxide, calcium oxide, magnesium oxide, etc. A ceramic green sheet (green ceramic sheet) is obtained by forming the sheet into a sheet shape by employing a conventionally known doctor blade method or calender roll method, and thereafter, the ceramic green sheet is subjected to an appropriate punching process. Approximately 160
It is manufactured by firing at 0 ° C. A plurality of metallized wiring layers 4 are formed on the insulating substrate 1 from the periphery of the concave portion 1a to the outer peripheral portion. Each electrode of the semiconductor element 3 is bonded around the concave portion 1a of the metallized wiring layer 4 with a bonding wire. The external lead terminal 6 is electrically connected to the external lead terminal 5 via a brazing material such as silver brazing. The metallized wiring layer 4 is made of a high melting point metal powder such as tungsten, molybdenum, manganese or the like. A metal paste obtained by adding an appropriate organic solvent and a solvent to the high melting point metal powder such as tungsten is mixed with the insulating base 1. By printing and applying a predetermined pattern on a ceramic green sheet to be formed by a well-known screen printing method in advance, the insulating base 1 is formed so as to cover from the periphery of the concave portion 1a to the outer peripheral portion. On the exposed surface of the metallized wiring layer 4, a nickel layer 7 and a gold layer 8 are sequentially formed by plating or the like, as shown in FIG. The nickel layer 7 functions as a base metal for depositing the gold layer 8 on the metallized wiring layer 4.
By adopting the electrolytic plating method, specifically, the insulating substrate 1 having the metallized wiring layer 4 is made of nickel sulfate 20
The metallized wiring layer 4 is immersed in an electrolytic nickel plating solution comprising 0 g / liter, nickel chloride 50 g / liter, and boric acid 40 g / liter, and a predetermined plating power is supplied to the metallized wiring layer 4 via a plating jig or the like. 4 is formed on the surface of the metallized wiring layer 4 by depositing nickel on the surface. The nickel layer 7 has a thickness of 0.5 μm.
When the value is less than m, it becomes difficult to cover the metallized wiring layer 4 with the gold layer 8, and as a result, the bonding wire 5 may not be able to be firmly joined to the metallized wiring layer 4. The nickel layer 7 has a thickness of 15.0.
When the thickness exceeds μm, when the nickel layer 7 is applied to the metallized wiring layer 4 by plating or the like, a large stress is present inside the nickel layer 7 and the nickel layer 7 is separated from the metallized wiring layer 4 even by applying a small external pressure. There is a risk of doing so. Therefore, the nickel layer 7 has a thickness of 0.5
It is preferable to set it in the range of 15.0 μm. On the other hand, a gold layer 8 is formed on the surface of the nickel layer 7, and a bonding wire 5 is bonded to the gold layer 8 by metal diffusion, whereby the bonding wire 5 is electrically connected to the metallized wiring layer 4. Will be connected. The surface morphology of the gold layer 8 is such that the root mean square height of the undulation in the range of 100 μm square selected by an atomic force microscope is 240 nm to 850 nm, and the 10 μm square in the range of 100 μm square. It is important that the root mean square height of the roughness in the range be 50 to 250 nm. This is because the root mean square height of the swell is
The larger this is, the larger the generated frictional energy is, but the smaller the bonding area between the bonding wire 5 and the gold layer 8 is, conversely, the smaller the frictional energy is. As a result, the roughness is reduced. The root-mean-square height is because the larger this value is, the larger the bonding area is, and it is possible to efficiently generate frictional energy. That is, the two surface morphologies of the undulation and roughness of the gold layer 8 determine the amount of generated frictional energy,
The resulting metal diffusion state determines the bonding strength between the bonding wire 5 and the metallized wiring layer 4. Here, in general, the maximum height (Rmax) and the ten-point average roughness (Rz) are used as a method of indicating the surface morphology of the gold layer 8.
-Surface roughness such as center line average roughness (Ra) measured by a stylus method is used. In these methods, irregularities or roughness occurring at small intervals and undulations repeated at intervals larger than this roughness are used. That is, it is difficult to distinguish from the swell height. Therefore, an atomic force microscope is used as a method of measuring the surface morphology of the gold layer 8 for determining the bonding strength between the bonding wire 5 and the metallized wiring layer 4, and the root mean square height of the undulation is measured in a range of 100 μm square. It is preferable to perform the measurement in the range of 10 μm square for the root mean square height of the roughness. The root-mean-square height of the swell in the measurement in the range of 100 μm square includes the root-mean-square height of the roughness in the selection of the range of 10 μm square. Does not exceed the root-mean-square height of the swell in the range of 100 μm square. Accordingly, the gold layer 8 has a surface morphology of 240 to 850 nm as the root mean square height of the swell in a measurement in the range of 100 μm square using an atomic force microscope, and the surface morphology within the range of 100 μm square. Root mean square height of roughness in the range of 10 μm square is 50 to 250 n
m, and only the root mean square height of the swell in the range of 100 μm square is 240 to 850 n
The effect of the present invention cannot be obtained even if only the root mean square height of the roughness in the range of m or 10 μm square is set to 50 to 250 nm. Further, the surface morphology of the gold layer 8 is increased in root-mean-square height of the swell exceeding 850 nm in the measurement in the range of 100 μm square using an atomic force microscope, and within the range of 100 μm square. Assuming that the root mean square height of the roughness in the measurement in the range of 10 μm square is less than 50 μm, when the bonding wire 5 is connected to the metallized wiring layer 4 using an ultrasonic bonder, the distance between the bonding wire 5 and the gold layer 8 is reduced. Becomes insufficient, and the bonding wire 5 cannot be firmly joined to the metallized wiring layer 4. Accordingly, the gold layer 8 has a surface morphology of 240 to 850 nm as the root mean square height of the undulation in a measurement in the range of 100 μm square using an atomic force microscope and within the range of 100 μm square. The root-mean-square height in the measurement in the range of 10 μm square is 50 to 250 n.
m. Further, the gold layer 8 has a maximum undulation height difference of 3 μm or less in a 100 μm square measurement and a maximum roughness height difference of 0.5 μm or more in a 10 μm square range. Bonding wire 5
The bonding area between the metal layer 8 and the metal layer 8 can be more reliably and sufficiently secured. Therefore, it is preferable that the gold layer has a maximum undulation difference of 3 μm or less and a maximum roughness difference of 0.5 μm or more in a 10 μm square range in a measurement of 100 μm square. When the gold layer 8 is formed by, for example, an electrolytic plating method, a heavy metal such as lead and an amino acid-based solution are added to a solution comprising potassium gold cyanide, potassium cyanide, potassium dihydrogen phosphate, diammonium hydrogen phosphate and ammonium sulfate. It is preferable to use an electrolytic gold plating bath to which the above reagent is added. According to such an electrolytic gold plating bath, phosphoric acid 2
The state of gold deposition was adjusted by combining three kinds of complexing agents, potassium hydrogen, diammonium hydrogen phosphate and ammonium sulfate, and the surface morphology of the deposited gold layer 8 was adjusted to 100 μm using an atomic force microscope. The root mean square height of the swell in the measurement of the angle range is 240 to 850 n
m, and the root mean square height of the roughness in the measurement in the range of 10 μm square within the range of 100 μm square is 50.
２５０250 nm. Further, after the gold layer 8 is formed by a conventionally well-known electrolytic gold plating method or electroless plating method, a desired surface form is obtained by a mechanical surface roughening method such as blasting. You may go. On the other hand, the gold layer 8 has a Vickers hardness of 50.
If the value is less than 100 mm, the gold layer 8 is greatly deformed by the bonding load applied during wire bonding, so that the bonding wire 5 cannot be firmly connected to the metallized wiring layer 4. When the bonding wire 5 slides on the surface of the gold layer 8, sufficient frictional energy cannot be obtained. Accordingly, it is desirable that the gold layer 8 has a Vickers hardness of 50 to 100. Further, when the thickness of the gold layer 8 is less than 0.5 μm, when the wire bonding 5 is bonded by metal diffusion, the absolute amount of the diffusion metal is reduced and the bonding strength of the bonding wire 5 may be reduced. Therefore, the thickness is preferably set to 0.5 μm or more, and in consideration of economy, it is preferable to set the thickness in the range of 0.5 μm to 3.0 μm. The external lead terminal 6 brazed to the metallized wiring layer 4 has a function of connecting the semiconductor element 3 housed therein to an external electric circuit board, and connecting the external lead terminal 6 to the external electric circuit board. Accordingly, the semiconductor element 3 housed inside is electrically connected to an external electric circuit board via the bonding wire 5, the metallized wiring layer 4, and the external lead terminal 6. The external lead terminal 6 is made of a metal material such as an iron-nickel-cobalt alloy.
The ingot of the cobalt alloy is formed into a predetermined shape by applying a conventionally known metal working method such as a rolling method or a punching method. Further, if the external lead terminal 6 is coated with a metal having good conductivity and excellent corrosion resistance made of nickel, gold or the like to a thickness of 1 to 20 μm by plating, the external lead terminal Oxidative corrosion can be effectively prevented, and good electrical connection between the external lead terminals 6 and the external electric circuit board can be achieved. Therefore, it is preferable that nickel, gold, or the like be applied to the surface of the external lead terminal 6 to a thickness of 1 to 20 μm. As described above, according to the package for accommodating a semiconductor element of the present invention, the semiconductor element 3 is bonded and fixed to the bottom surface of the concave portion 1a of the insulating base 1 via an adhesive such as glass, resin, brazing material or the like. Each electrode of the element 3 is electrically connected to the metallized wiring layer 4 via a bonding wire 5, and then the lid 2 is joined to the upper surface of the insulating base 1 with a sealing material such as glass or resin. A semiconductor device as a final product is obtained by hermetically housing the semiconductor element 3 in a container formed by the semiconductor device 3 and the lid 2. EXAMPLE 40 mm of aluminum oxide sintered body
A package for housing a semiconductor element was prepared by forming a metallized wiring layer having a wire bonding pad of 0.3 mm × 0.4 mm square on the surface of an insulating substrate of 40 mm square by metallization of tungsten powder. The surface of this metallized wiring layer is subjected to nickel-strike plating in a plating bath using an aqueous solution containing nickel chloride and hydrochloric acid as main components, and then nickel chloride, nickel sulfate and boric acid as main components. The Watt bath was immersed in a bath adjusted to a liquid temperature of 50 to 60 ° C. and a pH of 4.0 to 5.0, and a power of 1 A / dm ² was supplied to obtain a nickel layer having a thickness of 4.5 to 5.5 μm. . A gold layer was formed on each of the insulating bases having a nickel layer adhered to the surface of the metallized wiring layer as described below, thereby obtaining semiconductor element housing packages of the examples of the present invention and the comparative examples. . First, gold-strike plating is performed in a plating bath using an aqueous solution mainly containing potassium gold cyanide, tripotassium citrate, and citric acid, and further, potassium gold cyanide, potassium cyanide, and phosphoric acid 2 An insulating substrate having a nickel layer adhered to a metallized wiring layer surface is immersed in an electrolytic gold plating bath in which a heavy metal such as lead and an amino acid-based reagent are added to a solution comprising potassium hydrogen, diammonium hydrogen phosphate, and ammonium sulfate. PH 4.5
5.5. Applying a charge of 0.3 A / dm ² for a predetermined period of time with moderate stirring at a bath temperature of 60 to 70 ° C. to form a 1.2 to 1.8 μm gold layer. As a result, a semiconductor device housing package A of the present invention was obtained. When the surface morphology of the gold layer in the semiconductor element housing package A of the embodiment of the present invention was measured using an atomic force microscope, the root mean square height of the undulation in a range of 100 μm square was 480 nm. The root mean square height of the roughness in the range of 10 μm square within the range of 100 μm square was 160 nm. Further, after performing gold-strike plating simultaneously with the package A for accommodating the semiconductor element of the embodiment of the present invention, a conventionally well-known electrolytic gold plating solution mainly containing gold potassium cyanide and potassium citrate is used. And 1.2
By depositing and forming a gold layer of about 1.8 μm, packages B and C for accommodating semiconductor elements of comparative examples were obtained. The surface morphology of the semiconductor element housing package of each of these comparative examples is 10
The mean square height of the swell in the range of 0 μm square is 140
0 nm and 10 within its 100 μm square.
The root mean square height of roughness in the range of μm square is 35
5 nm. In addition, package C for semiconductor element storage
The root mean square height of the undulation in the range of 100 μm square was 600 nm, and the root mean square height of the roughness in the range of 10 μm square within the range of 100 μm square was 24 nm. These semiconductor element storage packages A and B
For each of C and C, bonding was performed on each of 300 wire bonding pads using an ultrasonic wire bonder using an aluminum wire having a diameter of 0.25 μm, and then the tensile strength and the number of bonding wires peeled off from the metallized wiring layer by a tensile test. Was examined. As a result, in the package B for semiconductor device accommodation of the comparative example, the average value of the tensile strength was 147 mN, and peeling occurred in 5 out of 300 packages. The value is 98mN
The peeling occurred in 16 out of 300 pieces. On the other hand, in the package A for accommodating the semiconductor element of the example of the present invention, the average value of the tensile strength was 176 mN, and no peeling of the bonding wire occurred. As a result, it was confirmed that the package A for accommodating a semiconductor element of the example of the present invention had excellent wire bonding properties. The present invention is not limited to the above embodiment, and various modifications can be made without departing from the gist of the present invention. For example, in the above embodiment, the case where the base of the gold layer is nickel is described, but this may be another metal layer such as a nickel alloy or copper. Also, the description has been given of the product form in which the electrical connection with the external electric circuit board is made by the external lead terminals. It may be applied to other uses such as a circuit board. According to the semiconductor device housing package of the present invention, at least the surface of the metal layer adhered and formed on the surface of the metallized wiring layer to the area where the bonding wire is connected by the ultrasonic method is removed. 1 measured by atomic force microscope
The root mean square height of the undulation in the range of 00 μm square is 240 nm to 850 nm, and its 100 μm
Since the root mean square height of the roughness in the range of 10 μm square in the range of the corner was 50 to 250 nm, when the bonding wire was connected to the metallized wiring layer using the ultrasonic bonder, the bonding of the bonding wire was performed. Even when the area is small, extremely large frictional energy can be generated, and sufficient metal diffusion can be performed between the bonding wire and the gold layer. Therefore, the bonding wire can be securely and firmly attached to a predetermined metallized wiring layer. Can be joined.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sectional view showing an example of an embodiment of a package for housing a semiconductor element according to the present invention. FIG. 2 is an enlarged sectional view of a main part of the package for housing a semiconductor element of the present invention. [Description of Signs] 1... Insulating base 2... Lid 3... Semiconductor element 4... Metallized wiring layer 5... Bonding wire 6. .... nickel layer 8 ... gold layer

Claims (1)

Claims: 1. A semiconductor device comprising: an insulating base having a metallized wiring layer to which bonding wires connected to respective electrodes of a semiconductor element are connected by an ultrasonic method; A semiconductor element housing package for hermetically housing an element, wherein at least the surface of a region of the metallized wiring layer to which the bonding wire is connected by an ultrasonic method is 100 μm measured by an atomic force microscope.
The root mean square height of the swell in the range of m angle is 24
A package for semiconductor element storage, wherein a gold layer having a root mean square height of 50 to 250 nm in a range of 10 μm square within a range of 0 nm to 850 nm and within a range of 100 μm is formed. .