JP2002134738A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve drain breakdown voltage in operation. SOLUTION: This semiconductor device has source and drain regions. The source and drain regions are formed adjacent to a gate electrode formed via first and second gate oxide films on a semiconductor substrate, and have low and high concentration. In the semiconductor device, the diffusion region width of low-concentration source and drain regions 3A and 3B is formed, so that the diffusion region width at a source region side becomes narrower than that at least at a drain region side, a high-concentration source region 8A is formed adjacent to one end of a gate electrode 6, and at the same time, a high- concentration region 8B is formed so as to have specific intervals from the other end of the gate electrode 6.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a technique for improving operating withstand voltage while suppressing a decrease in driving capability.

[0002]

2. Description of the Related Art FIG. 5 is a sectional view for explaining a conventional semiconductor device.

In FIG. 5, reference numeral 51 denotes one conductivity type, for example, P
Type semiconductor substrate, and a gate oxide film 52
A gate electrode 53 is formed through the gate electrode 5
A source / drain region having a one-sided LDD structure is formed so as to be adjacent to No. 3. That is, a high concentration (N + type) source region 55 is formed on the source region side so as to be adjacent to the gate electrode 53, and a low concentration (N− type) is formed on the drain region side so as to be adjacent to the gate electrode 53. ) Is a semiconductor device having a single-sided LDD source / drain region in which a low-concentration (N +) drain region 56 is formed in the low-concentration drain region 54.

[0004]

In a semiconductor device having a one-sided LDD structure in which a high voltage is applied only to the drain region side as described above, as described above in order to reduce the concentration of an electric field on the drain region side, First, the high-concentration drain region 56 is surrounded by the low-concentration drain region 54, and only the high-concentration source region 55 is provided on the source region side where no breakdown voltage is required.

[0005] Even in a semiconductor device having such a structure, there is no need to particularly make static breakdown voltage a problem.
However, during operation, the following problem has occurred.

That is, a source region (emitter region), a substrate (base region), and a drain region (collector region)
In the bipolar structure composed of, the high concentration source region 55 is exposed in the emitter region, so that the carrier injection efficiency is high and the bipolar transistor is easily turned on with a small substrate current (Isub).

That is, since the current gain β of the bipolar transistor is high, the drain breakdown voltage during operation is lower than that of the semiconductor device having the double-sided LDD structure.

Here, a generally used double-sided LD
If the D structure is adopted, the current gain β is lowered and the withstand voltage is certainly provided. However, although the source side originally does not need the withstand voltage, the normal LDD structure is adopted on the source side, as shown in FIG. As a result, the drift region has the same distance (L) as the drain region, as shown in the drawing, so that the on-resistance increases and the driving capability decreases.

[0009]

SUMMARY OF THE INVENTION In view of the above problems, a semiconductor device according to the present invention is provided adjacent to a gate electrode formed on a semiconductor substrate of one conductivity type via first and second gate oxide films. In such a case, the diffusion region width of the low-concentration source / drain region is narrower at least on the source region side than on the drain region side. And the high-concentration source region is formed so as to be adjacent to one end of the gate electrode, and the high-concentration drain region is formed so as to have a predetermined distance from the other end of the gate electrode. Features.

[0010] In the manufacturing method, a first resist having a first opening on a source forming region on the substrate and a second opening wider than the first opening on a drain forming region is provided. Forming a film, ion-implanting a first impurity of the opposite conductivity type into the substrate using the first resist film as a mask, and then diffusing the impurity to form a low-concentration source / drain region of the opposite conductivity type; I do. Next, after selectively oxidizing the oxidation-resistant film formed on the substrate as a mask to form an element isolation film in a predetermined region and forming a first gate oxide film, the element isolation film and the first gate are formed. A second gate oxide film is formed in a region other than the oxide film, and a gate electrode is formed so as to extend from the first gate oxide film to over the second gate oxide film. Subsequently, a third region is formed on the low-concentration source region.
After forming a second resist film having a fourth opening in a region separated from the other end of the gate electrode on the low concentration drain region, the second resist film; Using the gate electrode, the element isolation film, and the first gate oxide film as a mask, a second conductive type second
Ion implantation of impurities of high conductivity
Forming a drain region.

At this time, the step of forming the low-concentration source / drain region is performed by ion-implanting and diffusing the first impurity made of phosphorus ions to form a high-concentration source / drain region. The process is characterized in that the second impurity made of arsenic ions is ion-implanted.

Thus, a high-concentration source region can be formed very close to the low-concentration source region, and the high-concentration source region has a drift region distance in a low-concentration region such as an LDD structure. As compared with the case where the concentration region is formed, it is possible to improve the drain withstand voltage during operation while suppressing a decrease in the driving capability.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of a semiconductor device according to the present invention and a method for manufacturing the same will be described below with reference to the drawings.

As shown in FIG. 4, a semiconductor device according to the present invention has a gate electrode on a semiconductor substrate 1 of one conductivity type, for example, a P-type so as to extend from a first gate oxide film 4A to a second gate oxide film 5. 6 are formed. Further, a low-concentration (LN type) source region 3A is formed adjacent to one end of the gate electrode 6 (one end of the first gate oxide film 4A). High concentration (N +
(Source type) 8A. Then, a low-concentration (LN-type) drain region 3B is formed adjacent to the other end of the gate electrode 6 (the other end of the first gate oxide film 4A), and the inside of the low-concentration drain region 3B is formed. A high concentration (N + type) drain region 8B is formed adjacent to one end of the first gate oxide film 4A.

As described above, the semiconductor device of the present invention is formed such that the diffusion region width of the low-concentration source / drain regions 3A and 3B is narrower at least on the source region side than on the drain region side. 8A is formed very near in the low concentration source region 3A.

By adopting such a configuration, the semiconductor device does not have a drift region as compared with a conventional semiconductor device having an LDD structure having a low-concentration source / drain region substantially symmetric with the source / drain region. Therefore, it is possible to reduce only the current gain β while suppressing a decrease in the driving capability. Therefore, the drain breakdown voltage during operation can be improved.

Hereinafter, a method for manufacturing the semiconductor device will be described with reference to the drawings.

First, in FIG. 1, a P-type semiconductor substrate 1 is formed.
Using the resist film (PR) 2 formed thereon as a mask, N-type impurities are ion-implanted, and after removing the resist film 2, the impurities are thermally diffused to obtain a low-concentration N-type (LN-type).
The source / drain regions 3A and 3B are formed. At this time, as shown in FIG. 1, the resist film 2 is formed such that its opening width is at least narrower on the source forming region side than on the drain forming region side, and phosphorus ions are accelerated at an acceleration voltage of about 100 KeV. , About 6 × 10
After ion implantation at a dose of ¹² / cm ² , 1100 ° C.
For 4 hours.

Subsequently, in FIG. 2, a pad oxide film (not shown) and an oxidation-resistant film having openings in predetermined regions (a first gate oxide film formation region and a device isolation film formation region) are formed on the substrate 1. After the silicon nitride film is formed, the silicon nitride film is used as a mask to selectively oxidize by a well-known LOCOS method to form a first gate oxide film 4A and a device isolation film 4B each having a thickness of about 1000 nm. Further, after removing the pad oxide film and the silicon nitride film, the substrate 1 on which the first gate oxide film 4A and the element isolation film 4B are not formed is thermally oxidized to about 150 n.
A second gate oxide film 5 having a thickness of m is formed. And
A polysilicon film having a thickness of about 400 nm is formed on the substrate 1, and after the polysilicon film is made conductive, the polysilicon film is patterned using a resist film (not shown) as a mask to form the first gate oxide film 4A through the first gate oxide film 4A. A gate electrode 6 is formed so as to straddle the second gate oxide film 5. At this time, the second gate oxide film 5 on the substrate 1 other than where the gate electrode 6 is formed is removed.

Further, referring to FIG. 3, an N-type impurity is ion-implanted so as to be adjacent to one end of the gate electrode 6 using the resist film 7 formed on the substrate 1 as a mask.
An N-type impurity is ion-implanted so as to be separated from the other end of the gate electrode 6 and to be adjacent to one end of the first gate oxide film 4A.
A source region 8A of high concentration (N + type) is formed very near in A, and a high concentration (N + type) is formed adjacent to one end of the first gate oxide film 4A in the drain region 3B of low concentration. ) Drain region 8B. At this time, arsenic ions are implanted at an acceleration voltage of about 80 KeV and an implantation amount of about 6 × 10 ¹⁵ / cm ² .

FIG. 4 shows the semiconductor device from which the resist film 7 has been removed. Although not shown below, an interlayer insulating film is formed on the entire surface, a contact hole is formed in the interlayer insulating film so as to contact the source / drain region, and then a source / drain electrode is formed through the contact hole. To form

As described above, according to the manufacturing method of the present invention, as described above, the high-concentration source region 8A is formed very close to the low-concentration source region 3A formed on the surface layer of the substrate 1 (drift as shown in FIG. 5). It can be formed without having the region distance (L), and the driving capability is reduced (the on-resistance is increased) due to the drift region distance (L) seen in the conventional double-sided LDD semiconductor device. Problem can be suppressed,
Only the current gain β can be reduced. Therefore, the drain breakdown voltage during operation can be improved.

In this embodiment, an example in which the present invention is applied to an N-channel MOS transistor is disclosed. However, the present invention may be applied to a P-channel MOS transistor.

[0024]

According to the present invention, a high-concentration source region can be formed very close to a low-concentration source region (without having a conventional drift region distance). The problem that the driving capability of the semiconductor device having the double-sided LDD structure is reduced due to the distance of the drift region can be suppressed, and only the current gain β can be reduced.
The drain breakdown voltage during operation can be improved.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 4 is a cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 5 is a sectional view showing a conventional semiconductor device.

Claims (4)

[Claims] A gate electrode formed on a semiconductor substrate of one conductivity type via first and second gate oxide films, and a low-concentration type of a reverse conductivity type formed adjacent to the gate electrode. A semiconductor device having a high-concentration source / drain region, wherein the diffusion region width of the low-concentration source / drain region is formed such that at least the source region side is narrower than the drain region side. apparatus. 2. A gate electrode formed on a semiconductor substrate of one conductivity type via first and second gate oxide films, and a low-concentration type of a reverse conductivity type formed adjacent to the gate electrode. In a semiconductor device having a high-concentration source / drain region, a low-concentration source / drain formed adjacent to both ends of the gate electrode and having a diffusion region width narrower at least on a source region side than on a drain region side. A drain region; a high-concentration source region formed adjacent to one end of the gate electrode; and a high-concentration drain region formed to have a predetermined distance from the other end of the gate electrode. Characteristic semiconductor device. 3. A first resist film having a first opening on a source forming region on a semiconductor substrate of one conductivity type and having a second opening wider than the first opening on a drain forming region. Forming a first impurity film as a mask, ion-implanting a first impurity of the opposite conductivity type into the substrate, and then diffusing the impurity to form a low-concentration source / drain region of the opposite conductivity type. Forming a first gate oxide film while forming an element isolation film in a predetermined region by selectively oxidizing the oxidation resistant film formed on the substrate as a mask, and then forming the element isolation film and the first Forming a second gate oxide film in a region other than the gate oxide film, forming a gate electrode over the first gate oxide film over a second gate oxide film, Having a third opening on the source region of Forming a second resist film having a fourth opening in a region separated from the other end of the gate electrode on the low-concentration drain region; and forming the second resist film, the gate electrode, Ion-implanting a second impurity of the opposite conductivity type into the substrate using the element isolation film and the first gate oxide film as a mask to form a high concentration source / drain region of the opposite conductivity type. A method for manufacturing a semiconductor device, comprising: 4. The step of forming the low-concentration source / drain region comprises the step of ion-implanting and diffusing the first impurity of phosphorus ions, and forming the high-concentration source / drain region. 4. The method according to claim 3, wherein the second impurity is ion-implanted with the second impurity composed of arsenic ions.