JP2002134655A - Board for semiconductor package, its manufacturing method, the semiconductor package and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a board for a semiconductor package and its manufacturing method superior in the adhesion of a radiation slug and the board, resin sealing of a chip mounting cavity part, and reliability and productivity of a heat cycle. SOLUTION: One face of the radiation slug 101 of a copper plate is roughed, a photo-curing photosensitive insulation resin film 102 is molded thereon, and after curing is performed except for a cavity part 2 by ultraviolet ray exposure, the cavity part 2 is removed. The surface is copper-plated 103 to form a resist 104, inner and outer connection terminals and a wiring part are left to form a circuit pattern 105 by etching. A solder resist 106 insulating and coating a wiring conductor is formed, Ni/Au electroless plating 7 is performed, and a solder ball 10 is applied to complete a semiconductor package board. The semiconductor chip is mounted on the cavity part, connected to the connection terminal and the chip is sealed by a resin to make the semiconductor package.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package substrate, a method of manufacturing the same, a semiconductor package and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, the miniaturization, weight reduction, and multifunctionality of electronic equipment have been further advanced, and with this, the integration of LSI has been advanced, and the number of pins, speed, and density have been rapidly increased. In order to meet this demand, the demand for a ball grid array (BGA) package in which a large number of solder balls are provided on the lower surface of a substrate as electrodes for connection to a wiring board has rapidly increased. ing. This BGA package is provided with a heat dissipation slug on the top surface of the board to dissipate the heat generated by high performance and high speed operation, and a through hole in the board to mount the semiconductor chip on the back surface. A cavity-down type plastic BGA has been developed in which a cavity for mounting a solder ball is provided, and a heat dissipation slag is attached to the surface of the substrate opposite to the surface on which the solder balls are mounted.

[0003]

Conventionally, the cavity is formed by router processing or the like. However, when a plastic substrate is fixed to a copper slag using an adhesive, the adhesive flows too much. Depending on the case, it may flow into the cavity and contaminate the surface.
A void is generated between the copper slag and the substrate, a gap is generated between the cavity and the adhesive, and the sealing resin after mounting the semiconductor chip cannot be completely filled, resulting in a void, such as a heat cycle. There has been a problem that reliability may be reduced. In addition, there is a problem that the router processing is performed one by one using a router blade in series, so that the processing time is long, and the processing accuracy may be reduced due to wear of the router blade.

The present invention relates to a substrate for a semiconductor package which is excellent in adhesion between a heat dissipation slag and a substrate, is excellent in resin sealing property in a cavity portion, is excellent in reliability of a thermal cycle, and is excellent in productivity, a method of manufacturing the same, and a semiconductor. An object of the present invention is to provide a package and a manufacturing method thereof.

[0005]

The present invention is characterized by the following. (1) A cavity for mounting a semiconductor chip is formed by a through hole provided in a circuit board and a heat dissipation slag bonded to the circuit board. The circuit board has internal connection terminals connected to the semiconductor chip, and wiring. It has external terminals for mounting solder balls for connection to a board, etc., and wiring conductors connecting them, and at least the external terminals are provided on the surface of the circuit board opposite to the surface on which the heat dissipation slag is attached A semiconductor package substrate, the internal connection terminals of the circuit board,
A semiconductor package substrate in which an insulating base material supporting an external connection terminal and a wiring conductor is formed of a photosensitive insulating resin. (2) The semiconductor package substrate according to (1), wherein at least a surface of the heat dissipation slag that contacts the circuit board is roughened. (3) The substrate for a semiconductor package according to (1) or (2), wherein the thickness of the insulating base material is in a range of 100 to 500 μm. (4) A method for manufacturing a substrate for a semiconductor package, comprising a step of forming a portion to be a cavity of an insulating base material by exposure and development with ultraviolet rays. (5) The semiconductor package substrate of any one of (1) to (3), a semiconductor chip, a connection conductor for connecting an internal connection terminal of the semiconductor package substrate to the semiconductor chip, and sealing the semiconductor chip. Semiconductor package made of resin. (6) A semiconductor chip is mounted on a semiconductor package substrate of any of (1) to (3), and a connection conductor for connecting an internal connection terminal of the semiconductor package substrate to the semiconductor chip is formed. A method for manufacturing a semiconductor package, comprising a step of sealing a chip with a resin.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Photosensitive Insulating Resin) As the composition of the photosensitive insulating resin used for the substrate of the present invention, a photosensitive insulating resin or an insulating resin combining photosensitivity and thermosetting can be used. Any composition can be used as long as it is a composition containing a copolymer or monomer having a functional group that can be cross-linked by light or a composition in which a heat-crosslinkable functional group and a thermal initiator are mixed in addition to light. It is. The copolymer or monomer having a functional group that can be cross-linked by light includes a bismaleimide compound and an acridine compound as essential components, and further includes a hydrazine compound, a polyhydroxy compound, a quinone compound, or an amino compound as a polymerization stabilizer. There are one or more compounds. As the bismaleimide compound used in the present invention, m-di-N-maleimidylbenzene, bis (4-N-maleimidylphenyl) methane, 2,2-bis (4-N-maleimidylphenyl) Propane, 2,2-bis (4-N-maleimidyl-2,5
-Dibromophenyl) propane, 2,2-bis [4-
Various bismaleimide compounds such as (4-N-maleimidylphenoxy) phenyl] propane and 2,2-bis (4-N-maleimidyl-2-methyl-5-ethylphenyl) propane may be used as they are or as a mixture.
These bismaleimide compounds can be used either individually or as modified products of various resins. Examples of acridine compounds include 9-methylacridine, 9-ethylacridine, 9-butylacridine, 3,6-diethoxy-9-methylacridine, 1,2-di-9-acridinylethane, 1,3-di- Examples thereof include 9-acridinylpropane, 1,4-di-9-acridinylbutane, 1,7-di-9-acridinylheptane, and 1,8-di-9-acridinyloctane. These can be used alone or in combination of two or more. The hydrazine compound used in the present invention is 1,1-diphenyl-2-picrylhydrazine, and the polyhydroxy compound is 4-t.
tert-butylcatechol, catechol, quinone compounds, p-benzoquinone, 2,5-diphenyl-1,
4-benzoquinone, 1,4-naphthoquinone, as an amino compound, methylaniline, p-phenylenediamine,
N, N'-tetraethyl-p-phenylenediamine, 4
-Phenoxyaniline and the like. These compounds may be used in combination of several kinds. The blending amounts are 100 parts by weight of the bismaleimide compound and 0.1 to 3 of the acridine compound.
0.01 to 5 parts by weight with respect to 0 parts by weight is preferred. More preferably, 0.05 to 3 parts by weight per 100 parts by weight of the bismaleimide compound and 0.2 to 20 parts by weight of the acridine compound.
Parts by weight are preferred. With less than 0.1 parts by weight of acridine,
The effect of the compounding is small, and if it exceeds 30 parts by weight, the effect of storage stability by the polymerization stabilizer is small, which is not preferable. The optimum blending ratio of the bismaleimide compound and the acridine compound is determined depending on which of the properties of thermal reactivity or photoreactivity is used more. If the polymerization stabilizer is less than 0.01 part by weight, there is no effect on the storage stability of the film, and there is no effect on reducing the diameter of the via hole, ie, improving the resolution. When the amount exceeds 5 parts by weight, the photocurability becomes insufficient, so that the insulating properties and the solder heat resistance tend to decrease. As a resin composition to which the polymerization stabilizer is added, a bismaleimide compound and an acridine compound are essential as a photosensitive resin and / or a resin combining photosensitivity and thermosetting. Any of a composition containing a copolymer or a monomer having a group and / or a composition in which a heat crosslinkable functional group and a thermal initiator are mixed in addition to light can be used. Can be used. Epoxy resins, brominated epoxy resins, rubber-modified epoxy resins, rubber dispersions are the first group that can be used as the resin component of a composition in which a heat-crosslinkable functional group and a thermal initiator are mixed in addition to light. Examples include alicyclic epoxy resins such as epoxy resins, bisphenol A-based epoxy resins, and acid-modified products of these epoxy resins. In particular, when photo-curing is performed by light irradiation, modified products of these epoxy resins and unsaturated acids are preferred. The unsaturated acids include maleic anhydride,
Examples include tetrahydrophthalic anhydride, itaconic anhydride, acrylic acid, methacrylic acid and the like. These can be obtained by reacting the unsaturated carboxylic acid with the epoxy group of the epoxy resin in an equivalent amount or a mixing ratio of the equivalent or less. In addition, a thermosetting material such as a melamine resin and a cyanate ester resin, or a combination of the thermosetting material with a phenol resin is one of the preferable application examples.
In addition, the use of a flexibility-imparting material is also a suitable combination, for example, butadiene acrylonitrile rubber,
Examples include natural rubber, acrylic rubber, SBR, carboxylic acid-modified butadiene acrylonitrile rubber, carboxylic acid-modified acrylic rubber, crosslinked NBR particles, carboxylic acid-modified crosslinked NBR particles, and the like. By adding such various resin components, it becomes possible to impart various properties to the cured product while maintaining basic properties such as photocurability and thermosetting properties. For example, by combining with an epoxy resin or a phenol resin, it becomes possible to impart good electrical insulation to the cured product. When a rubber component is blended, the cured product is given tough properties, and the surface of the cured product can be easily roughened by surface treatment with an oxidizing chemical. The curable composition may contain commonly used additives (polymerization stabilizer, leveling agent, pigment, dye, etc.). In addition, there is no problem in adding a filler. As fillers, inorganic fine particles such as silica, fused silica, talc, alumina, hydrated alumina, barium sulfate, calcium hydroxide, aerosil, calcium carbonate, organic fine particles such as powdered epoxy resin, powdered polyimide particles, and powdered Teflon ( (Registered trademark) particles.
These fillers may be subjected to a coupling treatment in advance. These dispersions are used in kneader ball mills,
This can be achieved by a known kneading method such as a bead mill or a three-roll mill.

(Developer) A cavity is formed in a circuit board by a method of etching the unexposed portion of the photosensitive insulating resin with a developer.
An aqueous alkaline developer containing an organic solvent is used. Examples of the organic solvent used in the developer include glycol derivatives such as ethylene glycol, propylene glycol, trimethylene glycol, 1,4-butanediol, 1,5-pentanediol, 1,6-hexanediol, pinacol, and the like. Examples include dimers, trimers, multimers, and substituted products of lower alkyl groups such as methyl, ethyl, propyl, and butyl groups. Specific examples include diethylene glycol, ethylene glycol monoethyl ether, triethylene glycol monoethyl ether, ethylene glycol monobutyl ether, diethylene glycol monobutyl ether, and the like. Further, diacetone alcohol, acetone, ethyl acetate, 2-methoxyethanol, 2-ethoxyethanol, ethyl alcohol, methyl alcohol, isopropyl alcohol, butyl alcohol and the like are used. These may contain two or more organic solvents. In particular, diethylene glycol is effective for that purpose. The concentration of the organic solvent is 1 to 50% by volume. Preferably, it is 5 to 35% by volume. Examples of the alkali substance used in the developer include alkali metal hydroxides, carbonates, phosphates, borates and the like. For example, sodium hydroxide, potassium hydroxide, ammonium hydroxide,
Sodium carbonate, potassium carbonate, trisodium phosphate,
Examples include sodium borate and sodium metasilicate. As a combination of the aqueous alkaline developer containing an organic solvent, the concentration of diethylene glycol monobutyl ether is preferably 5 to 30% by volume, and the concentration of sodium borate is preferably 5 to 30 g / l. Also, when the circuit board is composed of a plurality of wiring conductor layers, via holes provided between the wiring conductor layers can be formed simultaneously with the formation of the cavity.

(Rinse treatment) Next, the photosensitive insulating resin layer after development is rinsed. As the rinsing liquid, an aqueous solution containing an organic solvent is used. As the organic solvent, the organic solvent described for the developer can be used. In particular, it is preferable to use an aqueous solution containing diethylene glycol monobutyl ether. The concentration of diethylene glycol monobutyl ether is preferably 0.1 to 90% by volume,
In particular, 1 to 20% by volume is more preferable. The method of rinsing may be dipping or spraying, and the method is not particularly limited. Less than 0.1% by volume has poor effect,
There is no difference in the effect even if it exceeds the volume%, and a large amount of energy is required for waste liquid treatment.

A method for manufacturing a semiconductor package substrate using such a technique can be performed by the following steps. a. A step of performing a roughening treatment on the surface of the copper plate to increase the adhesive strength with the insulating resin. In this step, the method of roughening is not particularly limited, and a method using mechanical polishing, a method using a chemical solution, a method of hitting abrasive grains such as sandblasting, or the like can be used. Among them, a method using a chemical solution is simple, and a method of forming an anchor by oxidation-reduction treatment or soft etching used in a multilayer printed wiring board or the like is preferable because of good productivity and good adhesion to an insulating resin. The roughness of the roughening is preferably about 0.1 to 5 μm,
When the thickness is less than 0.1 μm, the adhesion decreases, and when the thickness exceeds 5 μm, voids are generated at the time of forming the photosensitive insulating resin layer and developability is lowered.

B. Forming a photosensitive insulating resin layer on the roughened copper plate; To form the photosensitive insulating resin layer,
Depending on the form of the photosensitive insulating material, a printing method or a curtain coating method can be used for a liquid material, and a laminating method can be used for a dry film material. The photosensitive insulating resin layer of the present invention has a thickness of 100 to 500 μm,
If the thickness is less than 0 μm, the cavity cannot be mounted because the depth of the cavity is smaller than the thickness of the semiconductor chip, and if it exceeds 500 μm, formation of the photosensitive insulating resin layer becomes difficult.

C. A step of exposing a part of the photosensitive insulating resin layer to light by performing exposure to ultraviolet rays to a part other than a part where the cavity is to be formed, developing the part, and removing an unexposed part to form a cavity. A commonly used photomask is used, and a portion to be a cavity is shielded from light by a mask, and ultraviolet light is exposed. Thereafter, development is performed to form a cavity.

D. Performing a roughening treatment on the cured photosensitive insulating resin layer; As the roughening agent used in the roughening treatment, any one can be used as long as it swells and dissolves the resin. For example, a roughening solution of chromium / sulfuric acid, a roughening solution of alkali permanganate, sodium fluoride / Chromium / sulfuric acid roughening solution,
Borofluoric acid roughening solution or the like can be used. Among them,
The aqueous alkali permanganate solution can be used while being regenerated by anodic oxidation, so that the amount of waste liquid can be reduced, and the waste liquid treatment is preferable because it is safer than chromic acid and the like and has a smaller burden on the environment.

E. A step of applying a plating catalyst to the roughened photosensitive insulating resin layer. A step of applying a catalyst for forming a copper foil layer serving as a base for forming a circuit conductor by electroless plating. This plating catalyst employs the same technology as that of ordinary through-hole plating of wiring boards. That is, a substance that becomes a nucleus of plating, such as a tin colloid-based palladium catalyst or an alkali ion catalyst, can be used.

F. A step of performing electroless thin copper plating on the surface to which the plating catalyst has been applied. The substrate with the catalyst attached to the resin layer is contacted with an electroless copper plating solution having an ionized plating metal, a complexing agent for the plating metal, and a reducing agent for the plating metal, and the plating metal is applied to the entire substrate. Precipitate. The plating thickness is preferably 0.3 to 1.0 μm,
If the thickness is less than 0.3 μm, a uniform plating film may not be formed, and subsequent electroplating may cause a variation in film thickness. On the other hand, if it exceeds 1.0 μm, a good circuit cannot be formed because the electroless plating film swells.

G. A step of forming electrolytic copper plating to a thickness of 10 to 20 μm by electrolytic plating on the surface of the thin copper plating. Using general electrolytic copper plating technology,
Perform plating of 0 to 20 μm. The electroplating solution used is
Copper sulfate plating, which is easy to manage and efficient, is optimal. If the thickness of the electrolytic plating is less than 10 μm, there is a problem that the thermal cycling characteristics of the interlayer connection portion are deteriorated.
If the thickness exceeds 0 μm, the plating resist may be overhanged due to variations in plating film thickness, and the plating resist may not be peeled off.

H. Forming an etching resist and forming an internal connection terminal, an external connection terminal, and a wiring conductor; In the process of forming the etching resist, a general method of a multilayer printed circuit board can be used, and a method using a dry film, a method using an electrodeposition resist, forming a reverse pattern of the etching pattern with the dry film, and forming a metal such as solder A method of forming an etching resist or the like can be used. For the etching, a commonly used etching solution of cupric chloride or ferric chloride or an alkali etchant can be used.

I. A step of removing the etching resist;
Regarding the removal of the etching resist, a method using a general sodium hydroxide solution can be used for a dry film resist or an electrodeposition resist. As the solder stripping agent, there are a nitric acid stripping solution and a sulfamic acid type.

J. Forming a solder resist for insulatingly covering the wiring conductor; A solder resist is formed to protect the wiring at the time of connection by a solder ball. Also in this step, any of a generally used thermosetting type and photocuring type can be used, but a photocuring type capable of finishing the resist shape with high accuracy is preferable.

K. A step of performing electroless Ni / Au plating on at least the surface of the internal connection terminal. Electroless Ni / Au plating is performed on the copper surface not covered with the solder resist.
The thickness of the electroless Ni plating is preferably 3 to 5 μm, and the thickness of the electroless Au plating is preferably 0.1 to 0.3 μm. If the thickness of the Ni plating is less than 3 μm, the hardness required for wire bonding cannot be obtained, and if it exceeds 5 μm, problems such as cracking of the Ni plating film will occur. The Au plating thickness is
If it is less than 0.1 μm, the wire bonding property is poor.
Even if it exceeds 3 μm, there is no difference in the wire bonding property, so that it is not economical.

Further, it can be carried out by performing the following steps g1 to i1 instead of the steps g to i. g1. A step of forming a plating resist for pattern plating. As a resist for pattern plating, a general dry film type resist can be used. Plating 10-2
In order to perform 0 μm, the resist thickness is preferably 25 to 30 μm. With a resist having a thickness of less than 25 μm, a problem is likely to occur in the removability of the resist, and with a thick resist exceeding 30 μm, the resolution and adhesion may be reduced.

G2. A step of forming electrolytic plating to a thickness of 10 to 20 μm by electrolytic plating; Using a general electrolytic copper plating technique, 10 to 20 μm plating is performed on the entire substrate.
The most suitable electroplating solution is copper sulfate plating, which is easy to manage and efficient. The thickness of this electrolytic plating is 10μ
When the thickness is less than m, there is a problem that the thermal cycling characteristic of the interlayer connection part is deteriorated.

H1. A step of removing the plating resist, etching away only the thinned copper plating by etching, and forming an internal connection terminal, an external connection terminal, and a wiring conductor. As the stripping solution for the plating resist, a general aqueous solution of sodium hydroxide or an amine-based stripping solution can be used, and an amine-based solution having excellent stripping properties is preferable. As a solution for etching the thin copper plating, any solution can be used as long as it can etch copper, but a solution having a low etching rate such as a sulfuric acid / hydrogen peroxide-based etchant is suitable.

[0023]

EXAMPLE 1 (1) Step a: As shown in FIG.
The radiating slag 101 made of a copper plate having a thickness of m is subjected to an oxidation treatment with the following treatment liquid and conditions so as to obtain adhesive strength, thereby forming irregularities on the surface. (Oxidation solution) ・ NaOH ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ 20g / l ・ Na ₃ PO ₄・ 12H ₂ O ・ ・ ・ ・ ・ ・ ・ ・ ・・ ・ ・ ・ 30g / l ・ NaClO ₂・ ・ ・ ・ ・ ・ ・ ・ 80g / l ・ Pure water ······ Amount that becomes 1 liter in total (oxidation treatment conditions) · Temperature: 85 ° C · Time: 120 seconds Next, copper oxide formed by the above oxidation treatment (suboxide Copper is reduced to metallic copper while leaving irregularities. (Reduction solution) ・ NaOH ・ ・ ・ ・ ・ ・ ・ 5g / l ・ Dimethylamine borane ・ ・ ・ ・ ・ ・ ・5 g / l (reduction treatment conditions) Temperature: 25 ° C. Time: 120 seconds (2) Step b: As shown in FIG. 1B, one surface of the heat-dissipation slag 101 Laminating a photosensitive insulating resin sheet to form a photosensitive insulating resin layer 10
2 was formed. At this time, the photosensitive insulating resin sheet
A photosensitive insulating resin varnish having the following composition was applied to a release-treated polyethylene terephthalate film (thickness: 50 μm).
m) coated on top and dried at 80 ° C. for 10 minutes to give a film thickness of 10
What formed a 0-micrometer film was used. (Photosensitive insulating resin varnish) ・ 2,2-'bis (4,4'-N-maleimidylphenoxyphenyl) propane BBMI (trade name, manufactured by Hitachi Chemical Co., Ltd.) 30 parts by weight ・ An acid-modified epoxy resin synthesized by reacting 1 equivalent of tetrahydrophthalic anhydride with a bisphenol A type epoxy resin having an epoxy equivalent of 500 under a nitrogen atmosphere at 150 ° C. for 10 hours. Acrylonitrile butadiene rubber PNR-1H containing 4 mol% of carboxyl groups in the molecule (trade name, manufactured by Nippon Synthetic Rubber Co., Ltd.) 20 parts by weight 1,3-bis (9,9'-diacridino) heptane 5 parts by weight Aluminum hydroxide ..... 10 parts by weight Hardener Irgacure-651 (Ciba-Geigy Co., Ltd., trade name) 5 parts by weight HLM-V530 (Hitachi AIC Co., Ltd., trade name) was used as a laminator under the following conditions. .・ Laminating atmosphere: under reduced pressure (760 torr) ・ Air gauge pressure: 3 kg / cm ²・ Laminating speed: 0.5 m / min ・ Roll temperature: 110 ° C. (3) Step c: Next, cover the portion to be a cavity with a shielding part. Through the formed photo tool, the light amount is 300 mJ / cm ²
After irradiating the polyethylene terephthalate film on the film surface, the unexposed portion was developed and rinsed. As a developing solution, an aqueous alkaline developing solution containing an organic solvent was used, and diethylene glycol monobutyl ether was used as an organic solvent to 10% by volume. Further, an aqueous solution containing 15 g / l using sodium tetraborate (decahydrate) as an alkaline substance was prepared at 40 ° C.
Developed at a spray pressure of 1.0 kg / cm ² for 1 minute. As a rinse solution after development, an aqueous solution containing an organic solvent was used as an aqueous solution containing 10% by volume of diethylene glycol monobutyl ether.
A rinsing treatment was performed at kg / cm ² to form a cavity 2 as shown in FIG. (4) Step d: Next, apply ultraviolet light 2 to the substrate after development and rinsing.
After irradiating J / cm ² and then heat-treating at 150 ° C. for 1 hour for post-curing, KMnO ₄ : 60 g / l, NaO as a roughening liquid for chemically roughening the photosensitive insulating resin layer.
H: An aqueous solution containing 40 g / l was prepared, heated to 50 ° C., and immersed for 10 minutes. Then, SnCl ₂ : 30 g
/ L, HCl: 300 ml / l aqueous solution for 5 minutes at room temperature for neutralization. (5) Step e: Next, after the roughening treatment, the photosensitive insulating resin layer 1
In order to form a conductive circuit on the surface of No. 02, first, it was immersed in a catalyst for electroless copper plating HS-202B (trade name, manufactured by Hitachi Chemical Co., Ltd.) at room temperature for 15 minutes to provide a plating catalyst. (6) Step f: The substrate to which the plating catalyst has been applied is immersed in electroless copper plating CUST-201 (trade name, manufactured by Hitachi Chemical Co., Ltd.) at room temperature for 15 minutes to form a 0.5 μm-thick base copper plating. Formed. (7) Step g: As shown in FIG. 1D, electroplating was further performed by copper sulfate plating to form a plating layer 103 having a thickness of 15 μm on the surface of the photosensitive insulating resin layer. (8) Step h: As shown in FIG. 1E, an etching resist 10 is used to remove unnecessary portions of the plated conductor.
4 was replaced with H-W425 as an etching resist film.
(Made by Hitachi Chemical Co., Ltd., trade name)
A circuit pattern 105 including an internal connection terminal, an external connection terminal, and a wiring conductor was formed by photolithography and etching using a hydrochloric acid / iron chloride etchant. (9) Step i: Next, as shown in FIG. 1 (f), the etching resist 104 was removed from the etching resist 104 at a temperature of 50 ° C. and a spray pressure of 2.0 kg using a stripper RS-2000 (trade name, manufactured by Atotech) / Cm ² for one minute using a general spray-type peeling machine. (10) Step j: As shown in FIG. 1 (g), SR-7000 (trade name, manufactured by Hitachi Chemical Co., Ltd.) as a solder resist ink is printed and applied as a solder resist 106 on the substrate surface. After drying at 80 ° C. for 20 minutes, a photomask having a pattern formed so as to block ultraviolet light at a portion to be an opening was aligned at 450 mJ.
/ Cm ² , after exposure to sodium carbonate 1.5
% Was developed at a spray pressure 2.0 kgf / cm ² in a solution, post-exposure 1 J / cm ^2, post-heating 0.99 ° C., for 60 minutes to form a solder resist 106. (11) Step k: As shown in FIG. 1H, electroless nickel / gold plating 107 was performed using the following steps. -Degreasing Z-200 (trade name, manufactured by World Metal Co., Ltd.)
At 50 ° C. for 1 minute.・ Washing Rinse with running water at room temperature for 2 minutes. -Soft etching Immerse in 100 g / l ammonium persulfate at room temperature for 1 minute.・ Washing Rinse with running water at room temperature for 2 minutes. -Pickling treatment Immerse in 10% sulfuric acid at room temperature for 1 minute.・ Washing Rinse with running water at room temperature for 2 minutes.・ Activation Dip for 5 minutes at room temperature in a catalyst solution for electroless plating SA-100 (trade name, manufactured by Hitachi Chemical Co., Ltd.).・ Washing Rinse with running water at room temperature for 2 minutes. -Electroless nickel plating: Dipping treatment is performed at 85 ° C for 20 minutes in NIPS-100 (trade name, manufactured by Hitachi Chemical Co., Ltd.) which is an electroless nickel plating solution.・ Washing Rinse with running water at room temperature for 2 minutes. -Electroless gold plating Dipping in HGS-500 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is electroless gold plating, at 85 ° C for 5 minutes.・ Washing Rinse with running water at room temperature for 2 minutes. As shown in FIG. 1 (i), using the semiconductor package substrate manufactured in this manner, after forming a connection conductor 201, a semiconductor chip is mounted, and a sealing resin C is formed by wire bonding.
After preheating EC-1900 (trade name, manufactured by Hitachi Chemical Co., Ltd.) at 70 ° C. for 30 minutes, the inside of the cavity was sealed under the conditions of heating and drying at 150 ° C. for 60 minutes to form a semiconductor package (FIG. Not shown.)

Example 2 The same procedure as in Example 1 was carried out except that the steps g to i in Example 1 were changed to the following steps g1 to i1. (12) Step g1: A plating resist RY-3025 (trade name, manufactured by Hitachi Chemical Co., Ltd.) was formed in a portion other than a necessary portion of the plating conductor. (13) Step g2: Electroplating was further performed by copper sulfate plating to form a plating layer having a thickness of 15 μm on the surface of the photosensitive insulating resin layer. (14) Step h1: The etching resist of the etched substrate is removed at 50 ° C. under a spray pressure of 2.0 k using a stripper RS-2000 (trade name, manufactured by Atotech).
Peeling was performed using a general spray-type peeling machine under the conditions of g / cm ² and 1 minute. (15) Step i1: 30 ° C. using Cobra Etch (trade name, manufactured by Ebara Densan Co., Ltd.) as an etching solution for the underlying copper
The underlying copper was removed using a general spray etching machine under a condition of a spray pressure of 2.0 kg / cm ² for 1 minute.

Example 3 In Example 1, CZ-810 was added to the roughening solution in Step a.
All were performed in the same manner as in Example 1 except that 3 μm was etched using 3 (trade name, manufactured by Mec Co., Ltd.) to form irregularities.

Comparative Example 1 Using a glass prepreg impregnated with an epoxy resin having a cavity formed by punching, a circuit board with a cavity having wiring formed thereon was laminated on a copper slag.

Comparative Example 2 Example 1 was repeated except that a copper slag without any roughening was used.
Was performed in the same manner as described above.

The following test was performed on the substrate manufactured as described above. Table 1 shows the results. (Test method)-Gas phase thermal shock test: Using a thermal shock chamber TSR-103 (manufactured by Kusumoto Seisakusho Co., Ltd., trade name), a cycle of -65 ° C, 30 minutes, 125 ° C, 30 minutes, 1 cycle And the change in connection resistance was measured. The connection resistance was measured using a multimeter 3457A (trade name, manufactured by Hewlett-Packard Company). (Judgment) Judgment was evaluated as x when the connection resistance increased by 10% or more, and as o when less than 10%. ×: Cracks occurred in cavity corners in less than 500 cycles ○: No cracks in cavity corners in 1000 cycles or more

(Solder Heat Resistance) (Test Method) Float the substrate in a solder bath at 260 ° C.
It was left still for 0 seconds. Then, it was left to return to room temperature and the appearance was observed. (Judgment) As a judgment, the appearance was visually observed, and the result was as follows. ○: no swelling between the copper slag and the resin at 260 ° C. for 60 seconds or more ×: swelling between the copper slag and the resin for less than 60 ° C. and 60 seconds

(Fillability of sealing resin) (Test method) A sealing material was injected into a cavity portion,
After preheating for 0 minutes, the cross section of the substrate further heated and dried at 150 ° C. for 60 minutes was observed. (Judgment) The judgment was made as follows as a result of visually observing the appearance. ○: No void at cavity corner ×: Void at cavity corner

[0031]

[Table 1]

[0032]

As described above, a semiconductor package substrate having excellent adhesiveness between a photosensitive insulating resin layer constituting a cavity and copper slag, excellent sealing resin filling property, and excellent productivity, and its production. A method, a semiconductor package, and a method for manufacturing the same can be provided.

[Brief description of the drawings]

FIGS. 1A to 1I are cross-sectional views showing respective steps for explaining one embodiment of the present invention.

[Description of Signs] 101. Copper slag 102. Photosensitive insulating resin 103. Copper plating 104. Etching resist 105. Circuit pattern 106. Solder resist 107. Electroless Ni / Au plating 108. Solder ball 2. cavity

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Shigeharu Ariya 1500 Oji Ogawa, Shimodate City, Ibaraki Prefecture Inside Hitachi Chemical Co., Ltd. (72) Inventor Akishi Nakao 1500 Ogawa Ogawa Shimodate City, Ibaraki Prefecture Hitachi Chemical Industrial Research Institute

Claims (6)

[Claims] A cavity for mounting the semiconductor chip;
Formed with through holes provided in the circuit board and heat dissipation slag bonded to the circuit board, the circuit board has internal connection terminals connected to the semiconductor chip and solder balls for connection to the wiring board etc. A semiconductor package substrate having an external terminal and a wiring conductor connecting between the external terminal and at least the external terminal provided on a surface of the circuit board opposite to a surface to which a heat dissipation slag is attached, the circuit board comprising: A substrate for a semiconductor package, wherein an insulating base material for supporting the internal connection terminals, the external connection terminals, and the wiring conductor is formed of a photosensitive insulating resin. 2. The semiconductor package substrate according to claim 1, wherein at least a surface of the heat dissipation slag that contacts the circuit board is roughened. 3. The semiconductor package substrate according to claim 1, wherein the thickness of the insulating base material is in a range of 100 to 500 μm. 4. A method for manufacturing a substrate for a semiconductor package, comprising a step of forming a portion to be a cavity of an insulating base material by exposure and development with ultraviolet rays. 5. The semiconductor package substrate according to claim 1, a semiconductor chip, a connection conductor for connecting an internal connection terminal of the semiconductor package substrate to the semiconductor chip, and sealing the semiconductor chip. Semiconductor package made of resin. 6. A semiconductor package mounted on a semiconductor package substrate according to claim 1, wherein a connection conductor for connecting an internal connection terminal of the semiconductor package substrate to the semiconductor chip is formed. A method for manufacturing a semiconductor package, comprising a step of sealing a chip with a resin.