JP2002134321A - High-frequency coil and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-frequency coil that shows a high SRF(self-resonant frequency) and a high Q-value in a high-frequency region and reduces the characteristic fluctuations due to the coil being mounted on a substrate, in different directions. SOLUTION: This high-frequency coil is constituted, by alternately laminating coil conductor layers 11, 13, 15, 17 and 19, having high aspect ratios and mutually insulating layers 12, 14, 16, 18, and 20 having high Q-values. The insulating layers are made of an organic material, such as the vinyl benzyl, etc., and have terminal electrodes at both end sections, in the directions of magnetic fluxes which are generated, when helical coil conductors 30 composed of the coil conductor layers are energized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency coil in which coil conductor layers and insulating layers are alternately laminated, and shows a particularly high SRF (self-resonant frequency) and a high Q in a high-frequency region. The present invention relates to a chip coil type high-frequency coil capable of reducing variation in characteristics depending on a mounting direction of a coil on a substrate.

[0002]

2. Description of the Related Art Conventionally, as disclosed in JP-A-11-26241, a coil conductor is formed in a helical shape by a ceramic laminating method, and terminal electrodes are provided at both ends in a magnetic flux direction of the laminate generated by energizing the coil conductor. Is formed. It is known that, when a chip coil is formed with this configuration, the inductance value does not fluctuate depending on the mounting direction of the chip, and the stray capacitance between the mounting substrate and the coil conductor decreases, so that the SRF during mounting increases. .

[0003]

However, the above-mentioned conventional configuration has the following problems.

Since the ceramic laminating method is used, the firing temperature is high, a large number of voids are formed on the surface and inside of the conductor layer, the surface irregularities increase, the effective resistance at high frequencies increases, and Q decreases.

Since the coil conductor is a sintered body, the grain boundary resistance is large, the effective resistance is increased, and the Q is reduced.

[0006] Because the relative dielectric constant of the ceramic of the insulating layer is high (the relative dielectric constant ε = 4.3), the “layered structure formed by the same ceramic lamination method in the direction perpendicular to the direction of the magnetic flux generated by energizing the coil conductor” Form terminal electrodes on both ends "
Compared with the type coil, S
Although the RF is large, there is still room for improvement in the SRF.

[0007] In view of the above, the present invention provides a high SRF.
It is an object of the present invention to provide a high-frequency coil which shows (self-resonant frequency), shows a high Q in a high-frequency region, and is capable of reducing a characteristic variation due to a mounting direction of the coil on a substrate, and a method of manufacturing the same.

[0008] Other objects and novel features of the present invention will be clarified in embodiments described later.

[0009]

According to a first aspect of the present invention, there is provided a high-frequency coil in which a coil conductor layer and an insulating layer are alternately laminated, wherein the insulating layer is made of an organic material. It is characterized in that terminal electrodes are formed at both ends in the direction of magnetic flux generated by energization of the coil conductor composed of the coil conductor layer.

A high-frequency coil according to a second aspect of the present invention is characterized in that, in the first aspect, the coil conductor has a helical winding.

A high frequency coil according to a third aspect of the present invention is characterized in that, in the first or second aspect, the relative permittivity of the insulating layer is 4 or less.

According to a fourth aspect of the present invention, in the high frequency coil according to the first, second or third aspect, Q of the insulating layer is 1
It is characterized by being at least 00.

According to a fifth aspect of the present invention, in the high frequency coil according to the first, second, third or fourth aspect, the insulating layer is made of vinylbenzyl.

According to a sixth aspect of the present invention, there is provided a high-frequency coil according to the first, second, third, fourth, or fifth aspect, wherein the insulating layer has flexibility.

According to a seventh aspect of the present invention, there is provided a high-frequency coil according to the first, second, third, fourth, fifth or sixth aspect, wherein the coil conductor layer is made of copper.

The high frequency coil according to the invention of claim 8 is characterized in that in claim 1, 2, 3, 4, 5, 6 or 7, the aspect ratio of the coil conductor layer is 0.3 or more. I have.

According to a ninth aspect of the present invention, a coil conductor layer and an insulating layer made of an organic material are alternately laminated, and terminal electrodes are provided at both ends in a magnetic flux direction generated by energization of the coil conductor composed of the coil conductor layer. Is a method of manufacturing a high-frequency coil, wherein the step of manufacturing the coil conductor layer comprises:
A base forming step of forming a base conductor layer for plating of 5 μm or less on at least one side of the substrate, (2) a resist forming step of providing a photosensitive resist on the base conductor layer, and (3) a photolithography method. A patterning step of removing the conductor pattern portion of the resist,
(4) an electrolytic plating step of forming a main conductor layer on the conductor pattern portion where the resist has been removed by electrolytic plating; (5) a resist removing step of removing the photosensitive resist; and (6) an etching of the base by etching. And a base removing step of removing an unnecessary portion of the conductor layer.

In a tenth aspect of the present invention, the method for manufacturing a high-frequency coil according to the ninth aspect is characterized in that at least the first layer of the underlying conductor layer for plating is formed by electroless plating.

The method of manufacturing a high-frequency coil according to claim 11 of the present invention is characterized in that, in claim 10, the electrolytic plating is copper plating.

According to a twelfth aspect of the present invention, in the method for manufacturing a high-frequency coil, the photosensitive resist is a dry film according to the ninth, tenth, or eleventh aspect.

The method of manufacturing a high-frequency coil according to claim 13 of the present invention is characterized in that, in claim 9, 10, 11, or 12, the exposure of the photosensitive resist is performed by a parallel exposure machine.

The method of manufacturing a high-frequency coil according to the invention of claim 14 of the present application is characterized in that in claim 9, 10, 11, 12, or 13, the electrolytic plating is bright plating.

The method of manufacturing a high-frequency coil according to claim 15 of the present invention is characterized in that, in claim 9, 10, 11, 12, 13, or 14, the electrolytic plating is copper plating.

The method of manufacturing a high-frequency coil according to the invention of claim 16 of the present application is the method of claim 9, 10, 11, 12, 13, 13.
In 4 or 15, the etching is wet etching.

The method of manufacturing a high-frequency coil according to the invention of claim 17 of the present application is the method of claim 9, 10, 11, 12, 13, 13.
In 4, 15 or 16, the metal species of the base conductor layer and the main conductor layer are selectively combined in a combination capable of being etched, and the underlayer removal step is treated with an etching solution for etching only the base conductor layer. .

The method for manufacturing a high-frequency coil according to the invention of claim 18 of the present application is the method of claim 9, 10, 11, 12, 13, 13.
4, 15, 16 or 17, wherein the unevenness of the surface of the main conductor layer formed by the electrolytic plating is within 5 μm.

The method of manufacturing a high-frequency coil according to the invention of claim 19 of the present application is directed to claims 9, 10, 11, 12, 13, 1
In 4, 15, 16, 17, or 18, when a coil conductor layer is laminated on the coil conductor layer via an insulating layer of the organic material, a via hole is formed in the insulating layer by laser processing. And

The method for manufacturing a high-frequency coil according to the invention of claim 20 of the present application is the method of claim 9, 10, 11, 12, 13, 13.
In 4,15,16,17 or 18, when the coil conductor layer is laminated on the coil conductor layer via the insulating layer of the organic material, a photolithography method using a photosensitive insulating layer is used. Is characterized by forming a via hole.

[0029]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a high-frequency coil according to the present invention and a method of manufacturing the same will be described below with reference to the drawings.

An embodiment of a high-frequency coil and a method of manufacturing the same according to the present invention will be described with reference to FIGS. FIG.
(A) shows an organic insulating substrate 10 and FIG.
0, a first coil conductor layer 11 formed on one side of FIG. 1, a first organic insulating layer 12 as an interlayer insulating layer laminated thereon is shown in FIG. (E) shows a second organic insulating layer 14 as an interlayer insulating layer laminated thereon, and FIG. (F) shows a second coil conductor layer 13 formed thereon. Third coil conductor layer 15
FIG. 2G shows a third organic insulating layer 16 as an interlayer insulating layer laminated thereon, and FIG. 2H shows a fourth coil conductor layer 17 formed thereon. (I) is a fourth organic insulating layer 1 as an interlayer insulating layer laminated thereon.
8, (J) shows a fifth coil conductor layer 19 formed thereon, and (K) shows a fifth organic insulating layer 20 laminated thereon.

The first to fifth coil conductor layers 11, 13, 1
5, 17, and 19 are first to fourth organic insulating layers 12, 14,.
Are connected to each other through via holes 16 and 18;
As a whole, the coil conductor 30 has a helical winding (helical pattern).

In addition, the organic insulating substrate 10 shown in FIG. 1A is provided with a through-hole 22 filled with a conductive paste (a material that cures at room temperature, such as a conductive adhesive). 2, the terminal electrode 23 formed on the outer surface of the organic insulating substrate 10 and one end of the coil conductor 30 are connected. The outermost organic insulating layer 20 shown in FIG.
A via hole 24 is formed through the terminal electrode 25 formed on the outer surface of the organic insulating layer 20 as shown in FIG.
And the other end of the coil conductor 30 are connected.

As can be seen from FIG. 2, the coil conductor 30 is a so-called vertically wound helical pattern, and the positional relationship between the coil conductor 30 and the terminals 23 and 25 at both ends is determined by the first to fifth coil conductor layers 11 and Terminal electrodes 23 and 25 are arranged at both ends in the direction of magnetic flux generated by energization of a coil conductor 30 composed of 13, 15, 17, and 19.

The organic insulating substrate 10 and each organic insulating layer 1
The relative permittivity of 2, 14, 16, 18 is 4 or less, and each of the coil conductor layers 11, 13, 15, 17, 19 has a film thickness of 15 μm.
m and the aspect ratio is 0.3 or more. By lowering the relative permittivity of the insulating substrate and the insulating layer using an organic material, the occurrence of stray capacitance when a conductor layer is provided can be reduced. When the relative dielectric constant exceeds 4, the occurrence of stray capacitance becomes remarkable, and the significance of using an organic material is diminished. In addition, by increasing the aspect ratio, the cross-sectional area of the high-frequency current path can be increased without increasing the eddy current loss of the conductor layer. When the thickness is less than 15 μm and the aspect ratio is less than 0.3, the increase in the cross-sectional area of the current path is only slight.

The first to fifth coil conductor layers 11, 13, 1
5, 17, and 19 are manufactured by a pattern plating method. The case of this pattern plating method will be described below.

In the first step (base formation step) in FIG. 3, after the surface of the organic insulating substrate 10 is roughened, a base conductor layer 41 for plating having a thickness of 5 μm or less is formed on one side. If the thickness of the underlying conductor layer 41 exceeds 5 μm, it takes a long time to perform etching for removing the unnecessary underlying conductor layer 41 in a later step, and the main conductor layer provided on the underlying conductor layer 41 may be etched. Is not preferred.

The method for forming the base conductor layer 41 is a thin film method such as sputtering, vapor deposition, or ion plating;
A wet method such as electroless plating or electroless plating followed by electroless plating, or a combination thereof. An example of the combination is a method in which a 0.1 μm Ti film is formed by a sputtering method and then a 2 μm thick film is formed by electrolytic copper plating. Among them, the method of electroless plating or the method of thickening by electroplating on this is preferable because of good mass productivity and easy scale-up.

The type of metal is preferably low in specific resistance and inexpensive. Copper is a preferred material with a good balance between resistivity and cost. Also, a film can be easily formed by electroless copper plating with good mass productivity.

Next, in a second step (resist forming step), a photocurable dry film 42 as a photosensitive resist is stuck on the underlying conductor layer 41 with a laminator.
Here, the thickness of the dry film 42 is preferably 80% or more of the thickness of the main conductor layer formed in a later step. For example, the thickness of the dry film 42 is 80 μm.

In the third step (patterning step), the dry film 42 is exposed and developed by a parallel exposure machine using a photolithography technique to form a pattern of the first coil conductor layer shown in FIG. 1B. . Here, the hatched portion in the figure becomes the groove 43 from which the dry film 42 has been removed.
The width of the conductor pattern is 60 μm. The parallel exposure machine is used because it can irradiate a parallel light beam perpendicularly to the dry film 42, and can pattern a groove having a narrow width and a side surface almost vertical as compared with the case of scattered light.

In the fourth step (electrolytic plating step), a 80 μm thick main conductor layer 44 is formed in the groove 43 of the dry film 42 by bright copper sulfate plating as electrolytic plating. Here, the reason why the bright plating is used is to make the surface of the conductor layer 44 a mirror-like surface and reduce irregularities. The conductive layer 44 may be plated so that the thickness thereof is slightly larger than the depth of the groove 43.

In the fifth step (resist removing step), the dry film 42 is peeled off and removed, so that the underlying conductor layer 41 is exposed.

In the sixth step (underlying layer removing step), the whole is subjected to an etching process by wet etching to form the underlying conductor layer 41.
To remove unnecessary parts.

By the above first to sixth steps, FIG.
As described above, the first coil conductor layer 11 is formed on the organic insulating substrate 10. Further, the aspect ratio of the first coil conductor layer 11 can be made 0.3 or more (more preferably, 0.4 or more) by this method.

In a seventh step (interlayer insulating layer forming step), a photosensitive insulating resin is applied on the first conductor layer 11 to a thickness of 30 μm to form a first organic insulating layer 12 as an interlayer insulating layer.

In the eighth step (via hole forming step), the first organic insulating layer 12 is exposed and developed by photolithography to form a via hole 21 at the hatched position in FIG. 1C. The diameter of the via hole is about 50 μm.

The via hole may be formed to have a mortar-shaped cross section. With the mortar-shaped cross section, the reliability of the connection can be further improved.

Thereafter, the same steps as the first to sixth steps are repeated. That is, in the ninth step (base formation step),
After the surface of the first organic insulating layer 12 is roughened, a plating base conductor layer 51 of 5 μm or less is formed by electroless plating of copper or the like. If the thickness of the underlying conductor layer 51 exceeds 5 μm, it takes time to remove unnecessary underconductor layer 51 in a later step, and the main conductor layer provided on the underlying conductor layer 51 may be etched. Is not preferred.

Next, in a tenth step (resist forming step), a photocurable dry film 52 as a photosensitive resist is stuck on the underlying conductor layer 51 with a laminator. Here, the thickness of the dry film 52 is preferably 80% or more of the thickness of the main conductor layer formed in a later step. For example, the thickness of the dry film 52 is 80 μm.

In the eleventh step (patterning step), the dry film 52 is exposed and developed by a parallel exposure machine using a photolithography technique, and the second film shown in FIG.
A coil conductor pattern is produced. Here, the hatched portions in the figure become the groove portions 53 from which the dry film 52 has been removed. The width of the conductor pattern is 60 μm.

In the twelfth step (electrolytic plating step), an 80 μm thick main conductor layer 54 is formed in the groove 53 of the dry film 52 by bright copper sulfate plating as electrolytic plating.
Here, the reason why the bright plating is used is to make the surface of the main conductor layer 54 mirror-like and reduce irregularities. Note that the main conductor layer 54 may be plated so that the thickness thereof is slightly larger than the depth of the groove 53.

In a thirteenth step (resist removing step), the dry film 52 is peeled off and removed, so that the underlying conductor layer 51 is exposed.

In a fourteenth step (underlying removal step), the entire surface is subjected to an etching process by wet etching to form an underlying conductor layer 5.
1. Remove unnecessary portions.

By the above ninth to fourteenth steps, FIG.
As shown in (D), the second coil conductor layer 13 is formed on the first organic insulating layer 12. Further, by this method, the aspect ratio of the second coil conductor layer 13 can be made 0.3 or more (more preferably, 0.4 or more).

By repeating the above seventh to fourteenth steps, the second to fourth organic insulating layers 14 and 1 are formed.
6, 18 and third to fifth coil conductor layers 15, 17, 1
9 are sequentially laminated, and finally a fifth organic insulating layer 20 covering the fifth coil conductor layer 19 is formed.

The organic insulating substrate 10 has a diameter of 100 μm.
The conductive paste is provided by forming a through hole 22 of the above, a via hole 24 having a diameter of 100 μm is formed in the fifth organic insulating layer 20, and then the outer surface of the organic insulating substrate 10 and the fifth organic insulating layer 20 is formed. An electroless copper plating film is formed, and a copper layer having a thickness of 18 μm is formed by copper sulfate plating using the electroless copper plating film as a base film, and as shown in FIG.
And

Thus, as shown in the perspective view of FIG.
A vertical helical winding coil conductor 30 including first to fifth coil conductor layers 11, 13, 15, 17, 19 connected between the terminal electrodes 23, 25;
Terminal electrodes 2
Thus, a high-frequency coil having a high SRF and a high Q value, which is formed by forming 3, 25, can be obtained. In this high-frequency coil, the coil conductor 30 of the helical winding is arranged perpendicularly to the surface of the mounting substrate.

As described in the present embodiment, the material of the insulating substrate 10 to be used is an organic material. Although there is an inorganic vitreous substrate as a high-frequency substrate, it has good characteristics but is liable to be broken and has a problem in mechanical strength.

The material of the insulating substrate 10, the organic insulating layers 12, 14, 16, and 18 serving as interlayer insulating films, and the outer organic insulating layer 20 are preferably those having a small dielectric constant in order to reduce stray capacitance. In the present embodiment, the relative permittivity is set to 4 or less. Further, a material having a large Q is preferable in order to reduce the dielectric loss. Specifically, the insulating substrate 10 and the organic insulating layer 1
The relative dielectric constants of 2, 14, 16, 18, and 20 are each 4 or less, and Q is preferably 100 or more.
Desirably, it is not less than 00. The material of the insulating substrate 10 and the organic insulating layers 12, 14, 16, 18, and 20 may be selected from, for example, the following Table 1 in consideration of the operating frequency, the target Q value, and the cost. Among them, vinylbenzyl is a preferable material because it has a good balance of dielectric constant, Q, mass productivity, and cost.

Table 1 Product name Relative permittivity Q fluororesin 2.1 10,000 Polyethylene 2.2 5000 PPO 2.5 1200 Vinylbenzyl 2.5 260 Cyanate ester 2.7 1000 Polyetherimide 3670 Polyimide 3.6 200 Epoxy 4.3 70 BT Resin 2.5 500 Polyolefin 2.6 2000 Polyfumarate 2.6 250 Polyarylate 2.6 220

The organic insulating substrate 10 and the organic insulating layer 1
For 2, 14, 16, 18, and 20, a core material can be used to improve mechanical strength. As the core material, D glass cloth, E glass cloth, Kevlar cloth and the like can be used as shown in Table 2 below. Generally, a material having a low dielectric constant and a low loss is more expensive, but it is preferable to use a material having a low dielectric constant as far as the cost permits.

Table 2 Cloth type Relative permittivity D glass cloth 7.2 E glass cloth 4.7 Kevlar cloth 2.5

Further, it is more preferable to use a flexible resin as an organic material for the insulating substrate 10 and each of the organic insulating layers 12, 14, 16, 18, and 20. The coefficient of thermal expansion between the coil conductor and the resin is significantly different, and if a resin having poor flexibility is used, problems such as cracks are generated in a reliability test such as a heat cycle. To give a specific measure of flexibility, the elongation percentage of the resin is 3% or more,
The Erichsen value is 3 mm or more.

The first to fifth coil conductor layers 11, 13, 1
The materials 5, 17, and 19 preferably have low specific resistance, good workability and formability, and are inexpensive. Silver, copper, aluminum, gold and the like can be cited as material candidates, but copper is most preferable in consideration of the above three points.

Further, each of the coil conductor layers 11, 13, 15,
17 and 19 are preferably as high as possible. In this way, the cross-sectional area of the high-frequency current path can be increased without increasing the floor area of the substrate. In the high frequency region, the current flows only on the surface of the conductor due to the skin effect, and its thickness is only about 2 μm at 1 GHz for copper, for example. To reduce the conductor loss by increasing the cross-sectional area of the current path, the conductor width of the coil conductor layer or the height of the coil conductor layer must be increased, but the former method increases the floor area of the substrate. . According to the latter method, conductor loss can be reduced without increasing the floor area of the substrate.

In consideration of these points, the aspect ratio of the conductor layer needs to be 0.3 or more, preferably 0.4 or more, and more preferably 0.6 or more.

Each of the coil conductor layers 11, 13, 15, 17,
In the method of construction 19, it is preferable to form copper by the pattern plating method described with reference to FIG. The subtractive method, which is frequently used at present, utilizes isotropic chemical etching, and it is difficult to form a high aspect pattern. In the lamination method, a fusion layer with an insulator is formed on the surface of the conductor that is baked at high temperature, and the surface resistance increases, and the loss tends to increase in the high-frequency region where current flows only on the surface. There is no need to worry about this because it is a process.

According to the pattern plating method, the three surfaces of the coil conductor layer are preferably smooth. Here, it is more preferable to make the electrolytic plating a bright plating, since the unevenness on the surface is further reduced. Also, the coil conductor layers 11, 13, 1
In the case where 5, 17, and 19 are formed in a high aspect, the aspect ratio of the conductor layer is limited to about 0.2 at the maximum in the subtractive method, but the aspect ratio can be 0.3 or more in the present method. For example, a coil conductor layer having an aspect ratio of about 1 can be easily formed.

Further, it is preferable to adopt an electroless plating method for the formation of the conductive layer for the underlayer for plating and to perform an etching on the entire surface by a wet method because mass productivity is enhanced.

The formation of the base conductor layer for plating is carried out in the following manner.
Examples of the method include a thin film dry method such as sputtering, vapor deposition, and ion plating, and a wet method such as electroless plating.
Among these, the electroless plating method is preferable because of its excellent mass productivity. In the case of this electroless plating, it is necessary to roughen the underlayer surface. However, in this example, since the underlayer is a resin, it can be easily roughened by a physical method such as polishing or a chemical method using potassium permanganate or the like. This is preferable.

For the etching of the entire surface, both dry etching and wet etching are possible, and the latter is preferable because of its excellent mass productivity.

The coil conductor layers 11, 13, 15, 1
It is most preferable that the irregularities on the surfaces 7 and 19 are smaller than the skin depth at the upper limit of the operating frequency range. However, even when the irregularities exceed the value, the effective resistance is reduced and the loss is reduced by reducing the irregularities. In particular, the coil conductor layers 11, 1
It is desirable that at least one surface of 3,15,17,19 is not more than three times the skin depth of the operating frequency (for example, 1 GHz), and when compared with the ceramic lamination method, the surface is not more than 5 μm. This is particularly preferred. It is most preferable that all four surfaces of the conductor layer surface are smooth. However, if at least one surface is smooth, it is effective for loss reduction.

Further, the advantages in the manufacturing method in the case of the pattern plating method will be described. Since the underlying conductive layer 41 for plating in the first step of FIG. An electric current can flow and the plating time can be shortened. This is particularly effective when the height of the main conductor layer 44 is increased to form a high aspect shape. In other words, when the main conductor layer 44 is thick, if the plating current is small, the plating operation time is greatly increased, and mass productivity is deteriorated.

It is to be noted that there is also a method of first patterning the conductive layer under the plating and thickening it by electrolytic plating. However, this method generally increases the resistance of the plated wire, so that the current during plating can be increased. In addition, electrolysis concentrates on the convex portions of the pattern, and the plating becomes thicker, and the concave portions become thinner on the contrary, and the patterning accuracy deteriorates.

In the second and third steps, it is preferable to use a photosensitive resist for forming a plating pattern for pattern plating, since highly accurate patterning can be performed. If the resist is thickened, a high aspect pattern can be easily formed. When the resist is thick, it is preferable to use a parallel exposure machine capable of irradiating a parallel beam because the wall surface of the resin is processed vertically.

As described with reference to FIG. 3, it is preferable to use the dry film 42 for the photosensitive resist because a high aspect pattern can be easily formed.

For example, considering the case where a resist layer is formed using a liquid resist by a spin coating method, it is necessary to increase the viscosity of the resist in the case of thick coating. Is not accurate.
It is also difficult to dry the solvent. In the case of a dry film, the film thickness is guaranteed from the beginning, and there is an advantage that there is no need to dry the solvent.

In the case of forming a high aspect pattern, a method of forming a resist pattern after panel plating and performing dry etching is also conceivable. In this case, a high aspect pattern can be formed with high precision, but the etching speed is slow, and the upper limit of the film thickness that can be industrially produced is about 10 μm. Sacrificed.

The upper limit of the thickness of the plating base conductor layer 41 is determined by the ease of etching in the sixth step. If the main conductor layer 44 and the base conductor layer 41 cannot be selectively etched, the thickness of the base conductor layer 41 is
Is an upper limit. If the thickness exceeds this,
The amount of etching of the main conductor layer 44 increases, the loss as a high-frequency coil increases, and the pattern accuracy of the main conductor layer 44 also decreases.

If the main conductor layer 44 and the underlying conductor layer 41 can be selectively etched, the thickness may be larger than this. However, if the thickness is too large, side etching of the underlying conductor layer 41 becomes large, so the upper limit is 1/3. .

The electrolytic plating method of the fourth step is a preferable production means because the film forming speed is high and the scale-up is easy. In particular, when a high aspect conductor is formed, the thickness of the main conductor layer 44 may exceed 100 μm in some cases, so this is an extremely important method for securing mass productivity.
The use of bright plating is preferable because unevenness on the three surfaces of the main conductor layer 44 is reduced. Metals having a low specific resistance such as copper and silver can be plated. Among them, copper is inexpensive, has low specific resistance, and hardly causes migration as compared with silver.

The etching of the base conductor layer 41 for plating in the sixth step can be either dry etching or wet etching. However, in consideration of mass productivity, wet etching is preferable as described in this embodiment. Wet etching has good mass productivity and is easy to scale up.

It is also preferable to use a metal which can be selectively etched with the main conductor layer 44 for the base conductor layer 41 for plating. This can prevent the main conductor layer 44 from being thinned during the sixth step. As an example of the combination, there is a case where the base conductor layer is titanium and chromium and the main conductor layer is copper.

In the processing of the via hole 21 in the eighth step, the first to fourth organic insulating layers 12, 14, 14 as interlayer insulating layers are formed.
If the photosensitive layers 16 and 18 are photosensitive, they are formed by photolithography, and if not, a laser processing method is preferably used. In the case of the photolithography method, a large number of holes can be formed at one time, and thus it is preferable to use a large number of holes. Also, the accuracy of drilling is high because it is almost determined by the accuracy of the photomask. The merit of drilling by the laser processing method is that the type of resin is not selected. In addition, when photosensitivity is imparted to a resin, generally, characteristic values such as Q and dielectric constant decrease, and mechanical strength also deteriorates. In the case of the laser processing method, a resin can be freely selected, so that an organic insulating layer having good characteristics can be used.

According to this embodiment, the following effects can be obtained.

(1) The coil conductor layers 11, 13, 15, 17, 19 and the organic insulating layer 12,
14, 16, 18, and 20 are alternately laminated, and the terminal electrodes 23, 25 are formed at both ends in the direction of magnetic flux generated by energization of the coil conductor 30 composed of the coil conductor layer. As viewed from the side substrate, the helically wound coil conductor 30 is vertically wound, so that the mountability can be improved. That is, even if any surface is mounted on the mounting board, a change in characteristics such as an inductance value is small.

(2) The insulating substrate 10 and the insulating layer 12,
14, 16, 18, and 20 are made of an organic material,
Since the dielectric constant can be reduced as compared with the ceramic material, the SRF can be increased.

(3) The Q can be improved in a high frequency range. This can be achieved for the following reasons. The surfaces of the coil conductor layers 11, 13, 15, 17, and 19 are made smooth by using the interlayer insulating layer as a resin and generating it at a low temperature. Each conductor layer is formed by the pattern plating method described with reference to FIG. 3 so that the surface of the coil conductor 30 is smooth and the coil conductor 30 has a high aspect. The insulating substrate 10 and the insulating layers 12, 14, 16, 18,
20 is a high Q resin.

[0089]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a high-frequency coil according to the present invention and a method of manufacturing the same will be described in detail with reference to embodiments.

Example 1 A through-hole having a diameter of 0.1 mm was formed at a predetermined position on a 0.2-mm-thick vinylbenzyl substrate having 18 μm copper adhered on both sides as shown in FIG. Was filled with a conductive paste, and the copper layer on one side was peeled off.

Thereafter, a pattern plating method using electroless copper plating as a base and copper sulfate plating as a pattern plating is used as shown in FIG.
The first coil conductor layer of (B) was formed (by the manufacturing method of FIG. 3). Here, the width of the coil conductor layer: 60 μm and the height: 70
μm.

Next, the first organic insulating layer of FIG. 1C is formed with vinylbenzyl so that the film thickness on the coil conductor layer becomes 30 μm, and the bottom portion has a diameter of 50 μm at a predetermined position.
A via hole having a mortar-shaped cross section of μm was formed. Here, the relative dielectric constant of vinylbenzyl is ε = 2.5 and Q = 250.

Thereafter, a fifth coil conductor layer was formed as shown in FIG. 1 by this method, and a fifth organic insulating layer was formed thereon.
The thickness of the fifth organic insulating layer is 200 μm on the fifth coil conductor layer.
m, and there is a via hole with a diameter of 100 μm in the center.

An electroless copper plating film was formed on the entire outer surface of the substrate and the fifth organic insulating layer, and a copper layer having a thickness of 18 μm was formed by copper sulfate plating using this as a base film. Thereafter, the substrate was cut into a predetermined size to prepare a high-frequency coil having a cross section of 0.5 mm square and a length of 0.94 mm. This high frequency coil showed good frequency characteristics.

Although the embodiments and examples of the present invention have been described above, it is to be understood by those skilled in the art that the present invention is not limited to these and various modifications and changes can be made within the scope of the claims. Would be self-evident.

[0096]

As described above, according to the present invention,
It is possible to realize a chip coil type high-frequency coil that exhibits a high SRF, a high Q in a high-frequency region, and can reduce variation in characteristics depending on a direction in which the coil is mounted on a substrate.

[Brief description of the drawings]

FIG. 1 is an embodiment of a high-frequency coil and a method for manufacturing the same according to the present invention, and is a plan view showing an insulating substrate, a coil conductor layer, and an organic insulating layer.

FIG. 2 is a perspective view of the high-frequency coil.

FIG. 3 is a process chart showing a manufacturing process of the high-frequency coil according to the embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Organic insulating substrate 11, 13, 15, 17, 19 Coil conductor layer 12, 14, 16, 18, 20 Organic insulating layer 21, 24 Via hole 22 Through hole 23, 25 Terminal electrode 41, 51 Base conductor layer 42, 52 Dry Film 43, 53 Groove 44, 54 Main conductor layer

[Procedure amendment]

[Submission date] January 17, 2002 (2002.1.1
7)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0072

[Correction method] Change

[Correction contents]

The coil conductor layers 11, 13, 15, 1
Unevenness on the surface of 7, 19 (usually the maximum value of 10 point average roughness)
(Represented by (Rz)) is most preferably smaller than the skin depth at the upper limit of the operating frequency range. However, even if the value exceeds this value, the effective resistance is reduced and the loss is reduced by reducing unevenness. In particular, the coil conductor layers 11, 1
At least one surface of the unevenness of 3,15,17,19 is desirably equal to or less than 3 times the skin depth of the working frequency (e.g. 1 GHz), the unevenness of the considered the surface of the comparison with the ceramic laminate construction method 5μm or less (i.e. Then Rz ≦ 5μ
m) is particularly preferred. It is most preferable that all four surfaces of the conductor layer surface are smooth. However, if at least one surface is smooth, it is effective for loss reduction.

Claims (20)

[Claims] 1. A high-frequency coil in which a coil conductor layer and an insulation layer are alternately laminated, wherein the insulation layer is made of an organic material, and a direction of a magnetic flux generated by energizing a coil conductor made of the coil conductor layer. Characterized in that terminal electrodes are formed at both ends of the high-frequency coil. 2. The high-frequency coil according to claim 1, wherein the coil conductor has a helical winding. 3. The high-frequency coil according to claim 1, wherein a relative dielectric constant of the insulating layer is 4 or less. 4. The high-frequency coil according to claim 1, wherein Q of said insulating layer is 100 or more. 5. The high-frequency coil according to claim 1, wherein said insulating layer is made of vinylbenzyl. 6. The high-frequency coil according to claim 1, wherein said insulating layer has flexibility. 7. The coil conductor layer according to claim 1, wherein said coil conductor layer is copper.
The high-frequency coil according to 2, 3, 4, 5 or 6. 8. The coil conductor layer having an aspect ratio of 0.5.
The high-frequency coil according to claim 1, 2, 3, 4, 5, 6, or 7, wherein the number is 3 or more. 9. A high-frequency coil comprising a coil conductor layer and an insulating layer made of an organic material alternately laminated, wherein terminal electrodes are formed at both ends in a magnetic flux direction generated by energization of a coil conductor comprising the coil conductor layer. In the manufacturing method, the step of producing the coil conductor layer includes: (1) a base formation step of forming a plating base conductor layer of 5 μm or less on at least one side of the substrate; and (2) a photosensitive resist. A resist forming step provided on the underlying conductor layer, (3) a patterning step of removing the conductive pattern portion of the resist by a photolithography method, and (4) an electroplating to lead the conductive pattern portion from which the resist has been removed. An electrolytic plating step of forming a body layer; (5) a resist removing step of removing the photosensitive resist; and (6) an unnecessary portion of the underlying conductor layer is removed by etching. Method for producing a high-frequency coil; and a background removal process. 10. The method of manufacturing a high-frequency coil according to claim 9, wherein at least the first layer of the base conductor layer for plating is formed by electroless plating. 11. The method according to claim 10, wherein the electroless plating is copper plating. 12. The method according to claim 9, 10 or 11, wherein the photosensitive resist is a dry film. 13. The method of manufacturing a high-frequency coil according to claim 9, wherein the exposure of the photosensitive resist is performed by a parallel exposure machine. 14. The method for producing a high-frequency coil according to claim 9, wherein said electrolytic plating is bright plating. 15. The method for manufacturing a high-frequency coil according to claim 9, wherein said electrolytic plating is copper plating. 16. The method of claim 9, 10, 11, 12, 13, 14, or 1 wherein the etching is wet etching.
6. The method for manufacturing a high-frequency coil according to 5. 17. The method according to claim 9, wherein the metal species of the base conductor layer and the main conductor layer are selectively etched and combined, and the base removal step is performed with an etchant that etches only the base conductor layer. , 12,13,1
17. The method for producing a high-frequency coil according to 4, 15 or 16. 18. The method according to claim 9, wherein irregularities on the surface of the main conductor layer formed by the electrolytic plating are within 5 μm.
18. The method for producing a high-frequency coil according to 2, 13, 14, 15, 16, or 17. 19. When a coil conductor layer is laminated on the coil conductor layer via the insulating layer of the organic material, via holes are formed in the insulating layer by laser processing. , 13,14,15,16,17
19. A method for manufacturing a high-frequency coil according to claim 18. 20. When a coil conductor layer is laminated on the coil conductor layer via the insulating layer of the organic material, a via hole is formed by photolithography using a photosensitive insulating layer. Terms 9, 10, 11, 1
The method for producing a high-frequency coil according to 2, 13, 14, 15, 16, 17 or 18.