JP2002184638A - Method for manufacturing high-frequency coil - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a high-frequency coil, by which Q can be made higher and the variance of inductance can be suppressed, and high reliability and productivity are obtained also. SOLUTION: When a conductor layer and an organic insulation layer are laminated alternately on an insulative substrate for manufacturing a high-frequency coil, a process for manufacturing the conductor layer includes a step (1) of base formation, to form a base conductor layer 11 for plating of 5 μm or less over the entire side surface of the insulating substrate 10, a step (2) of resist formation to form a photosensitive dry film 12 on the base conductor layer 11, a step (3) of patterning to remove a coil conductor pattern part of the dry film 12 by photolithographic method, a step (4) of electrolytic plating to form a coil conductor layer 14 in the removed coil conductor pattern part of the dry film 12, a step (5) of resist removal to remove the dry film, and a step (6) of base removal to remove the unwanted part of the base conductor layer 11 by etching.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a high-frequency coil having a coil conductor formed on a substrate, and more particularly to a method of manufacturing a high-frequency coil having a high Q, good mass productivity, and a narrow tolerance. It is.

[0002]

2. Description of the Related Art The following method is known as a conventional method for manufacturing such a high-frequency coil.

(1) A first conductor film is formed on a surface of a substrate by vapor deposition, sputtering, or ion plating,
This is thickened by plating and patterned by dry etching (Japanese Patent Publication No. 7-101652).

(2) A method of forming a helical coil by a ceramic laminating method (Japanese Patent Laid-Open No. 3-229407).

FIG. 8 is a photograph corresponding to a perspective view showing the appearance of a chip coil formed by the ceramic laminating method, and has terminal electrodes 2 at both ends of a laminated ceramic layer 1.
As shown in the photograph corresponding to the sectional view of FIG.
have. Here, since the terminal electrode 2 is baked after vertically immersing the end portion of the chip coil in a conductive paste solution, the entire end surface of the chip coil and the four end portions around the end surface are all covered with the conductor. . When the coil conductor 3 is formed by the ceramic lamination method, since the conductor paste is fired together with the multilayer ceramic layer 1, as shown in the cross-sectional photograph of FIG. Voids are formed on the surface and have a cross-sectional shape with many irregularities.

FIG. 10 is a photograph corresponding to an enlarged plan view of the helical pattern in the upper layer of the coil conductor 3, and again, a large number of voids, which are considered to be caused by the outgassing of the solvent when the coil conductor is fired, are formed on the surface. It is formed.

[0007]

The method (1) has the following drawbacks.

Since the thin film method is frequently used, mass productivity is poor. In particular, the dry etching method is used for etching, but this method has good patterning accuracy but has a low etching rate, and the thicker the conductor, the worse the mass productivity is. The maximum film thickness that can be industrially produced is about 10 μm. It is. For example, it takes about one hour for copper having a thickness of 0.3 μm.
On the other hand, considering the improvement of the coil Q, the coil conductor thickness of 1
0 μm is the lower limit. To improve coil Q, for example, 5
It is effective to design with a conductor thickness of 0 μm to 100 μm, but it is difficult to realize by this method.

The method of forming a helical coil by the above-mentioned ceramic laminating method (2) has the following disadvantages.

Although the Q is larger than the former, the coil conductor is fired at a high temperature, so that the coil conductor has many voids which are considered to be caused by outgassing of the solvent at the time of firing, and large irregularities are generated on the conductor surface. Therefore, since the length of the current path increases and the resistance increases, Q is reduced.

[0011] In order to raise Q, it is necessary to increase the thickness of the conductor layer. However, the formation of the conductor layer is usually performed by a screen printing method, and the upper limit is about 20 μm.

The formation of the conductor layer is usually performed by a screen printing method, and the dimensional accuracy of the pattern before firing is poor.
Further, the whole shrinks by 10 to 20% during firing, but this ratio is not constant, and the variation in inductance is large.

In view of the above, it is an object of the present invention to provide a method of manufacturing a high-frequency coil that can increase Q, has small variations in inductance, and is excellent in reliability and mass productivity.

Other objects and novel features of the present invention will be clarified in embodiments described later.

[0015]

In order to achieve the above object, the invention of claim 1 of the present application provides a method of manufacturing a high-frequency coil formed by alternately laminating a conductor layer and an organic insulating layer on an insulating substrate. In the method, the step of producing the conductor layer comprises: (1)
A base forming step of forming a base conductor layer for plating of 5 μm or less on at least one side of the insulating substrate; (2)
A resist forming step of providing a photosensitive resist on the underlying conductor layer, (3) a patterning step of removing a coil conductor pattern portion of the resist by a photolithography method, and (4) electrolytic plating to remove the resist. (5) a resist removing step of removing the photosensitive resist, and (6) a base removing step of removing unnecessary portions of the base conductive layer by etching. And characterized in that:

A method of manufacturing a high-frequency coil according to a second aspect of the present invention is characterized in that, in the first aspect, at least the first layer of the base conductor layer for plating is formed by electroless plating.

According to a third aspect of the present invention, in the method for manufacturing a high-frequency coil, the electroless plating is copper plating.

According to a fourth aspect of the present invention, there is provided a method for manufacturing a high-frequency coil, wherein the photosensitive resist is a dry film.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a high-frequency coil according to the first, second, third or fourth aspect, wherein the exposure of the photosensitive resist is performed by a parallel exposure machine.

The method of manufacturing a high-frequency coil according to the invention of claim 6 of the present application is characterized in that, in claim 1, 2, 3, 4, or 5, the electrolytic plating is bright plating.

According to a seventh aspect of the present invention, there is provided a method of manufacturing a high-frequency coil, wherein the electrolytic plating is a copper plating according to the first, second, third, fourth, fifth or sixth aspect.

The method of manufacturing a high-frequency coil according to the invention of claim 8 of the present application is characterized in that in claim 1, 2, 3, 4, 5, 6, or 7, the etching is wet etching.

The method of manufacturing a high-frequency coil according to the ninth aspect of the present invention is the method of claim 1, 2, 3, 4, 5, 6, 7, or 8.
Wherein the metal species of the base conductor layer and the coil conductor layer are combined in a selectable combination, and the combination is treated with an etchant that etches only the base conductor layer in the base removal step.

The method for manufacturing a high-frequency coil according to the invention of claim 10 of the present application is the method of claim 1, 2, 3, 4, 5, 6, 7, 8
Or 9, wherein the irregularities on the surface of the coil conductor layer formed by the electrolytic plating are within 5 μm.

[0025] The method for manufacturing a high-frequency coil according to the invention of claim 11 of the present application is the method according to any one of claims 1 to 10,
The aspect ratio of the conductor layer including the base conductor layer and the coil conductor layer laminated thereon is 0.3 or more.

According to a twelfth aspect of the present invention, there is provided a method of manufacturing a high-frequency coil according to any one of the first to eleventh aspects.
The organic insulating layer is made of a flexible resin.

[0027] The method for manufacturing a high-frequency coil according to the invention of claim 13 of the present application is the method according to any one of claims 1 to 12, wherein
A via hole is formed in the organic insulating layer as an interlayer insulating layer by laser processing.

A method for manufacturing a high-frequency coil according to a fourteenth aspect of the present invention is the method according to any one of the first to twelfth aspects.
The organic insulating layer as an interlayer insulating layer has photosensitivity, and a via hole is formed by a photolithography method.

The method for manufacturing a high-frequency coil according to the invention of claim 15 of the present application is the method according to any one of claims 1 to 14,
The coil conductor pattern is helical.

[0030] The method of manufacturing a high-frequency coil according to the invention of claim 16 of the present application is the method according to any one of claims 1 to 15, wherein
The thickness of the conductor layer including the base conductor layer and the coil conductor layer laminated thereon is at least half the thickness of the organic insulating layer as an interlayer insulating layer.

A method for manufacturing a high-frequency coil according to a seventeenth aspect of the present invention is the method according to any one of the first to sixteenth aspects.
A via hole is formed in the organic insulating layer as an interlayer insulating layer, and the via hole is filled with a conductive metal.

[0032]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for manufacturing a high-frequency coil according to the present invention will be described below with reference to the drawings.

A first embodiment of the method for manufacturing a high-frequency coil according to the present invention will be described with reference to FIGS.

In the first step (base formation step) of FIG. 1, after the surface of the organic or inorganic insulating substrate 10 is roughened, the base conductor layer 11 for plating having a thickness of 5 μm or less is formed on one side. . If the thickness of the underlying conductor layer 11 exceeds 5 μm, it takes time to remove unnecessary underconductor layer 11 in a subsequent step, and the coil conductor layer provided on the underlying conductor layer 11 may be etched. Is not preferred.

The method of forming the base conductor layer 11 is a thin film method such as sputtering, vapor deposition, or ion plating;
A wet method such as electroless plating or electroless plating followed by electroless plating, or a combination thereof. An example of the combination is a method in which a 0.1 μm Ti film is formed by a sputtering method and then a 2 μm thick film is formed by electrolytic copper plating. Among them, the method of electroless plating or the method of thickening by electroplating on this is preferable because of good mass productivity and easy scale-up.

The type of metal is preferably low in specific resistance and inexpensive. Copper is a preferred material with a good balance between resistivity and cost. Also, a film can be easily formed by electroless copper plating with good mass productivity.

Next, in a second step (resist forming step), a photocurable dry film 12 as a photosensitive resist is stuck on the underlying conductor layer 11 with a laminator.
Here, the thickness of the dry film 12 is preferably 80% or more of the thickness of the coil conductor layer formed in a later step. For example, the thickness of the dry film 12 is 80 μm.

In a third step (patterning step), the dry film 12 is exposed and developed by a parallel exposure machine using a photolithography technique to produce a coil conductor pattern shown in FIG. Here, the hatched portion in the figure is the groove 13 from which the dry film 12 has been removed. The vertical and horizontal dimensions of the entire substrate are, for example, 0.8 × 1.6 mm (the size of each product), and the width of the coil conductor is 85 μm. However, in actual manufacturing, each step of the present embodiment is performed using the collective substrate, and finally, individual products are cut out.
The parallel exposure machine is used because it can irradiate a parallel light beam perpendicularly to the dry film 12 and can pattern a groove having a narrow width and a side surface almost vertical as compared with the case of scattered light.

In the fourth step (electrolytic plating step), an 80 μm thick coil conductor layer 14 is formed in the groove 13 of the dry film 12 by bright copper sulfate plating as electrolytic plating. The reason why the bright plating is used here is to reduce the unevenness by making the surface of the conductor layer 14 a mirror surface. The conductive layer 14 may be plated so that the thickness thereof is slightly larger than the depth of the groove 13.

In the fifth step (resist removing step), the dry film 12 is peeled off and removed, so that the underlying conductor layer 11 is exposed.

In the sixth step (underlying layer removing step), the entire substrate is subjected to an etching process by wet etching to form an underlying conductor layer 11.
To remove unnecessary parts.

By the above first to sixth steps, FIG.
The first conductor layer 20 is formed on the insulating substrate 10 as shown in FIG. The first conductor layer 20 is formed by the above-described method.
Can be set to 0.3 or more.

In a seventh step (interlayer insulating layer forming step), a photosensitive insulating resin is applied on the first conductor layer 20 to a thickness of 25 μm to form an interlayer insulating layer 21 of an organic insulating layer.

In an eighth step (via hole forming step), the interlayer insulating layer 21 is exposed by photolithography,
After the development processing, the via hole 22 is placed at the hatched position in FIG.
Is prepared. The diameter of the via hole is 100 μm.

Thereafter, the same steps as the first to sixth steps are repeated. That is, in the ninth step (base formation step),
After the surface of the insulating layer 21 is roughened, an underlying conductive layer 31 for plating of 5 μm or less is formed by electroless plating of copper or the like. If the thickness of the underlying conductor layer 31 exceeds 5 μm, it takes a long time to perform etching for removing the unnecessary underlying conductor layer 31 in a later step,
In addition, the coil conductor layer provided on the base conductor layer 31 may be etched, which is not preferable.

Next, in a tenth step (resist forming step), a photocurable dry film 32 as a photosensitive resist is stuck on the underlying conductor layer 31 with a laminator. Here, the thickness of the dry film 32 is preferably 80% or more of the thickness of the coil conductor layer formed in a later step. For example, the thickness of the dry film 32 is 100 μm.

In the eleventh step (patterning step), the dry film 32 is exposed and developed by a parallel exposure machine using a photolithography technique to produce a coil conductor pattern shown in FIG. 2C. Here, the hatched portions in the figure become the groove portions 33 from which the dry film 32 has been removed. The width of the coil conductor is 85 μm.

In the twelfth step (electrolytic plating step), a 100 μm thick coil conductor layer 34 is formed in the groove 33 of the dry film 32 by bright copper sulfate plating as electrolytic plating. The reason why the bright plating is used here is to reduce the unevenness by making the surface of the conductor layer 34 a mirror surface. Note that the conductor layer 34 may be plated so that the thickness thereof is slightly larger than the depth of the groove 33. Here, if the thickness of the conductor layer is made large and the composition of the plating solution is selected, the hole of the via hole can be completely filled with the metal conductor, which is preferable in terms of reliability and electrical characteristics. In this case, the concentration of the copper sulfate plating solution is preferably higher, and is preferably 150 g / liter or more, more preferably 200 g / liter, in terms of pentahydrate. The brightener is used for so-called via filling (filling the via hole), and a brightener having a uniform electrodeposition property of 50% or more is selected. The thickness of the conductor layer is at least １ ／ of the thickness of the interlayer insulating layer, preferably at least 1.

In a thirteenth step (resist removing step), the dry film 32 is peeled off and removed, exposing the underlying conductor layer 31.

In a fourteenth step (underlying removal step), the entirety is subjected to an etching process by wet etching to form the underlying conductor layer 3.
1. Remove unnecessary portions.

By the above ninth to fourteenth steps, FIG.
The second conductor layer 40 is formed on the interlayer insulating layer 21 as shown in FIG. The second conductor layer 40 is formed by the above-described method.
Can be set to 0.3 or more.

In this way, a high-frequency coil whose appearance is shown in FIG. 3 and whose cross sections of the first and second conductor layers 20 and 40 are shown in FIG. 4 is obtained. Here, as can be seen from FIGS. 1 and 2, the first conductor layer 20 and the second conductor layer 40 are
Are connected to each other via the via holes 22 of the helical pattern, and constitute a coil conductor 50 of a helical pattern that connects the terminal electrodes 45 on both side edges of the substrate as a whole.

As is clear from the photograph showing the appearance of FIG. 3 and the photograph corresponding to the cross-sectional view of the first and second conductor layers 20 and 40 in FIG. 4, the conductor layers 20 and 40 can be manufactured by the above-described method. There is no generation of voids in the conductor layers shown in the conventional examples of FIGS. 9 and 10, and the surfaces of the conductor layers 20, 40 are smooth.

The material of the insulating substrate 10 and the organic insulating layer serving as the interlayer insulating layer 21 is preferably a material having a small dielectric constant in order to reduce the stray capacitance. Further, a material having a large Q is preferable in order to reduce the dielectric loss. Specifically, it is particularly desirable that the relative permittivity of the insulating substrate 10 and the interlayer insulating layer 21 is 5 or less, respectively, and the Q is 100 or more. The materials of the insulating substrate and the organic insulating layer may be selected from, for example, Table 1 below in consideration of the operating frequency, the target Q value, and the cost. Among them, vinylbenzyl has a dielectric constant,
It is a good material with good balance between Q and cost.

Table 1 Product name Relative permittivity Q fluororesin 2.1 10,000 Polyethylene 2.2 5000 PPO 2.5 1200 Vinylbenzyl 2.5 260 Cyanate ester 2.7 1000 Polyetherimide 3670 Polyimide 3.6 200 Epoxy 4.3 70 BT Resin 2.5 500 Polyolefin 2.6 2000 Polyfumarate 2.6 250 Polyarylate 2.6 220

A core material can be used for the insulating substrate and the organic insulating layer when an organic material is used in order to improve mechanical strength. The core material is D glass cloth as shown in Table 2 below,
E glass cloth, Kepler cloth, or the like can be used. Generally, a material having a low dielectric constant and a low loss is more expensive, but it is preferable to use a material having a low dielectric constant as far as the cost permits.

[0057]

It is preferable that a flexible resin is used for the insulating substrate 10 and the interlayer insulating layer 21 of the organic insulating layer. The coefficient of thermal expansion between the coil conductor and the resin is significantly different, and if a resin having poor flexibility is used, problems such as cracks are generated in a reliability test such as a heat cycle. Specific examples of the measure of flexibility include a resin elongation of 3% or more and an Erichsen value of 3 mm or more. It is preferable to use an organic material for the substrate 10 because a material having a small dielectric constant and a high resistance to cracks can be obtained relatively easily.

In the case of a ceramic substrate, there are two materials: a material having an excellent mechanical strength such as alumina but having a large dielectric constant of about 10; and a material such as glass having a small dielectric constant of about 4 but being easily broken. Fortunately, no material has both mechanical strength and low dielectric constant.

Underplating conductor layer 11 for plating in the first step
Is located on the entire surface of the substrate 10, so that a large current can flow during the electrolytic plating in the fourth step, and the plating time can be reduced. This is particularly effective when the height of the coil conductor layer 14 is increased to form a high aspect shape. That is, when the conductive layer 14 is thick, if the plating current is small, the plating operation time is greatly increased, and the mass productivity is deteriorated.

It is to be noted that there is a method of first patterning the conductive layer under the plating and then thickening it by electrolytic plating. However, this method generally increases the resistance of the plated wire, so that the current during plating can be increased. In addition, electrolysis concentrates on the convex portions of the pattern, and the plating becomes thicker, and the concave portions become thinner on the contrary, and the patterning accuracy deteriorates. This is particularly remarkable when the length of the conductor is large as in a spiral pattern. In addition, since an island-shaped pattern cannot be formed, a problem may occur when the terminal electrode is formed.

In the second and third steps, it is preferable to use a photosensitive resist for forming a plating pattern for pattern plating, since highly accurate patterning can be performed. If the resist is thickened, a high aspect pattern can be easily formed. When the resist is thick, it is preferable to use a parallel exposure machine capable of irradiating a parallel beam because the wall surface of the resin is processed vertically.

As in this embodiment, it is preferable to use a dry film 32 as a photosensitive resist because a high aspect pattern can be easily formed.

For example, when a resist layer is formed by using a liquid resist by a spin coating method, it is necessary to increase the viscosity of the resist in the case of thick coating. In this case, the resist around the substrate becomes thick and the film thickness becomes large. Is not accurate.
It is also difficult to dry the solvent. In the case of a dry film, the film thickness is guaranteed from the beginning and there is an advantage that there is no need to dry the solvent.

In the case of forming a high aspect pattern, a method of forming a resist pattern after panel plating and performing dry etching is also conceivable. In this case, a high-aspect pattern can be formed with high precision, but the etching speed is slow (it takes about 1 hour at a film thickness of 0.3 μm), and the upper limit of the film thickness that can be industrially produced is 10 μm.
Even if the film thickness is smaller than that, mass productivity is sacrificed.

The upper limit of the thickness of the plating base conductor layer 11 is determined by the ease of etching in the sixth step. When the coil conductor layer 14 and the base conductor layer 11 cannot be selectively etched, the upper limit of the thickness of the base conductor layer 11 is １ ／ of the thickness of the coil conductor layer 14. If the thickness exceeds this, the amount of etching of the coil conductor layer 14 increases and the loss as a high-frequency coil increases.
Pattern accuracy also drops.

If the coil conductor layer 14 and the underlying conductor layer 11 can be selectively etched, the thickness may be larger than this. However, if the thickness is too large, the side etching of the underlying conductor layer 11 becomes large, so the upper limit is 1/3. .

The electrolytic plating method of the fourth step is a preferable production means because the film formation speed is high and the scale-up is easy. In particular, when a high aspect conductor is formed, the thickness of the coil conductor layer 14 may exceed 100 μm in some cases, which is a very important method for securing mass productivity. The use of bright plating is preferable because unevenness on the three surfaces of the coil conductor layer 14 is reduced. Metals having a low specific resistance such as copper and silver can be plated. Among them, copper is inexpensive, has low specific resistance, and hardly causes migration as compared with silver.

The etching of the plating base conductor layer 11 in the sixth step can be either dry etching or wet etching. However, in consideration of mass productivity, wet etching is preferable as described in this embodiment. Wet etching has good mass productivity (film thickness 1).
(It is about 10 minutes by etching of 0 μm copper), and scale-up is easy.

It is also preferable to use a metal that can be selectively etched with the coil conductor layer 14 for the base conductor layer 11 for plating. In this way, the coil conductor layer 14 during the sixth step
Can be prevented. As an example of the combination, there is a case where the base conductor layer is titanium and chromium and the coil conductor layer is copper. When the underlying conductor layer is made of titanium only, the thickness is set to 0.3 to 1 μm, and the etching solution is, for example, a mixture of sodium hydroxide and hydrogen peroxide solution (composition: sodium hydroxide 1%, hydrogen peroxide 1%). Used.

In the processing of the via hole 22 in the eighth step, if the interlayer insulating layer 21 has photosensitivity, it is formed by photolithography, otherwise, the laser processing method is preferably used. In the case of the photolithography method, a large number of holes can be formed at one time, and thus it is preferable to use a large number of holes. Also, the accuracy of drilling is high because it is almost determined by the accuracy of the photomask. The merit of drilling by the laser processing method is that the type of resin is not selected.
In addition, when photosensitivity is imparted to a resin, generally, characteristic values such as Q and dielectric constant decrease, and mechanical strength also deteriorates. In the case of the laser processing method, a resin can be freely selected, so that an interlayer insulating film having good characteristics can be used.

Coil conductor 5 for connecting terminal electrodes 45 to each other
It is preferable that the aspect ratio of the first conductor layer 20 and the second conductor layer 40 that is 0 is as large as possible. By increasing the aspect ratio, the cross-sectional area of the current path can be increased without increasing the eddy current loss of the coil conductor. In addition, since the inductance value hardly changes, Q can be increased efficiently.

When the width of the coil conductor is increased, the cross-sectional area of the current path increases, but the area of the upper portion of the conductor interlinking with the magnetic field increases, and the inductance value decreases, which is not preferable. As a standard of the aspect ratio, 0.3 or more can be mentioned. This is based on the fact that the subtractive method performed on a printed circuit board or the like has an upper limit of the aspect ratio of 0.2. If the aspect ratio is less than 0.3,
This is because the cross-sectional area of the current path increases only slightly, and the effect of improving the Q cannot be expected much.

It is preferable that the surface of the coil conductor is as smooth and as small as possible. When the surface irregularities become almost the same as the high-frequency skin depth, the length of the current path increases and the effective resistance increases. When the coil is formed by the ceramic lamination method, many voids are formed on the surface as shown in FIG. 10, which is not preferable. According to the comparison with the ceramic method, a rough standard is 5 μm or less.

When the coil conductor pattern is made helical, the Q usually rises, but the mass productivity decreases because the number of layers increases. The present invention discloses a construction method capable of ensuring mass production sufficient for practical use even in a helical coil having a large number of layers by examining the construction method of the conductor layer in detail.

In the present embodiment, the following configuration is adopted in order to achieve (I) high Q, (II) good mass productivity, (III) narrow tolerance, and (IV) high reliability.

(I) Regarding high Q

(1) Basic relationship

The coil Q is represented by the following equation. Q = 2πfL / Reff (Equation 1) (where f: frequency, L: inductance, Reff: effective resistance) Further, the effective resistance Reff is represented by the following equation. Reff = Rj + Re + Rd (Equation 2) (where, Rj: resistance due to Joule loss, Re: resistance due to eddy current loss, Rd: resistance due to dielectric loss)

(2) The interlayer insulating layer is made of an organic material.

When the interlayer insulating layer 21 is an organic insulating layer,
The formation temperature is greatly reduced (about 1000 ° C. for a ceramic laminate and 200 ° C. or less for an organic insulating layer),
Coil conductor 5 by plating method without sintering conductor paste
0 can be formed, and the conductor surface becomes smooth. Coil conductor 5
The standard of smoothness of 0 is such that the unevenness of the conductor surface is three times or less the skin depth at the operating frequency. 1 GHz
When considering the case, the skin depth is about 2 when the conductor is copper.
μm, it is 6 μm or less. In addition, the coil conductor 2
It is desirable that at least one third of the cut in a plane perpendicular to the zero current direction is smooth. This shortens the current path,
Rj falls.

Although an inorganic insulating layer can be formed at a low temperature by a thin film forming method such as sputtering, vapor deposition, or plasma CVD, the step coverage is poor. In particular, when a large number of conductor layers such as a helical winding are formed, Not preferred. In addition, mass productivity decreases. This is remarkable when the number of layers is large, such as a helical winding. In addition, the dielectric constant generally increases, and the SRF (self-resonant frequency) decreases. Further, when the number of layers is large, stress accumulates and cracks easily occur.

If a resin having a high Q value is selected as the insulating substrate 10 and the organic insulating layer, Rd is reduced and Q can be further improved. For example, it is desirable to select a material having a Q of 100 or more, such as vinylbenzyl. If Q is less than 100, Q of the high-frequency coil is undesirably reduced.

(3) The aspect ratio of the coil conductor is increased. Increasing the aspect ratio of the coil conductor 50, that is, the first conductor layer 20 and the second conductor layer 40, respectively, can increase the cross-sectional area of the current path, thereby reducing Rj and improving Q.

At high frequencies, current flows only on the very surface of the conductor due to the skin effect. There is a skin depth as a measure of the current flowing depth, and 1 GHz when the conductor is copper.
Is about 2 μm. When the conductor layer is made high (thick), current also flows to the side surface, and the cross-sectional area of the current path increases,
Rj decreases, and Q can be increased even at a high frequency.

As another method for increasing the current path, it is conceivable to increase the conductor width. In this case, although the cross-sectional area of the current path increases, the area where the magnetic field and the coil conductor interlink increases, and the eddy current loss increases. When the outermost position of the conductor is fixed, if the conductor width is increased, the area of the central opening decreases and the L value decreases. On the other hand, when the aspect ratio is increased, L hardly changes, so that Q is reduced as compared with the case where the aspect ratio is increased (see Equation 1).

(4) The winding, that is, the coil conductor 50 is made helical. In the case of a helical winding, a shorter conductor is required to obtain the same inductance L than in the case of a spiral, so that Rj decreases.

When the coil conductor 50 has a helical pattern, Re decreases because the area of the conductor in contact with the magnetic field decreases. The reason is that the magnetic field generated by the coil conductor is almost perpendicular to the substrate, and in the case of a helical, the lower conductor surface of the lowermost layer and the upper surface of the uppermost layer are exposed to the magnetic field, causing eddy current loss However, the other conductor surfaces are shielded by these surfaces and hardly contact the magnetic field.

(5) A coil conductor pattern is produced by a bright plating pattern plating method (the method shown in FIG. 1).
Thereby, three surfaces other than the bottom surface of the first conductor layer 20 and the second conductor layer 40 constituting the coil conductor 50 can be smoothed.

(II) Regarding mass productivity

(1) An organic insulating layer is used as an interlayer insulating layer. In the case of an organic insulating layer, a film formation method excellent in mass productivity can be used. On the other hand, when an inorganic interlayer insulating layer is used while maintaining a smooth surface of the coil conductor 50, a film-forming method inferior in mass productivity such as sputtering, vapor deposition, or ion plating must be used. In the high-frequency coil, the thickness of the interlayer insulating resin is 10 μm to reduce the stray capacitance.
However, in this case, mass productivity is further deteriorated.

(2) A pattern plating method is used for forming the coil conductor. The pattern plating method described with reference to FIG. 1 is excellent in mass productivity. In order to improve Q, it is effective to increase the aspect ratio of the conductor pattern.
m, but a high aspect pattern can be formed without impairing mass productivity by the pattern plating method.

(III) Regarding Narrow Tolerance

(1) A pattern plating method is used for forming the coil conductor. Coil conductor 50 for pattern plating
Is highly determined because it is almost determined by the accuracy of the photomask.

(2) A via hole is formed by laser processing or photolithography. In these, the via holes 22 can be formed with much higher precision than those formed by the screen printing method.

(IV) Regarding high reliability

(1) A flexible resin is used for the interlayer insulating layer. It is preferable to use a flexible resin for the organic insulating layer as the interlayer insulating layer 21. The coefficient of thermal expansion between the conductor and the resin is greatly different, and if a resin having poor flexibility is used, problems such as cracks are generated in a reliability test such as a heat cycle. By using a flexible resin, these problems can be avoided.
The specific measure of flexibility is that resin elongation is 3%
As described above, the Erichsen value is 3 mm or more.

(2) A high boiling point solvent such as butyl carbitol is used as a resin solvent when forming the insulating layer 21. As a result, the viscosity rises gently when the solvent is dried, the step coverage is improved, and problems such as disconnection of the conductor at the step are prevented.

FIG. 5 shows a second embodiment of the present invention.
The number of turns of the helical is 3.5 turns. FIG. 1A shows a first conductor layer 61 formed on an organic or inorganic insulating substrate 10, FIG. 1B shows a first organic insulating layer 62, and FIG. 1C shows a second conductor layer 63. FIG. 4D shows the second organic insulating layer 64, FIG. 4E shows the third conductive layer 65, FIG. 4F shows the third organic insulating layer 66, FIG. FIG. 1H shows the fourth organic insulating layer 68, and FIG. 1I shows the fifth conductor layer 69. The conductor layers are connected to each other via via holes 72 formed in the respective organic insulating layers to form a coil conductor 70. The coil conductor 70 is connected to the terminal electrodes 45 at both ends of the substrate.
Are connected. The procedure for forming each conductor layer is the same as in the first embodiment.

By forming a helical pattern using multiple conductor layers as in the second embodiment, the number of coil turns can be increased to increase the inductance. Other functions and effects are the same as those of the first embodiment.

FIG. 6 shows a third embodiment of the present invention, in which a high-frequency coil having a coil conductor of a spiral pattern is manufactured. FIG. 6A shows a first conductor layer 81 having a spiral pattern formed on an organic or inorganic insulating substrate 10, and FIG. 6B shows an interlayer insulating layer which is an organic insulating layer formed thereon. FIG. 2C shows a second conductor layer 83 formed thereon, and the first conductor layer 81 and the second conductor layer 83 are mutually connected via a via hole 84 of the interlayer insulating layer 82. To form a coil conductor 90 having a spiral pattern for connecting the terminal electrodes 45 on both side edges of the substrate as a whole.

In the third embodiment, the coil conductor of the first embodiment is changed from a helical to a spiral. Other configurations, manufacturing methods, and operational effects are the same as those of the first embodiment.
This is the same as the embodiment.

[0103]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a high-frequency coil according to the present invention will be described in detail with reference to embodiments.

Example 1 E glass cloth having a relative permittivity of 7.2 was used as a core material (reinforcing material), and impregnated with vinylbenzyl having a relative permittivity of 2.5 and Q = 260 to obtain a 0.3 mm thick. An organic insulating substrate was manufactured.
At this time, the relative dielectric constant of the entire substrate is 3.2, and Q = 250.
Met.

In the first step shown in FIG. 1, after the surface of the substrate 10 is roughened, the thickness is 0.3 μm by electroless copper plating.
An electroless copper plating layer was formed as the underlying conductor layer 11.

In the second step, a dry film 12 having a thickness of 80 μm was stuck on the underlying conductor layer 11 with a laminator.

In the third step, the dry film 12 was exposed and developed by a parallel exposure machine using a photolithography technique to produce a coil conductor pattern shown in FIG. Here, the hatched portion in the figure is the dry film 12.
Are removed from the groove 13. The vertical and horizontal dimensions of the entire substrate are 0.8 × 1.6 mm, and the width of the coil conductor is 85 μm.

In the fourth step, a coil conductor layer 14 having a thickness of 80 μm was formed in the groove 13 of the dry film 12 by bright copper sulfate plating as electrolytic plating.

In the fifth step, the dry film 12 was peeled off to expose the underlying conductor layer 11.

In the sixth step, unnecessary portions of the underlying conductor layer 11 were removed by wet etching the entire surface.

By the above first to sixth steps, FIG.
The first conductor layer 20 was formed on the insulating substrate 10 as shown in FIG.

In the seventh step, the photosensitive insulating resin is
It was applied to a thickness of 25 μm on the conductor layer 20 to form an interlayer insulating layer 21 of an organic insulating layer.

In an eighth step, the interlayer insulating layer 21 is exposed and developed by photolithography,
A via hole 22 was formed at the hatched position in (B). The diameter of the via hole is 100 μm. The curing temperature of the resin of the interlayer insulating layer is 160 ° C., and the relative dielectric constant is 3.5.

In the ninth step, after the surface of the insulating layer 21 is roughened, the thickness is 0.3 μm by electroless copper plating of 0.3 μm.
An electroless copper plating layer was formed as a base conductor layer 31.

In the tenth step, a dry film 32 having a thickness of 100 μm was attached on the underlying conductor layer 31.

In the eleventh step, the dry film 32
Was exposed and developed by a parallel exposure machine using a photolithography technique to produce a coil conductor pattern shown in FIG. 2C. Here, the hatched portion in the figure is the dry film 3
The groove 33 is obtained by removing 2. The coil conductor width is 85
μm.

In the twelfth step, the dry film 32
A coil conductor layer 34 having a thickness of 100 μm was formed in the groove 33 by bright copper sulfate plating. Here, take the conductor layer thick,
When the composition of the plating solution is selected, the hole of the via hole can be completely filled with the metal conductor, which is preferable in terms of reliability and electrical characteristics. In this case, the concentration of the copper sulfate plating solution is preferably higher, and is preferably 150 g / liter or more, more preferably 200 g / liter, in terms of pentahydrate. The brightener is used for the purpose of so-called via fill, and is selected to have a uniform electrodeposition property of 50% or more. The thickness of the conductor layer is at least １ ／ of the thickness of the interlayer insulating layer, preferably at least 1.

In the thirteenth step, the dry film 32
Was peeled off to expose the underlying conductor layer 31.

In a fourteenth step, unnecessary portions of the underlying conductor layer 31 were removed by wet etching the entire surface.

By the above ninth to fourteenth steps, FIG.
The second conductor layer 40 is formed on the interlayer insulating layer 21 as shown in FIG.

FIG. 3 shows an overall photograph of the outer shape of the high-frequency coil thus produced, and FIG. 4 shows a sectional photograph of the coil conductor. Table 3 below shows SRF, Rdc, and L (value at 1 GHz) of the high-frequency coil of Example 1, and FIG. 7 shows the frequency characteristics of Q.

Table 3 Sample type SRF (GHz) Rdc (mΩ) L (mH) Example 1 12 10 3.15 Comparative example 1 9 66 3.20

Comparative Example 1 A high-frequency coil was manufactured by an ordinary ceramic laminating method.
The external dimensions are 1.6 × 0.8 × 0.8 mm and a photograph of the external form is shown in FIG. As compared with the first embodiment, the terminal electrodes are large, and are formed so as to protrude over both of the end faces and all of the remaining four end faces. The coil conductor has a line width of 105 μm and a height of 15 μm
FIG. 9 shows a photograph of the cross-sectional shape at m. Compared with the first embodiment, the conductor has a smaller cross-sectional area, and many voids are found in the conductor and reach the surface. FIG. 10 shows a photograph of the conductor surface. A large number of small holes considered to have been formed during firing are observed on the conductor surface. The shape of the coil conductor is helical, and is the same as in the first embodiment. The relative permittivity of the ceramic material used for the interlayer insulating layer is 4.3. The SRF, Rdc and L (at 1 GHz) at this time are shown in Table 3 in comparison with Example 1.

The SRF of the first comparative example is about 30% lower than that of the first embodiment. This is probably because the dielectric constant of the interlayer insulating layer is large, the terminal electrode is large, and the width of the coil conductor layer is large.

As for Rdc, since the conductor is thin, the cross-sectional area of the current path is reduced and Rdc is greatly increased.

On the other hand, the inductance L is almost the same because it is determined by the winding method of the coil conductor. It is understood that when the coil conductor is set to the high aspect as in the first embodiment, Rdc can be reduced while L is kept constant.

FIG. 7 shows the frequency characteristics of Q in Comparative Example 1 in comparison with Example 1. In Comparative Example 1, Q was reduced by about half compared to Example 1. It is considered that this is because the cross section of the current path cannot be sufficiently secured due to the small height of the conductor, and the current path becomes long at high frequencies due to the rough surface of the coil conductor.

Example 2 A 3.5-turn high-frequency coil was manufactured in the same manner as in Example 1. FIG. 5 shows the pattern of each layer at this time. The cross-sectional shape of the coil conductor and the material and thickness of the organic insulating layer as the interlayer insulating film are the same as those in the first embodiment. This high-frequency coil exhibited good high-frequency characteristics.

Example 3 A high frequency coil having a spiral pattern was prepared in the same manner as in Example 1. FIG. 6 shows the pattern of each layer at this time. The cross-sectional shape of the coil conductor, the material and the thickness of the interlayer insulating layer are the same as in the first embodiment. This coil showed good high frequency characteristics.

Although the embodiments and examples of the present invention have been described above, it is to be understood by those skilled in the art that the present invention is not limited to the embodiments and that various modifications and changes can be made within the scope of the claims. Would be self-evident. For example, the present invention
The present invention is applicable to electronic components including at least one or more coils, such as a coil chip array, a transformer, a common mode choke coil, a combination of a plurality of coils, and various filters combined with a capacitor.

[0131]

As described above, according to the method of manufacturing a high-frequency coil according to the present invention, a high-frequency coil having high Q, little variation in inductance, and excellent reliability can be manufactured with good mass productivity.

[Brief description of the drawings]

FIG. 1 is a process chart showing a first embodiment of a method for manufacturing a high-frequency coil according to the present invention.

FIG. 2 is a plan view showing a conductor layer and an interlayer organic insulating layer in that case.

FIG. 3 is a perspective view illustrating an appearance of a high-frequency coil manufactured according to the first embodiment.

FIG. 4 is a cross-sectional view of a conductor layer manufactured according to the first embodiment.

FIG. 5 is a plan view showing a conductor layer and an interlayer organic insulating layer of a high-frequency coil manufactured according to a second embodiment of the present invention.

FIG. 6 is a plan view showing a conductor layer and an interlayer organic insulating layer of a high-frequency coil manufactured according to a third embodiment of the present invention.

FIG. 7 is a graph showing Q values of Example 1 and Comparative Example 1.

FIG. 8 is a perspective view showing an appearance of a chip coil formed by a conventional ceramic lamination method.

9 is a cross-sectional view of the conductor layer in the case of FIG.

FIG. 10 is an enlarged plan view of a conductor pattern in an upper layer of a chip coil formed by a conventional ceramic lamination method.

[Explanation of symbols]

Reference Signs List 1 laminated ceramic layer 2, 45 terminal electrode 3, 50, 70, 90 coil conductor 10 insulating substrate 11, 14, 20, 31, 34, 40, 61, 63, 6
5, 67, 69, 81, 83 Conductive layer 12, 32 Dry film 21, 62, 64, 66, 68, 82 Insulating layer 22, 72, 84 Via hole

Claims (17)

[Claims] In a method for manufacturing a high-frequency coil, wherein a conductor layer and an organic insulating layer are alternately laminated on an insulating substrate, the step of producing the conductor layer comprises: A base forming step of forming a base conductor layer on at least one side of the insulating substrate, and (2) a resist forming step of providing a photosensitive resist on the base conductor layer, (3)
Patterning step of removing the coil conductor pattern portion of the resist by photolithography method, (4)
An electrolytic plating step of forming a coil conductor layer on the coil conductor pattern portion from which the resist has been removed by electrolytic plating; (5) a resist removal step of removing the photosensitive resist; and (6) the base conductor layer by etching. And a base removing step of removing unnecessary portions. 2. The method for manufacturing a high-frequency coil according to claim 1, wherein at least the first layer of the base conductor layer for plating is formed by electroless plating. 3. The method according to claim 2, wherein the electroless plating is copper plating. 4. The method according to claim 1, wherein said photosensitive resist is a dry film. 5. The method according to claim 1, wherein the exposure of the photosensitive resist is performed by a parallel exposure machine. 6. The method for manufacturing a high frequency coil according to claim 1, wherein said electrolytic plating is bright plating. 7. The method according to claim 1, wherein the electrolytic plating is copper plating. 8. The method according to claim 1, wherein said etching is wet etching. 9. The method according to claim 1, wherein the metal species of the base conductor layer and the coil conductor layer are combined in a selectable manner, and are treated with an etchant for etching only the base conductor layer in the base removal step. , 4, 5, 6, 7 or 8. 10. The coil conductor layer surface formed by the electrolytic plating has irregularities of 5 μm or less.
The method for producing a high-frequency coil according to 4, 5, 6, 7, 8 or 9. 11. The method for manufacturing a high-frequency coil according to claim 1, wherein an aspect ratio of the conductor layer including the base conductor layer and the coil conductor layer laminated thereon is 0.3 or more. . 12. The method according to claim 1, wherein the organic insulating layer is made of a flexible resin. 13. A method according to claim 1, wherein a via hole is formed in said organic insulating layer as an interlayer insulating layer by laser processing.
3. The method for manufacturing the high-frequency coil according to any one of 2. 14. The method for manufacturing a high-frequency coil according to claim 1, wherein the organic insulating layer as an interlayer insulating layer has photosensitivity, and a via hole is formed by a photolithography method. 15. The method for manufacturing a high-frequency coil according to claim 1, wherein said coil conductor pattern is helical. 16. The thickness of the conductor layer comprising the base conductor layer and the coil conductor layer laminated thereon is at least の of the thickness of the organic insulating layer as an interlayer insulating layer. Item 16. The method for manufacturing a high-frequency coil according to any one of Items 1 to 15. 17. The method for manufacturing a high-frequency coil according to claim 1, wherein a via hole is formed in the organic insulating layer as an interlayer insulating layer, and the via hole is filled with a conductive metal.