JP2002084046A - Ceramic circuit board - Google Patents

Ceramic circuit board

Info

Publication number
JP2002084046A
JP2002084046A JP2000272045A JP2000272045A JP2002084046A JP 2002084046 A JP2002084046 A JP 2002084046A JP 2000272045 A JP2000272045 A JP 2000272045A JP 2000272045 A JP2000272045 A JP 2000272045A JP 2002084046 A JP2002084046 A JP 2002084046A
Authority
JP
Japan
Prior art keywords
circuit board
ceramic
metal
ceramic circuit
warpage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000272045A
Other languages
Japanese (ja)
Other versions
JP4557398B2 (en
Inventor
Norio Nakayama
山 憲 隆 中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2000272045A priority Critical patent/JP4557398B2/en
Publication of JP2002084046A publication Critical patent/JP2002084046A/en
Application granted granted Critical
Publication of JP4557398B2 publication Critical patent/JP4557398B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a ceramic circuit board having its modified solder flow properties. SOLUTION: A ceramic circuit board has a structure that a metallic circuit board is provided on a ceramic board and that a metal plate constituted of the same metal as that of the metallic circuit board or a metal different from that of the metallic circuit board is provided on the side of the surface opposite to the surface of this ceramic board and is characterized in that the ceramic circuit board is warped to the side of the circuit board into a projected form and in that the quantity of warpage of the circuit board is 0.15 to 0.30% of the length in the longitudinal direction of the ceramic circuit board.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、セラミックス回路
基板に関するものである。さらに詳細には、本発明は、
高出力トランジスタ、パワーモジュール等の実装に好適
なセラミックス回路基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic circuit board. More specifically, the present invention provides
The present invention relates to a ceramic circuit board suitable for mounting high power transistors, power modules, and the like.

【0002】[0002]

【従来の技術】近年、セラミックス基板上に導電性材
料、例えば銅板、からなる金属回路板を設けたセラミッ
クス回路基板が使用されている。このようなセラミック
ス回路基板は、一般に電気絶縁性が高く耐熱性が良好で
あることから高出力トランジスタやパワーモジュールな
どの回路基板として特に有用なものである。
2. Description of the Related Art In recent years, a ceramic circuit board has been used in which a metal circuit board made of a conductive material, for example, a copper plate, is provided on a ceramic substrate. Such a ceramic circuit board is particularly useful as a circuit board for a high-output transistor, a power module, or the like because it generally has high electrical insulation and good heat resistance.

【0003】[0003]

【発明が解決しようとする課題】しかし、セラミックス
基板とこの基板上に設けられる金属回路板とは熱膨張係
数が通常大きく異なっており、また両者の接合が高温度
条件下でなされることが多いことから、接合後に冷却さ
れた場合、両者間の残留応力によってセラミックス回路
基板が金属回路層側に凹状に湾曲することがあった。
However, the ceramic substrate and the metal circuit board provided on the ceramic substrate usually have greatly different coefficients of thermal expansion, and the two are often joined under high temperature conditions. Therefore, when the ceramic circuit board is cooled after the joining, the ceramic circuit board may be concavely curved toward the metal circuit layer due to the residual stress between the two.

【0004】このように金属回路層側に凹状に湾曲した
セラミックス回路基板は、電子素子、例えば高出力トラ
ンジスタやパワーモジュールなどの実装工程におけるは
んだフロー性が悪い場合が多くて実装信頼性低下の要因
となっていた。
A ceramic circuit board which is concavely curved toward the metal circuit layer in this manner often has poor solder flow in a mounting process of an electronic element, for example, a high-output transistor or a power module, and causes a reduction in mounting reliability. Had become.

【0005】セラミックス回路基板を例えば産業用機械
などに搭載する場合には特に高い実装信頼性が要求され
るが、上記理由によりこの要求を満たすことは容易では
なかった。
When a ceramic circuit board is mounted on, for example, an industrial machine or the like, particularly high mounting reliability is required. However, it is not easy to satisfy this requirement for the above-mentioned reason.

【0006】[0006]

【課題を解決するための手段】本発明は、電子素子の実
装工程におけるはんだフロー性が向上したセラミックス
回路基板を提供しようとするものである。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a ceramic circuit board having improved solder flow in an electronic element mounting process.

【0007】したがって、本発明によるセラミックス回
路基板は、セラミックス基板上に金属回路板が設けら
れ、このセラミックス基板の反対面側には前記金属回路
板と同一または異なる金属から構成された金属板が設け
られてなるセラミックス回路基板であって、前記セラミ
ックス回路板が前記金属板側に凹状形状に反っており、
その反り量が前記セラミックス回路基板の長手方向の長
さの0.15〜0.30%であること、を特徴とするも
のである。
Therefore, in the ceramic circuit board according to the present invention, a metal circuit board is provided on the ceramic substrate, and a metal plate made of the same or different metal as the metal circuit board is provided on the opposite side of the ceramic substrate. A ceramic circuit board, wherein the ceramic circuit board is warped in a concave shape on the metal plate side,
The amount of warpage is 0.15 to 0.30% of the length of the ceramic circuit board in the longitudinal direction.

【0008】[0008]

【発明の実施の形態】以下、本発明によるセラミックス
回路基板を必要に応じて図面を参照しながら説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a ceramic circuit board according to the present invention will be described with reference to the drawings as necessary.

【0009】図1は、本発明によるセラミックス回路基
板の好ましい一具体例の断面を示すすものである。この
セラミックス回路基板1は、セラミックス基板2上に金
属回路板3が設けられ、このセラミックス基板1の前記
金属回路板3の反対面側には金属板4が設けられてなる
ものであり、このセラミックス回路板1は、前記金属回
路板3側に凸状形状に反っており、その反り量Aは前記
セラミックス回路基板の長手方向の長さBの0.15〜
0.30%となっている。このように反り量Aは金属回
路板を接合後の反り量を示すものである。セラミックス
回路基板の長手方向とは、セラミックス基板の縦横に対
し長い方を示すものである。また、セラミックス回路基
板の長手方向の長さBとは接合後のセラミックス基板の
端部から端部までの距離を示すものである。このとき簡
易的には金属回路板接合前の実質的に反りがないセラミ
ックス基板の長手方向の長さを長さBとして適用しても
よい。なぜなら本発明は(反り量A/セラミックス回路
基板の長手方向の長さB)×100が0.15〜0.3
0%と小さいからであり実測においての影響は少ないか
らである。
FIG. 1 shows a cross section of a preferred embodiment of a ceramic circuit board according to the present invention. The ceramic circuit board 1 is provided with a metal circuit board 3 provided on a ceramic board 2 and a metal board 4 provided on a surface of the ceramic board 1 opposite to the metal circuit board 3. The circuit board 1 is warped in a convex shape toward the metal circuit board 3 side, and the warp amount A is 0.15 to 0.15 of the longitudinal length B of the ceramic circuit board.
It is 0.30%. Thus, the amount of warpage A indicates the amount of warpage after joining the metal circuit boards. The term “longitudinal direction of the ceramic circuit board” indicates a direction which is longer than the length and width of the ceramic substrate. The length B in the longitudinal direction of the ceramic circuit board indicates the distance from the end to the end of the ceramic substrate after bonding. At this time, simply, the length in the longitudinal direction of the ceramic substrate having substantially no warp before joining the metal circuit boards may be applied as the length B. This is because the present invention is such that (the amount of warpage A / length B of the ceramic circuit board in the longitudinal direction) × 100 is 0.15 to 0.3.
This is because it is as small as 0% and the influence on the actual measurement is small.

【0010】このような本発明によるセラミックス回路
基板に使用されるセラミックス基板は、特に限定される
ものでなく、合目的的な任意のものを使用することがで
きる。例えば、(イ)窒化物系セラミックス、例えば窒
化アルミニウム、窒化珪素、窒化チタン等、(ロ)酸化
物系セラミックス、例えば酸化アルミニウム、酸化アル
ミニウムと酸化ジルコニウムとの化合物、(ハ)炭化物
系セラミックス、例えば炭化珪素、炭化チタン等、
(ニ)硼化物系セラミックス、例えば硼化ランタン等、
を使用することができる。これらの中では、窒化アルミ
ニウム、窒化珪素、酸化アルミニウム、および酸化アル
ミニウムと酸化ジルコニウムとの化合物が好ましい。
The ceramic substrate used for such a ceramic circuit substrate according to the present invention is not particularly limited, and any suitable substrate can be used. For example, (a) nitride ceramics, for example, aluminum nitride, silicon nitride, titanium nitride, etc., (b) oxide ceramics, for example, aluminum oxide, a compound of aluminum oxide and zirconium oxide, (c) carbide ceramics, for example, Silicon carbide, titanium carbide, etc.
(D) boride-based ceramics such as lanthanum boride,
Can be used. Among these, aluminum nitride, silicon nitride, aluminum oxide, and a compound of aluminum oxide and zirconium oxide are preferable.

【0011】これらの各セラミックスには、焼結助剤、
例えば酸化イットリウム等の希土類酸化物、酸化マグネ
シウム等の金属酸化物を含有されていてもよい。焼結助
剤の含有量は、2〜20重量%の範囲が好ましい。
Each of these ceramics has a sintering aid,
For example, it may contain a rare earth oxide such as yttrium oxide or a metal oxide such as magnesium oxide. The content of the sintering aid is preferably in the range of 2 to 20% by weight.

【0012】セラミックス基板の厚さは、実装される電
子素子の大きさや重量、発熱量、セラミックス回路基板
の大きさ、必要な強度、耐久性等を考慮したうえで、セ
ラミックス回路基板が所定の反り量のものとなるよう
に、金属回路板の厚さないしセラミックス基板の反対面
に設けられる金属板(以下、本明細書において「裏金属
板」という場合がある)の厚さなどとの関連から定める
ことができる。セラミックス基板の厚さは特に限定され
るものではないが0.3〜1mm、さらには0.3〜
0.7mmの範囲が好ましい。セラミックス基板の厚さ
が0.3mm未満であると基板の強度が保ち難く割れの
原因になり易い。一方、基板厚さが1mmを超えるとセ
ラミックス回路基板の薄型化が困難になると共に所定の
反り量を保ち難い。
The thickness of the ceramic substrate is determined by taking into account the size and weight of the electronic elements to be mounted, the amount of heat generated, the size of the ceramic circuit substrate, the required strength, durability, etc. In view of the relationship between the thickness of the metal circuit board and the thickness of the metal plate provided on the opposite surface of the ceramic substrate (hereinafter, may be referred to as “back metal plate” in this specification) so as to be a quantity. Can be determined. The thickness of the ceramic substrate is not particularly limited, but is 0.3 to 1 mm, and more preferably 0.3 to 1 mm.
A range of 0.7 mm is preferred. If the thickness of the ceramic substrate is less than 0.3 mm, it is difficult to maintain the strength of the substrate, which is likely to cause cracking. On the other hand, if the substrate thickness exceeds 1 mm, it becomes difficult to reduce the thickness of the ceramic circuit board and it is difficult to maintain a predetermined amount of warpage.

【0013】本発明によるセラミックス回路基板の金属
回路板を構成する金属は、前記のセラミックス基板の構
成成分と共晶化合物を生成し、直接接合法や活性金属法
による接合方法を適用できる金属であれば特に限定され
ない。本発明では、例えば銅、アルミニウム、鉄、ニッ
ケル、クロム、銀、モリブデン、コバルトの単体または
その合金などを使用することができる。導電性および価
格などの観点からは、銅、アルミニウムおよびその合金
が特に好ましい。
The metal constituting the metal circuit board of the ceramic circuit board according to the present invention is a metal which forms a eutectic compound with the components of the ceramic substrate and which can be applied by a direct joining method or a joining method by an active metal method. It is not particularly limited. In the present invention, for example, a simple substance of copper, aluminum, iron, nickel, chromium, silver, molybdenum, cobalt, or an alloy thereof can be used. From the viewpoints of conductivity, cost, and the like, copper, aluminum, and alloys thereof are particularly preferable.

【0014】この金属回路板の厚さは、通電容量および
セラミックス回路基板の反り量を考慮して決定すること
ができる。金属回路板の厚さは、0.25〜1mm、さ
らには0.25〜0.6mmの範囲が好ましい。金属回
路板の厚さが0.25mm未満では通電容量を確保し難
く回路板としての効果が小さい。一方、金属回路板の厚
さが1mmを超えると通電容量は確保できるものの金属
回路板が厚すぎるため所定の反り量を確保し難い。
The thickness of the metal circuit board can be determined in consideration of the current carrying capacity and the amount of warpage of the ceramic circuit board. The thickness of the metal circuit board is preferably in the range of 0.25 to 1 mm, more preferably 0.25 to 0.6 mm. If the thickness of the metal circuit board is less than 0.25 mm, it is difficult to secure the current carrying capacity, and the effect as the circuit board is small. On the other hand, when the thickness of the metal circuit board exceeds 1 mm, the current carrying capacity can be secured, but it is difficult to secure a predetermined amount of warpage because the metal circuit board is too thick.

【0015】前記のセラミックス基板と金属回路板の接
合は、直接接合法および活性金属法によって行うことが
できる。特に金属回路板として銅回路板を使用し直接接
合法によって接合する場合には、酸素を100〜100
0ppm含有するタフピッチ電解銅からなる銅回路板を
使用し、さらに後述するよう銅回路板表面に所定の厚さ
で酸化銅層を予め形成することにより、直接接合時に発
生するCu‐O共晶の量を増加させることによって基板
と銅回路板との接合強度をより向上させることができ
る。なお、直接接合法は、酸化アルミニウムなどの酸化
物系セラミックス基板を使用した場合には直ちに適用可
能であるが、非酸化物系セラミックス(例えば窒化アル
ミニウムや窒化珪素等)の場合のように金属回路板との
接合強度が不足する場合には、非酸化物系セラミックス
基板の表面に予め酸化物層を形成させることが好まし
い。この酸化物層は、セラミックス基板を酸化雰囲気中
で1000〜1400℃の温度で2〜15時間加熱処理
することによって形成させることができる。また、他に
はAl−Si合金板を金属回路板に用いて直接接合する
ことも可能である。
The joining of the ceramic substrate and the metal circuit board can be performed by a direct joining method or an active metal method. In particular, when a copper circuit board is used as a metal circuit board and bonded by a direct bonding method, oxygen is supplied in an amount of 100 to 100.
By using a copper circuit board made of tough pitch electrolytic copper containing 0 ppm, and further forming a copper oxide layer in a predetermined thickness on the surface of the copper circuit board in advance as described later, Cu-O eutectic generated at the time of direct bonding is formed. By increasing the amount, the bonding strength between the substrate and the copper circuit board can be further improved. The direct bonding method can be applied immediately when an oxide-based ceramic substrate such as aluminum oxide is used. However, the direct bonding method can be applied to a metal circuit such as a non-oxide-based ceramic (for example, aluminum nitride or silicon nitride). If the bonding strength with the plate is insufficient, it is preferable to form an oxide layer on the surface of the non-oxide ceramic substrate in advance. This oxide layer can be formed by subjecting the ceramic substrate to heat treatment in an oxidizing atmosphere at a temperature of 1000 to 1400 ° C. for 2 to 15 hours. In addition, it is also possible to use an Al-Si alloy plate as a metal circuit board and directly join them.

【0016】活性金属法でセラミックス基板と金属回路
板との接合を行う場合には、適当なろう付け材、例えば
Ti、Zr、Hf、Nbから選択される少なくとも一種
の活性金属を含有するAg‐Cu系ろう付け材を使用し
て、好ましくは真空中で700〜950℃で5〜30分
間加熱することによって接合を行うことができる。
When the ceramic substrate and the metal circuit board are joined by the active metal method, a suitable brazing material, for example, Ag-containing at least one active metal selected from Ti, Zr, Hf and Nb is used. Bonding can be performed by using a Cu-based brazing material, preferably by heating at 700 to 950 ° C. in vacuum for 5 to 30 minutes.

【0017】セラミックス回路基板の金属回路板の反対
側に設けられる金属板(裏金属板)の金属も特に限定さ
れない。本発明での裏金属板は、前記の金属回路板を構
成する金属と同一または異なる金属によって構成するこ
とができるが、本発明で好ましい金属は前記の金属回路
板を構成している金属である。このように裏金属板を金
属回路板と同じ金属で構成することにより、裏金属板と
セラミックス基板との接合を、金属回路板と同じ方法に
よって金属回路板の接合と同時に行うことができるよう
になる。
The metal of the metal plate (back metal plate) provided on the ceramic circuit board on the side opposite to the metal circuit plate is not particularly limited. The back metal plate in the present invention can be made of the same or a different metal as the metal constituting the metal circuit board, but the preferred metal in the present invention is the metal constituting the metal circuit board. . By configuring the back metal plate with the same metal as the metal circuit board in this way, the bonding between the back metal plate and the ceramic substrate can be performed simultaneously with the bonding of the metal circuit board in the same manner as the metal circuit board. Become.

【0018】この裏金属板の厚さは、セラミックス回路
基板が金属回路板側に凸状形状に反りかつその反り量が
所定のものとなるようにするために、通常、金属回路板
の厚さよりも薄くした方が効果的である。裏金属板の具
体的な厚さは、金属回路板の厚さおよびセラミックス基
板の厚さ、セラミックス回路基板の反り量に応じて変化
するが、金属回路板の厚さの0.5〜1.5倍、好まし
くは0.5〜0.8倍、の厚さが適当である。
The thickness of the back metal plate is usually larger than the thickness of the metal circuit board so that the ceramic circuit board is warped in a convex shape toward the metal circuit board and the amount of warp is a predetermined value. It is more effective to make it thinner. The specific thickness of the back metal plate varies according to the thickness of the metal circuit board, the thickness of the ceramic substrate, and the amount of warpage of the ceramic circuit board. A thickness of 5 times, preferably 0.5 to 0.8 times is suitable.

【0019】また、セラミックス回路基板を金属回路板
側に凸状に反りかつその反り量を所定のものにするため
には、セラミックス基板上の前記金属回路板の面積と裏
金属板の面積とが所定の面積比を有するようにすること
も効果的である。即ち、金属回路板のセラミックス基板
との接合面積を面積、裏金属板のセラミックス基板と
の接合面積を面積とした場合の(面積/面積)×
100が40〜95%、さらには50〜90%であるこ
とが好ましい。なお、金属回路板が複数の金属回路板か
らなる場合は、その金属回路板のすべての面積を合わせ
た数値を面積とする。同様に裏金属板が複数の金属板
からなるときは、すべての裏金属板の面積を合わせた数
値を面積とする。
Further, in order to warp the ceramic circuit board to the metal circuit board side in a convex shape and to set the warpage thereof to a predetermined value, the area of the metal circuit board on the ceramic board and the area of the back metal plate must be equal. It is also effective to have a predetermined area ratio. That is, (area / area) × (area / area) × where the area of the joint area between the metal circuit board and the ceramic substrate is the area and the area of the joint area of the back metal plate to the ceramic substrate
Preferably, 100 is 40 to 95%, more preferably 50 to 90%. When the metal circuit board is composed of a plurality of metal circuit boards, a numerical value obtained by adding all areas of the metal circuit board is defined as an area. Similarly, when the back metal plate is composed of a plurality of metal plates, a numerical value obtained by adding the areas of all the back metal plates is defined as the area.

【0020】金属回路板の面積が裏金属板の面積の
95%を超える場合には、セラミックス回路基板の反り
量が不足し、一方、金属回路層の面積が裏金属層の面
積の40%未満の場合にはセラミックス回路基板の反
り量が大きくなりすぎる場合がある。このように所定の
反り量を持たせるためには上記のような方法があり、こ
れらの2つの方法を組合せて反り量を制御することも可
能である。また、当然ながら本発明はセラミックス回路
基板に所定の反り量を具備させたことに特徴のあるもの
であるから必ずしも製造方法が上記方法に限定されるも
のではない。
If the area of the metal circuit board exceeds 95% of the area of the back metal plate, the amount of warpage of the ceramic circuit board is insufficient, while the area of the metal circuit layer is less than 40% of the area of the back metal layer. In this case, the amount of warpage of the ceramic circuit board may be too large. As described above, there is the above-described method for providing a predetermined amount of warpage, and it is also possible to control the amount of warpage by combining these two methods. In addition, it goes without saying that the present invention is characterized in that the ceramic circuit board is provided with a predetermined amount of warpage, so the manufacturing method is not necessarily limited to the above method.

【0021】そして、本発明によるセラミックス回路基
板の反り量は、セラミックス回路基板の長手方向の長さ
の0.15〜0.30%、好ましくは0.15〜0.2
0%、である。反り量が0.15%未満の場合には、は
んだフロー性の向上効果が充分得られず、一方、0.3
0%を超える場合には、セラミックス回路基板の反り量
が大きくなりすぎて、強度および電子素子の実装上の問
題が発生する場合がある。
The warpage of the ceramic circuit board according to the present invention is 0.15 to 0.30%, preferably 0.15 to 0.2% of the longitudinal length of the ceramic circuit board.
0%. If the warpage is less than 0.15%, the effect of improving the solder flow property cannot be sufficiently obtained.
If it exceeds 0%, the amount of warpage of the ceramic circuit board may become too large, and problems in strength and mounting of electronic elements may occur.

【0022】[0022]

【実施例】(実施例1〜6、比較例1〜3)表1に示し
た材質を主成分とするセラミックス基板の縦50mm×
横50mm×厚さ0.635mm、金属回路板を縦30
mm×横10mm×厚さ0.25mmの銅板を2枚(接
合時の間隔は1mm)、裏金属板を縦40mm×横40
mm×厚さ0.20mmの銅板とし、直接接合法または
活性金属法により所定の反り量Aを有するセラミックス
回路基板を作製した。
EXAMPLES (Examples 1 to 6, Comparative Examples 1 to 3) A ceramic substrate mainly composed of the materials shown in Table 1 having a length of 50 mm.
50mm wide x 0.635mm thick, metal circuit board length 30
2 × 10 mm × 0.25 mm thick copper plates (interval at joining is 1 mm), the back metal plate is 40 mm long × 40 mm wide
A ceramic circuit board having a predetermined warpage A was prepared by a direct bonding method or an active metal method using a copper plate having a size of mm × 0.20 mm in thickness.

【0023】このセラミックス回路基板に対し、リフロ
ー工法により電子素子を表面実装した際のはんだフロー
性を検討した。はんだフロー性の測定としては、リフロ
ー工程の際はんだフローによる金属回路板のショートな
どの不具合の発生の有無を各100個ずつ測定し、不具
合発生が0〜1個のものをはんだフロー性「良好」、2
〜4個のものを「やや不良」、5個以上のものを「不
良」として表示した。その結果を表1に示す。
The solder flow property when an electronic element was surface-mounted on the ceramic circuit board by the reflow method was examined. As for the measurement of the solder flow property, the presence or absence of a failure such as a short circuit of the metal circuit board due to the solder flow during the reflow process is measured for each 100 pieces, and the one having 0 to 1 failure occurrence is evaluated as having a good solder flow property. ", 2
44 items are indicated as “slightly defective” and 5 or more items are indicated as “defective”. Table 1 shows the results.

【0024】また、比較のために反り量を本発明の範囲
外のセラミックス回路基板を作製し、同様の測定を行っ
た。なお、(反り量/セラミックス回路基板の長手方向
の長さ)×100の測定において、セラミックス基板の
長手方向の長さBとして金属回路板接合前のセラミック
ス基板の長手方向の長さである50mmを用いて算出し
た。
For comparison, a ceramic circuit board having a warpage outside the range of the present invention was prepared, and the same measurement was performed. In the measurement of (amount of warpage / length in the longitudinal direction of the ceramic circuit board) × 100, 50 mm, which is the length in the longitudinal direction of the ceramic substrate before joining the metal circuit board, was used as the length B in the longitudinal direction of the ceramic substrate. Calculated using

【0025】[0025]

【表1】 表1から分かる通り、本実施例にかかるセラミックス回
路基板のはんだフロー性は良好であり、不具合の発生は
0〜1個に抑えられた。
[Table 1] As can be seen from Table 1, the solder flow property of the ceramic circuit board according to the present example was good, and the occurrence of defects was suppressed to 0 to 1.

【0026】それに対し、反り量の大きい比較例2およ
び裏金属板側に反った比較例3は不具合が多く、はんだ
フロー性は不良またはやや不良となった。これは反り量
が不十分であることから2つの金属回路板の間隔1mm
の間にはんだが流れ込んでしまいショートの原因となっ
てしまったことが原因である。また、反り量の小さい比
較例1は反り量が不十分であることから金属回路板側に
凸状に反った効果が十分得られていないことが分かっ
た。
On the other hand, Comparative Example 2 having a large amount of warpage and Comparative Example 3 warping toward the back metal plate had many defects, and the solder flow property was poor or slightly poor. This is because the amount of warpage is insufficient and the distance between the two metal circuit boards is 1 mm.
This is because the solder flowed in between them and caused a short circuit. Further, it was found that Comparative Example 1 having a small amount of warpage was insufficient in the amount of warpage, so that the effect of warpage in the metal circuit board side was not sufficiently obtained.

【0027】(実施例7〜11、比較例4)次に金属回
路板と裏金属板の厚さおよび面積率とを関係を検討す
る。縦60mm×横40mm×厚さ0.8mmの酸化ア
ルミニウム基板を用意した。これに対し、板厚および面
積率[(面積/面積)×100(%)]を表2のよ
うに変えたときの反り量を測定した。
(Examples 7 to 11, Comparative Example 4) Next, the relationship between the thickness and the area ratio of the metal circuit board and the back metal plate will be examined. An aluminum oxide substrate having a length of 60 mm, a width of 40 mm and a thickness of 0.8 mm was prepared. On the other hand, the warpage was measured when the plate thickness and the area ratio [(area / area) × 100 (%)] were changed as shown in Table 2.

【0028】なお、(反り量/セラミックス回路基板の
長手方向の長さ)×100(%)の値を測定する際のセ
ラミックス回路基板の長手方向の長さは金属回路板接合
後の長さBにて対応した。また、金属回路板は同一サイ
ズのものを3枚用意し、その全ての面積を合せて面積
とし、裏金属板は1枚で形成し面積とした。
The length of the ceramic circuit board in the longitudinal direction when measuring the value of (the amount of warpage / the length of the ceramic circuit board in the longitudinal direction) × 100 (%) is the length B after joining the metal circuit board. Corresponded. In addition, three metal circuit boards having the same size were prepared, the area of all the metal boards was combined, and the area of the back metal plate was formed as one sheet.

【0029】また、比較例4として金属回路板と裏金属
板の厚さおよび面積率との関係が本発明の好ましい範囲
外であるものを用意した。各金属回路板および裏金属板
はいずれも直接結合法にて接合することによりセラミッ
クス回路基板を作製した。
As Comparative Example 4, a metal circuit board having a relationship between the thickness and the area ratio of the metal circuit board and the back metal plate outside the preferred range of the present invention was prepared. Each of the metal circuit board and the back metal plate was joined by a direct bonding method to produce a ceramic circuit board.

【0030】[0030]

【表2】 表2から分かる通り、金属回路板の厚さ>裏金属板の厚
さ、(金属回路板の面積/裏金属板の面積)×10
0(%)=50〜95%のものは、(反り量A/基板の
長手方向の長さB)×100(%)を0.15〜0.3
0(%)にできることが判明した。
[Table 2] As can be seen from Table 2, the thickness of the metal circuit board> the thickness of the back metal plate, (area of the metal circuit board / area of the back metal plate) × 10
In the case of 0 (%) = 50 to 95%, (warp amount A / length B of substrate in the longitudinal direction) × 100 (%) is 0.15 to 0.3%.
It turned out that it can be set to 0 (%).

【0031】また、裏金属板の厚さ/金属回路板の厚さ
の比が0.5〜0.8である実施例8、実施例10、実
施例11はいずれも(反り量A/基板の長手方向の長さ
B)×100(%)の値が0.15〜0.20%と本発
明の好ましい範囲にすることができた。
In the eighth, tenth and eleventh embodiments, the ratio of the thickness of the back metal plate / the thickness of the metal circuit board is 0.5 to 0.8 (warpage A / substrate). Of the length in the longitudinal direction B) × 100 (%) was 0.15 to 0.20%, which was within the preferable range of the present invention.

【0032】このような本実施例にかかるセラミックス
回路基板はいずれもはんだフロー性は良好であった。そ
れに対し、比較例4のものは裏金属板側に凸状に反って
しまい反りが発生する方向が逆になってしまった。
Each of the ceramic circuit boards according to the present examples had good solder flow properties. On the other hand, in the case of Comparative Example 4, the direction in which the back metal plate was warped in a convex shape and the warping occurred was reversed.

【0033】(実施例12〜13)セラミックス基板と
して、窒化アルミニウム基板(厚さ0.635mm)と
窒化珪素基板(厚さ0.35mm)を用意した。金属回
路板(厚さ0.35mm)および裏金属板(厚さ0.2
5mm)としてAl‐6wt%Si合金板を用意した。
(Examples 12 and 13) As a ceramic substrate, an aluminum nitride substrate (thickness 0.635 mm) and a silicon nitride substrate (thickness 0.35 mm) were prepared. Metal circuit board (thickness 0.35mm) and back metal plate (thickness 0.2
5 mm), an Al-6 wt% Si alloy plate was prepared.

【0034】金属回路板と裏金属板の面積比[(面積
/面積)×100%]を80%になるよう調整しセラ
ミックス基板に直接結合した。このようなセラミックス
回路基板に対し、(反り量A/セラミックス基板の長手
方向の長さ)×100(%)を求め、更にはんだリフロ
ー性を実施例1と同条件により測定した。その結果を表
3に示す。
The area ratio between the metal circuit board and the back metal plate [(area / area) × 100%] was adjusted to 80%, and directly bonded to the ceramic substrate. With respect to such a ceramic circuit board, (warp amount A / length in the longitudinal direction of the ceramic substrate) × 100 (%) was obtained, and solder reflow properties were measured under the same conditions as in Example 1. Table 3 shows the results.

【0035】[0035]

【表3】 表3から分かる通り、金属回路板および裏金属板の材質
を変えたとしても同様な効果が得られることが分かっ
た。
[Table 3] As can be seen from Table 3, even when the materials of the metal circuit board and the back metal plate were changed, the same effect was obtained.

【0036】[0036]

【発明の効果】本発明によるセラミックス回路基板は、
電子素子が実装される金属回路板側に凸状形状に反って
おり、その反り量が前記セラミックス回路基板の長手方
向の長さの0.15〜0.30%であることから、電子
素子の実装時のはんだフロー性が良好になり、はんだが
金属回路板上で局在化するのが抑制される。
The ceramic circuit board according to the present invention comprises:
Since the warp is warped to the metal circuit board side on which the electronic element is mounted and the amount of warp is 0.15 to 0.30% of the longitudinal length of the ceramic circuit board, Solder flowability during mounting is improved, and localization of solder on the metal circuit board is suppressed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明によるセラミックス回路基板の一具体例
を模式的に示す断面図。
FIG. 1 is a sectional view schematically showing a specific example of a ceramic circuit board according to the present invention.

【図2】金属回路板側に凹状に湾曲した従来のセラミッ
クス回路基板を模式的に示す断面図。
FIG. 2 is a cross-sectional view schematically showing a conventional ceramic circuit board curved concavely toward the metal circuit board.

【符号の説明】[Explanation of symbols]

1 セラミックス回路基板 2 セラミックス基板 3 金属回路板 4 金属板(裏金属板) A 反り量 B セラミックス回路基板の長手方向の長さ REFERENCE SIGNS LIST 1 ceramic circuit board 2 ceramic board 3 metal circuit board 4 metal plate (back metal plate) A warpage B length of ceramic circuit board in longitudinal direction

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H05K 1/03 610 H01L 23/14 C M 1/09 23/36 C ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H05K 1/03 610 H01L 23/14 C M 1/09 23/36 C

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】セラミックス基板上に金属回路板が設けら
れ、このセラミックス基板の反対面側には前記金属回路
板と同一または異なる金属から構成された金属板が設け
られてなるセラミックス回路基板であって、前記セラミ
ックス回路板が前記金属回路板側に凸状形状に反ってお
り、その反り量が前記セラミックス回路基板の長手方向
の長さの0.15〜0.30%であることを特徴とす
る、セラミックス回路基板。
1. A ceramic circuit board comprising: a metal circuit board provided on a ceramic substrate; and a metal plate made of the same or different metal as the metal circuit board is provided on the opposite side of the ceramic substrate. The ceramic circuit board is warped in a convex shape toward the metal circuit board, and the warpage is 0.15 to 0.30% of the longitudinal length of the ceramic circuit board. A ceramic circuit board.
【請求項2】前記金属板が前記金属回路板よりも厚いも
のであることを特徴とする、請求項1に記載のセラミッ
クス回路基板。
2. The ceramic circuit board according to claim 1, wherein said metal plate is thicker than said metal circuit board.
【請求項3】前記金属回路板の面積が前記金属板の面積
の40〜95%であることを特徴とする、請求項1また
は請求項2に記載のセラミックス回路基板。
3. The ceramic circuit board according to claim 1, wherein the area of the metal circuit board is 40 to 95% of the area of the metal plate.
【請求項4】前記セラミックス基板が、窒化アルミニウ
ム、窒化珪素、酸化アルミニウム、および酸化アルミニ
ウムと酸化ジルコニウムとの化合物のいずれかからなる
ものであることを特徴とする、請求項1ないし請求項3
のいずれかに記載のセラミックス回路基板。
4. The ceramic substrate according to claim 1, wherein said ceramic substrate is made of any one of aluminum nitride, silicon nitride, aluminum oxide, and a compound of aluminum oxide and zirconium oxide.
The ceramic circuit board according to any one of the above.
【請求項5】前記金属回路板が、銅、銅合金、アルミニ
ウム、アルミニウム合金の少なくとも1種からなるもの
であることを特徴とする、請求項1ないし請求項4のい
ずれかに記載のセラミックス回路基板。
5. The ceramic circuit according to claim 1, wherein said metal circuit board is made of at least one of copper, copper alloy, aluminum, and aluminum alloy. substrate.
JP2000272045A 2000-09-07 2000-09-07 Electronic element Expired - Fee Related JP4557398B2 (en)

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