JP2002075768A - Manufacturing method of laminated inductor - Google Patents
Manufacturing method of laminated inductorInfo
- Publication number
- JP2002075768A JP2002075768A JP2000260324A JP2000260324A JP2002075768A JP 2002075768 A JP2002075768 A JP 2002075768A JP 2000260324 A JP2000260324 A JP 2000260324A JP 2000260324 A JP2000260324 A JP 2000260324A JP 2002075768 A JP2002075768 A JP 2002075768A
- Authority
- JP
- Japan
- Prior art keywords
- laminate
- conductor
- conductor pattern
- manufacturing
- laminated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、積層インダクタの
製造方法に係るもので、特に積層方向に周回する導体パ
ターンの端子を積層方向に引き出す構造の積層インダク
タに適した端子形成方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a laminated inductor, and more particularly to a method for forming a terminal suitable for a laminated inductor having a structure in which a terminal of a conductor pattern orbiting in a laminating direction is drawn out in a laminating direction. .
【0002】[0002]
【従来の技術】電子部品の小型化の要求に合った素子と
して、積層インダクタの需要が高まっている。これはセ
ラミック積層体内に周回する導体パターンを形成し、そ
の両端を外部に引き出して端子電極に接続している。従
来、導体パターンは積層方向に対して垂直の方向に引き
出すのが一般的であり、これは積層後に積層体を素子に
分割し、焼成後に導体膜を塗布して焼き付けるのが一般
的である。焼成と焼付けを同時に行うために、焼成前に
導体膜を塗布する方法も考えられている。2. Description of the Related Art There is a growing demand for multilayer inductors as devices that meet the demand for miniaturization of electronic components. This forms a conductor pattern that circulates in a ceramic laminate, and both ends are drawn out to the outside and connected to terminal electrodes. Conventionally, a conductor pattern is generally pulled out in a direction perpendicular to the lamination direction. In general, the lamination is divided into elements after lamination, and after baking, a conductor film is applied and baked. In order to simultaneously perform firing and baking, a method of applying a conductor film before firing has been considered.
【0003】最近、図3に示したように、端子の形成位
置を積層方向の両端面とする積層インダクタが利用され
るようになっている。このタイプは導体パターンにより
形成されたコイルの巻き回しに方向性がないので実装が
容易である利点を有している。Recently, as shown in FIG. 3, a laminated inductor having terminals formed at both end surfaces in the laminating direction has been used. This type has an advantage that the winding of the coil formed by the conductor pattern has no directionality, so that mounting is easy.
【0004】[0004]
【発明が解決しようとする課題】本発明は、このような
端子が積層方向に形成された積層インダクタの端子電極
の形成を容易にして、端子電極の形成の工数を大幅に減
少させるものである。SUMMARY OF THE INVENTION The present invention facilitates the formation of the terminal electrodes of a laminated inductor having such terminals formed in the laminating direction, thereby greatly reducing the number of steps for forming the terminal electrodes. .
【0005】[0005]
【課題を解決するための手段】本発明は、積層体の切断
前に端子電極となる導体膜を塗布しておき、切断後の焼
成時に同時に電極の焼付けも行うことによって、上記の
課題を解決するものである。SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems by applying a conductor film to be a terminal electrode before cutting the laminate, and simultaneously firing the electrode at the time of firing after cutting. Is what you do.
【0006】すなわち、積層体内に端部が接続されて周
回する導体パターンを形成し、その両端を積層方向の表
面に引き出して端子電極と接続する積層インダクタの製
造方法において、絶縁体ペーストと導体ペーストを交互
に印刷して、積層体内に端部が接続されて周回する複数
の導体パターンを一体に形成し、それぞれの導体パター
ンの両端を積層方向の両面に引き出し、積層体の積層方
向の表面のほぼ全面に導体ペーストを印刷し、その積層
体をそれぞれの素子が分割されるように切断し、 それ
らの素子を焼成するとともに、端子電極を焼き付けるこ
とに特徴を有するものである。That is, in a method of manufacturing a laminated inductor in which a conductor pattern whose ends are connected and circling is formed in a laminate and both ends are drawn out to the surface in the laminating direction and connected to a terminal electrode, an insulator paste and a conductor paste are provided. Are alternately printed to form a plurality of conductor patterns, each of which has an end connected in the laminate and circling, are integrally formed, and both ends of each conductor pattern are drawn out on both sides in the lamination direction, and the surface of the laminate in the lamination direction is formed. It is characterized in that a conductive paste is printed on almost the entire surface, the laminate is cut so that each element is divided, and the elements are fired and the terminal electrodes are fired.
【0007】導体ペーストが印刷されたセラミックグリ
ーンシートが積層され、スルーホールに充填された導体
によって積層体内に端部が接続されて周回する複数の導
体パターンを一体に形成し、それぞれの導体パターンの
両端を積層方向の両面に引き出す方法においても同様に
処理することがでいる。[0007] A plurality of ceramic green sheets on which a conductor paste is printed are laminated, and a plurality of conductor patterns which are connected to each other and whose ends are connected in the laminate by conductors filled in the through holes are integrally formed. The same process can be applied to a method in which both ends are drawn to both sides in the laminating direction.
【0008】[0008]
【発明の実施の形態】本発明の工程は、以下のようにな
る。 (1)シートへの導体パターンの形成と積層、絶縁対ペ
ーストと導体ペーストの交互印刷積層によって絶縁体中
へ導体パターンを形成する積層(導体パターンの両端は
積層方向の両面に引き出す) (2)積層体の上面への導体膜の塗布、乾燥 (3)積層体を裏返して反対側表面への導体膜の塗布、
乾燥 (3)素子への切断、分割 (4)焼成、端子電極焼付け (5)必要により端子にめっき層形成DESCRIPTION OF THE PREFERRED EMBODIMENTS The steps of the present invention are as follows. (1) Lamination of forming and laminating a conductor pattern on a sheet, and lamination of forming a conductor pattern in an insulator by alternately printing and laminating an insulating pair paste and a conductor paste (both ends of the conductor pattern are drawn out on both sides in the lamination direction) (2) Coating and drying the conductor film on the upper surface of the laminate (3) Turn the laminate over and apply the conductor film on the opposite surface,
Drying (3) Cutting into elements, splitting (4) Baking, baking terminal electrodes (5) Plating layer formation on terminals as necessary
【0009】[0009]
【実施例】以下、図面を参照して、本発明の実施例につ
いて説明する。図1(A)〜(D)は本発明の実施例を
示す斜視図である。シート等の積層工程と導体パターン
の形成工程は図示を省略してある。Embodiments of the present invention will be described below with reference to the drawings. 1A to 1D are perspective views showing an embodiment of the present invention. The steps of laminating a sheet or the like and the step of forming a conductor pattern are not shown.
【0010】基台10の上に形成された積層体11は内部に
多数の導体パターンが形成され、それらは積層方向に重
畳して周回してコイルを構成している。それらの端部12
は積層体11の表面に引き出されて露出している。もちろ
ん、裏面も同様である(A)。The multilayer body 11 formed on the base 10 has a large number of conductor patterns formed therein, and these are superposed and circulated in the laminating direction to constitute a coil. Their ends 12
Is drawn out to the surface of the laminate 11 and is exposed. Of course, the same applies to the back surface (A).
【0011】積層体11の表面に銀等の導体ペーストを印
刷し、導体膜13を形成する。印刷後この導体膜13を乾燥
する(B)。A conductive paste such as silver is printed on the surface of the laminate 11 to form a conductive film 13. After printing, the conductive film 13 is dried (B).
【0012】積層体11を裏返して、裏面の導体パターン
端部を露出させ、この表面に同様に導体ペーストを印刷
して導体膜14を形成する。これによって、積層体の両面
に導体膜が形成されることになる(C)。The laminate 11 is turned over to expose the end of the conductor pattern on the back surface, and a conductor paste is similarly printed on the surface to form a conductor film 14. As a result, conductor films are formed on both surfaces of the laminate (C).
【0013】次ぎに、この積層体11を所定のスクライブ
ライン15に沿って切断し、個々の素子に分離する。これ
によって内部に導体パターンを具え、端面に外部電極と
なる導体膜を具えた積層インダクタの未焼成体が得られ
る(D)。Next, the laminate 11 is cut along predetermined scribe lines 15 to separate the laminate into individual elements. As a result, a green body of a laminated inductor having a conductor pattern inside and a conductor film serving as an external electrode on an end face is obtained (D).
【0014】上記のようにして得られた未焼成体を所定
の温度で焼成して積層インダクタが完成する。端子電極
の信頼性を上げるために銀等の電極16上に錫あるいはは
んだめっき17を端子電極に施してもよい。導体の塗布の
工程が不要となり、通常のバレル電解めっきのみによっ
て導体を付加することができる。The green body obtained as described above is fired at a predetermined temperature to complete a laminated inductor. To improve the reliability of the terminal electrode, tin or solder plating 17 may be applied to the electrode 16 made of silver or the like. The step of applying the conductor is not required, and the conductor can be added only by ordinary barrel electrolytic plating.
【0015】[0015]
【発明の効果】本発明によれば、積層インダクタの製造
工程のうち、個々の素子への導体ペーストの塗布の工程
が不要となり、セラミックの焼成と導体膜の焼付けを同
時に行うことができるので、製造の工数を大幅に低減す
ることができる。According to the present invention, in the manufacturing process of the laminated inductor, the process of applying the conductor paste to each element is not required, and the firing of the ceramic and the firing of the conductor film can be performed simultaneously. Man-hours for manufacturing can be greatly reduced.
【図1】 本発明の実施例を示す斜視図FIG. 1 is a perspective view showing an embodiment of the present invention.
【図2】 本発明の他の実施例を示す正面断面図FIG. 2 is a front sectional view showing another embodiment of the present invention.
【図3】 本発明を適用する積層インダクタの正面断面
図FIG. 3 is a front sectional view of a multilayer inductor to which the present invention is applied;
11:積層体 12:導体パターンの端部 13、14:導体膜 16:端子電極 17:めっき層 11: Laminated body 12: End of conductive pattern 13, 14: Conductive film 16: Terminal electrode 17: Plating layer
Claims (3)
体パターンを形成し、その両端を積層方向の表面に引き
出して端子電極と接続する積層インダクタの製造方法に
おいて、絶縁体ペーストと導体ペーストを交互に印刷し
て、積層体内に端部が接続されて周回する複数の導体パ
ターンを一体に形成し、それぞれの導体パターンの両端
を積層方向の両面に引き出し、積層体の積層方向の表面
のほぼ全面に導体ペーストを印刷し、 その積層体をそれぞれの素子が分割されるように切断
し、 それらの素子を焼成するとともに、端子電極を焼き付け
ることを特徴とする積層インダクタの製造方法。1. A method for manufacturing a laminated inductor, comprising forming a conductor pattern having ends connected to a circuit in a laminate, and extending both ends to a surface in a laminating direction to connect to a terminal electrode. Are alternately printed to form a plurality of conductor patterns, each of which has an end connected in the laminate and circling, are integrally formed, and both ends of each conductor pattern are drawn out on both sides in the lamination direction, and the surface of the laminate in the lamination direction is formed. A method for manufacturing a multilayer inductor, comprising printing a conductive paste on substantially the entire surface, cutting the laminate so that each element is divided, firing those elements, and firing terminal electrodes.
体パターンを形成し、その両端を積層方向の表面に引き
出して端子電極と接続する積層インダクタの製造方法に
おいて、導体ペーストが印刷されたセラミックグリーン
シートが積層され、スルーホールに充填された導体によ
って積層体内に端部が接続されて周回する複数の導体パ
ターンを一体に形成し、それぞれの導体パターンの両端
を積層方向の両面に引き出し、積層体の積層方向の表面
のほぼ全面に導体ペーストを印刷し、 その積層体をそれぞれの素子が分割されるように切断
し、 それらの素子を焼成するとともに、端子電極を焼き付け
ることを特徴とする積層インダクタの製造方法。2. A method for manufacturing a laminated inductor in which a conductor pattern whose ends are connected and circling is formed in a laminated body, and both ends of the conductor pattern are drawn out to a surface in a laminating direction and connected to a terminal electrode, the conductor paste is printed. Ceramic green sheets are laminated, and a plurality of conductor patterns that are connected and circumscribed in the laminate by conductors filled in through holes are integrally formed, and both ends of each conductor pattern are drawn out on both sides in the laminating direction, Conductive paste is printed on almost the entire surface of the laminate in the laminating direction, the laminate is cut so that each element is divided, and the elements are fired and the terminal electrodes are baked. Manufacturing method of multilayer inductor.
めっき層を形成する請求項1または請求項2記載の積層
インダクタの製造方法。3. The method according to claim 1, wherein a solder plating layer is formed on the surface of the baked terminal electrode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000260324A JP2002075768A (en) | 2000-08-30 | 2000-08-30 | Manufacturing method of laminated inductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000260324A JP2002075768A (en) | 2000-08-30 | 2000-08-30 | Manufacturing method of laminated inductor |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2002075768A true JP2002075768A (en) | 2002-03-15 |
Family
ID=18748353
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000260324A Pending JP2002075768A (en) | 2000-08-30 | 2000-08-30 | Manufacturing method of laminated inductor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2002075768A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013211333A (en) * | 2012-03-30 | 2013-10-10 | Toko Inc | Method of manufacturing surface mount inductor |
-
2000
- 2000-08-30 JP JP2000260324A patent/JP2002075768A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013211333A (en) * | 2012-03-30 | 2013-10-10 | Toko Inc | Method of manufacturing surface mount inductor |
CN103366947A (en) * | 2012-03-30 | 2013-10-23 | 东光株式会社 | Method for producing surface-mount inductor |
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