JP2002043431A5 - - Google Patents
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- Publication number
- JP2002043431A5 JP2002043431A5 JP2000227759A JP2000227759A JP2002043431A5 JP 2002043431 A5 JP2002043431 A5 JP 2002043431A5 JP 2000227759 A JP2000227759 A JP 2000227759A JP 2000227759 A JP2000227759 A JP 2000227759A JP 2002043431 A5 JP2002043431 A5 JP 2002043431A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000227759A JP4942239B2 (ja) | 2000-07-27 | 2000-07-27 | シールド回路設計装置およびシールド回路設計方法 |
| US09/759,262 US6467071B2 (en) | 2000-07-27 | 2001-01-16 | Shield circuit designing apparatus and shield circuit designing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000227759A JP4942239B2 (ja) | 2000-07-27 | 2000-07-27 | シールド回路設計装置およびシールド回路設計方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002043431A JP2002043431A (ja) | 2002-02-08 |
| JP2002043431A5 true JP2002043431A5 (enExample) | 2007-08-02 |
| JP4942239B2 JP4942239B2 (ja) | 2012-05-30 |
Family
ID=18721164
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000227759A Expired - Fee Related JP4942239B2 (ja) | 2000-07-27 | 2000-07-27 | シールド回路設計装置およびシールド回路設計方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6467071B2 (enExample) |
| JP (1) | JP4942239B2 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7739638B2 (en) * | 2003-03-06 | 2010-06-15 | Fujitsu Limited | Circuit analyzing device, circuit analyzing method, program, and computer readable information recording medium considering influence of signal input to peripheral circuit which does not have logical influence |
| US11087058B1 (en) * | 2020-01-17 | 2021-08-10 | University Of Florida Research Foundation, Inc. | Prevention of front-side probing attacks |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01318164A (ja) * | 1988-06-20 | 1989-12-22 | Fujitsu Ltd | 図面自動生成方式 |
| JPH04142074A (ja) * | 1990-10-02 | 1992-05-15 | Seiko Epson Corp | 半導体装置 |
| JPH06314741A (ja) | 1993-04-30 | 1994-11-08 | Kawasaki Steel Corp | 集積回路とその自動配置配線設計方法 |
| JP3249871B2 (ja) * | 1993-12-22 | 2002-01-21 | 三菱電機株式会社 | 半導体記憶装置 |
| JPH08306867A (ja) * | 1995-05-11 | 1996-11-22 | Yamaha Corp | 半導体集積回路 |
| JPH09237870A (ja) * | 1996-03-01 | 1997-09-09 | Hitachi Ltd | 信号線駆動装置 |
| JPH09307061A (ja) | 1996-05-16 | 1997-11-28 | Rohm Co Ltd | 集積回路装置 |
| JPH1140699A (ja) | 1997-07-22 | 1999-02-12 | Toshiba Corp | 半導体装置 |
| JP3264267B2 (ja) * | 1999-04-21 | 2002-03-11 | 日本電気株式会社 | 集積回路装置 |
| KR20010009697A (ko) * | 1999-07-13 | 2001-02-05 | 윤종용 | 차폐선을 구비한 반도체 집적회로 |
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2000
- 2000-07-27 JP JP2000227759A patent/JP4942239B2/ja not_active Expired - Fee Related
-
2001
- 2001-01-16 US US09/759,262 patent/US6467071B2/en not_active Expired - Lifetime