JP2002041003A - Liquid-crystal display device and method for driving liquid-crystal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid-crystal display device as well as a method for driving a liquid-crystal for reduced power consumption when a TFT liquid- crystal display panel is driven. SOLUTION: Related to a liquid-crystal display device 10, a common electrode provided to face each pixel electrode of a liquid-crystal display panel 9 is supplied with a common signal Vcom whose polarity inverts at every prescribed cycle by a common signal generating circuit 16. Each scanning line is supplied with a scan signal at a prescribed scan timing by a scan driver 7 while each scanning line is supplied with a display signal VD by a signal driver 18 at alternate polarity inversion at the timing of polarity inversion of the common signal Vcom. A central electric potential of the display signal VD supplied to the signal line is shifted in the invert polarity direction relative to a polarity inversion direction of the common signal at the timing of polarity inversion of the common signal, so that the amplitude of the common signal Vcom is suppressed to about a power source voltage for driving a logic circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a liquid crystal display device for driving an active matrix type liquid crystal display screen and a liquid crystal driving method.

[0002]

2. Description of the Related Art A liquid crystal display device using a switching element includes, for example, a thin film transistor (TFT).
An active matrix type TFT liquid crystal panel that drives a liquid crystal by writing a video signal (display signal VD) according to scanning timing for each pixel using a transistor is known.

Here, the configuration and operation of a conventional liquid crystal display device 100 will be described with reference to FIGS. FIG.
FIG. 9 is a block diagram showing a configuration of a conventional liquid crystal display device 100, FIG. 9 is a diagram showing a conventional common signal generation circuit 6, and FIG. 10 (a) is a polarity inversion signal POL, FIG. 10B shows the waveforms of the common signal Vcom and the display signal VD applied to the liquid crystal.

[0004] As shown in FIG.
It comprises a power supply circuit 1, a video interface circuit 3, an inverting amplifier 4, a controller 5, a common signal generation circuit 6, a scanning driver 7, a signal driver 8, and a liquid crystal display panel 9.

[0005] The power supply circuit 1 generates power of various voltage values and supplies the power to various parts of the liquid crystal display device 100. For the scan driver 7, a 5.0 V power supply VD for driving the logic circuit is provided.
D, a high-level power supply VGH of about 13.5 V and a low-level power supply VGL of about -18 V for the gate signal VG, and a 5.0 V power supply VDD for driving the logic circuit to the signal driver 8. And a bias power supply VSH for the display signal VD, a ground voltage V0 (GND) to the scanning driver 7 and the signal driver 8, and a center potential Va of the inverted RGB signal to the inverting amplifier 4. Supply. In addition, about 3.0 V is applied to the common signal generation circuit 6.
And a high-level power supply VGH of a maximum of about 13.5 V of the gate signal VG.

[0006] For example, NTSC (National Television System Committee) input from the video signal input terminal 2
A composite video signal of the system is sent to the video interface circuit 3.

The video interface circuit 3 performs synchronous separation detection on the input composite video signal and extracts a burst signal according to a timing control signal (not shown) from the controller 5 to perform chroma processing and the like. It decodes and outputs RGB signals, which are primary color signals of R, G, and B, a horizontal synchronizing signal H, and a vertical synchronizing signal V, and outputs the RGB signals to the inverting amplifier 4 and the synchronizing signals H and V to the controller 5. Output to

The inverting amplifier 4 polarizes the RGB signals supplied from the video interface circuit 3 at a predetermined cycle such as one horizontal scanning period (1H) or one field according to the polarity inversion signal POL input from the controller 5. Is inverted to generate an inverted RGB signal and output to the signal driver 8.

The controller 5 controls the operation of each part of the liquid crystal display device 100. Specifically, a scan driver 7 that drives a scan line of the liquid crystal display panel 9 based on the synchronization signals H and V supplied from the video interface circuit 3
, And a vertical control signal to a signal driver 8 that drives a signal line of the liquid crystal display panel 9.

As shown in FIG. 9, the common signal generating circuit 6 comprises an operational amplifier OP, resistors R1, R2, R3, variable resistors VR1, VR2, VR3, capacitors C1, C2 and the like. A resistor R2 and a variable resistor VR1 are connected to a non-inverting input terminal of the operational amplifier OP, and a predetermined threshold voltage is applied. The polarity inversion signal POL supplied from the controller via the resistor R1 is input to the inversion input terminal. Further, a variable resistor VR2 and a resistor R3 connected in series are connected to the operational amplifier OP as a negative feedback circuit. The threshold voltage is adjusted by adjusting the resistance value of the variable resistor VR1, and the amplification factor is adjusted by adjusting the resistance value of the variable resistor VR2. Also,
The output terminal of the operational amplifier OP is connected to a DC adjustment unit via a coupling capacitor C2. Variable resistance VR3
Is for adjusting the DC bias current.

The common signal generation circuit 6 inverts and amplifies the polarity inversion signal POL supplied from the controller 5 at a predetermined amplification rate, and generates a common signal Vcom by applying a bias to the inverted and amplified polarity inversion signal POL. And supplies the generated common signal Vcom to each common electrode of the liquid crystal display panel 9.

Incidentally, in order to drive the operational amplifier OP,
A gate voltage power supply VGH of about 13.5 V is used. The reason will be described below. In the conventional liquid crystal driving method, as shown in FIG. 10, the central potential of the common signal Vcom supplied to the common electrode (FIG. (Shown by a dashed line in (b)) is set to be lower by ΔV with respect to the center potential of the display signal VD so that the liquid crystal applied voltage becomes closer to the waveform of the positive / negative object. Therefore, about 1 V as the above-mentioned voltage ΔV is added to the maximum voltage of about 5 V necessary for driving the liquid crystal, and the common signal Vcom
Is set to 6 V, but there is no drive power supply for the liquid crystal module having a potential difference of about 6.0 V. Therefore, the conventional common signal generation circuit 6 uses a gate voltage power supply VGH (about 13.5 V) to be applied to the scanning line.

The scanning driver 7 includes a shift register, a gate circuit, and the like (not shown).
Signal VG based on the horizontal control signal supplied from
A (scanning signal) is generated and sequentially applied to n scanning lines of the liquid crystal display panel 9 to sequentially scan the scanning lines horizontally.

The signal driver 8 is an analog driver composed of, for example, a shift register, a sample-and-hold circuit, an analog buffer, and the like. Sampling is performed, and a gradation signal corresponding to the sampled signal is set to 1 as a display signal VD.
The voltage is applied simultaneously to m signal lines of the liquid crystal display panel 9 for each scanning period.

Here, if a DC voltage is continuously applied to the liquid crystal, the liquid crystal deteriorates. Therefore, an AC drive called an inversion drive for alternately applying a voltage of the opposite polarity to the common electrode is performed. For this purpose, for example, the polarity of the display signal VD is inverted every one field period or one horizontal period (1H), and the polarity of the common signal Vcom is inverted in the opposite direction.

The liquid crystal display panel 9 employs an active matrix type TFT liquid crystal display panel. In the liquid crystal display panel 9, liquid crystal is sealed between a pair of substrates (not shown), and n scanning lines (gate lines) and m signal lines (drain lines) are arranged in a matrix on one substrate. It is configured. An n-channel MOS type TFT is provided at each intersection of the scanning line and the signal line.
Each of the switching elements is arranged, and a scanning line is connected to a gate electrode of the switching element, a signal line is connected to a source electrode, and a pixel electrode is connected to a drain electrode. Further, a common electrode and a color filter are arranged on the opposing substrate side. A common line is connected to the common electrode, and a common signal Vcom output from the common signal generation circuit 6 is supplied.

In the liquid crystal display panel 9, the scanning driver 7 and the signal driver 8 sequentially drive the scanning lines and the signal lines, and the video signals (RGB signals) are sequentially applied to the pixel electrodes of the pixels sequentially selected. A corresponding drain voltage (display signal VD) is applied, and an image (image) is displayed by retaining charges.

Next, the operation of the conventional liquid crystal display device 100 will be described. As shown in FIG. 10A, the polarity inversion signal PO
L is inverted from the controller 5 every one horizontal scanning period (1H) and output from the controller 5, the inversion amplifier 4 and the common signal generation circuit 6
Has been entered. The common signal generation circuit 6 inverts and amplifies the input polarity inversion signal POL with an operational amplifier OP and outputs a common signal Vcom having a waveform shown by a bold line in FIG. 10B to each common electrode of the liquid crystal display panel 9. I do.

In FIG. 10B, VA is a common signal V
com is the potential of the display signal VD that displays black when it is at a high level and white when it is at a low level, and VB is the potential of the display signal VD that displays black when the common signal Vcom is at a high level and black when it is at a low level. is there.

On the other hand, when a video signal is input from the video signal input terminal 2, the video interface circuit 3
The RGB signals, the horizontal synchronization signal H, and the vertical synchronization signal V, which are the primary color signals of R, G, and B, are decoded, and the inverted amplifier 1
The RGB signal is input to 4, and the horizontal synchronization signal H and the vertical synchronization signal V are input to the controller 5.

The inverting amplifier 4 alternately inverts the polarity of the RGB signals input from the video interface circuit 3, for example, every one horizontal scanning period (1H), generates inverted RGB signals, and outputs the inverted RGB signals to the signal driver 8. Signal driver 8
Inputs a display signal VD corresponding to an inverted RGB signal to a signal line based on a vertical control signal output from the controller 5.

When a high-level voltage VGH of the gate signal VG is applied to the scanning line of the TFT, the TFT is turned on to be in a selected state. At this time, the display signal V
After the drain voltage as D is written to the pixel electrode in the form of electric charge, while the next scan line is selected, the previous scan line is deselected and the TFT is turned off, so that the already written electric charge is Drives the pixel.

[0023]

As described above, in the conventional liquid crystal display device 100, when generating the common signal Vcom, in addition to the voltage (about 5 V) for driving the liquid crystal, T
ΔV (about 1 V) for compensating the distortion of the voltage applied to the liquid crystal due to the influence of the parasitic capacitance between the gate and the source of the FT is required. Therefore, it was necessary to use a power supply having a potential difference of 6.0 V or more. Since the driving power supply for the liquid crystal module does not have a potential difference of about 6.0 V, the common signal Vcom is generated using the gate voltage power supply VGH (about 13.5 V) applied to the scanning line. That is, a power supply having a potential difference of twice or more the voltage (about 6.0 V) required for generating the common signal Vcom is used. Therefore, there is a problem that power is wasted in the process of generating the common signal.

An object of the present invention is to provide a liquid crystal display device and a liquid crystal driving method capable of reducing power consumption when driving a TFT type liquid crystal display panel.

[0025]

In order to achieve the above object, according to the first aspect of the present invention, a switching element connected to a pixel electrode constituting each pixel includes a plurality of scanning lines and a plurality of signal lines. A liquid crystal display panel arranged in a matrix at each intersection of: a common electrode driving means for supplying a common signal whose polarity is inverted every predetermined period to a common electrode arranged opposite to each of the pixel electrodes; and Scanning-side driving means for supplying a scanning signal to each scanning line connected to the gate electrode at a predetermined scanning timing; and signal lines connected to the source electrode of the switching element for inverting the polarity of the common signal. A signal-side driving unit for supplying a display signal while alternately inverting the polarity at a timing, the signal-side driving unit comprising: The central potential of the signal at the timing of polarity inversion of the common signal, by varying the opposite polarity side with respect to the polarity inversion direction of the common signal is characterized by supplying to the signal line.

According to the liquid crystal display device of the first aspect of the present invention, the center potential of the display signal is supplied while being changed in the direction of the polarity inversion of the common signal at the timing of the polarity inversion of the common signal. Therefore, the amplitude of the common signal can be set small, and the power consumption when the common signal is generated can be reduced, so that the liquid crystal can be driven with low power consumption.

According to a second aspect of the present invention, in the liquid crystal display device according to the first aspect, the signal side driving means converts a digital video signal into an analog display signal.
In the case of digital input driving means having a / A converter,
It is effective to switch the reference voltage of the D / A converter to the polarity opposite to the polarity inversion direction of the common signal at the timing of the polarity inversion of the common signal.

According to the second aspect of the present invention, the reference voltage of the D / A converter of the signal side driving means is switched to the opposite polarity side with respect to the polarity inversion direction of the common signal.
The center potential of the output level of the display signal can be changed in the direction opposite to the polarity inversion direction of the common signal.

According to a third aspect of the present invention, in the liquid crystal display device according to the first or second aspect, the common electrode driving means inverts the input polarity inversion signal by comparing the input polarity inversion signal with a predetermined voltage value. It is effective to provide a common signal generating means including a comparison amplifier circuit for amplifying and a bias adjustment circuit, and to use a power supply for driving a logic circuit as the comparison amplifier circuit.

According to the third aspect of the present invention, the common signal generating means is constituted by a comparison amplifier circuit and a bias adjustment circuit, and a power supply for driving a logic circuit is used for the comparison amplifier circuit. In this case, power can be taken from the power supply for driving the logic circuit, and the liquid crystal can be driven with low power consumption.

According to a fourth aspect of the present invention, in the liquid crystal display device according to the first or second aspect, the common electrode driving means includes an inverter for inverting an input polarity inversion signal and a bias adjustment circuit. It is effective to provide a signal generating means and to use a power supply for driving a logic circuit for the inverter.

According to the fourth aspect of the present invention, the common signal generating means is simply constituted by the inverter and the bias adjusting circuit, and a power supply for driving the logic circuit is used for the inverter, so that the common signal generating means can be used when generating the common signal. Power can be obtained from the logic circuit driving power supply, and the liquid crystal can be driven with low power consumption.

According to a fifth aspect of the present invention, in the liquid crystal display device according to the first or second aspect, the common electrode driving means includes a common signal generating means comprising an inverter for inverting an input polarity inversion signal. And supplying the signal output from the inverter directly to the common electrode.

According to the fifth aspect of the present invention, the common signal generating means is very simply constituted by an inverter, and a signal obtained by inverting the polarity inversion signal can be directly supplied to the common electrode as a common signal, thereby further improving the structure. Power consumption can be reduced. This is particularly effective when a liquid crystal display panel driven at a low voltage is used.

According to a sixth aspect of the present invention, the switching elements connected to the pixel electrodes constituting each pixel of the liquid crystal display panel are arranged in a matrix at each intersection of a plurality of scanning lines and a plurality of signal lines. A common signal whose polarity is inverted every predetermined period is supplied to a common electrode disposed opposite to the pixel electrode, and a scan signal is supplied at a predetermined scan timing to each scan line connected to the gate electrode of the switching element, To each signal line connected to the source electrode of the switching element, a display signal is supplied while alternately inverting the polarity at the timing of the inversion of the common signal,
In the liquid crystal driving method for driving the liquid crystal of each pixel,
A central potential of the display signal is changed to a polarity opposite to a polarity inversion direction of the common signal at a timing of polarity inversion of the common signal and supplied to the signal line.

According to the liquid crystal driving method of the sixth aspect, the central potential of the display signal is changed in the direction opposite to the polarity inversion direction of the common signal at the timing of the polarity inversion of the common signal to the signal line. Since the liquid crystal is supplied to drive the liquid crystal, the amplitude of the common signal can be set small, and the power consumption when the common signal is generated can be reduced.

[0037]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a liquid crystal display device and a liquid crystal driving method according to the present invention will be described below in detail with reference to the drawings.

[First Embodiment] First, the configuration of the first embodiment will be described. FIG. 1 is a block diagram illustrating a configuration of the liquid crystal display device 10 according to the first embodiment. As shown in FIG. 1, the liquid crystal display device 10 includes a power supply circuit 11, a video interface circuit 3, an inverting amplifier 14, a controller 5, a common signal generation circuit 16, a scanning driver 7, a signal driver 18, a liquid crystal display panel 9, and a resistor. It is composed of R10 and R20.

In FIG. 1, the video interface circuit 3, the controller 5, the scanning driver 7, and the liquid crystal display panel 9 are the same as those of the conventional liquid crystal display device 100 shown in FIG. The description of the configuration is omitted.

The power supply circuit 11 generates power of various voltage values and supplies the power to various parts of the liquid crystal display device 10. That is, a 5.0 V power supply VDD and a power supply VCC of about 3.0 V, which are power supplies for driving a normal logic circuit, are supplied to the common signal generation circuit 16. For the scan driver 7, a 5.0V power supply VDD for driving a logic circuit, a gate high-level power supply VGH of about 13.5V maximum of the gate signal VG, and-
A gate low level power supply VGL of about 18 V is supplied, a 5.0 V power supply VDD for driving a logic circuit and a bias power supply VSH for a display signal VD are supplied to the signal driver 8, and the scanning driver 7 is supplied. A ground voltage V0 (GND) is supplied to the signal driver 18, and a high-level potential VH, which is the center potential of the inverted RGB signal, is supplied to the inverting amplifier 14.

Further, two resistors R10 and R20 are connected in parallel to the V0 line for supplying the ground voltage V0 (GND) and the VH line for supplying the high-level potential VH. Then, the high-level potential VH is divided by these two resistors R10 and R20 to generate a low-level potential VL, which is supplied to the inverting amplifier 14.

That is, the high-level voltage VH is supplied to the inverting amplifier 14 while the number of power supplies is the same as that of the conventional power supply circuit 1.
And a low level voltage VL.

When generating the inverted RGB signal from the RGB signal supplied from the video interface circuit 3, the inverting amplifier 14 synchronizes with the inverted polarity signal POL to generate the inverted RGB signal.
Switching is performed so that the center potential of the B signal alternately fluctuates between the high level VH and the low level VL. Then, the inverted RGB signal generated by changing the center potential is output to the signal driver 18. When the potential of the polarity inversion signal POL is low, the center potential of the inverted RGB signal is set to low level VL.
When the potential of the polarity inversion signal POL is at the high level, the central potential of the inverted RGB signal is switched to the high level VH (see FIG. 3).

The common signal generation circuit 16 has the same circuit configuration as the conventional common signal generation circuit 6, but the driving voltage of the operational amplifier OP is different from the conventional one.

FIG. 2 shows an example of the common signal generation circuit 16. Hereinafter, the common signal generation circuit 16 having the configuration shown in FIG. 2 is referred to as a common signal generation circuit 16a. Common signal generation circuit 16a
Is, like the conventional common signal generation circuit 6, the operational amplifier O
P, resistors R1, R2, R3, variable resistors VR1, VR2,
VR3, capacitors C1 and C2, and the like.

In the common signal generating circuit 16a of this embodiment, the operational amplifier OP is supplied with a power supply VDD for driving a normal logic circuit. This power supply VDD is a power supply having a size of about 5.0V.

The common signal generation circuit 1 configured as described above
6 drives the operational amplifier OP with a power supply VDD (= about 5.0 V) for driving a logic circuit, inverts and amplifies the polarity inversion signal POL input from the controller 5 by the operational amplifier OP, and outputs an amplitude of about 5.0 V. The common signal Vcom is output.

The signal driver 18 sequentially samples the RGB inversion signals supplied from the inversion amplifier 14 in accordance with the vertical control signal from the controller 5, and uses the gradation signal corresponding to the sampled signal as a display signal VD for one scanning period. Every time, it is applied to m signal lines of the liquid crystal display panel 9 at once. At this time, display signals VD having different output level ranges are applied to the signal lines according to the change in the center potential of the inverted RGB signal input from the inverting amplifier 14.

Inverted RGB input from the inverting amplifier 14
When the central potential of the signal is at the high level VH, the output level (potential of the display signal VD) to the signal driver 18 changes from the minimum VLmax to the maximum VHmax, and when the central potential is at the low level VL, The output level ranges from the minimum VLmin to the maximum VHmin. In this case, the output level range (VHmax-VLmin) of the signal driver 18 at both levels is smaller than the amplitude (5.0 V) of the common signal Vcom (see FIG. 3).

Next, the operation will be described. FIG. 3 is a timing chart for explaining the operation of the liquid crystal display device 10 according to the first embodiment. FIG. 3A shows the polarity inversion signal POL.
(B) shows the display signal VD and the common signal Vcom in an overlapping manner.

As shown in FIG. 3A, the polarity inversion signal PO
L is inverted from the controller 5 every one horizontal scanning period (1H) and output from the controller 5 to the inverting amplifier 14 and the common signal generation circuit 16. The common signal generation circuit 16 inverts and amplifies the input polarity inversion signal POL by the operational amplifier OP, and outputs a common signal Vcom having a waveform as indicated by a bold line in FIG. 3B to each common electrode of the liquid crystal display panel 9. I do. That is, when the polarity inversion signal POL is at the low level, the high level common signal Vcom is output, and when the polarity inversion signal POL is at the high level, the low level common signal Vcom is output.
Output com. In the common signal generation circuit 16, the normal logic circuit drive power supply VDD is used as the drive power supply for the operational amplifier OP. Therefore, the potential difference between the high level and the low level of the common signal Vcom is about 5V.

On the other hand, the video signal input from the video signal input terminal 2 is
The B signal, the horizontal synchronizing signal H, and the vertical synchronizing signal V are decoded, the RGB signals are input to the inverting amplifier 14, and the horizontal synchronizing signal H and the vertical synchronizing signal V are input to the controller 5.

The inverting amplifier 14 applies the RGB signals input from the video interface circuit 3 for one horizontal scanning period (1
H), the polarity is alternately inverted to generate an inverted RGB signal. In addition, the center potential is changed to a high level VH and a low level VL every one horizontal scanning period to generate an inverted RGB signal, which is output to the signal driver 18. Signal driver 18
Inputs a display signal VD corresponding to an inverted RGB signal to a signal line based on a vertical control signal output from the controller 5.

Here, as shown by the fine dotted line in FIG. 3B, the central potential of the display signal VD takes the low level VL when the common signal Vcom is at the high level, and the output level is V.
The range is from Hmin to VLmin. Also, when the common signal Vcom is at a low level, the center potential takes a high level VH,
Its output level ranges from VHmax to VLmax. Further, the output level range of the display signal VD (VHmax-VLmin)
Is less than the amplitude of the common signal Vcom (<5 V) regardless of the fluctuation of the central potential. Further, the fluctuation width (VH-VL) of the central potential is determined so that the same voltage as the voltage applied to the liquid crystal (indicated by the length of the dashed arrow in the figure) is applied to the liquid crystal in the conventional driving method. .

As shown in FIG. 3B, the high level of the common signal Vcom (thick line) is output in the first horizontal scanning period. At this time, the display signal VD is VHmin and VLmi.
It is output in the range of n (the range of the fine dotted line in the figure), and the center potential is at the low level VL. At this time, the voltage applied to the liquid crystal is indicated by a dashed arrow, and is kept at the same voltage as the conventional liquid crystal applied voltage. In the next horizontal scanning period,
The polarity is inverted, and a low level is output as the common signal Vcom (thick line). The display signal VD has its center potential shifted upward from the center potential VL of the display signal VD in the previous horizontal scanning period to become the center potential VH, and the output level is in the range between VHmax and VLmax (the fine dotted line in the figure). Range). At this time, the liquid crystal applied voltage is indicated by a dashed arrow, and is maintained at the same voltage as the conventional liquid crystal applied voltage.

In the next horizontal scanning period, the polarity is inverted and the common signal Vcom (thick line) is output at a high level. Also, the display signal VD has its center potential shifted downward from the center potential VH of the display signal VD in the previous horizontal scanning period to become the center potential VL, and is within the range of VHmin and VLmin (the range of the fine dotted line in the figure). Is output. At this time,
The liquid crystal applied voltage is indicated by a dashed arrow, and is maintained at the same voltage as the conventional liquid crystal applied voltage.

As described above, the polarity of the display signal VD is inverted every horizontal scanning period, and the center potential also changes, and is applied to the signal line.

As described above, in the first embodiment, the center potential of the display signal VD supplied to the signal line is set at the timing of inversion of the polarity of the common signal in the direction opposite to the polarity inversion direction of the common signal. Shift to That is, the potential difference between the maximum value and the minimum value of the display signal VD (VHmax−
VLmin) is set to 5.0 V or less, and the liquid crystal applied voltage when the center potential is changed is made equal to the liquid crystal applied voltage according to the conventional waveform. As a result, the amplitude of the common signal Vcom can be suppressed to about 5.0 V, and a power supply of about 5.0 V which is a drive voltage of a normal logic circuit may be used for the operational amplifier OP of the common signal generation circuit 16. Become. Therefore, it is possible to reduce power consumption when generating a common signal while applying an appropriate voltage to the liquid crystal.

Further, since the number of power supplies in the power supply circuit 11 is not different from that of the conventional power supply circuit 1, the power supply circuit 11 is not particularly changed from the conventional power supply circuit 1.
Since the power consumption of the common signal generation circuit 16 can be reduced, the power consumption of the liquid crystal display device 10 can be reduced.

In the first embodiment, the output level of the display signal VD is changed by adjusting the potential of the signal (inverted RGB signal) on the input side to the signal driver 18. In the case where the level of the output voltage can be adjusted by the above, the center potential of the display signal VD may be changed by adjusting the output side.

[Second Embodiment] Next, a liquid crystal display device 20 using a digital driver as a signal driver will be described as a second embodiment. FIG. 4 is a block diagram illustrating the configuration of the liquid crystal display device 20 according to the second embodiment. FIG. 5 is a timing chart illustrating the operation of the liquid crystal display device 20 according to the second embodiment. () Shows the polarity inversion signal POL, and (b) shows the fluctuation of the output level of the signal driver 28.

First, the configuration of the liquid crystal display device 20 will be described. As shown in FIG. 4, the liquid crystal display device 20 according to the second embodiment includes a power supply circuit 21, a video interface circuit 3, an A / D converter 24, a controller 5, a common signal generation circuit 16, a scan driver 7, It comprises a signal driver 28, a liquid crystal display panel 9, and resistors R30 and R40.

In FIG. 4, the video interface circuit 3, controller 5, scanning driver 7, and liquid crystal display panel 9 are the same as those of the conventional liquid crystal display device 100 shown in FIG. FIG.
Since they are the same as those of the common signal generation circuit 16 of the first embodiment shown in FIG.

In the second embodiment, the A / D converter 24 converts an analog RGB signal supplied from the video interface circuit 3 into a digital signal, and outputs the digital signal to the signal driver 28 as an RGB digital signal. The signal driver 28 is a digital input driver including a shift register, a D / A converter, and the like, and D / A converts an RGB digital signal supplied from the A / D converter 24 according to a vertical control signal from the controller 5. Display signal VD, which is an analog gradation signal after being converted into an analog signal
Is generated and applied simultaneously to m signal lines of the liquid crystal display panel 9 every scanning period.

In the conventional digital input driver, the RGB digital signal is D / A converted into the corresponding analog display signal VD based on one reference voltage. However, the signal driver 28 according to the second embodiment has the polarity inversion signal POL. , The reference potential in the D / A conversion is changed. That is,
The reference potential VA is supplied from the power supply circuit 21 to the signal driver 28.
(Low level) and VB (high level) are supplied, and the reference potentials VA and VB are selected according to the polarity inversion signal POL. For example, as shown in FIG. 5, when the range of the analog gradation signal generated by the reference voltage VA is VAmax to VAmin and the range of the analog gradation signal generated by the reference voltage VB is VBmin to VBmax, the polarity inversion signal When POL is at a low level, the reference voltage VA is selected, and the output level of the display signal VD is changed from VAmax to VA.
If the polarity inversion signal POL is at a high level, the reference voltage VB is selected, and the output level of the display signal VD is set to a range from VBmin to VBmax. At this time, the output level range (VBmax-VAmin) of the display signal VD is set to be within the amplitude (5.0 V) of the common signal Vcom.

When the output level of the display signal VD is switched, the voltage applied to the liquid crystal becomes the same as the voltage applied to the liquid crystal in the conventional driving method (indicated by the length of the solid arrow in the figure). Thus, the output level of the display signal VD is adjusted. That is, when the polarity inversion signal POL is at a low level, D
/ A conversion, the reference potential is reduced to VA, and the polarity inversion signal PO
When L is at a high level, the reference potential at the time of D / A conversion is raised to VB so that the output level of the display signal VD becomes high.
In addition, D / A at the timing of the polarity inversion of the common signal Vcom.
The polarity (H / L) of the conversion is also inverted.

The power supply circuit 21 generates power of various voltage values and supplies the power to various parts of the liquid crystal display device 20. That is, the common signal generating circuit 16 is supplied with a 5.0 volt power supply VDD for driving a normal logic circuit and a power supply VCC of about 3.0 volts. For the scan driver 7, a 5.0V power supply VDD for driving a logic circuit, a gate high-level power supply VGH of about 13.5V maximum of the gate signal VG, and-
A power supply VGL for gate low level of about 18 V is supplied, and A
A power supply VDD for driving the A / D converter 24 is supplied to the / D converter 24, a 5.0V power supply VDD for driving the logic circuit is supplied to the signal driver 28, and a D / D converter is provided.
A reference voltage VA for A conversion is supplied. Further, the reference voltage V0 is supplied to the scanning driver 7 and the signal driver 28.
(GND).

Also, a V0 (GND) line for supplying the ground voltage V0 (GND) and a V for supplying the reference potential VA are provided.
Two resistors R30 and R40 are connected in parallel with the A line. Then, the reference potential VA is divided by these two resistors R30 and R40, and a reference potential VB is generated and supplied to the signal driver 28.

That is, while the number of power supplies is the same as that of the conventional power supply circuit 1, the reference voltages VA and V are supplied to the signal driver 28.
Supply B.

Next, the operation of the second embodiment will be described with reference to FIG. First, as shown in FIG. 5A, the polarity inversion signal POL is inverted every one horizontal scanning period (1H), output from the controller 5, and input to the signal driver 28 and the common signal generation circuit 16. The common signal generation circuit 16 inverts and amplifies the input polarity inversion signal POL by the operational amplifier OP, and outputs a common signal Vcom having a waveform shown by a thick line in FIG. 5B to each common electrode of the liquid crystal display panel 9. . That is, the polarity inversion signal POL
Outputs a high-level common signal Vcom when is low, and outputs a low-level common signal Vcom when the polarity inversion signal POL is high. Common signal generation circuit 1
In FIG. 6, since the normal logic circuit drive power supply VDD is used as the drive power supply for the operational amplifier OP, the common signal V
The potential difference between the high level and the low level of com is about 5V.

On the other hand, the RG input from the video signal input terminal 2 and decoded by the video interface circuit 3
The B signal is input to the A / D converter 24, and the horizontal synchronizing signal H
And the vertical synchronization signal V are input to the controller 5. Then, the RGB signals (analog signals) input by the A / D converter 24 are converted into RGB digital signals.
The signal driver 28 selects the reference potentials VA (low level) and VB (high level) of the D / A converter inside the signal driver 28 in synchronization with the polarity inversion timing of the polarity inversion signal POL input from the controller 5. Then, the RGB digital signal is D / A converted at the selected reference potential, and is simultaneously output as an analog display signal VD to a plurality of signal lines based on a vertical control signal input from the controller 5.

FIG. 5 shows the change in the output level of the display signal VD.
This is shown by the fine dotted line in FIG. In the first horizontal scanning period, the high level of the common signal Vcom (thick line) is output. At this time, the signal driver 28 switches the reference potential of the D / A converter to VA (low level), and from VAmax to V
The RGB digital signal is converted into an analog display signal VD within the range of Amin (the thin dotted line in the figure). At this time, similarly to the liquid crystal display device 10 of the first embodiment, the voltage (not shown) applied to the liquid crystal is kept at the same voltage as the conventional one.

In the next horizontal scanning period, the polarity is inverted.
The common signal Vcom (thick line) is output at a low level. At this time, the signal driver 28 switches the reference potential of the D / A converter to VB (high level), and converts the RGB digital signal into an analog display signal VD in the range from VBmin to VBmax (thin dotted line in the figure). In addition, the polarity of D / A conversion (H
/ L) is also inverted. At this time, similarly to the liquid crystal display device 10 of the first embodiment, the voltage applied to the liquid crystal (not shown) is maintained at the same voltage as the conventional liquid crystal applied voltage.

Further, in the next horizontal scanning period, the polarity is inverted and the common signal Vcom (thick line) is output at a high level. At this time, the signal driver 28 switches the reference potential of the D / A converter to VA (low level), and from VAmax to V
The RGB digital signal is converted into an analog display signal VD within the range of Amin (the thin dotted line in the figure). In addition, the polarity (H / L) of the D / A conversion is also inverted. At this time, similarly to the liquid crystal display device 10 of the first embodiment, the voltage (not shown) applied to the liquid crystal is kept at the same voltage as the conventional one.

As described above, the signal driver 28 inverts the polarity of the display signal VD and changes the output level range each time the polarity of the common signal Vcom is inverted (every horizontal scanning period) and supplies the same to the signal line. I do.

As described above, when a digital input driver is used as the signal driver 28, in the process of D / A converting an RGB digital signal into an analog display signal VD,
The output level is changed to the common signal V at the polarity inversion timing.
It fluctuates to the opposite polarity side to the polarity inversion direction of com and outputs it to the signal line. That is, the reference potential of the D / A converter is switched to the high level VB or the low level VA. At this time, the output range during D / A conversion is suppressed to within 5.0 V,
In addition, by adjusting the liquid crystal applied voltage to be the same as the liquid crystal applied voltage by the conventional driving method, the common signal can be suppressed to about 5.0V. As a result, it becomes possible to use a power supply of about 5 V, which is a drive voltage of a normal logic circuit, for the operational amplifier OP of the common voltage generation circuit 16. Therefore, it is possible to reduce the power consumption of the common signal generation circuit 16 while applying an appropriate voltage to the liquid crystal. Further, similarly to the first embodiment, since the number of power supplies in the power supply circuit 21 is not different from that of the conventional power supply circuit 1, the power supply circuit 21 is not changed from the conventional power supply circuit 1, and The power consumption of the signal generation circuit 16 can be reduced, and the power consumption of the liquid crystal display device 20 can be reduced.

In the above configuration, the reference potentials VA and VB for D / A conversion are supplied from the power supply circuit 21 to the signal driver 28.
Is supplied, and either one is selected in synchronization with the polarity inversion timing of the polarity inversion signal POL. However, the level of the reference voltage supplied from the power supply circuit 21 is synchronized with the polarity inversion timing of the polarity inversion signal POL. Alternatively, it may be configured to fluctuate. In this case, the signal driver 2
The configuration of 8 can be the same as that of a conventional digital driver.

[Third Embodiment] Next, a liquid crystal display device according to a third embodiment will be described. The configuration of the liquid crystal display device according to the third embodiment is the same as that of the liquid crystal display devices 10 and 20 according to the first or second embodiment except for the common signal generation circuit. Are given the same reference numerals as those of the liquid crystal display device 10 according to the first embodiment. Hereinafter, a common signal generation circuit 16b according to the third embodiment will be described with reference to FIG.

The common signal generation circuit 16 according to the third embodiment
b includes an inverter INV, a capacitor C2, and a variable resistor VR3 which is a DC adjustment unit. A power supply VDD for driving a normal logic circuit is supplied to the inverter INV. This power supply VDD is a power supply having a size of about 5.0V.

The polarity inversion signal POL supplied from the controller 5 is input to the input terminal of the inverter INV.
The potential of the polarity inversion signal POL is fixed, inverted, and output. The DC adjustment unit is connected to the output terminal of the inverter INV via the coupling capacitor C2.
The variable resistor VR3 of the DC adjuster adjusts the bias current of the common signal Vcom. Therefore, the common signal generation circuit 16b according to the third embodiment includes the controller 5
The polarity inversion signal POL supplied from the inverter INV
, The voltage is fixed, inverted and output, and this output signal is biased by the DC adjustment unit and output as the common signal Vcom. The amplitude of the generated common signal Vcom is about 5.0V.

Here, the common signal generation circuit 16b uses the inverter INV as an element for generating the common signal Vcom. However, the threshold of the inverter INV is limited, so that the controller 5 adjusts the amplitude of the polarity inversion signal POL. That is, the amplitude of the polarity inversion signal POL is set to an amplitude necessary for the operation of the inverter INV.

In the third embodiment, the common signal generation circuit 16b is applied to the liquid crystal display device 10 (or 20), and the central potential of the display signal VD output from the signal driver 18 (or 28) is shown in FIG. Alternatively, as shown in FIG. 5), the polarity is alternately changed at the timing of the polarity inversion of the common signal Vcom, so that the liquid crystal applied voltage becomes equal to that of the conventional waveform.

As described above, in the liquid crystal display device according to the third embodiment, the common signal generation circuit 16b for generating the common signal Vcom is constituted by the inverter INV, the DC adjustment unit, and the coupling capacitor C2. Controller 5
The polarity of the polarity inversion signal POL supplied from is fixed and inverted, a predetermined value of bias is applied to generate a common signal Vcom, and the common signal Vcom is output to the common electrode of the liquid crystal display panel 9.

Therefore, since the common signal Vcom is generated without using the operational amplifier OP, the common signal generation circuit 16 can be simply configured, and the power consumption when the common signal is generated can be reduced.

In the third embodiment, since the power supply voltage of the inverter INV is set to the fixed value VDD, the amplitude of the common signal is fixed. However, the amplitude of the common signal is changed by changing the power supply voltage of the inverter INV. It is possible to vary.

[Fourth Embodiment] Next, a liquid crystal display device according to a fourth embodiment will be described. In the fourth embodiment, a preferred example is shown in a case where a low-voltage liquid crystal is used for the liquid crystal display panel 9. That is, when a low-voltage liquid crystal is used for the liquid crystal display panel 9, the output voltage range of the display signal VD can be narrowed because the liquid crystal applied voltage may be small. Therefore, in the fourth embodiment, the DC adjustment unit of the common signal generation circuit 16 is omitted to simplify the configuration, and the adjustment of the DC bias applied to the liquid crystal is performed by adjusting the output level of the display signal VD. .

The liquid crystal display device of the fourth embodiment has the same structure as that of the first or second embodiment except that the configuration of the common signal generation circuit 16 and the use of a low-voltage liquid crystal for the liquid crystal display panel. Since they are the same as the liquid crystal display devices 10 and 20, the illustration and the description of each part are omitted, and the following description will be given the same reference numerals as those of the liquid crystal display device 10 of the first embodiment. Hereinafter, a common signal generation circuit 16c according to the fourth embodiment will be described with reference to FIG.

The common signal generation circuit 16 according to the fourth embodiment
a is constituted by the inverter INV. Inverter I
The power supply VDD for driving a normal logic circuit is supplied to the NV. This power supply VDD is a power supply having a size of about 5.0V.

The polarity inversion signal POL supplied from the controller 5 is input to the input terminal of the inverter INV. The inverter INV fixes and inverts the potential of the polarity inversion signal POL, and outputs the inverted signal to the common electrode of the liquid crystal as the common signal Vcom. That is, the first to first
The output of the inverter INV is supplied directly to the common electrode as the common signal Vcom without providing the DC adjustment unit as shown in the common signal generation circuits 16a and 16b of the third embodiment.

When a low-voltage liquid crystal is used, the output level range of the RGB signal may be narrow, so that the center voltage of the RGB signal can be varied within the range of the 5.0 V power supply VDD. Therefore, when the DC level of the voltage applied to the liquid crystal needs to be adjusted, the RGB input to the signal driver 18 is adjusted.
What is necessary is just to adjust the signal level.

Further, similarly to the first to third embodiments,
The center potential of the display signal VD output from the signal driver 18 (or 28) is alternately changed at the timing of inversion of the polarity of the common signal Vcom as shown in FIG. 2 (or FIG. 5).
The liquid crystal applied voltage is set to be equal to that of the conventional waveform.

As described above, in the liquid crystal display device of the fourth embodiment, the common signal generation circuit 16c for generating the common signal Vcom is simply constituted by the inverter INV.
The amplitude of the polarity inversion signal POL supplied from the controller 5 is fixed and inverted, and is output directly to the common electrode of the liquid crystal as the common signal Vcom.

Therefore, the power consumption of the common signal generation circuit 16c can be further reduced, and the power consumption of the entire liquid crystal display panel 9 can be reduced.

[0094]

According to the first and sixth aspects of the present invention, the center potential of the display signal is supplied at the timing of inversion of the polarity of the common signal while being changed to the opposite polarity to the direction of inversion of the polarity of the common signal. In addition, the amplitude of the common signal can be set small, and the power consumption when the common signal is generated can be reduced, so that the liquid crystal can be driven with low power consumption.

According to the second aspect of the present invention, the reference voltage of the D / A converter of the signal side driving means is switched to the reverse polarity side with respect to the polarity reversal direction of the common signal, so that the center of the output level of the display signal is obtained. The potential can be changed in the direction opposite to the polarity inversion direction of the common signal.

According to the third aspect of the present invention, the common signal generating means is constituted by a comparison amplifier circuit and a bias adjustment circuit, and a power supply for driving a logic circuit is used for the comparison amplifier circuit. Can be taken from the logic circuit drive power supply, and the liquid crystal can be driven with low power consumption.

According to the fourth aspect of the present invention, the common signal generation means is simply constituted by an inverter and a bias adjustment circuit, and a power supply for driving a logic circuit is used for the inverter. Can be taken from the logic circuit driving power supply, and the liquid crystal can be driven with low power consumption.

According to the fifth aspect of the present invention, the common signal generation means can be configured very simply by an inverter, and a signal obtained by inverting the polarity inversion signal can be directly supplied to the common electrode as a common signal. Power consumption can be reduced. This is particularly effective when a liquid crystal display panel driven at a low voltage is used.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display device 10 according to a first embodiment.

FIG. 2 is a diagram illustrating a common signal generation circuit 16a.

3A and 3B are timing charts for explaining the operation of the liquid crystal display device 10, wherein FIG. 3A shows a polarity inversion signal POL and FIG.
Indicates the display signal VD and the common signal Vcom in an overlapping manner.

FIG. 4 is a block diagram illustrating a configuration of a liquid crystal display device 20 according to a second embodiment.

5A and 5B are timing charts for explaining the operation of the liquid crystal display device 20, wherein FIG. 5A shows a polarity inversion signal POL and FIG.
Indicates a change in the range of the output voltage of the signal driver 28.

FIG. 6 shows a common signal generation circuit 1 according to a third embodiment.
It is a figure showing 6b.

FIG. 7 shows a common signal generation circuit 1 according to a fourth embodiment.
It is a figure which shows 6c.

FIG. 8 is a block diagram showing a configuration of a conventional liquid crystal display device 100.

FIG. 9 is a diagram showing a conventional common signal generation circuit 6.

FIG. 10 is a timing chart for explaining the operation of the conventional liquid crystal display device 100, wherein FIG.
L and (b) show the common signal Vcom and the display signal VD superimposed.

[Explanation of symbols]

 Reference Signs List 10 liquid crystal display device (first embodiment) 11 power supply circuit 2 video signal input terminal 3 video interface circuit 14 inverting amplifier 5 controller 16 common signal generation circuit 7 scan driver 18 signal driver (analog driver) 9 liquid crystal display panel R10 , R20 resistor 20 liquid crystal display device (second embodiment) 21 power supply circuit 24 A / D converter 28 signal driver (digital driver) R30, R40 resistors 16a, 16b, 16c common signal generation circuit

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/20 623 G09G 3/20 623C 623F 624 624C H04N 5/66 102 H04N 5/66 102B F term (reference) ) 2H093 NA16 NA32 NA43 NA53 NC13 NC18 NC21 NC34 NC49 ND38 ND39 5C006 AA22 AC11 AC25 AC27 AF42 AF81 BB15 BC12 BF25 FA47 5C058 AA09 BA02 BA26 BB05 BB09 BB22 5C080 AA10 BB05 CC03 DD26 EE29 JJ03 JJ02 JJ29 JJ03 JJ02 JJ03 JJ29 JJ11 JJ03

Claims (6)

[Claims] A liquid crystal display panel in which switching elements connected to pixel electrodes constituting each pixel are arranged in a matrix at each intersection of a plurality of scanning lines and a plurality of signal lines; A common electrode driving means for supplying a common signal whose polarity is inverted every predetermined period to the disposed common electrode; and a scan for supplying a scan signal at a predetermined scan timing to each scan line connected to the gate electrode of the switching element. Side driving means, and signal side driving means for supplying a display signal to each signal line connected to the source electrode of the switching element while alternately inverting the polarity at the timing of inversion of the polarity of the common signal. In the liquid crystal display device, the signal-side driving unit sets the central potential of the display signal to the common potential at a timing of inverting the polarity of the common signal. The liquid crystal display device, characterized in that by varying the opposite polarity side with respect to the polarity reversal direction No. supplying to the signal line. 2. When the signal side driving means is a digital input driving means having a D / A converter for converting a digital video signal into an analog display signal, the D / D converter is driven at the timing of inverting the polarity of the common signal. 2. The liquid crystal display device according to claim 1, further comprising means for switching a reference voltage of the A converter to a polarity opposite to a polarity inversion direction of the common signal. 3. The comparison electrode circuit according to claim 1, wherein the common electrode driving unit includes a comparison signal amplification unit that compares and inverts and amplifies the input polarity inversion signal with a predetermined voltage value, and a bias adjustment circuit. 3. The liquid crystal display device according to claim 1, wherein a power supply for driving a logic circuit is used for the power supply. 4. The common electrode driving means includes a common signal generating means including an inverter for inverting an input polarity inversion signal and a bias adjustment circuit, and a power supply for driving a logic circuit is used for the inverter. The liquid crystal display device according to claim 1, wherein: 5. The common electrode driving means includes a common signal generating means comprising an inverter for inverting an input polarity inversion signal, and directly supplying a signal output from the inverter to the common electrode. The liquid crystal display device according to claim 1. 6. A switching element connected to a pixel electrode constituting each pixel of the liquid crystal display panel is arranged in a matrix at each intersection of a plurality of scanning lines and a plurality of signal lines, and is arranged to face each of said pixel electrodes. A common signal whose polarity is inverted at predetermined intervals is supplied to the common electrode, and a scan signal is supplied at a predetermined scan timing to each scan line connected to the gate electrode of the switching element, and a source electrode of the switching element is supplied to the common electrode. A liquid crystal driving method for driving a liquid crystal of each pixel by supplying a display signal to each of the connected signal lines while alternately inverting the polarity at the timing of inverting the polarity of the common signal. The potential is changed to the polarity opposite to the polarity inversion direction of the common signal at the timing of the polarity inversion of the common signal, and supplied to the signal line. And a liquid crystal driving method.