JP2002015019A - Repeater inserting method and recording medium recorded with repeater inserting program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method that minimizes a net list increase at the last layout time and reduces alternate route wirings for the long distance wiring that is quite within the bounds of possibility to become a critical path. SOLUTION: The method implements global routing for signals among blocks by using a global floor plan 50 that specifies the coordinates of region and macro-block and the net list 10 (S52), inserts a temporary repeater into the net list 10 on the basis of wiring capacitance and resistance 56 (S58), and layouts a cell based upon an insertion result of the temporary repeater (S62).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a repeater insertion method for determining a coordinate position of a repeater to be inserted in the middle of long-distance wiring in an LSI design, and a recording medium on which a repeater insertion program is recorded. The present invention relates to a technique capable of reducing an increase in the number of lists and reducing the number of bypass wirings for a long-distance wiring that is likely to be a critical path.

[0002]

2. Description of the Related Art FIG. 9 shows a processing flow of a conventional repeater insertion method. As shown in FIG. 9, conventionally, a step of reading the netlist 10 and arranging cells (S12).
, Detailed wiring, and outputting the wiring capacitance / resistance 16 (S14), and inserting a repeater based on the netlist 10 and the wiring capacitance / resistance 16 and outputting the repeater-added netlist 20 (S18). ), A step of comparing the original netlist 10 with the repeater-attached netlist 20 to obtain a difference (S22), and a step of rearranging cells in the changed part and making small movements of cells in the peripheral part (S24). And the step of rewiring (S2
6), a step of changing the size of the gate according to the wiring load after the rerouting (S28), and the rearrangement and rewiring of cells (ECO: Engin) according to the netlist after the gate size is changed.
eering Change Order) and outputting the layout 32 (S30).

The operation of the prior art is as follows. First, cells are arranged and detailed wiring is performed by an automatic placement and routing tool, and wiring capacitance and resistance are output. A repeater is inserted into a signal having a large capacitance based on the wiring capacitance. Next, the netlist after the insertion of the repeater is compared with the netlist before the insertion of the repeater, and only the changed part is relocated and rewired. The rearrangement and the wiring are performed so that the position before the insertion of the repeater is maintained as much as possible. After that, the gate size used in the normal design is changed, rearranged, and re-routed, and the layout is output.

[0004]

In the prior art, cell placement and detailed wiring are first performed using a netlist without repeaters (S12, S14). For this reason, the size of the netlist 20 after inserting the repeater becomes very large as compared with the netlist 10 before inserting the repeater, and it becomes difficult to rearrange the cells (S24), and the original floor plan is maintained. It can be difficult. In some cases, the floor plan needs to be redone.

Further, detailed wiring is performed without a repeater (S
14) Since the repeater is inserted after that (S18), if there is a detour at the time of detailed wiring, the repeater enters the detoured position, a useless repeater is inserted, and the signal delay increases.

The present invention solves such a problem and reduces the increase of the netlist at the time of the final layout.
It is another object of the present invention to provide a repeater insertion method capable of reducing the number of bypass wirings for a long-distance wiring that is likely to be a critical path, and a recording medium on which a repeater insertion program is recorded.

[0007]

A feature of the present invention is that a step of roughly routing inter-block signals using a general floor plan and a netlist that defines the coordinate values of a region or a macroblock; The method includes at least a step of inserting a temporary repeater into the netlist based on a wiring capacitance and a wiring resistance obtained as a result, and a step of arranging cells based on a result of the temporary repeater insertion.

A cell is a unit used when designing an LSI.
It is a relatively simple circuit element. Macroblocks are relatively complex cells, such as memories, ALUs, multiplexers, and the like. A region is a group of a plurality of cells or macroblocks.

According to a feature of the present invention, the netlist used for cell placement includes a repeater temporarily inserted based on the wiring capacitance and resistance estimated by the schematic floor plan and the schematic wiring. The increase is small. Therefore, it is possible to make a final layout without greatly changing the floor plan.

Another feature of the present invention is a step of performing ideal wiring without considering a detour of a wiring based on a cell coordinate value determined as a result of arranging cells, and a wiring capacitance obtained as a result of the ideal wiring. At least a step of inserting the final repeater into the netlist based on the wiring resistance or the wiring resistance to determine the insertion position of the final repeater, and a step of rearranging the cells based on the insertion position of the final repeater.

In the feature of the present invention, since the repeater insertion position is determined based on the ideal wiring, the wiring path is defined by the position of the repeater, so that long-distance wiring can be performed in an ideally close form. For this reason, it is possible to preferentially route long-distance wiring that is likely to be a critical path in an ideally close form with few bypass wirings.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. In the following drawings,
The same or similar parts are denoted by the same or similar reference numerals.

FIG. 1 is a diagram showing a processing flow of a repeater insertion method according to an embodiment of the present invention, FIG. 2 is a diagram showing a state in which schematic wiring (inter-region wiring) is performed, and FIG. FIG. 4 shows a state where cells are arranged based on a netlist with a temporary repeater, FIG. 5 shows a state where ideal wiring is performed, and FIG. 6 shows a state where a final repeater is inserted. FIG. 7 is a diagram showing a state in which detailed wiring is performed.

As shown in FIG. 1, in the repeater insertion method according to the embodiment of the present invention, a general wiring step for performing general wiring of an inter-region signal (global signal) based on a netlist 10 and general floor plan data 50. (S52) and a schematic wiring capacitance / resistance calculation step of calculating the wiring capacitance / resistance 56 based on the schematic wiring result (S52)
54), the netlist 10 and the wiring capacitance / resistance 56
And a virtual repeater insertion step (S58) of virtually inserting a repeater to output a temporary repeater-added netlist 60, and a cell arrangement step of outputting a cell coordinate value 64 using the temporary repeater-added netlist 60 ( S6
2).

Further, in the repeater insertion method according to the embodiment of the present invention, as shown in FIG. 1, ideal wiring is performed by using the cell coordinate value 64 and the netlist 10 output as a result of cell arrangement. Ideal wiring step of outputting the wiring capacitance and the resistance 68 after the ideal wiring (S66)
And a final repeater insertion step of inserting a repeater based on the wiring capacitance and the resistance 68 after the ideal wiring (S70)
Taking the difference between the temporary repeater netlist 60 and the final repeater netlist 72 (S76).
And a step (S78) of rearranging cells according to the repeater coordinate value 74.

Further, in the repeater insertion method according to the embodiment of the present invention, as shown in FIG. 1, a step of performing detailed wiring according to the rearrangement result (S80), and a step of performing detailed wiring based on the wiring capacity based on the result of the detailed wiring. The gate resize step of changing the gate size so that the load becomes appropriate (S8
2) and a step (S84) of performing rearrangement and rewiring based on the result of gate resizing.

The processing contents from the general wiring step (S52) to the cell arrangement step (S62) will be described below.

First, general wiring is performed based on the general floor plan data 50 (S52). The outline floor plan data 50 includes the coordinate values of a region and a macroblock. As shown in FIG. 2, all cells on the chip are divided into regions r1 to r7, and the center coordinate value of each region is defined. Based on the center coordinates and the netlist, schematic wiring for connecting the centers of the regions r1 to r3 and the region r6 is performed as shown in FIG.

Next, the wiring capacitance and the wiring resistance of the schematic wiring are calculated (S54), and the result is output.

Next, a temporary repeater is inserted based on the wiring capacitance and the wiring resistance 56 (S58). FIG. 3 shows the result of inserting a temporary repeater based on the schematic wiring result of FIG. As shown in FIG. 3, when the wiring load and the RC delay are larger than specified values, repeaters Rep1 and Rep2 are inserted to divide the signal.

Next, cells are arranged based on the temporary repeater-added netlist 60 after the temporary repeater insertion (S6).
2). Here, the detailed arrangement of all cells is determined, and a cell coordinate value 64 is obtained.

FIG. 4 is a diagram showing a state after the cells are arranged.
As shown in FIG. 4, the positions of the driver D1 and the cells C1 to C3 after the detailed arrangement are not necessarily at the center of each region. The driver D1 is compared with the center of the region r1,
It is far from repeater Rep1. Cell C1 is also farther from repeater Rep1. On the other hand, cell C
2 is the repeater Rep compared to the center of region r3
Approaching 2. Cell C3 is similarly set in the repeater Rep2.
Is approaching.

Next, the processing contents from the ideal wiring step (S66) to the cell rearrangement step (S78) will be described.

First, ideal wiring (S66) is performed using the cell coordinate value 64 instead of the general floor plan data 50 used in the general wiring step (S52).

FIG. 5 shows a state after the ideal wiring. The ideal wiring processing is performed ignoring the existence of other wiring. That is, the wiring is performed so that the wiring length between the regions is minimized without bypassing other wirings.

As a result of the ideal wiring step (S66), the final repeater is inserted using the wiring resistance and capacitance 68, the cell coordinate value 64, and the netlist 10 before the repeater is inserted (S70). In the final repeater insertion step (S70), a repeater coordinate value 74 indicating a repeater insertion position is output in addition to the final repeater-added netlist 72.

Using the difference between the coordinate value 74 of the repeater and the coordinate value of the cell performed using the netlist 72 with the final repeater and the netlist 60 with the temporary repeater, the cell of the repeater is relocated to the designated position. Perform (S7
8).

FIG. 6 shows a state after the final repeater insertion and cell rearrangement. As described above, the schematic wiring is based on the assumption that cells and the like are arranged at the center of each region. However, actually, cells and the like are not always arranged at the center of each region. For this reason, the position of the repeater after the insertion of the temporary repeater shown in FIG. 3 and the position of the repeater after the insertion of the final repeater shown in FIG. 6 change.

Next, detailed wiring is performed (S80). FIG. 7 shows a state after the detailed wiring.

Finally, the gate is resized based on the wiring capacity based on the result of the detailed wiring so that the load becomes appropriate (S82), and further, the rearrangement and the rewiring are performed (S8).
4) Output the final layout 86.

Further, a program for causing a computer to execute each step required in the above-described repeater insertion method is recorded on a recording medium, and is read and executed by a computer, thereby realizing the above-described repeater insertion method. Can be. Here, examples of the recording medium include devices capable of recording a program, such as a memory device, a magnetic disk device, an optical disk device, and a magnetic tape device.

FIG. 8 is a schematic diagram showing an example of a computer system which reads programs stored in these recording media and implements repeater insertion in accordance with the steps described therein. A floppy (registered trademark) disk drive 81 and a CD-ROM drive 82 are provided on the front of the main body of the computer system 80.
By inserting a floppy disk 83 as a magnetic disk device or a CD-ROM 84 as an optical disk device from each drive entrance and performing a predetermined read operation, it is possible to install programs stored in these recording media into the system. it can. Further, by connecting a predetermined drive device, for example, a ROM 85 as a memory device used for a game pack or the like and a cassette tape 86 as a magnetic tape device can be used.

As described above, according to the embodiment of the present invention, the netlist 60 used for the first cell arrangement (S62) also includes the general floor plan data 50, the wiring capacitance and the resistance 56 estimated by the general wiring. Since the tentatively inserted repeater is included, the increase in the netlist during the final layout is small. Therefore, the final layout can be made without greatly changing the floor plan.

The wiring resistance after the ideal wiring (S66),
A final repeater is inserted based on the capacity 68 (S7
0) Since the position is determined, the wiring path is defined by the position of the repeater, and long-distance wiring can be performed in an ideally close form. Therefore, it is possible to preferentially route long-distance wiring that is likely to be a critical path in an ideally close form with few bypass wirings.

[0035]

According to the present invention, a repeater insertion method and a recording method for recording a repeater insertion program are possible in which the increase in the netlist during the final layout is small, that is, the final layout can be performed without greatly changing the floor plan. A medium can be realized.

Further, according to the present invention, a repeater insertion method and a repeater insertion method capable of preferentially arranging a long-distance wiring having a high possibility of becoming a critical path in an almost ideal form with few bypass wirings A recording medium on which a program is recorded can be realized.

[Brief description of the drawings]

FIG. 1 is a diagram showing a processing flow of a repeater insertion method according to an embodiment of the present invention.

FIG. 2 is a diagram showing a state after schematic wiring (inter-region wiring).

FIG. 3 is a diagram illustrating a state after a temporary repeater is inserted.

FIG. 4 is a diagram showing a state after cell placement based on a netlist with provisional repeaters.

FIG. 5 is a diagram showing a state after ideal wiring.

FIG. 6 is a diagram showing a state after insertion of a final repeater.

FIG. 7 is a diagram showing a state after detailed wiring.

FIG. 8 is a schematic diagram showing an example of a computer system for realizing the repeater insertion method of the present invention.

FIG. 9 is a diagram showing a processing flow of a conventional repeater insertion method.

[Explanation of symbols]

 10 Netlist 50 Outline floorplan data 56, 68 Wiring capacitance / resistance 60 Netlist with temporary repeater 64 Cell coordinate value 72 Netlist with final repeater 74 Repeater coordinate value

Claims (6)

[Claims] 1. A step of roughly routing inter-block signals using a schematic floor plan and a netlist that defines the coordinate values of a region or a macroblock, and based on a wiring capacitance and a wiring resistance obtained as a result of the schematic wiring. Inserting a temporary repeater into the netlist, and arranging cells based on the result of the temporary repeater insertion. 2. A step of performing ideal wiring without considering a detour of a wiring based on a coordinate value of a cell determined as a result of arranging cells, and a step of performing wiring based on a wiring capacitance and a wiring resistance obtained as a result of the ideal wiring. A repeater insertion method, comprising: at least a step of inserting a final repeater into a netlist to determine an insertion position of the final repeater; and a step of rearranging cells based on the insertion position of the final repeater. 3. The repeater insertion method according to claim 1, further comprising a step of performing an ideal wiring without considering a detour of the wiring based on a coordinate value of the cell determined as a result of the cell arranging step. A step of inserting a final repeater into a netlist based on a wiring capacitance or a wiring resistance obtained as a result of wiring to determine an insertion position of the final repeater; anda step of rearranging cells based on the insertion position of the final repeater. A repeater insertion method characterized by including at least: 4. A procedure for roughly routing inter-block signals using a schematic floor plan and a netlist that defines the coordinate values of regions and macroblocks, and a method based on a wiring capacitance and a wiring resistance obtained as a result of the schematic wiring. A step of inserting a temporary repeater into the netlist, and a step of arranging cells based on a result of the temporary repeater insertion. 5. A procedure for performing ideal wiring without considering a detour of a wiring based on a coordinate value of a cell determined as a result of arranging cells, and a step of performing wiring based on a wiring capacitance and a wiring resistance obtained as a result of the ideal wiring. Recording a repeater insertion program characterized by including at least a procedure of inserting a final repeater into a netlist and determining an insertion position of the final repeater, and a procedure of rearranging cells based on the insertion position of the final repeater. recoding media. 6. The recording medium according to claim 4, further comprising: a step of performing an ideal wiring without considering a detour of the wiring based on a coordinate value of a cell determined as a result of the cell arranging step; At least a step of inserting a final repeater into a netlist based on the wiring capacitance and wiring resistance obtained as a result of obtaining the insertion position of the final repeater, and a step of rearranging cells based on the insertion position of the final repeater. A recording medium on which a repeater insertion program is recorded.