JP2002009219A - 樹脂封止型半導体装置 - Google Patents
樹脂封止型半導体装置Info
- Publication number
- JP2002009219A JP2002009219A JP2000188191A JP2000188191A JP2002009219A JP 2002009219 A JP2002009219 A JP 2002009219A JP 2000188191 A JP2000188191 A JP 2000188191A JP 2000188191 A JP2000188191 A JP 2000188191A JP 2002009219 A JP2002009219 A JP 2002009219A
- Authority
- JP
- Japan
- Prior art keywords
- electrode terminal
- resin
- semiconductor device
- semiconductor chip
- source electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Abstract
おけるインピーダンスの増加を押さえると共に、ノイズ
の低減を図った小型の表面実装型半導体装置を提供す
る。 【解決手段】半導体チップ12を搭載するフレーム基板
13と、このフレーム基板に取り付ける半導体チップの
各電極と対応するドレイン電極端子31、ソース電極端
子33、ゲート電極端子35と、チップのソース電極を
分離して形成したGND電極と結ぶGND電極端子37
をゲート電極端子とソース電極端子の間に設け、ソー
ス、ゲート、GNDの各電極と電極端子間を低インピー
ダンスの金線32,34または金属板で接続する。また
フレーム基板の裏面がプリント基板の上面に直接に接す
るように樹脂封止を行う。
Description
装置に係り、特に、POWERMOSFET等の樹脂封止型半導体
装置に関する。
RMOSFET等の樹脂封止型半導体装置10は図5、図6に
示すようにプリント基板11に取り付けられ、ノート型
パソコン、その他の電子機器のDC-DCコンバータ等に使
用するようになっている。
OSFET等の半導体チップ12が備えられ、これを平板状
のフレーム基板13に搭載するようになっている。この
フレーム基板13の下側には図示するように半導体チッ
プ12の複数のドレイン電極端子14が並列に設けら
れ、入力電流を受けるようになっている。
にCu等の複数のボンデングワイヤ15を介してソース基
板16が接続され、これに複数のソース電極端子17を
複数のドレイン電極端子14に対向して並列に設けこれ
から出力電流を出力するようになっている。
ワイヤ用パッド18が備えられ、これにCu等のボンデン
グワイヤ19を接続するようになっている。このボンデ
ングワイヤ19にはゲート電極端子20が接続され、制
御電圧を受けるようになっている。
3の外周全面には一部のドレイン電極端子14、ソース
電極端子17、ゲート電極端子20等とともに樹脂21
が封止され、半導体チップ12等を覆い小型・薄型の実
装外囲器(Small-Outline-Packeage「一般にSOP」と言
う)の樹脂封止型半導体装置10を形成するようになっ
ている。
基板11の金属配線11Aに接続するように取り付けら
れ、DC-DCコンバータ等に使用されるようになってい
る。
装置10の半導体チップ12は一般に高入力インピーダ
ンスに形成され、ドライブ回路等の簡素化を図るように
している。
極端子20の制御電圧によりON-OFFされ、ドレイン電極
端子14からソース電極端子17に流れる出力電流を制
御する。この出力電流効率は導体チップ12のON時のロ
ス(定常ロス)とそのON-OFF時のロス(スイッチングロ
ス)とにより決まる。
の特性を改善するには半導体チップ12のON時の抵抗を
含むインピーダンスを小さくすることやスイッチングス
ピード、すなわち、動作周波数を向上するようにしてい
る。
では下式で示す半導体チップ12のON時のインピーダン
スを1/10Ω〜1/15Ω程度に小さくし動作周波数
を100KHz〜300KHz以上にしている。 1/Z=1/r+1/2πfL ただしZL=2πfL ここでZは半導体チップ12のインピーダンス、rは半導
体チップ12の抵抗、Lはドレイン電極端子14、ソー
ス電極端子17、ボンデングワイヤ15、19等のイン
ダクタンス。
では動作周波数が非常に高くななってきたのでインピー
ダンスの低減やスイッチングスピードの向上に限界が生
じるようになってきた。これは高周波動作におけるイン
ピーダンスの増加によるものとこれによる半導体チップ
の発熱が高くなるためであると考えられる。そのため、
このような樹脂封止型半導体装置10ではゲート電極端
子20からの制御電圧による影響を受け不要なノイズを
発生させると言う問題があった。また、このような樹脂
封止型半導体装置10を単にプリント基板11に取り付
けたものでは放熱が不十分となりこれを高温にさせてし
まうと言う問題があった。
ンピーダンスが高くならないようにするとともにそのイ
ンピーダンスによる発熱を抑えるようにした樹脂封止型
半導体装置を提供することを目的とするものである。
チップを搭載するフレーム基板と、このフレーム基板に
取り付ける半導体チップのドレイン電極端子、ソース電
極端子、ゲート電極端子と、前記フレーム基板に取り付
ける半導体チップのグランド端子と、これら半導体チッ
プ、フレーム基板、一部のドレイン電極端子、ソース電
極端子、ゲート電極端子およびグランド端子を封止する
樹脂と、この樹脂により封止した半導体チップ、フレー
ム基板、ドレイン電極端子、ソース電極端子、ゲート電
極端子およびグランド端子を取付けるプリント基板とを
備え、高周波動作運転時における半導体装置のノイズを
低減するようにしたものである。
はソース電極端子を分離して形成あるいはグランド端子
はゲート電極端子とソース電極端子との間に形成するよ
うにしたからノイズの低減を容易に行うようにしたもの
である。
チップとソース電極端子、ゲート電極端子およびグラン
ド端子とをAuの低インピーダンスのボンデングワイヤあ
るいは金属板により接続するようにしたから半導体装置
のインピーダンスを低減することができる。
板の裏面がプリント基板の上面に直接に接するように樹
脂を封止あるいはフレーム基板、各電極端子の裏面がプ
リント基板の上面に直接に接するように樹脂を封止した
から半導体装置の放熱を高めることができる。
の第1の実施の形態を図1、図2を用いて説明する。こ
の本発明樹脂封止型半導体装置30は基本的には従来の
樹脂封止型半導体装置10とほぼ同様であるからこの樹
脂封止型半導体装置10と同一部分は同一符号を付して
本発明樹脂封止型半導体装置30を説明する。
チップ12が備えられ、その裏面にはPb-Sb系の半田を
用いて平板状のフレーム基板13に固着するようになっ
ている。
びる複数のドレイン電極端子31が並列に取り付けら
れ、これを半導体チップ12の図示しないドレイン部に
接続するようになっている。
上側部のフレーム基板13にはAu等のインピーダンスが
小さい複数のボンデングワイヤ32が接続され、これを
右部のソース基板16に接続するようになっている。こ
のソース基板16には直線的に延びる複数のソース電極
端子33がドレイン電極端子31に対向するように並列
に接続され、出力電流を出力するようになっている。
ド18が備えられ、これにAu等のインピーダンスの小さ
いボンデングワイヤ34を接続するようになっている。
このボンデングワイヤ34には左部の直線的に延びるゲ
ート電極端子35が接続され、半導体チップ12に制御
電圧を加えるようになっている。
スの小さいボンデングワイヤ36が接続され、これをゲ
ート電極端子35とソース電極端子33bとの間にシャ
ーシ等の接地部に接続するグランド端子37を設けるよ
うになっている。このグランド端子37によりゲート電
極端子35の制御電圧がドレイン電極端子31とソース
電極端子33とを流れる出力電流に影響しないようにな
り、半導体チップ12にノイズを発生しないようにす
る。
3および一部のドレイン電極端子31、ソース電極端子
33、ゲート電極端子35、グランド端子37等にはフ
レーム基板13等の裏面、ドレイン電極端子31、ソー
ス電極端子33、ゲート電極端子35、グランド端子3
7の裏面を覆わないように、すなわち、露出するように
樹脂38が被覆され、半導体チップ12等の封止すると
ともにこれらを小型・薄型の実装外囲器(Small-Outlin
e-Packeageと言う)を構成した樹脂封止型半導体装置3
0を形成するようになっている。
基板11の金属配線11Aの上面に直接に接続して取り
付けられ、半導体チップ12等の熱をフレーム基板1
3、ドレイン電極端子31、ソース電極端子33、ゲー
ト電極端子35からプリント基板11を介し外部に放熱
する。
ース電極端子33とゲート電極端子35との間にグラン
ド端子37を取り付けたからゲート電極端子35からの
制御電圧をドレイ電極端子31とソース電極端子33の
間を流れる出力電流に悪影響を与えなくなり半導体チッ
プ12に生じるノイズが小さくする。そのため、この樹
脂封止型半導体装置30の特性を改善することができ
る。
止型半導体装置40の第2の実施の形態を説明する。こ
の第2の実施の樹脂封止型半導体装置40は第1の実施
の形態の樹脂封止型半導体装置30とほぼ同様であるか
ら本発明樹脂封止型半導体装置30と同一部分は同一符
号を付して第2の実施の形態の樹脂封止型半導体装置4
0を説明する。
32の代わりに半導体チップ12とソース基板16との
間にはCu等の金属板41が取り付けられ、半導体チップ
12とソース基板16との間のインピーダンスを小さく
するようになっている。
ス電極端子33とドレイン電極端子31との間に金属板
41を取り付けたからソース電極端子33とドレイン電
極端子31との間のインピーダンスが低くなり半導体チ
ップ12の温度を下げその特性を改善することができ
る。
体装置40の裏面を直接にプリント基板11の金属配線
11Aに取り付けたから半導体装置40の熱がプリント
基板11の金属配線11aを介して外部に放出しこれを
高温にすることがない。そのため、この種の半導体装置
40を長期に亘り安定して使用することができる。
極端子35との間にグランド端子37を設けたがソース
支持板16の左端部を切断しソース電極17の一部を分
離しこれをグランド端子としてもよい。
ム基板と、このフレーム基板に取り付ける半導体チップ
のドレイン電極端子、ソース電極端子、ゲート電極端子
と、前記フレーム基板に取り付ける半導体チップのグラ
ンド端子と、これら半導体チップ、フレーム基板、一部
のドレイン電極端子、ソース電極端子、ゲート電極端子
およびグランド端子を封止する樹脂と、この樹脂により
封止した半導体チップ、フレーム基板、ドレイン電極端
子、ソース電極端子、ゲート電極端子およびグランド端
子を取付けるプリント基板とを備えたから高周波動作運
転時における半導体装置のノイズを低減することができ
る。
端子を分離して形成あるいはグランド端子はゲート電極
端子とソース電極端子との間に形成するようにしたから
ノイズを容易に低減することができる。
極端子、ゲート電極端子およびグランド端子とをAuの低
インピーダンスのボンデングワイヤあるいは金属板によ
り接続するようにしたから半導体装置のインピーダンス
を低減することができる。
リント基板の上面に直接に接するように樹脂を封止ある
いはフレーム基板、各電極端子の裏面がプリント基板の
上面に直接に接するように樹脂を封止したから半導体装
置の放熱を高めることができる。
図。
平面図。
図。
Claims (8)
- 【請求項1】半導体チップを搭載するフレーム基板と、 このフレーム基板に取り付ける半導体チップのドレイン
電極端子、ソース電極端子、ゲート電極端子と、 前記フレーム基板に取り付ける半導体チップのグランド
端子と、 これら半導体チップ、フレーム基板、一部のドレイン電
極端子、ソース電極端子、ゲート電極端子およびグラン
ド端子を封止する樹脂と、 この樹脂により封止した半導体チップ、フレーム基板、
ドレイン電極端子、ソース電極端子、ゲート電極端子お
よびグランド端子を取付けるプリント基板と、 を備えたことを特徴とする樹脂封止型半導体装置。 - 【請求項2】グランド端子はソース電極端子を分離して
形成するものであることを特徴とする請求項1記載の樹
脂封止型半導体装置。 - 【請求項3】グランド端子はゲート電極端子とソース電
極端子との間に形成するものであることを特徴とする請
求項1または2記載の樹脂封止型半導体装置。 - 【請求項4】半導体チップとソース電極端子、ゲート電
極端子およびグランド端子とをAuの低インピーダンスの
ボンデングワイヤにより接続したことをを特徴とする請
求項1記載の樹脂封止型半導体装置。 - 【請求項5】半導体チップと少なくともソース電極端子
とを金属板により接続するようにしたことを特徴とする
請求項1記載の樹脂封止型半導体装置。 - 【請求項6】金属板は銅板であることを特徴とする請求
項4記載の樹脂封止型半導体装置。 - 【請求項7】フレーム基板の裏面がプリント基板の上面
に直接に接するように樹脂を封止したことを特徴とする
請求項1、2、3、4、5または6記載の樹脂封止型半
導体装置。 - 【請求項8】フレーム基板、各電極端子の裏面がプリン
ト基板の上面に直接に接するように樹脂を封止したこと
を特徴とする請求項1、2、3、4、5、6または7記
載の樹脂封止型半導体装置。
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7109577B2 (en) | 2003-05-14 | 2006-09-19 | Renesas Technology Corp. | Semiconductor device and power supply system |
JP2004342735A (ja) * | 2003-05-14 | 2004-12-02 | Renesas Technology Corp | 半導体装置および電源システム |
JP2005129606A (ja) * | 2003-10-22 | 2005-05-19 | Mitsubishi Electric Corp | 電力用半導体装置 |
JP4515218B2 (ja) * | 2004-10-22 | 2010-07-28 | ソニー株式会社 | メモリカード |
JP2006119961A (ja) * | 2004-10-22 | 2006-05-11 | Sony Corp | メモリカード |
JP2008104348A (ja) * | 2007-11-05 | 2008-05-01 | Renesas Technology Corp | 半導体装置および電源システム |
JP2009302261A (ja) * | 2008-06-12 | 2009-12-24 | Toyota Central R&D Labs Inc | 半導体装置 |
JP2011077550A (ja) * | 2010-12-28 | 2011-04-14 | Renesas Electronics Corp | 半導体装置 |
JP2014099535A (ja) * | 2012-11-15 | 2014-05-29 | Sanken Electric Co Ltd | 半導体装置 |
JP2013141035A (ja) * | 2013-04-19 | 2013-07-18 | Renesas Electronics Corp | 半導体装置 |
JP2019075726A (ja) * | 2017-10-18 | 2019-05-16 | 株式会社オートネットワーク技術研究所 | 車載用の半導体スイッチ装置及び車載用電源装置 |
JP2020170736A (ja) * | 2019-04-01 | 2020-10-15 | 富士電機株式会社 | 半導体装置 |
JP7338204B2 (ja) | 2019-04-01 | 2023-09-05 | 富士電機株式会社 | 半導体装置 |
WO2023157604A1 (ja) * | 2022-02-15 | 2023-08-24 | ローム株式会社 | 半導体装置および半導体装置の実装構造体 |
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