JP2001345554A - Multilayered wiring board and its manufacturing method - Google Patents
Multilayered wiring board and its manufacturing methodInfo
- Publication number
- JP2001345554A JP2001345554A JP2001095202A JP2001095202A JP2001345554A JP 2001345554 A JP2001345554 A JP 2001345554A JP 2001095202 A JP2001095202 A JP 2001095202A JP 2001095202 A JP2001095202 A JP 2001095202A JP 2001345554 A JP2001345554 A JP 2001345554A
- Authority
- JP
- Japan
- Prior art keywords
- insulating resin
- resin layer
- ligand
- wiring board
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P20/00—Technologies relating to chemical industry
- Y02P20/50—Improvements relating to the production of bulk chemicals
- Y02P20/52—Improvements relating to the production of bulk chemicals using catalysts, e.g. selective catalysts
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は絶縁樹脂層と配線パ
ターンを有する導体配線層を層状に形成する電気配線
板、交互に積層して形成される、いわゆる、ビルドアッ
プ法による多層配線基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electric wiring board in which an insulating resin layer and a conductor wiring layer having a wiring pattern are formed in layers, and a multilayer wiring board formed by alternately laminating the wiring boards by a so-called build-up method.
【０００２】[0002]
【従来の技術】電子機器への高速化、高機能化、小型化
等の要求に対し、それに組み込まれる配線基板に対して
も高配線密度化、薄型化、小型化等の要求が高まってい
る。これらの要求に対応する一つの配線基板の構成とし
て、ビルドアップ工法配線基板が挙げられる。2. Description of the Related Art In response to demands for higher speed, higher function, smaller size, etc. of electronic equipment, demands for higher wiring density, thinner, smaller size, etc. of wiring boards incorporated therein are increasing. . As a configuration of one wiring board that meets these requirements, there is a build-up method wiring board.
【０００３】ビルドアップ工法とは、基板上に絶縁樹脂
層と導体配線層とを交互に積み上げていく方式であり、
例えば、特開平４−１４８５９０号公報に記載されてい
る。この工法にて作製された多層配線基板の絶縁樹脂層
は、従来の多層配線基板の絶縁樹脂層のように、ガラス
クロスなどの芯材を使用せず、感光性樹脂組成物あるい
は熱硬化樹脂組成物を絶縁性基板上に塗布し、硬化させ
ることにより形成される。導体配線はめっきで形成され
る。このため、従来の多層配線板に比べ、高配線密度
化、薄型化、小型化を図ることができる。The build-up method is a method in which an insulating resin layer and a conductor wiring layer are alternately stacked on a substrate.
For example, it is described in JP-A-4-148590. The insulating resin layer of the multilayer wiring board manufactured by this method does not use a core material such as glass cloth as the insulating resin layer of the conventional multilayer wiring board, but uses a photosensitive resin composition or a thermosetting resin composition. It is formed by applying an object on an insulating substrate and curing it. The conductor wiring is formed by plating. Therefore, higher wiring density, thinner, and smaller size can be achieved as compared with the conventional multilayer wiring board.
【０００４】上下導体配線層の導通は、樹脂組成物の感
光性を利用してフォトリソグラフィーによる微細な孔を
形成し、同様に、めっきにて行うことができる。この孔
内配線をビアホールと呼ぶ。Conduction between the upper and lower conductor wiring layers can be performed by forming fine holes by photolithography utilizing the photosensitivity of the resin composition, and similarly by plating. This wiring in the hole is called a via hole.
【０００５】従来の多層配線基板の導通方法であるスル
ーホールではその系は３００μｍが限界であったのに対
し、ビルドアップ工法のうち、フォトリソグラフィーに
よるビアホール径は１００μｍ以下、また、レーザ加工
では５０μｍ以下も可能となる。このことは、導体配線
面のランド径を小さくすることができることを意味し、
配線の高密度化を図ることができる。In a conventional through-hole method of conducting a multilayer wiring board, the limit of the system is 300 μm. On the other hand, in the build-up method, the diameter of a via hole by photolithography is 100 μm or less. The following is also possible. This means that the land diameter on the conductor wiring surface can be reduced,
Higher wiring density can be achieved.
【０００６】また、発熱量の大きい半導体集積素子を搭
載するには、耐熱性の高い多層配線基板が必要になる。
ここでは、主に、セラミック多層配線基板上にビルドア
ップ工法で絶縁樹脂層と導体配線層とが交互に積みあげ
られたものが用いられる。絶縁樹脂層には、耐熱性が高
い、ポリイミドが用いられる。ポリイミドには感光性を
有するタイプと感光性のないタイプ、両方が用いられ
る。In order to mount a semiconductor integrated device having a large heat value, a multilayer wiring board having high heat resistance is required.
In this case, an insulating resin layer and a conductor wiring layer alternately stacked on a ceramic multilayer wiring board by a build-up method are mainly used. Polyimide having high heat resistance is used for the insulating resin layer. For the polyimide, both a photosensitive type and a non-photosensitive type are used.
【０００７】近年、電気信号の高速化に対応するため、
絶縁樹脂層に対し低誘電率化の要求が高まっている。こ
のため、誘電率３．０を切る高分子材料の開発が進めら
れている。この中で、フッ素化ポリイミドの適応が考え
られている。この材料は、ポリイミドに導入されたフッ
素原子により、誘電率３．０を切り、同時に低吸水性を
示す。また、ポリイミド骨格を有するので耐熱性も高
く、ガラス転移温度は３００℃以上である。特開平７−
１０６７２４号公報ではフッ素化ポリイミドを絶縁樹脂
層に用いたマルチチップモジュールが開示されている。[0007] In recent years, in order to respond to the increase in the speed of electric signals,
There is an increasing demand for an insulating resin layer to have a low dielectric constant. For this reason, development of a polymer material having a dielectric constant of less than 3.0 has been promoted. Among these, application of fluorinated polyimide is considered. This material has a dielectric constant of 3.0 due to fluorine atoms introduced into polyimide, and at the same time exhibits low water absorption. Further, since it has a polyimide skeleton, it has high heat resistance, and has a glass transition temperature of 300 ° C. or more. JP-A-7-
Japanese Patent No. 106724 discloses a multichip module using fluorinated polyimide for an insulating resin layer.
【０００８】[0008]
【発明が解決しようとする課題】ところで、ビルドアッ
プ工法における導体配線層は、上記絶縁樹脂層上に無電
解めっきによって形成される。一般的に、絶縁樹脂層上
の無電解めっき層の接着力は低い。特に、高密度配線の
要求により、その幅は５０μｍ以下になり、ますます接
着力は低くなる傾向にある。接着力の低下は製品の信頼
性に大きく影響を与える。The conductor wiring layer in the build-up method is formed by electroless plating on the insulating resin layer. Generally, the adhesive force of the electroless plating layer on the insulating resin layer is low. In particular, due to the demand for high-density wiring, the width tends to be 50 μm or less, and the adhesive strength tends to be further reduced. A decrease in adhesive strength has a significant effect on product reliability.
【０００９】絶縁樹脂層上の無電解めっき膜の接着力の
向上のためのめっき前処理として、過マンガン酸塩や重
クロム酸塩などの酸化処理が行われている。この方法
は、酸化分解による表面の粗面化、ならびに、絶縁樹脂
表面に酸素原子が導入され、極性基が導入されることに
より、めっき液の濡れ性向上、めっき金属との結合性が
付与され接着力が向上すると考えられている。As a pre-plating treatment for improving the adhesion of the electroless plating film on the insulating resin layer, an oxidation treatment such as permanganate or dichromate is performed. In this method, the surface is roughened by oxidative decomposition, and oxygen atoms are introduced into the insulating resin surface and polar groups are introduced, thereby improving the wettability of the plating solution and imparting the bonding property to the plating metal. It is believed that the adhesion is improved.
【００１０】しかしながら、過マンガン酸塩や重クロム
酸塩などの酸化反応は、グリシジル基とか炭素・炭素二
重結合部など限られた基でしか起こらず、極性基の形成
は絶縁樹脂の構造によって左右される。However, the oxidation reaction of permanganate or dichromate occurs only in a limited group such as a glycidyl group or a carbon-carbon double bond, and the formation of a polar group depends on the structure of the insulating resin. It depends.
【００１１】信頼性のあるめっき接着強度の目安は、９
０°引き剥がし強度で１０００ｇ／ｃｍであると言われ
ている。絶縁樹脂層として一般的なエポキシ樹脂系の場
合、上記酸化反応は比較的起こりやすいと推定される
が、それでも、めっき接着強度は５００ｇ／ｃｍであ
る。したがって、接着強度のさらなる向上が必要とな
る。The standard of reliable plating adhesion strength is 9
It is said that the peel strength at 0 ° is 1000 g / cm. In the case where a general epoxy resin is used as the insulating resin layer, the oxidation reaction is presumed to be relatively easy to occur, but the plating adhesive strength is still 500 g / cm. Therefore, it is necessary to further improve the adhesive strength.
【００１２】一方、ポリイミド樹脂では、過マンガン酸
塩や重クロム酸塩などの酸化剤による処理を行っても、
ベンゼン環が部分的に酸化されるのみで、粗面化もほと
んどされず、めっき接着強度は１００ｇ／ｃｍにも満た
ない。また、フッ素化ポリイミドでは、表面エネルギー
がさらに低いためめっき強度はほとんどゼロに等しい。
これらの樹脂に対しても、同様に接着強度のさらなる向
上が必要となる。On the other hand, in the case of a polyimide resin, even if a treatment with an oxidizing agent such as permanganate or dichromate is performed,
The benzene ring is only partially oxidized, the surface is hardly roughened, and the plating adhesive strength is less than 100 g / cm. Further, in the case of the fluorinated polyimide, the plating strength is almost equal to zero because the surface energy is further lower.
Also for these resins, it is necessary to further improve the adhesive strength.
【００１３】このため、絶縁樹脂層上の無電解めっき膜
のさらなる接着向上についてはさまざまな技術が開示さ
れているが、その多くは、より大きなアンカー形成用凹
部を設けることについて述べられている。たとえば、特
開平２−１８８９９２号公報では、酸化剤に対して難溶
性の耐熱樹脂中に、酸化剤に可溶な平均粒径２〜１０μ
ｍの耐熱性樹脂粒子と平均粒径２μｍの耐熱性樹脂粒子
の混合物を、あるいは、平均粒径２〜１０μｍの耐熱性
樹脂粒子と平均粒径２μｍの耐熱性樹脂粒子の疑似粒子
を混合することにより、酸化剤処理後の絶縁樹脂層にア
ンカー形成用の凹部を設け、めっき膜の接着強度向上が
図られている。For this reason, various techniques have been disclosed for further improving the adhesion of the electroless plating film on the insulating resin layer, but many of them describe providing a larger anchor-forming recess. For example, in Japanese Patent Application Laid-Open No. 2-188992, a heat-resistant resin which is hardly soluble in an oxidizing agent is used.
a mixture of heat-resistant resin particles having an average particle size of 2 μm and heat-resistant resin particles having an average particle size of 2 to 10 μm and heat-resistant resin particles having an average particle size of 2 μm. Thereby, a concave portion for forming an anchor is provided in the insulating resin layer after the oxidizing agent treatment, and the adhesion strength of the plating film is improved.
【００１４】しかしながら、この技術ではアンカーとな
るべき凹部が大きすぎ、凹部に配線端部がかかってしま
う場合、配線の直線性が失われるという問題が起こる。
すなわち、エッチングによる導体配線層形成方法である
サブトラクティブ法においては、めっきによって析出し
た凹部内部金属のエッチング残りが発生する。また、め
っきにて導体配線層を形成するアディティブ法において
は、凹部へのめっきレジストの被覆が不完全になり、凹
部内部にめっき金属が析出してしまう。このため、導体
配線層の直線性が失われる。特に、５０μｍ程度、ある
いは、それ以下の線幅の要求に対し、線幅のばらつきは
無視できなくなり、高速信号波形の歪みを引き起こす原
因となる。However, in this technique, when the concave portion serving as the anchor is too large and the wiring end is applied to the concave portion, there arises a problem that the linearity of the wiring is lost.
That is, in the subtractive method, which is a method of forming a conductor wiring layer by etching, the metal remaining in the recesses deposited by plating remains after etching. In addition, in the additive method of forming a conductive wiring layer by plating, coating of a plating resist on a concave portion is incomplete, and a plating metal is deposited inside the concave portion. Therefore, the linearity of the conductor wiring layer is lost. In particular, when a line width of about 50 μm or less is required, the fluctuation of the line width cannot be ignored, and causes a distortion of a high-speed signal waveform.
【００１５】また、上記の凹部の形状が複雑であるた
め、めっき金属と絶縁樹脂間に空気層を形成しやすく、
めっき膜の接着強度が高いにも関わらず、後プロセスの
熱履歴により空気層の膨張が起こり、局所的に導体配線
層が剥離を起こすといった問題があった。[0015] Further, since the shape of the recess is complicated, an air layer is easily formed between the plating metal and the insulating resin.
Although the adhesive strength of the plating film is high, there is a problem that the air layer expands due to the heat history of the post-process, and the conductor wiring layer locally peels off.
【００１６】一方、アンカーを使わない方法としては、
「縄舟ら、エレクトロニクス実装学会誌、ｖｏｌ２、Ｎ
ｏ．５、ｐ３９０，１９９９年」において、ポリイミド
樹脂表面にアルカリ処理を行い、一部のイミド環を開環
して、カルボン酸を形成した後、銅イオンをカルボキシ
ル基に配位させ、その後、還元処理を行い、金属銅を樹
脂表面上に析出させる方法の提案を行っている。On the other hand, as a method not using an anchor,
"Nawabune et al., Journal of Japan Institute of Electronics Packaging, vol2, N
o. 5, p390, 1999 ", the surface of a polyimide resin is subjected to an alkali treatment, a part of the imide ring is opened to form a carboxylic acid, and then a copper ion is coordinated to a carboxyl group. And proposes a method of depositing metallic copper on the resin surface.
【００１７】しかし、この方法では、イミド開環部がポ
リイミド表面に限られてしまい、このため、めっき金属
との配位点が多くなく、めっき接着強度が充分に取れな
いという問題がある。あるいは、配位基の種類がイミド
開環により形成されたカルボキシル基及びアミド基に限
られてしまい、金属と相互作用があまり強くないという
問題点がある。However, in this method, the imide ring-opening portion is limited to the polyimide surface, so that there is no coordination point with the plating metal, and there is a problem that sufficient plating adhesion strength cannot be obtained. Alternatively, the kind of the coordinating group is limited to the carboxyl group and the amide group formed by imide ring opening, and there is a problem that the interaction with the metal is not so strong.
【００１８】本発明では、上記問題を解決すべく、導体
配線層線幅のばらつきを最小限にし、かつ、絶縁樹脂と
の高い接着強度を有し、局所的な導体配線層の剥離を起
こさず、かつ、耐熱性が高く、信頼性の高い多層配線基
板を提供するものである。According to the present invention, in order to solve the above-mentioned problems, the dispersion of the line width of the conductor wiring layer is minimized, the adhesive strength with the insulating resin is high, and the conductor wiring layer does not peel off locally. Another object of the present invention is to provide a multilayer wiring board having high heat resistance and high reliability.
【００１９】[0019]
【００２０】[0020]
【発明の実施の形態】以下、本発明を詳細に説明する。
導体配線層、下地層、絶縁樹脂層間の断面図を図１〜５
に示す。なお、下地層とは、絶縁樹脂層と導体配線層と
の間に設けられた層をいう。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail.
FIGS. 1 to 5 are cross-sectional views of a conductor wiring layer, a base layer, and an insulating resin layer.
Shown in Note that the base layer refers to a layer provided between the insulating resin layer and the conductor wiring layer.
【００２１】図１のように、多層配線基板の絶縁樹脂層
１表面の絶縁樹脂層に由来する第一の配位子と化学的配
位結合を有する配位高分子錯体を形成することで、配線
パターンを有する導体配線層２との接着強度の高い下地
層４を形成させる。As shown in FIG. 1, by forming a coordination polymer complex having a chemical coordination bond with a first ligand derived from the insulating resin layer on the surface of the insulating resin layer 1 of the multilayer wiring board, The underlayer 4 having a high adhesive strength to the conductor wiring layer 2 having the wiring pattern is formed.
【００２２】あるいは図２のように、多層配線基板の絶
縁樹脂層１表面の第一の配位子と化学的配位結合を有す
る配位高分子錯体を形成することで配線パターンを有す
る導体配線層２との接着強度の高い下地層４を形成さ
せ、さらに、その下地層４である配位高分子錯体に導電
性を付与することにより、無電解めっきの工程を省くこ
とができる。Alternatively, as shown in FIG. 2, a conductor wiring having a wiring pattern is formed by forming a coordination polymer complex having a chemical coordination bond with the first ligand on the surface of the insulating resin layer 1 of the multilayer wiring board. By forming the underlayer 4 having a high adhesive strength to the layer 2 and further imparting conductivity to the coordination polymer complex as the underlayer 4, the step of electroless plating can be omitted.
【００２３】もしくは図３のように、多層配線基板の絶
縁樹脂層１表面の第一の配位子に第三の配位子を結合さ
せ、第三の配位子に金属を作用させて導体配線層２を形
成する。Alternatively, as shown in FIG. 3, a third ligand is bonded to the first ligand on the surface of the insulating resin layer 1 of the multilayer wiring board, and a metal is caused to act on the third ligand to form a conductor. The wiring layer 2 is formed.
【００２４】または図４のように、多層配線基板の絶縁
樹脂層１表面の第一の配位子に第三の配位子を結合さ
せ、第三の配位子と化学的配位結合を有する配位高分子
錯体を形成することで配線パターンを有する導体配線層
２との接着強度の高い下地層４を形成させる。Alternatively, as shown in FIG. 4, a third ligand is bonded to the first ligand on the surface of the insulating resin layer 1 of the multilayer wiring board, and the third ligand is chemically bonded to the third ligand. By forming a coordination polymer complex having the same, the underlayer 4 having high adhesive strength to the conductor wiring layer 2 having a wiring pattern is formed.
【００２５】または図５のように多層配線基板の絶縁樹
脂層１表面の第一の配位子に第三の配位を複数個有する
ポリマーを結合させ、第三の配位子に金属を作用させて
導体配線層２を形成させる。Alternatively, as shown in FIG. 5, a polymer having a plurality of third coordinations is bonded to the first ligand on the surface of the insulating resin layer 1 of the multilayer wiring board, and a metal acts on the third ligand. Thus, the conductor wiring layer 2 is formed.
【００２６】もしくは図６のように多層配線基板の絶縁
樹脂層１表面の第一の配位子に第三の配位を複数個有す
るポリマーを結合させ、第三の配位子と化学的配位結合
を有する配位高分子錯体を形成することで配線パターン
を有する導体配線層２との接着強度の高い下地層４を形
成させる。Alternatively, as shown in FIG. 6, a polymer having a plurality of third coordinations is bonded to the first ligand on the surface of the insulating resin layer 1 of the multilayer wiring board, and the third ligand is chemically bonded to the first ligand. By forming a coordination polymer complex having a coordination bond, an underlayer 4 having a high adhesive strength to the conductor wiring layer 2 having a wiring pattern is formed.
【００２７】ここで言う多層配線基板とは電気配線基
板、電気光配線基板等、一般的に絶縁樹脂層と導体配線
層が交互に積層された構造を持つ基板のことを示してい
る。The term "multilayer wiring board" used herein refers to a board having a structure in which an insulating resin layer and a conductor wiring layer are alternately laminated, such as an electric wiring board and an electric optical wiring board.
【００２８】絶縁樹脂層に由来する第一の配位子とは、
絶縁樹脂層を構成していた原子団が化学反応により配位
子に変化したものである。例えば、ポリイミドの場合、
イミド環が開環して得られるカルボキシル基、アミド基
が挙げられる。The first ligand derived from the insulating resin layer is:
The atomic groups that constituted the insulating resin layer were changed into ligands by a chemical reaction. For example, in the case of polyimide,
A carboxyl group and an amide group obtained by opening the imide ring are exemplified.
【００２９】下地層を形成する第二の配位子を有する化
合物としては耐熱性が高く、主鎖に芳香族環や複素環を
有し、かつ、金属と２カ所以上配位する能力のある配位
子を有する化合物を用いる。芳香族環としてはベンゼン
環、ナフタレン環、複素環としてはピリジン、ピラジ
ン、ピリミジン等があげられる。例えば、４，４′−ビ
ピリジンを用いる。The compound having a second ligand forming the underlayer has high heat resistance, has an aromatic ring or a hetero ring in the main chain, and has an ability to coordinate with a metal at two or more places. A compound having a ligand is used. Examples of the aromatic ring include a benzene ring and a naphthalene ring, and examples of the heterocyclic ring include pyridine, pyrazine, and pyrimidine. For example, 4,4'-bipyridine is used.
【００３０】絶縁樹脂層に由来しない第三の配位子と
は、配位子を構成する原子が全て絶縁樹脂層の外部から
与えられたものである。例えば、アミノ基、アミド基、
アジド基、アゾ基、ジアゾ基、シアノ基、イソシアン
基、シアナト基、チオシアナト基、エピイミノ基、ヒド
ロキシイミノ基、ピリジル基等の窒素原子を含む化合
物、例えば、イソシアノナト基、エポキシ基、エピジオ
キシ基、カルボニル基、カルボキシル基、ニトロソ基、
ヒドロキシ基等の酸素原子を含む化合物、例えば、イソ
チオシアノナト基、エピチオ基、エピジチオ基、ジチオ
基、ジチオカルボキシ基、チオ基、チオカルボニル基、
チオキソ基、メルカプト基等の硫黄原子を含む化合物、
例えば、ホスフィノ基、ホスホロ基、ホスホソ基等のリ
ン原子を含む化合物、例えば、クロル基、フロル基、ブ
ロム基のハロゲン原子を含む化合物、ヨード基を含む化
合物を用いることができる。The third ligand not derived from the insulating resin layer is one in which all atoms constituting the ligand are given from outside the insulating resin layer. For example, an amino group, an amide group,
Compounds containing nitrogen atom such as azide group, azo group, diazo group, cyano group, isocyanate group, cyanato group, thiocyanato group, epiimino group, hydroxyimino group, pyridyl group, for example, isocyanonato group, epoxy group, epidioxy group, carbonyl Group, carboxyl group, nitroso group,
Compounds containing an oxygen atom such as a hydroxy group, for example, isothiocyanonato group, epithio group, epidithio group, dithio group, dithiocarboxy group, thio group, thiocarbonyl group,
A compound containing a sulfur atom such as a thioxo group or a mercapto group,
For example, a compound containing a phosphorus atom such as a phosphino group, a phosphoro group, or a phosphoso group, for example, a compound containing a halogen atom such as a chloro group, a flor group, or a bromo group, or a compound containing an iodine group can be used.
【００３１】下地層を形成する配位高分子錯体の金属５
としては、第３周期、第４周期、第５周期のいずれの金
属でもよいが、特に６配位、５配位、４配位と複数箇所
で配位子と配位できる能力のある金属が挙げられる。例
えば、さまざまな配位様式を持つ銅原子やパラジウム、
主に平面４配位をとる白金などが挙げられる。Metal 5 of Coordination Polymer Complex to Form Underlayer
May be any of the metals of the third period, the fourth period, and the fifth period. No. For example, copper atoms and palladium with various coordination modes,
Platinum having four-plane coordination is mainly used.
【００３２】下地層を形成する配位高分子錯体として
は、例えば、[[Cu(SO4)(C5H4N)2]]ｎ化合物、｛[Cu(SiF
6)(C5H4N)2]｝n化合物、｛K2[Pt(CN)4]｝n化合物等がこ
れに当てはまる。As the coordination polymer complex forming the underlayer, for example, [[Cu (SO 4 ) (C 5 H 4 N) 2 ]] n compound, Cu [Cu (SiF
6) (C 5 H 4 N ) 2]} n compound, {K 2 [Pt (CN ) 4]} n compounds applies thereto.
【００３３】導体配線層との接着強度は、この下地層中
の配位子との配位結合により高められる。The adhesive strength with the conductor wiring layer is enhanced by the coordination bond with the ligand in the underlayer.
【００３４】本発明によれば、導体配線層２が結合の強
固な下地層及び／または第三の配位子を介して絶縁樹脂
層１と結合するため、層間剥離が発生しない。また、絶
縁樹脂層の構成樹脂のみと化学的配位結合をするため、
ビアホール孔を形成した後に下地層を形成することがで
き、ビアホール孔側のめっき強度の向上も図れる。According to the present invention, since the conductor wiring layer 2 is bonded to the insulating resin layer 1 via the strongly bonded underlayer and / or the third ligand, delamination does not occur. In addition, to form a chemical coordination bond only with the constituent resin of the insulating resin layer,
The base layer can be formed after the formation of the via hole, and the plating strength on the side of the via hole can be improved.
【００３５】本発明においては、絶縁樹脂層に光導波路
を形成することで、光配線層と導体配線層を交互に積層
して形成される光・電気配線基板に応用できる。In the present invention, by forming an optical waveguide on an insulating resin layer, the present invention can be applied to an optical / electrical wiring board formed by alternately laminating optical wiring layers and conductor wiring layers.
【００３６】[0036]
【実施例】〈実施例１〉絶縁性基板として、あらかじ
め、熱処理により絶縁処理を加えたシリコン基板上にポ
リイミド（宇部興産社製商品名ユピコート）をスピンコ
ーターにて１０００ｒｐｍで塗布し、８０℃、３０分に
て乾燥を行い、さらに１８０℃、１時間で硬化して絶縁
樹脂層を形成した。このときの膜厚は約１０μｍであっ
た。この基板を水酸化ナトリウム水溶液中に浸漬し、ポ
リイミドを開環させることで、絶縁樹脂層表面に第一の
配位子であるカルボキシル基、及び、アミド基を導入さ
せた。<Example 1> As an insulating substrate, a silicon substrate coated in advance with a heat treatment by heat treatment was coated with polyimide (upe coat manufactured by Ube Industries, Ltd.) at 1000 rpm at 80 ° C. Drying was performed for 30 minutes, and further, curing was performed at 180 ° C. for 1 hour to form an insulating resin layer. At this time, the film thickness was about 10 μm. This substrate was immersed in an aqueous solution of sodium hydroxide to open the polyimide ring, thereby introducing a carboxyl group and an amide group as the first ligand to the surface of the insulating resin layer.
【００３７】さらに、１モル硫酸銅水溶液１００ｍｌ中
に、上記基板を１０分浸漬させた後、基板を取り出し銅
を絶縁樹脂層の表面に配位させた。Further, the substrate was immersed in 100 ml of a 1 molar aqueous solution of copper sulfate for 10 minutes, and then the substrate was taken out and copper was coordinated on the surface of the insulating resin layer.
【００３８】次いで、１モルの４，４′−ビピリジンを
含むメタノール溶液中に、上記基板を１０分浸漬させた
後、基板を取り出し、第二の配位子である４，４′−ビ
ピリジンを銅原子上に配位させた。Next, after immersing the substrate in a methanol solution containing 1 mol of 4,4'-bipyridine for 10 minutes, the substrate is taken out, and 4,4'-bipyridine as the second ligand is removed. Coordinated on a copper atom.
【００３９】上記硫酸銅水溶液に浸漬する工程以降を複
数回繰り返すことで、絶縁樹脂層上に下地層４である配
位高分子錯体を形成した。By repeating the above steps of dipping in the aqueous copper sulfate solution a plurality of times, a coordination polymer complex as the underlayer 4 was formed on the insulating resin layer.
【００４０】めっきにて２０μｍ厚の導体配線層を形成
した。A conductive wiring layer having a thickness of 20 μm was formed by plating.
【００４１】〈実施例２〉絶縁性基板としてガラス基板
上にフッ素化ポリイミド（日立化成工業社製商品名ＯＰ
Ｉ−Ｎ３３０５）をスピンコーターにて１０００ｒｐｍ
で塗布し、１００℃、３０分、さらに、２００℃、３０
分、さらに、３５０℃、１時間でイミド化させ絶縁樹脂
層を形成した。このときの膜厚は約１０μｍであった。
この基板を水酸化カリウム水溶液中に浸漬し、ポリイミ
ドを開環させることで、絶縁樹脂層表面に第一の配位子
であるカルボキシル基及びアミド基を導入させた。Example 2 A fluorinated polyimide (trade name OP manufactured by Hitachi Chemical Co., Ltd.) was formed on a glass substrate as an insulating substrate.
I-N3305) with a spin coater at 1000 rpm
At 100 ° C for 30 minutes, and at 200 ° C for 30 minutes.
The mixture was further imidized at 350 ° C. for one hour to form an insulating resin layer. At this time, the film thickness was about 10 μm.
This substrate was immersed in an aqueous solution of potassium hydroxide to open the ring of the polyimide, thereby introducing a carboxyl group and an amide group as the first ligand onto the surface of the insulating resin layer.
【００４２】さらに、１モル硫酸銅水溶液１００ｍｌ中
に、上記基板を１０分浸漬させた後、基板を取り出し銅
を絶縁樹脂層の表面に配位させた。Further, the above substrate was immersed in 100 ml of a 1 molar aqueous solution of copper sulfate for 10 minutes, then the substrate was taken out and copper was coordinated on the surface of the insulating resin layer.
【００４３】次いで、１モルの４，４′−ビピリジンを
含むメタノール溶液中に、上記基板を１０分浸漬させた
後、基板を取り出し、第二の配位子である４，４′−ビ
ピリジンを銅原子上に配位させた。Next, the substrate was immersed in a methanol solution containing 1 mol of 4,4'-bipyridine for 10 minutes, and then the substrate was taken out and 4,4'-bipyridine as the second ligand was removed. Coordinated on a copper atom.
【００４４】上記硫酸銅水溶液に浸漬する工程以降を複
数回繰り返すことで、絶縁樹脂層上に下地層４である配
位高分子錯体を形成した。By repeating the above steps of immersing in the aqueous copper sulfate solution a plurality of times, a coordination polymer complex as the underlayer 4 was formed on the insulating resin layer.
【００４５】めっきにて２０μｍ厚の導体配線層を形成
した後、エッチングにてパターニングを行い、導体配線
層を形成した。After a conductor wiring layer having a thickness of 20 μm was formed by plating, patterning was performed by etching to form a conductor wiring layer.
【００４６】〈実施例３〉絶縁性基板として、あらかじ
め、熱酸化により絶縁処理を加えたシリコン基板上にポ
リイミド（宇部興産社製ユピコート）をスピンコーター
にて１０００ｒｐｍで塗布し、８０℃、３０分にて乾燥
を行い、さらに１８０℃、１時間で硬化して絶縁樹脂層
を形成した。このときの膜厚は約１０μｍであった。こ
の基板を水酸化ナトリウム水溶液中に浸漬し、ポリイミ
ドを開環させることで、絶縁樹脂層表面に第一の配位子
であるカルボキシル基、及び、アミド基を導入させた。<Example 3> As an insulating substrate, polyimide (upe coat manufactured by Ube Industries, Ltd.) was applied on a silicon substrate which had been previously subjected to thermal insulation by thermal oxidation at 1000 rpm by a spin coater, and was heated at 80 ° C. for 30 minutes. And cured at 180 ° C. for 1 hour to form an insulating resin layer. At this time, the film thickness was about 10 μm. This substrate was immersed in an aqueous solution of sodium hydroxide to open the polyimide ring, thereby introducing a carboxyl group and an amide group as the first ligand to the surface of the insulating resin layer.
【００４７】さらに、１モルのスルファミドを含むピリ
ジン溶液中に、上記基板を１０分浸漬させた後、基板を
取り出し、１００℃、１時間加熱処理をして、第三の配
位子であるアミド基を導入した。Further, after immersing the above substrate in a pyridine solution containing 1 mol of sulfamide for 10 minutes, the substrate is taken out and heated at 100 ° C. for 1 hour to obtain an amide as a third ligand. A group was introduced.
【００４８】次いで、１モル硫酸銅水溶液１００ｍｌ中
に、上記基板を１０分浸漬させた後、基板を取り出し銅
を絶縁樹脂層の表面に配位さた。Next, the substrate was immersed in 100 ml of a 1 molar aqueous solution of copper sulfate for 10 minutes, the substrate was taken out, and copper was coordinated on the surface of the insulating resin layer.
【００４９】めっきにて２０μｍ厚の導体配線層を形成
した。A conductive wiring layer having a thickness of 20 μm was formed by plating.
【００５０】〈実施例４〉絶縁性基板としてガラス基板
上にフッ素化ポリイミド（日立化成工業社製商品名ＯＰ
Ｉ−Ｎ３３０５）をスピンコーターにて１０００ｒｐｍ
で塗布し、１００℃、３０分、さらに、２００℃、３０
分、さらに、３５０℃、１時間でイミド化させ絶縁樹脂
層を形成した。このときの膜厚は約１０μｍであった。
この基板を水酸化カリウム水溶液中に浸漬し、ポリイミ
ドを開環させることで、絶縁樹脂層表面に第一の配位子
であるカルボキシル基及びアミド基を導入させた。Example 4 A fluorinated polyimide (trade name OP manufactured by Hitachi Chemical Co., Ltd.) was formed on a glass substrate as an insulating substrate.
I-N3305) with a spin coater at 1000 rpm
At 100 ° C for 30 minutes, and at 200 ° C for 30 minutes.
The mixture was further imidized at 350 ° C. for one hour to form an insulating resin layer. At this time, the film thickness was about 10 μm.
This substrate was immersed in an aqueous solution of potassium hydroxide to open the ring of the polyimide, thereby introducing a carboxyl group and an amide group as the first ligand onto the surface of the insulating resin layer.
【００５１】さらに、１モルのスルファミドを含むピリ
ジン溶液中に、上記基板を１０分浸漬させた後、基板を
取り出し、１００℃、１時間加熱処理をして、第三の配
位子であるアミド基を導入した。Further, after immersing the above substrate in a pyridine solution containing 1 mol of sulfamide for 10 minutes, the substrate is taken out and heated at 100 ° C. for 1 hour to obtain an amide as a third ligand. A group was introduced.
【００５２】次いで、１モル硫酸銅水溶液１００ｍｌ中
に、上記基板を１０分浸漬させた後、基板を取り出し銅
を絶縁樹脂層の表面に配位させた。Next, the substrate was immersed in 100 ml of a 1 molar aqueous solution of copper sulfate for 10 minutes, then the substrate was taken out and copper was coordinated on the surface of the insulating resin layer.
【００５３】めっきにて２０μｍ厚の導体配線層を形成
した後、エッチングにてパターニングを行い、導体配線
層を形成した。After a conductor wiring layer having a thickness of 20 μm was formed by plating, patterning was performed by etching to form a conductor wiring layer.
【００５４】〈実施例５〉絶縁性基板として、あらかじ
め、熱酸化により絶縁処理を加えたシリコン基板上にポ
リイミド（宇部興産社製商品名ユピコート）をスピンコ
ーターにて１０００ｒｐｍで塗布し、８０℃、３０分に
て乾燥を行い、さらに１８０℃、１時間で硬化して絶縁
樹脂層を形成した。このときの膜厚は約１０μｍであっ
た。この基板を水酸化ナトリウム水溶液中に浸漬し、ポ
リイミドを開環させることで、絶縁樹脂層表面に第一の
配位子であるカルボキシル基、及び、アミド基を導入さ
せた。<Example 5> As an insulating substrate, polyimide (upe coat manufactured by Ube Industries, Ltd.) was applied on a silicon substrate which had been previously subjected to insulation treatment by thermal oxidation at 1000 rpm by a spin coater, and then heated at 80 ° C. Drying was performed for 30 minutes, and further, curing was performed at 180 ° C. for 1 hour to form an insulating resin layer. At this time, the film thickness was about 10 μm. This substrate was immersed in an aqueous solution of sodium hydroxide to open the polyimide ring, thereby introducing a carboxyl group and an amide group as the first ligand to the surface of the insulating resin layer.
【００５５】さらに、１モルのスルファミドを含むピリ
ジン溶液中に、上記基板を１０分浸漬させた後、基板を
取り出し、１００℃、１時間加熱処理をして、第三の配
位子であるアミド基を導入した。Further, after immersing the substrate in a pyridine solution containing 1 mol of sulfamide for 10 minutes, the substrate was taken out and heated at 100 ° C. for 1 hour to obtain an amide as a third ligand. A group was introduced.
【００５６】次いで、１モル硫酸銅水溶液１００ｍｌ中
に、上記基板を１０分浸漬させた後、基板を取り出し銅
を絶縁樹脂層の表面に配位させた。Next, the substrate was immersed in 100 ml of a 1 molar aqueous solution of copper sulfate for 10 minutes, then the substrate was taken out and copper was coordinated on the surface of the insulating resin layer.
【００５７】さらに、１モルの４，４′−ビピリジンを
含むメタノール溶液中に、上記基板を１０分浸漬させた
後、基板を取り出し、第二の配位子である４，４′−ビ
ピリジンを銅原子上に配位させた。Further, after immersing the substrate in a methanol solution containing 1 mol of 4,4'-bipyridine for 10 minutes, the substrate is taken out, and 4,4'-bipyridine as the second ligand is removed. Coordinated on a copper atom.
【００５８】上記硫酸銅水溶液に浸漬する工程以降を複
数回繰り返すことで、絶縁樹脂層上に下地層４である配
位高分子錯体を形成した。The coordination polymer complex as the underlayer 4 was formed on the insulating resin layer by repeating the above steps of dipping in the aqueous copper sulfate solution a plurality of times.
【００５９】めっきにて２０μｍ厚の導体配線層を形成
した。A conductive wiring layer having a thickness of 20 μm was formed by plating.
【００６０】〈実施例６〉絶縁性基板としてガラス基板
上にフッ素化ポリイミド（日立化成工業社製商品名ＯＰ
Ｉ−Ｎ３３０５）をスピンコーターにて１０００ｒｐｍ
で塗布し、１００℃、３０分、さらに、２００℃、３０
分、さらに、３５０℃、１時間でイミド化させ絶縁樹脂
層を形成した。このときの膜厚は約１０μｍであった。
この基板を水酸化カリウム水溶液中に浸漬し、ポリイミ
ドを開環させることで、絶縁樹脂層表面に第一の配位子
であるカルボキシル基及びアミド基を導入させた。Embodiment 6 A fluorinated polyimide (trade name OP manufactured by Hitachi Chemical Co., Ltd.) was formed on a glass substrate as an insulating substrate.
I-N3305) with a spin coater at 1000 rpm
At 100 ° C for 30 minutes, and at 200 ° C for 30 minutes.
The mixture was further imidized at 350 ° C. for one hour to form an insulating resin layer. At this time, the film thickness was about 10 μm.
This substrate was immersed in an aqueous solution of potassium hydroxide to open the ring of the polyimide, thereby introducing a carboxyl group and an amide group as the first ligand onto the surface of the insulating resin layer.
【００６１】さらに、１モルのスルファミドを含むピリ
ジン溶液中に、上記基板を１０分浸漬させた後、基板を
取り出し、１００℃、１時間加熱処理をして、第三の配
位子であるアミド基を導入した。Further, after immersing the substrate in a pyridine solution containing 1 mol of sulfamide for 10 minutes, the substrate was taken out, and heat-treated at 100 ° C. for 1 hour to obtain an amide as a third ligand. A group was introduced.
【００６２】次いで、１モル硫酸銅水溶液１００ｍｌ中
に、上記基板を１０分浸漬させた後、基板を取り出し銅
を絶縁樹脂層の表面に配位させた。Next, the substrate was immersed in 100 ml of a 1 molar copper sulfate aqueous solution for 10 minutes, and then the substrate was taken out and copper was coordinated on the surface of the insulating resin layer.
【００６３】さらに、１モルの４，４′−ビピリジンを
含むメタノール溶液中に、上記基板を１０分浸漬させた
後、基板を取り出し、第二の配位子である４，４′−ビ
ピリジンを銅原子上に配位させた。Further, after immersing the substrate in a methanol solution containing 1 mol of 4,4'-bipyridine for 10 minutes, the substrate is taken out, and 4,4'-bipyridine as the second ligand is removed. Coordinated on a copper atom.
【００６４】上記硫酸銅水溶液に浸漬する工程以降を複
数回繰り返すことで、絶縁樹脂層上に下地層４である配
位高分子錯体を形成した。By repeating the above steps of dipping in the aqueous copper sulfate solution a plurality of times, the coordination polymer complex as the underlayer 4 was formed on the insulating resin layer.
【００６５】めっきにて２０μｍ厚の導体配線層を形成
した後、エッチングにてパターニングを行い、導体配線
層を形成した。After a conductor wiring layer having a thickness of 20 μm was formed by plating, patterning was performed by etching to form a conductor wiring layer.
【００６６】〈実施例７〉絶縁性基板として、あらかじ
め、熱酸化により絶縁処理を加えたシリコン基板上にポ
リイミド（宇部興産社製商品名ユピコート）をスピンコ
ーターにて１０００ｒｐｍで塗布し、８０℃、３０分に
て乾燥を行い、さらに１８０℃、１時間で硬化して絶縁
樹脂層を形成した。このときの膜厚は約１０μｍであっ
た。この基板を水酸化ナトリウム水溶液中に浸漬し、ポ
リイミドを開環させることで、絶縁樹脂層表面に第一の
配位子であるカルボキシル基、及び、アミド基を導入さ
せた。Example 7 As an insulating substrate, polyimide (upe coat, trade name, manufactured by Ube Industries, Ltd.) was applied on a silicon substrate which had been previously subjected to insulation treatment by thermal oxidation at 1000 rpm by a spin coater, and then heated at 80 ° C. Drying was performed for 30 minutes, and further, curing was performed at 180 ° C. for 1 hour to form an insulating resin layer. At this time, the film thickness was about 10 μm. This substrate was immersed in an aqueous solution of sodium hydroxide to open the polyimide ring, thereby introducing a carboxyl group and an amide group as the first ligand to the surface of the insulating resin layer.
【００６７】さらに、５０ｍモルのベンゾフェノンを含
むアセトン溶液に１分浸漬させた後、基板を取り出し乾
燥して、表面にラジカル発生剤であるベンゾフェノンを
吸着させた。Further, the substrate was immersed in an acetone solution containing 50 mmol of benzophenone for 1 minute, then the substrate was taken out and dried, and benzophenone as a radical generator was adsorbed on the surface.
【００６８】次に、１モルのメタクリルアミド水溶液中
に、上記基板を１時間浸漬させながら、ＵＶを照射して
ラジカル反応を発生させ、第三の配位子であるアミド基
を有するモノマーを重合させた。Next, while immersing the substrate in an aqueous solution of 1 mol of methacrylamide for 1 hour, UV irradiation was performed to generate a radical reaction, thereby polymerizing a monomer having an amide group as a third ligand. I let it.
【００６９】次いで、１モル硫酸銅水溶液１００ｍｌ中
に、上記基板を１０分浸漬させた後、基板を取り出し銅
を絶縁樹脂層の表面に配位させた。Next, the substrate was immersed in 100 ml of a 1 molar aqueous solution of copper sulfate for 10 minutes, then the substrate was taken out and copper was coordinated on the surface of the insulating resin layer.
【００７０】めっきにて２０μｍ厚の導体配線層を形成
した。A conductor wiring layer having a thickness of 20 μm was formed by plating.
【００７１】〈実施例８〉絶縁性基板としてガラス基板
上にフッ素化ポリイミド（日立化成工業社製商品名ＯＰ
Ｉ−Ｎ３３０５）をスピンコーターにて１０００ｒｐｍ
で塗布し、１００℃、３０分、さらに、２００℃、３０
分、さらに、３５０℃、１時間でイミド化させ絶縁樹脂
層を形成した。このときの膜厚は約１０μｍであった。
この基板を水酸化カリウム水溶液中に浸漬し、ポリイミ
ドを開環させることで、絶縁樹脂層表面に第一の配位子
であるカルボキシル基及びアミド基を導入させた。Example 8 A fluorinated polyimide (trade name OP manufactured by Hitachi Chemical Co., Ltd.) was formed on a glass substrate as an insulating substrate.
I-N3305) with a spin coater at 1000 rpm
At 100 ° C for 30 minutes, and at 200 ° C for 30 minutes.
The mixture was further imidized at 350 ° C. for one hour to form an insulating resin layer. At this time, the film thickness was about 10 μm.
This substrate was immersed in an aqueous solution of potassium hydroxide to open the ring of the polyimide, thereby introducing a carboxyl group and an amide group as the first ligand onto the surface of the insulating resin layer.
【００７２】さらに、５０ｍモルのベンゾフェノンを含
むアセトン溶液に１分浸漬させた後、基板を取り出し乾
燥して、ラジカル発生剤であるベンゾフェノンを吸着さ
せた。Further, the substrate was immersed in an acetone solution containing 50 mmol of benzophenone for 1 minute, then the substrate was taken out and dried to adsorb benzophenone as a radical generator.
【００７３】次に、１モルのメタクリルアミド水溶液中
に、上記基板を１時間浸漬させながら、ＵＶを照射して
ラジカルを発生させ、第三の配位子であるアミド基を有
するモノマーを重合させた。Next, while the substrate was immersed in a 1 mol aqueous methacrylamide solution for 1 hour, UV irradiation was performed to generate radicals, thereby polymerizing a monomer having an amide group as a third ligand. Was.
【００７４】次いで、１モル硫酸銅水溶液１００ｍｌ中
に、上記基板を１０分浸漬させた後、基板を取り出し銅
を絶縁樹脂層の表面に配位させた。Next, the substrate was immersed in 100 ml of a 1 molar aqueous solution of copper sulfate for 10 minutes, then the substrate was taken out and copper was coordinated on the surface of the insulating resin layer.
【００７５】めっきにて２０μｍ厚の導体配線層を形成
した後、エッチングにてパターニングを行い、導体配線
層を形成した。After a conductor wiring layer having a thickness of 20 μm was formed by plating, patterning was performed by etching to form a conductor wiring layer.
【００７６】〈実施例９〉絶縁性基板として、あらかじ
め、絶縁処理を加えたシリコン基板上にポリイミド（宇
部興産社製商品名ユピコート）をスピンコーターにて１
０００ｒｐｍで塗布し、８０℃、３０分にて乾燥を行
い、さらに１８０℃、１時間で硬化して絶縁樹脂層を形
成した。このときの膜厚は約１０μｍであった。この基
板を水酸化ナトリウム水溶液中に浸漬し、ポリイミドを
開環させることで、絶縁樹脂層表面に第一の配位子であ
るカルボキシル基、及び、アミド基を導入させた。Example 9 As an insulating substrate, a polyimide (upe coat manufactured by Ube Industries, Ltd.) was coated on a silicon substrate which had been subjected to insulation treatment in advance by a spin coater.
The coating was performed at 000 rpm, dried at 80 ° C. for 30 minutes, and further cured at 180 ° C. for 1 hour to form an insulating resin layer. At this time, the film thickness was about 10 μm. This substrate was immersed in an aqueous solution of sodium hydroxide to open the polyimide ring, thereby introducing a carboxyl group and an amide group as the first ligand to the surface of the insulating resin layer.
【００７７】さらに、５０ｍモルのベンゾフェノンを含
むアセトン溶液に、１分浸漬させた後、基板を取り出し
乾燥して、ラジカル発生剤であるベンゾフェノンを吸着
させた。Further, the substrate was immersed in an acetone solution containing 50 mmol of benzophenone for 1 minute, and then the substrate was taken out and dried to adsorb benzophenone as a radical generator.
【００７８】次に、１モルのメタクリルアミド水溶液中
に、上記基板を１時間浸漬させながら、ＵＶを照射して
ラジカルを発生させ、第三の配位子であるアミド基を有
するモノマーを重合させた。Next, while the substrate was immersed in an aqueous solution of 1 mol of methacrylamide for 1 hour, UV irradiation was performed to generate radicals, thereby polymerizing a monomer having an amide group as a third ligand. Was.
【００７９】次いで、１モル硫酸銅水溶液１００ｍｌ中
に、上記基板を１０分浸漬させた後、基板を取り出し銅
を絶縁樹脂層の表面に配位させた。Next, the substrate was immersed in 100 ml of a 1 molar aqueous solution of copper sulfate for 10 minutes, then the substrate was taken out and copper was coordinated on the surface of the insulating resin layer.
【００８０】さらに、１モルの４，４′−ビピリジンを
含むメタノール溶液中に、上記基板を１０分浸漬させた
後、基板を取り出し、第二の配位子である４，４′−ビ
ピリジンを銅原子上に配位させた。Further, after immersing the substrate in a methanol solution containing 1 mol of 4,4'-bipyridine for 10 minutes, the substrate is taken out and 4,4'-bipyridine as the second ligand is removed. Coordinated on a copper atom.
【００８１】上記硫酸銅水溶液に浸漬する工程を複数回
繰り返すことで、絶縁樹脂層上に下地層４である配位高
分子錯体を形成した。By repeating the step of dipping in the aqueous copper sulfate solution a plurality of times, a coordination polymer complex as the underlayer 4 was formed on the insulating resin layer.
【００８２】めっきにて２０μｍ厚の導体配線層を形成
した。A conductor wiring layer having a thickness of 20 μm was formed by plating.
【００８３】〈実施例１０〉絶縁性基板としてガラス基
板上にフッ素化ポリイミド（日立化成工業社製商品名Ｏ
ＰＩ−Ｎ３３０５）をスピンコーターにて１０００ｒｐ
ｍで塗布し、１００℃、３０分、さらに、２００℃、３
０分、さらに、３５０℃、１時間でイミド化させ絶縁樹
脂層を形成した。このときの膜厚は約１０μｍであっ
た。この基板を水酸化カリウム水溶液中に浸漬し、ポリ
イミドを開環させることで、絶縁樹脂層表面に第一の配
位子であるカルボキシル基及びアミド基を導入させた。Embodiment 10 A fluorinated polyimide (trade name O, manufactured by Hitachi Chemical Co., Ltd.) was formed on a glass substrate as an insulating substrate.
PI-N3305) with a spin coater at 1000 rpm
m, 100 ° C, 30 minutes, 200 ° C, 3
The mixture was imidized at 350 ° C. for 1 hour for 0 minute to form an insulating resin layer. At this time, the film thickness was about 10 μm. This substrate was immersed in an aqueous solution of potassium hydroxide to open the ring of the polyimide, thereby introducing a carboxyl group and an amide group as the first ligand onto the surface of the insulating resin layer.
【００８４】さらに、５０ｍモルのベンゾフェノンを含
むアセトン溶液に１分浸漬させた後、基板を取り出し乾
燥して、ラジカル発生剤であるベンゾフェノンを吸着さ
せた。Further, after immersing in an acetone solution containing 50 mmol of benzophenone for 1 minute, the substrate was taken out and dried to adsorb benzophenone as a radical generator.
【００８５】次に、１モルのメタクリルアミド水溶液中
に、上記基板を１時間浸漬させながら、ＵＶを照射して
ラジカルを発生させ、第三の配位子であるアミド基を有
するモノマーを重合させた。Next, while the substrate was immersed in a 1 mol aqueous methacrylamide solution for 1 hour, UV irradiation was performed to generate radicals, thereby polymerizing a monomer having an amide group as a third ligand. Was.
【００８６】次いで、１モル硫酸銅水溶液１００ｍｌ中
に、上記基板を１０分浸漬させた後、基板を取り出し銅
を絶縁樹脂層の表面に配位させた。Next, the substrate was immersed in 100 ml of a 1 molar aqueous solution of copper sulfate for 10 minutes, then the substrate was taken out and copper was coordinated on the surface of the insulating resin layer.
【００８７】さらに、１モルの４，４′−ビピリジンを
含むメタノール溶液中に、上記基板を１０分浸漬させた
後、基板を取り出し、第二の配位子である４，４′−ビ
ピリジンを銅原子上に配位させた。Further, after immersing the substrate in a methanol solution containing 1 mol of 4,4'-bipyridine for 10 minutes, the substrate was taken out, and 4,4'-bipyridine as the second ligand was removed. Coordinated on a copper atom.
【００８８】上記硫酸銅水溶液に浸漬する工程を複数回
繰り返すことで、絶縁樹脂層上に下地層４である配位高
分子錯体を形成した。By repeating the step of dipping in the aqueous copper sulfate solution a plurality of times, a coordination polymer complex as the underlayer 4 was formed on the insulating resin layer.
【００８９】めっきにて２０μｍ厚の導体配線層を形成
した後、エッチングにてパターニングを行い、導体配線
層を形成した。After forming a conductor wiring layer having a thickness of 20 μm by plating, patterning was performed by etching to form a conductor wiring layer.
【００９０】〈比較例１〉絶縁性基板として、あらかじ
め熱酸化により絶縁処理を加えたシリコン基板上にポリ
イミド（宇部興産社製商品名ユピコート）をスピンコー
タにて１０００ｒｐｍで塗布し、８０℃、３０分にて乾
燥を行い、さらに、１８０℃１時間で硬化して絶縁樹脂
層を形成した。このときの膜厚は約１０μｍであった。<Comparative Example 1> As an insulating substrate, polyimide (upe coat manufactured by Ube Industries, Ltd.) was applied at 1000 rpm on a silicon substrate which had been subjected to insulation treatment by thermal oxidation in advance at 1000 rpm, and was heated to 80 ° C. for 30 minutes. And cured at 180 ° C. for 1 hour to form an insulating resin layer. At this time, the film thickness was about 10 μm.
【００９１】上記絶縁樹脂表面を５０℃に加熱した過マ
ンガン酸カリウム（５０ｇ／ｌ）、水酸化ナトリウム
（２０ｇ／ｌ）水溶液中にて酸化処理した。この上に、
無電解めっき、電解めっきにて２０μｍ厚の導体配線層
を形成した。The surface of the insulating resin was oxidized in an aqueous solution of potassium permanganate (50 g / l) and sodium hydroxide (20 g / l) heated to 50 ° C. On top of this,
A conductor wiring layer having a thickness of 20 μm was formed by electroless plating and electrolytic plating.
【００９２】〈比較例２〉絶縁樹脂としてセラミック基
板上にフッ素化ポリイミド（日立化成工業社製商品名Ｏ
ＰＩ−Ｎ１００５）をスピンコータにて１０００ｒｐｍ
で塗布し、１００℃、３０分、さらに、２００℃、３０
分、さらに、３５０℃、１時間でイミド化させ絶縁樹脂
層を形成した。このときの膜厚は約１０μｍであった。Comparative Example 2 A fluorinated polyimide (trade name O, manufactured by Hitachi Chemical Co., Ltd.) was used as an insulating resin on a ceramic substrate.
PI-N1005) with a spin coater at 1000 rpm
At 100 ° C for 30 minutes, and at 200 ° C for 30 minutes.
The mixture was further imidized at 350 ° C. for one hour to form an insulating resin layer. At this time, the film thickness was about 10 μm.
【００９３】上記絶縁樹脂表面を５０℃に加熱した過マ
ンガン酸カリウム（５０ｇ／ｌ）、水酸化ナトリウム
（２０ｇ／ｌ）水溶液中にて酸化処理した。この上に、
無電解めっき、電解めっきにて２０μｍ厚の導体配線層
を形成した。The surface of the insulating resin was oxidized in an aqueous solution of potassium permanganate (50 g / l) and sodium hydroxide (20 g / l) heated to 50 ° C. On top of this,
A conductor wiring layer having a thickness of 20 μm was formed by electroless plating and electrolytic plating.
【００９４】〈めっき接着強度評価〉実施例１、実施例
２、実施例３、実施例４、実施例５、実施例６、実施例
７、実施例８、実施例９、実施例１０、比較例１、比較
例２で得られた各めっき導体配線層をフォトエッチング
プロセスにより幅１０ｍｍ、長さ７０ｍｍにパターン加
工し、めっき接着強度測定用サンプルを作製した。めっ
き接着強度の測定はＪＩＳ−Ｃ６４８１に基づいて行っ
た。すなわち、基板を固定し、引き剥がしためっき金属
の一端を引っ張り試験器のチャックに固定し、基板に対
して９０°方向の引き剥がし強度を測定したところ、実
施例１、実施例２、実施例３、実施例４、実施例５、実
施例６、実施例７、実施例８、実施例９、実施例１０、
の基板については１０００ｇ／ｃｍ以上の安定な接着強
度を示した。一方、比較例１，２の基板については１０
０ｇ／ｃｍ以上であった。<Evaluation of Plating Adhesion Strength> Examples 1, 2, 3, 4, 5, 6, 6, 7, 8, 9, 10, and 10 were compared. Each of the plated conductor wiring layers obtained in Example 1 and Comparative Example 2 was patterned into a width of 10 mm and a length of 70 mm by a photoetching process to prepare a sample for measuring the plating adhesion strength. The measurement of the plating adhesive strength was performed based on JIS-C6481. That is, when the substrate was fixed, one end of the peeled plated metal was fixed to a chuck of a tensile tester, and the peel strength in a 90 ° direction with respect to the substrate was measured. 3, Example 4, Example 5, Example 6, Example 7, Example 8, Example 9, Example 10,
The substrate showed a stable adhesive strength of 1000 g / cm or more. On the other hand, the substrates of Comparative Examples 1 and 2
It was 0 g / cm or more.
【００９５】また、実施例３、実施例４、実施例５、実
施例６において、スルフィドの替わりに、２−アミノピ
リミジン、１−アミノ−４−（２−ヒドロキシエチル）
ピペラジン、４−アミノチオフェノール、トリフェニル
ホスフィン、ヨウ素を用いて同様に実施したところ同様
な効果が見られた。In Examples 3, 4, 5, and 6, 2-aminopyrimidine and 1-amino-4- (2-hydroxyethyl) were used instead of sulfide.
The same effect was obtained when the same operation was performed using piperazine, 4-aminothiophenol, triphenylphosphine, and iodine.
【００９６】〈多層配線基板製造方法の実施形態例〉多
層配線基板製造方法の実施形態例を図７、図８にて説明
する。基板表面を酸化処理した０．５ｍｍ厚のシリコン
基板９上に、感光性を有する絶縁樹脂フォトニース（東
レ社製）をスピンコーターにて１０００ｒｐｍで塗布
し、８０℃、６０分、乾燥を行い、さらに、１８０℃、
３０分、２５０℃、３０分、４００℃、１時間でイミド
化を行い、約２０μｍ厚の絶縁樹脂層１を形成した（図
７（Ａ）参照）。<Embodiment of Multilayer Wiring Board Manufacturing Method> An embodiment of a multilayer wiring board manufacturing method will be described with reference to FIGS. On a 0.5 mm-thick silicon substrate 9 whose surface has been oxidized, a photosensitive insulating resin photonice (manufactured by Toray Industries, Inc.) is applied at 1000 rpm by a spin coater, and dried at 80 ° C. for 60 minutes. In addition, 180 ° C,
The imidization was performed for 30 minutes, 250 ° C., 30 minutes, and 400 ° C. for 1 hour to form an insulating resin layer 1 having a thickness of about 20 μm (see FIG. 7A).
【００９７】次いで、上記の実施例１〜１０の様に絶縁
樹脂層上に下地層４を形成した（図７（Ｂ）参照）。Next, the underlayer 4 was formed on the insulating resin layer as in Examples 1 to 10 (see FIG. 7B).
【００９８】めっきにて２０μｍ厚の導体配線層２を形
成した（図７（Ｃ）参照）。The conductor wiring layer 2 having a thickness of 20 μm was formed by plating (see FIG. 7C).
【００９９】次に、導体配線層状にフォトレジストを塗
布し露光、現像を行いエッチングを施すことによって導
体配線層を形成した（図７（Ｄ）参照）。導体幅精度は
５０μｍ±５μｍにおさまり、直線性も良好であった。Next, a photoresist was applied to the conductor wiring layer, exposed, developed, and etched to form a conductor wiring layer (see FIG. 7D). The conductor width accuracy was within 50 μm ± 5 μm, and the linearity was also good.
【０１００】次に、感光性を有する絶縁樹脂であるフォ
トニース（東レ社製）をスピンコートして１０００ｒｐ
ｍで塗布し、８０℃、６０分にてイミド化を行い、２０
μｍ厚の絶縁樹脂層を形成した（図７（Ｅ）参照）。Next, a photo-insulating photo-sensitive resin (made by Toray Industries, Inc.) was spin-coated at 1000 rpm.
m, and imidized at 80 ° C. for 60 minutes.
An insulating resin layer having a thickness of μm was formed (see FIG. 7E).
【０１０１】次に、絶縁樹脂層に所定のビアパターンを
有するマスクを介して、１ｋＷの超高圧水銀灯にて、２
００ｍＪ／ｃｍ2の露光量で露光を行い、専用現像液に
て、スプレー現像を行い、さらに、１８０℃、３０分、
さらに、２５０℃、３０分、さらに、４００℃（１時
間）のポストベークを行い、５０μｍ径のビアホール孔
１１を形成した（図７（Ｆ）参照）。Next, through a mask having a predetermined via pattern in the insulating resin layer, an ultrahigh-pressure mercury lamp of 1 kW
Exposure was performed at an exposure amount of 00 mJ / cm 2 , spray development was performed using a dedicated developer, and further performed at 180 ° C. for 30 minutes.
Further, post-baking was performed at 250 ° C. for 30 minutes and further at 400 ° C. (1 hour) to form a via hole hole 11 having a diameter of 50 μm (see FIG. 7F).
【０１０２】次いで、上記の実施例１〜１０の様に絶縁
樹脂層上に下地層４を形成した。その後、ビア孔に対し
てレーザー照射を行い、ビア孔底部の下地層を除去した
（図８（Ｇ）参照）。Next, the underlayer 4 was formed on the insulating resin layer as in Examples 1 to 10 described above. Thereafter, laser irradiation was performed on the via hole to remove the underlayer at the bottom of the via hole (see FIG. 8G).
【０１０３】次に、めっきを行い、２０μｍ厚の導体配
線層及びフィルドビア１２を形成した（図８（Ｈ）参
照）。Next, plating was performed to form a conductor wiring layer and a filled via 12 having a thickness of 20 μm (see FIG. 8H).
【０１０４】次に、導体配線層をフォトエッチング法に
よりパターン加工し、配線パターンを有する導体配線層
を形成した（図８（Ｉ）参照）。導体幅精度は２５μｍ
±３μｍにおさまり、直線性も良好であった。Next, the conductor wiring layer was patterned by photoetching to form a conductor wiring layer having a wiring pattern (see FIG. 8I). Conductor width accuracy is 25μm
It was within ± 3 μm, and the linearity was also good.
【０１０５】さらに、上記の操作を繰り返すことによ
り、複数の絶縁樹脂層と配線パターンを有する導体配線
層とが交互に積層された多層配線基板が得られた（図８
（Ｊ）参照）。Further, by repeating the above operation, a multilayer wiring board was obtained in which a plurality of insulating resin layers and conductor wiring layers having wiring patterns were alternately laminated (FIG. 8).
(J)).
【０１０６】[0106]
【発明の効果】本発明によれば、導体配線層が結合の強
固な下地層及び／または、第三の配位子を介して絶縁樹
脂層と結合するため、層間剥離が発生しない。According to the present invention, the conductive wiring layer is bonded to the insulating resin layer via the strongly bonded underlayer and / or the third ligand, so that delamination does not occur.
【０１０７】また、配線パターンを有する導体配線層の
配線幅のばらつきが小さく、配線パターンを有する導体
配線層との接着強度の良好な、信頼性の高い多層配線基
板が得られる。Further, a highly reliable multilayer wiring board having a small variation in the wiring width of the conductive wiring layer having the wiring pattern and having good adhesive strength with the conductive wiring layer having the wiring pattern can be obtained.
【０１０８】さらに、絶縁樹脂層を光配線であり、電気
配線では高周波電流が流れることでノイズ及び電磁波が
発生して周囲に悪影響を与えることにもなる信号を、光
に置き換えることで回避できる。Furthermore, the insulating resin layer is an optical wiring, and a signal that may cause noise and electromagnetic waves due to high-frequency current flowing through the electric wiring and adversely affect the surroundings can be avoided by replacing the signal with light.
【０１０９】[0109]
【図１】本発明に係わる多層配線基板の導体配線層、絶
縁樹脂層間を断面方向から表した説明図である。FIG. 1 is an explanatory diagram showing a conductor wiring layer and an insulating resin layer of a multilayer wiring board according to the present invention in a sectional direction.
【図２】本発明に係わる多層配線基板の導体配線層、絶
縁樹脂層間を断面方向から表した説明図である。FIG. 2 is an explanatory view showing a conductor wiring layer and an insulating resin layer of a multilayer wiring board according to the present invention in a sectional direction.
【図３】本発明に係わる多層配線基板の導体配線層、絶
縁樹脂層間を断面方向から表した説明図である。FIG. 3 is an explanatory view showing a conductor wiring layer and an insulating resin layer of a multilayer wiring board according to the present invention in a sectional direction.
【図４】本発明に係わる多層配線基板の導体配線層、絶
縁樹脂層間を断面方向から表した説明図である。FIG. 4 is an explanatory view showing a conductor wiring layer and an insulating resin layer of a multilayer wiring board according to the present invention in a sectional direction.
【図５】本発明に係わる多層配線基板の導体配線層、絶
縁樹脂層間を断面方向から表した説明図である。FIG. 5 is an explanatory view showing a conductor wiring layer and an insulating resin layer of a multilayer wiring board according to the present invention in a sectional direction.
【図６】本発明に係わる多層配線基板の導体配線層、絶
縁樹脂層間を断面方向から表した説明図である。FIG. 6 is an explanatory diagram showing a conductor wiring layer and an insulating resin layer of a multilayer wiring board according to the present invention in a sectional direction.
【図７】（Ａ）〜（Ｆ）は、本発明の実施形態例を示す
多層プリント配線板の構成及び製造工程を部分断面図で
表した説明図である。FIGS. 7A to 7F are explanatory views showing a configuration and a manufacturing process of a multilayer printed wiring board according to an embodiment of the present invention in a partial cross-sectional view.
【図８】（Ｇ）〜（Ｊ）は、本発明の実施形態例を示す
多層プリント配線板の構成及び製造工程を部分断面図で
表した説明図である。FIGS. 8G to 8J are explanatory views showing a configuration and a manufacturing process of a multilayer printed wiring board according to an embodiment of the present invention by partial cross-sectional views.
１…絶縁樹脂層（光導波路） ２…導体配線層、または導体配線層 ３…配位高分子錯体 ４…下地層 ５…第二の配位子 ６…下地層を形成する配位高分子錯体の金属 ７…第一の配位子 ８…第三の配位子 ９…無電解めっき １０…シリコン基板 １１…ビアホール孔 １２…フィルドビア DESCRIPTION OF SYMBOLS 1 ... Insulating resin layer (optical waveguide) 2 ... Conductor wiring layer or conductor wiring layer 3 ... Coordination polymer complex 4 ... Underlayer 5 ... Second ligand 6 ... Coordination polymer complex which forms an underlayer Metal 7 ... First ligand 8 ... Third ligand 9 ... Electroless plating 10 ... Silicon substrate 11 ... Via hole hole 12 ... Filled via
───────────────────────────────────────────────────── フロントページの続き (72)発明者 四井 健太 東京都台東区台東１丁目５番１号 凸版印 刷株式会社内 (72)発明者 佐々木 淳 東京都台東区台東１丁目５番１号 凸版印 刷株式会社内 (72)発明者 市川 浩二 東京都台東区台東１丁目５番１号 凸版印 刷株式会社内 Ｆターム(参考） 5E343 AA17 AA18 AA19 CC34 CC44 CC52 DD32 DD76 EE37 GG02 5E346 AA02 AA12 AA32 CC09 CC10 CC14 DD22 EE33 EE38 HH11 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Kenta Yotsui 1-5-1, Taito, Taito-ku, Tokyo Inside Toppan Printing Co., Ltd. (72) Inventor Jun Sasaki 1-1-5-1, Taito, Taito-ku, Tokyo Inside Toppan Printing Co., Ltd. (72) Koji Ichikawa, Inventor Koji Ichikawa 1-5-1, Taito, Taito-ku, Tokyo Toppan Printing Co., Ltd. F-term (reference) 5E343 AA17 AA18 AA19 CC34 CC44 CC52 DD32 DD76 EE37 GG02 5E346 AA02 AA12 AA32 CC09 CC10 CC14 DD22 EE33 EE38 HH11
Claims (16)
された多層配線基板において、前記絶縁樹脂層と導体配
線層間に配位高分子錯体を含む下地層を有することを特
徴とする多層配線基板。1. A multilayer wiring board having at least an insulating resin layer and a conductive wiring layer formed thereon, comprising a base layer containing a coordination polymer complex between the insulating resin layer and the conductive wiring layer. .
第一の配位子が存在し、第一の配位子と配位高分子錯体
中の金属が配位結合していることを特徴とする請求項１
記載の多層配線基板。2. The method according to claim 2, wherein the first ligand derived from the insulating resin layer is present on the surface of the insulating resin layer, and the first ligand and the metal in the coordination polymer complex are coordinated. Claim 1 characterized by the following:
The multilayer wiring board as described in the above.
い第三の配位子が存在し、第三の配位子と配位高分子錯
体中の金属が配位結合していることを特徴とする請求項
１記載の多層配線基板。3. A third ligand not derived from the insulating resin layer is present on the surface of the insulating resin layer, and the third ligand is coordinated with a metal in the coordination polymer complex. The multilayer wiring board according to claim 1, wherein:
合物を含むことを特徴とする請求項１〜３の何れかに記
載の多層配線基板。4. The multilayer wiring board according to claim 1, wherein the coordination polymer complex contains a compound having a second ligand.
された多層配線基板において、前記絶縁樹脂層と導体配
線層間に絶縁樹脂層に由来しない第三の配位子を含む下
地層を有することを特徴とする多層配線基板。5. A multilayer wiring board on which at least an insulating resin layer and a conductive wiring layer are formed, wherein a base layer containing a third ligand not derived from the insulating resin layer is provided between the insulating resin layer and the conductive wiring layer. A multilayer wiring board characterized by the above-mentioned.
基、またはアミド基、を含むことを特徴とする請求項２
に記載の多層配線基板。6. The method according to claim 2, wherein the first ligand contains at least a carboxyl group or an amide group.
2. The multilayer wiring board according to item 1.
原子、硫黄原子、リン原子、ハロゲン原子を含むことを
特徴とする請求項３、５に記載の多層配線基板。7. The multilayer wiring board according to claim 3, wherein the third ligand contains at least a nitrogen atom, an oxygen atom, a sulfur atom, a phosphorus atom, and a halogen atom.
部分を２つ以上有することを特徴とする請求項４に記載
の多層配線基板。8. The multilayer wiring board according to claim 4, wherein the second ligand has at least two portions coordinated with a metal.
徴とする請求項１〜８の何れかに記載の多層配線基板。9. The multilayer wiring board according to claim 1, wherein said insulating resin layer is made of polyimide.
脂であることを特徴とする請求項１〜８の何れかに記載
の多層配線基板。10. The multilayer wiring board according to claim 1, wherein said insulating resin layer is a resin containing a fluorine atom.
ることを特徴とする請求項１〜８の何れかに記載の多層
配線基板。11. The multilayer wiring board according to claim 1, wherein said insulating resin layer is made of fluorinated polyimide.
アミド基とカルボキシル基を形成する工程、 第二の配位子を有する化合物と金属を交互に作用させて
下地層を形成する工程、 導体配線層を形成する工程、を有することを特徴とする
多層配線基板の製造方法。12. A method for manufacturing a multilayer wiring board, comprising the steps of: opening an imide ring in an insulating resin layer to form an amide group and a carboxyl group as a first ligand; A method for manufacturing a multilayer wiring board, comprising: a step of forming a base layer by alternately acting a compound having a metal and a metal; and a step of forming a conductor wiring layer.
アミド基とカルボキシル基を形成する工程、 第三の配位子を付加または縮合させる工程、 第三の配位子に金属を配位させる工程、 導体配線層を形成する工程、を有することを特徴とする
多層配線基板の製造方法。13. A method for manufacturing a multilayer wiring board, comprising the steps of: opening an imide ring in an insulating resin layer to form an amide group and a carboxyl group as a first ligand; A step of adding or condensing a child, a step of coordinating a metal to a third ligand, and a step of forming a conductor wiring layer.
アミド基とカルボキシル基を形成する工程、 第三の配位子を付加または縮合させる工程、 第二の配位子を有する化合物と金属を交互に作用させて
下地層を形成する工程、 導体配線層を形成する工程、を有することを特徴とする
多層配線基板の製造方法。14. A method for manufacturing a multilayer wiring board, comprising the steps of: opening an imide ring in an insulating resin layer to form an amide group and a carboxyl group as a first ligand; A step of adding or condensing a child, a step of forming a base layer by alternately acting a compound having a second ligand and a metal, and a step of forming a conductor wiring layer. Manufacturing method.
シル基を形成する工程、 ラジカル発生剤と光または熱を作用させてラジカルを形
成する工程、 該ラジカルから第三の配位子を有するモノマーを重合さ
せる工程、 該モノマー上の第三の配位子に金属を配位させる工程、 導体配線層を形成する工程、を有することを特徴とする
多層配線基板の製造方法。15. A method for manufacturing a multilayer wiring board, comprising the steps of: opening an imide ring in an insulating resin layer to form an amide group and a carboxyl group; Forming, a step of polymerizing a monomer having a third ligand from the radical, a step of coordinating a metal to the third ligand on the monomer, and a step of forming a conductor wiring layer A method for manufacturing a multilayer wiring board, comprising:
シル基を形成する工程、 ラジカル発生剤と光または熱を作用させてラジカルを形
成する工程、 該ラジカルから第三の配位子を有するモノマーを重合さ
せる工程、 該モノマー上の第三の配位子に第二の配位子を有する化
合物と金属を交互に作用させて下地層を形成する工程、 導体配線層を形成する工程、を有することを特徴とする
多層配線基板の製造方法。16. A method for manufacturing a multilayer wiring board, comprising: a step of opening an imide ring in an insulating resin layer to form an amide group and a carboxyl group; Forming, a step of polymerizing a monomer having a third ligand from the radical, a step of causing a compound having a second ligand and a metal to act alternately on the third ligand on the monomer. A method for manufacturing a multilayer wiring board, comprising: forming a ground layer; and forming a conductor wiring layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001095202A JP4826020B2 (en) | 2000-03-29 | 2001-03-29 | Manufacturing method of multilayer wiring board |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000091205 | 2000-03-29 | ||
| JP2000-91205 | 2000-03-29 | ||
| JP2000091205 | 2000-03-29 | ||
| JP2001095202A JP4826020B2 (en) | 2000-03-29 | 2001-03-29 | Manufacturing method of multilayer wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001345554A true JP2001345554A (en) | 2001-12-14 |
| JP4826020B2 JP4826020B2 (en) | 2011-11-30 |
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|---|---|---|---|
| JP2001095202A Expired - Fee Related JP4826020B2 (en) | 2000-03-29 | 2001-03-29 | Manufacturing method of multilayer wiring board |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003024174A1 (en) * | 2001-09-05 | 2003-03-20 | Zeon Corporation | Mulitilayer circuit board, resin base material, and its production method |
| WO2004080141A1 (en) * | 2003-03-04 | 2004-09-16 | Zeon Corporation | Process for producing multilayer printed wiring board and multilayer printed wiring board |
| JP2005336129A (en) * | 2004-05-28 | 2005-12-08 | Nippon Steel Corp | Method for controlling characteristic of polymer complex |
| WO2010073816A1 (en) * | 2008-12-26 | 2010-07-01 | 富士フイルム株式会社 | Method for producing multilayer wiring substrate |
| WO2010073882A1 (en) * | 2008-12-26 | 2010-07-01 | 富士フイルム株式会社 | Method for producing multilayer wiring substrate |
| US8494379B2 (en) | 2008-01-09 | 2013-07-23 | Samsung Electronics Co., Ltd. | Image forming apparatus with toner cartridge authentication |
| US9615465B2 (en) | 2010-09-30 | 2017-04-04 | Zeon Corporation | Method of production of multilayer circuit board |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05202483A (en) * | 1991-04-25 | 1993-08-10 | Shipley Co Inc | Method and composition for electroless metallization |
| JPH09214140A (en) * | 1995-11-29 | 1997-08-15 | Toppan Printing Co Ltd | Multilayered printed wiring board and its manufacture |
| JP2001068856A (en) * | 1999-06-22 | 2001-03-16 | Asahi Chem Ind Co Ltd | Insulation resin sheet and its manufacture |
-
2001
- 2001-03-29 JP JP2001095202A patent/JP4826020B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05202483A (en) * | 1991-04-25 | 1993-08-10 | Shipley Co Inc | Method and composition for electroless metallization |
| JPH09214140A (en) * | 1995-11-29 | 1997-08-15 | Toppan Printing Co Ltd | Multilayered printed wiring board and its manufacture |
| JP2001068856A (en) * | 1999-06-22 | 2001-03-16 | Asahi Chem Ind Co Ltd | Insulation resin sheet and its manufacture |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003024174A1 (en) * | 2001-09-05 | 2003-03-20 | Zeon Corporation | Mulitilayer circuit board, resin base material, and its production method |
| US7614145B2 (en) | 2001-09-05 | 2009-11-10 | Zeon Corporation | Method for manufacturing multilayer circuit board and resin base material |
| WO2004080141A1 (en) * | 2003-03-04 | 2004-09-16 | Zeon Corporation | Process for producing multilayer printed wiring board and multilayer printed wiring board |
| US7661190B2 (en) | 2003-03-04 | 2010-02-16 | Zeon Corporation | Process for producing multilayer printed wiring board |
| KR101018944B1 (en) * | 2003-03-04 | 2011-03-02 | 니폰 제온 가부시키가이샤 | Process for producing multilayer printed wiring board and multilayer printed wiring board |
| JP2005336129A (en) * | 2004-05-28 | 2005-12-08 | Nippon Steel Corp | Method for controlling characteristic of polymer complex |
| US8494379B2 (en) | 2008-01-09 | 2013-07-23 | Samsung Electronics Co., Ltd. | Image forming apparatus with toner cartridge authentication |
| WO2010073816A1 (en) * | 2008-12-26 | 2010-07-01 | 富士フイルム株式会社 | Method for producing multilayer wiring substrate |
| WO2010073882A1 (en) * | 2008-12-26 | 2010-07-01 | 富士フイルム株式会社 | Method for producing multilayer wiring substrate |
| JP2010157589A (en) * | 2008-12-26 | 2010-07-15 | Fujifilm Corp | Method for forming multilayer wiring substrate |
| US20110247865A1 (en) * | 2008-12-26 | 2011-10-13 | Fujifilm Corporation | Method for producing multilayer wiring substrate and multilayer wiring substrate |
| US9615465B2 (en) | 2010-09-30 | 2017-04-04 | Zeon Corporation | Method of production of multilayer circuit board |
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