JP2001308498A - Circuit board - Google Patents

Circuit board

Info

Publication number
JP2001308498A
JP2001308498A JP2000124681A JP2000124681A JP2001308498A JP 2001308498 A JP2001308498 A JP 2001308498A JP 2000124681 A JP2000124681 A JP 2000124681A JP 2000124681 A JP2000124681 A JP 2000124681A JP 2001308498 A JP2001308498 A JP 2001308498A
Authority
JP
Japan
Prior art keywords
plating layer
nickel
layer
boron
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000124681A
Other languages
Japanese (ja)
Inventor
Hiroshi Tsukamoto
弘志 塚本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000124681A priority Critical patent/JP2001308498A/en
Publication of JP2001308498A publication Critical patent/JP2001308498A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15174Fan-out arrangement of the internal vias in different layers of the multilayer substrate

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve a problem of forming a fleck-like stain due to an exudation of a plating solution to a surface of a gold plated layer by retaining the solution in a pinhole or a void formed in a nickel plating layer of a substrate. SOLUTION: A circuit board 4 comprises a wiring layer 2 connected to an electrode of an electronic component 3 via a solder ball 5. In this case, a nickel- boron plating layer 6, a high purity nickel plating layer 7 containing a nickel of a content of 99.9 wt.% or more, and a gold plating layer 8 sequentially coat a surface of the layer 2 of an area to be connected to the electrode of the component 3 via the ball 5.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子や容量
素子、抵抗器等の電子部品が搭載される配線基板に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board on which electronic components such as a semiconductor element, a capacitor, and a resistor are mounted.

【0002】[0002]

【従来の技術】従来、半導体素子や容量素子、抵抗器等
の電子部品が搭載される配線基板は、一般に、酸化アル
ミニウム質焼結体から成る絶縁基体と、該絶縁基体の上
面から下面にかけて形成されたタングステン、モリブデ
ン等の高融点金属材料から成る複数個の配線層とから構
成されており、絶縁基体の上面に半導体素子や容量素
子、抵抗器等の電子部品を搭載するとともに該電子部品
の各電極を配線層に半田を介して電気的に接続するよう
になっている。
2. Description of the Related Art Conventionally, a wiring board on which electronic components such as a semiconductor element, a capacitor element, and a resistor are mounted is generally formed of an insulating base made of an aluminum oxide sintered body and an upper surface to a lower surface of the insulating base. And a plurality of wiring layers made of a refractory metal material such as tungsten, molybdenum, etc., and electronic components such as semiconductor elements, capacitance elements, and resistors are mounted on the upper surface of the insulating base and Each electrode is electrically connected to a wiring layer via solder.

【0003】かかる配線基板は、配線層の絶縁基体下面
に導出されている部位を外部電気回路基板の配線導体に
半田等を介し接続することによって外部電気回路基板上
に実装され、同時に配線基板に搭載されている電子部品
の各電極が所定の外部電気回路に電気的に接続されるこ
ととなる。
[0003] Such a wiring board is mounted on the external electric circuit board by connecting a portion of the wiring layer extending to the lower surface of the insulating base to a wiring conductor of the external electric circuit board via solder or the like, and at the same time, is mounted on the wiring board. Each electrode of the mounted electronic component is electrically connected to a predetermined external electric circuit.

【0004】なお、上述の配線基板は配線層の少なくと
も電子部品が半田を介して接続される領域にニッケルめ
っき層と金めっき層が順次被着されており、該ニッケル
めっき層によってタングステン等の高融点金属材料から
成る配線層に対する半田の接合を良好とし、金めっき層
によってニッケルめっき層表面にニッケルの酸化物が形
成されて半田接合性等が劣化するのを防止している。
In the above-described wiring board, a nickel plating layer and a gold plating layer are sequentially deposited on at least a region of the wiring layer to which electronic components are connected via solder, and the nickel plating layer forms a high plating layer of tungsten or the like. The bonding of the solder to the wiring layer made of the melting point metal material is improved, and the gold plating layer prevents the formation of a nickel oxide on the surface of the nickel plating layer to prevent the deterioration of the solder bonding property and the like.

【0005】また前記ニッケルめっき層及び金めっき層
を被着させる方法としては、配線基板の小型化に伴なう
配線層の高密度化によってめっき電力供給用の引き出し
線の形成が困難なことから、無電解法が多用されつつあ
る。
The method of applying the nickel plating layer and the gold plating layer is based on the fact that it is difficult to form lead wires for supplying power for plating due to the densification of the wiring layer accompanying the miniaturization of the wiring board. The electroless method is being used frequently.

【0006】更に前記無電解法によりニッケルめっき層
を被着させる場合、無電解ニッケルめっき液として一般
に、硫酸ニッケル等のニッケル化合物と、ジメチルアミ
ンボラン等のホウ素系還元剤、または次亜リン酸ナトリ
ウム等のリン系還元剤とを主成分とする水溶液に錯化
剤、pH緩衝剤、安定剤等を添加して成る無電解ニッケ
ルめっき液が用いられ、被着形成されたニッケルめっき
層は、還元剤の分解生成物であるホウ素またはリンを数
重量%含有する、ニッケル−ホウ素合金またはニッケル
−リン合金となっている。
Further, when the nickel plating layer is applied by the electroless method, a nickel compound such as nickel sulfate, a boron-based reducing agent such as dimethylamine borane, or sodium hypophosphite is generally used as the electroless nickel plating solution. An electroless nickel plating solution obtained by adding a complexing agent, a pH buffering agent, a stabilizer, etc. to an aqueous solution mainly containing a phosphorus-based reducing agent such as is used, and the formed nickel plating layer is reduced. It is a nickel-boron alloy or a nickel-phosphorus alloy containing several weight% of boron or phosphorus which is a decomposition product of the agent.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、この従
来の配線基板においては、配線層上の電子部品が半田を
介して接続される領域にニッケル−リン合金からなるニ
ッケルめっき層を被着させた場合、該ニッケル−リン合
金のリン成分は不活性であること及びタングステンやモ
リブデン等の高融点金属材料から成る配線層の表面が粗
面であること等から配線層の表面全面にニッケル−リン
合金から成るニッケルめっき層を均一に被着させること
ができず、多数のピンホール(小穴)やボイド(小空
隙)を有したものとなっており、その結果、ピンホール
やボイド内にめっき液が残留し易く、ピンホールやボイ
ド内にめっき液が残留しているとこれが電子部品を配線
層に半田を介して接続させる際の熱によって金めっき層
上にしみ出し、斑点状のしみを形成して外観不良を生じ
るという重大な欠点を有する。
However, in this conventional wiring board, when a nickel plating layer made of a nickel-phosphorus alloy is applied to a region on the wiring layer where electronic components are connected via solder. Since the phosphorus component of the nickel-phosphorus alloy is inactive and the surface of the wiring layer made of a refractory metal material such as tungsten and molybdenum is rough, the entire surface of the wiring layer is made of nickel-phosphorus alloy. The nickel plating layer cannot be uniformly deposited, and has many pinholes (small holes) and voids (small voids). As a result, the plating solution remains in the pinholes and voids. If the plating solution remains in the pinholes and voids, it will seep out onto the gold plating layer due to the heat when connecting the electronic component to the wiring layer via solder, and spots It has significant disadvantage results in poor appearance and form stains.

【0008】また配線層上にニッケル−ホウ素合金から
成るニッケルめっき層を被着させた場合、ニッケル−ホ
ウ素合金から成るニッケルめっき層は無電解金めっき浴
中に溶出し易く、ニッケルめっき層と金めっき層との間
にボイドが残留し易いこと及びニッケル−ホウ素合金の
熱膨張係数が金の熱膨張係数に対し大きく相異すること
等からニッケル−ホウ素合金から成るニッケルめっき層
と金めっき層の両方に電子部品を配線層に半田を介して
接続させる際等の熱が作用するとニッケル−ホウ素合金
から成るニッケルめっき層と金めっき層との間に両者の
熱膨張係数の相異に起因して発生する応力によって剥離
やフクレが生じ、これによって配線層上に電子部品を半
田を介して強固に取着することができないという欠点を
有していた。
When a nickel plating layer made of a nickel-boron alloy is applied on the wiring layer, the nickel plating layer made of the nickel-boron alloy is easily eluted into an electroless gold plating bath, and the nickel plating layer and the gold Since the voids tend to remain between the plating layer and the thermal expansion coefficient of the nickel-boron alloy differ greatly from the thermal expansion coefficient of gold, etc. When heat is applied to connect the electronic components to the wiring layer via solder on both, a difference in the thermal expansion coefficient between the nickel plating layer and the gold plating layer made of a nickel-boron alloy occurs due to the difference between the two. The generated stress causes peeling or blistering, and thus has a disadvantage that the electronic component cannot be firmly attached to the wiring layer via solder.

【0009】本発明は上記欠点に鑑み案出されたもので
その目的は、斑点状のしみの発生による外観不良や金め
っき層とニッケルめっき層との間に剥離やフクレが発生
するのを有効に防止し、配線層に電子部品を半田を介し
て強固に取着することができる配線基板を提供すること
にある。
The present invention has been devised in view of the above-mentioned drawbacks, and has as its object to effectively prevent poor appearance due to occurrence of spot-like spots and occurrence of peeling or blistering between a gold plating layer and a nickel plating layer. Another object of the present invention is to provide a wiring board that can securely attach electronic components to a wiring layer via solder.

【0010】[0010]

【課題を解決するための手段】本発明の配線基板は、電
子部品の電極が半田を介して接続される配線層を有する
配線基板であって、前記配線層のうち少なくとも電子部
品の電極が半田を介して接続される領域の表面に、ニッ
ケル−ホウ素めっき層、ニッケルの含有率が99.9重
量%以上の高純度ニッケルめっき層、金めっき層を順次
被着させたことを特徴とするものである。
According to the present invention, there is provided a wiring board having a wiring layer to which electrodes of an electronic component are connected via solder, wherein at least an electrode of the electronic component of the wiring layer has a solder layer. A nickel-boron plating layer, a high-purity nickel plating layer having a nickel content of 99.9% by weight or more, and a gold plating layer sequentially deposited on the surface of the region connected via It is.

【0011】また本発明の配線基板は、前記高純度ニッ
ケルめっき層の厚さが0.5μm〜5μmであることを
特徴とするものである。
In the wiring board according to the present invention, the high-purity nickel plating layer has a thickness of 0.5 μm to 5 μm.

【0012】本発明の配線基板によれば、配線層のうち
少なくとも電子部品の電極が半田を介して接続される領
域の表面に、ニッケル−ホウ素めっき層、ニッケルの含
有率が99.9重量%以上の高純度ニッケルめっき層、
金めっき層を順次被着させ、配線層の表面に直接、触媒
活性の強いホウ素を含有するニッケル−ホウ素めっき層
を被着させたことから配線層にニッケル−ホウ素めっき
層をピンホールやボイド等を生じることなく表面を極め
て平滑として均一厚みに、かつ強固に被着させることが
でき、またニッケル−ホウ素めっき層上に、該ニッケル
−ホウ素めっき層との密着性が良好で、かつ無電解金め
っき浴に溶解し難く金めっき層との界面にボイドを生じ
難く、さらに熱膨張係数が金めっき層に近似する高純度
ニッケルめっき層を被着させたことから、ニッケル−ホ
ウ素めっき層上に間に高純度ニッケルめっき層を介して
金めっき層を強固に被着させることができ、さらに高純
度ニッケルめっき層上に耐蝕性に優れ、かつ半田との濡
れ性に優れる金めっき層を被着させたことからニッケル
−ホウ素めっき層及び高純度ニッケルめっき層が酸化腐
蝕するのを有効に防止することができるとともに半田を
強固に接合させることができ、これによって配線基板の
配線層に斑点状のしみやフクレが発生するのを有効に防
止することができるとともに配線層に電子部品の電極を
半田を介して極めて強固に接続することが可能となる。
According to the wiring board of the present invention, the nickel-boron plating layer and the nickel content of 99.9% by weight are formed on the surface of at least the region of the wiring layer where the electrodes of the electronic components are connected via solder. Above high purity nickel plating layer,
A gold-plated layer was sequentially deposited, and a nickel-boron-plated layer containing boron having strong catalytic activity was directly deposited on the surface of the wiring layer. The surface can be extremely smooth and uniform in thickness, and can be firmly adhered to the nickel-boron plating layer. It is difficult to dissolve in the plating bath and hardly generates voids at the interface with the gold plating layer. Furthermore, since a high-purity nickel plating layer whose thermal expansion coefficient is close to that of the gold plating layer is applied, an intermediate layer is formed on the nickel-boron plating layer. A gold metal that can firmly adhere a gold plating layer via a high-purity nickel plating layer, and has excellent corrosion resistance and excellent wettability with solder on the high-purity nickel plating layer The nickel layer can be effectively prevented from being oxidized and corroded by the nickel-boron plating layer and the high-purity nickel plating layer, and the solder can be firmly joined. It is possible to effectively prevent spot-like spots and blisters from being generated on the layer, and it is possible to connect the electrodes of the electronic component to the wiring layer very firmly via solder.

【0013】 〔発明の詳細な説明〕次に、本発明を添付図面に基づき
詳細に説明する。図1は、本発明の配線基板を半導体素
子を収容する半導体素子収納用パッケージに適用した場
合の一実施例を示し、1は絶縁基体、2は配線層であ
る。この絶縁基体1と配線層2とで半導体素子3を搭載
するための配線基板4が形成される。
DETAILED DESCRIPTION OF THE INVENTION Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment in which the wiring board of the present invention is applied to a semiconductor element housing package for housing a semiconductor element, wherein 1 is an insulating base, and 2 is a wiring layer. The insulating substrate 1 and the wiring layer 2 form a wiring board 4 on which the semiconductor element 3 is mounted.

【0014】前記絶縁基体1は、酸化アルミニウム質焼
結体、窒化アルミニウム質焼結体、ムライト質焼結体、
炭化珪素質焼結体、ガラスセラミック焼結体等の電気絶
縁材料から成り、その上面に半導体素子3を搭載する搭
載部を有し、該搭載部表面に露出した配線層2に半導体
素子3の電極が錫・鉛半田等の半田ボール5を介して接
続される。
The insulating substrate 1 is made of an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body,
It is made of an electrically insulating material such as a silicon carbide sintered body or a glass ceramic sintered body, and has a mounting portion for mounting the semiconductor element 3 on the upper surface thereof. The electrodes are connected via solder balls 5 such as tin / lead solder.

【0015】前記絶縁基体1は、例えば、酸化アルミニ
ウム質焼結体から成る場合には、酸化アルミニウム、酸
化珪素、酸化カルシウム、酸化マグネシウム等の原料粉
末に適当な有機バインダー、溶剤を添加混合して泥漿状
のセラミックスラリーとなすとともに該セラミックスラ
リーを従来周知のドクターブレード法やカレンダーロー
ル法等のシート成形技術を採用しシート状となすことに
よってセラミックグリーンシート(セラミック生シー
ト)を得、しかる後、前記セラミックグリーンシートを
切断加工や打ち抜き加工により適当な形状とするととも
にこれを複数枚積層し、最後に前記積層されたセラミッ
クグリーンシートを還元雰囲気中、約1600℃の温度
で焼成することによって製作される。
When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, an appropriate organic binder and a solvent are added to and mixed with raw material powders of aluminum oxide, silicon oxide, calcium oxide, magnesium oxide and the like. A ceramic green sheet (ceramic green sheet) is obtained by forming a slurry-like ceramic slurry and forming the ceramic slurry into a sheet by employing a sheet forming technique such as a doctor blade method or a calender roll method which is well known in the art. The ceramic green sheet is manufactured by cutting and punching into an appropriate shape, laminating a plurality of the sheets, and finally firing the laminated ceramic green sheet at a temperature of about 1600 ° C. in a reducing atmosphere. You.

【0016】また前記絶縁基体1は、その上面の半導体
素子3が搭載される搭載部から下面にかけて多数の配線
層2が被着形成されており、該配線層2の搭載部に露出
した部位には半導体素子3の各電極が半田ボール5を介
して電気的に接続され、また絶縁基体1の下面に導出さ
れた部位には外部電気回路基板の配線導体が半田等を介
して電気的に接続される。
The insulating substrate 1 has a large number of wiring layers 2 formed on the upper surface thereof from the mounting portion on which the semiconductor element 3 is mounted to the lower surface. The electrodes of the semiconductor element 3 are electrically connected via solder balls 5, and a wiring conductor of an external electric circuit board is electrically connected to a portion led out to the lower surface of the insulating base 1 via solder or the like. Is done.

【0017】前記配線層2は、搭載される半導体素子3
の各電極を外部電気回路に接続する作用をなし、例え
ば、タングステン、モリブデン、マンガン等の高融点金
属粉末から成り、タングステン等の高融点金属粉末に適
当な有機バインダーや溶剤を添加混合して得た金属ペー
ストを絶縁基体1となるセラミックグリーンシートに予
め従来周知のスクリーン印刷法により所定パターンに印
刷塗布しておくことによって絶縁基体1の半導体素子3
が搭載される搭載部から下面にかけて被着される。
The wiring layer 2 has a semiconductor element 3 mounted thereon.
A function of connecting each electrode to an external electric circuit, for example, made of a refractory metal powder such as tungsten, molybdenum, and manganese, and obtained by adding a suitable organic binder or solvent to the refractory metal powder such as tungsten and mixing. The metal paste is applied to a ceramic green sheet serving as the insulating substrate 1 in a predetermined pattern by a well-known screen printing method in advance, so that the semiconductor element 3 of the insulating substrate 1 is formed.
Is attached from the mounting portion on which the is mounted to the lower surface.

【0018】前記配線層2は図2に示すように、少なく
とも半導体素子3の電極が半田ボール5を介して接続さ
れる領域に、ニッケル−ホウ素めっき層6、高純度ニッ
ケルめっき層7及び金めっき層8が順次被着されてい
る。
As shown in FIG. 2, the wiring layer 2 has a nickel-boron plating layer 6, a high-purity nickel plating layer 7, and a gold plating layer at least in regions where electrodes of the semiconductor element 3 are connected via solder balls 5. Layers 8 are applied sequentially.

【0019】前記ニッケル−ホウ素めっき層6は、配線
層2に高純度ニッケルめっき層7および金めっき層8を
密着性良く被着させる下地金属層として作用する。
The nickel-boron plating layer 6 functions as a base metal layer that adheres the high-purity nickel plating layer 7 and the gold plating layer 8 to the wiring layer 2 with good adhesion.

【0020】前記ニッケル−ホウ素めっき層6は、硫酸
ニッケル等のニッケル化合物とホウ素系還元剤、例えば
水素化ホウ素ナトリウムやジメチルアミンボラン等を含
む無電解ニッケルめっき浴を用いた無電解めっき法によ
り配線層2の表面に所定厚みに被着される。この場合、
前記ニッケル−ホウ素めっき層6はその内部に触媒活性
の強いホウ素を含有することから配線層2の表面が粗面
であるとしてもニッケル−ホウ素めっき層6にピンホー
ルやボイド等が形成されることはなく、同時に表面を極
めて平滑として均一厚みに、かつ強固に被着させること
ができる。
The nickel-boron plating layer 6 is formed by electroless plating using an electroless nickel plating bath containing a nickel compound such as nickel sulfate and a boron-based reducing agent such as sodium borohydride and dimethylamine borane. A predetermined thickness is applied to the surface of the layer 2. in this case,
Since the nickel-boron plating layer 6 contains boron having strong catalytic activity therein, pinholes and voids are formed in the nickel-boron plating layer 6 even if the surface of the wiring layer 2 is rough. However, at the same time, the surface can be made extremely smooth and a uniform thickness can be firmly applied.

【0021】なお、前記ニッケル−ホウ素めっき層6
は、ホウ素の含有量が0.05重量%未満の少ないもの
となるとニッケル−ホウ素めっき層6の耐蝕性が劣化し
て酸化し易くなる傾向にあり、また3重量%を超えると
電気抵抗が上昇し、配線基板としての特性が劣化してし
まう傾向にある。従って、前記ニッケル−ホウ素めっき
層6は、そのホウ素の含有量を0.05重量%〜3重量
%の範囲としておくことが好ましい。
The nickel-boron plating layer 6
When the content of boron is as low as less than 0.05% by weight, the corrosion resistance of the nickel-boron plating layer 6 tends to be deteriorated and oxidized easily, and when it exceeds 3% by weight, the electric resistance increases. However, the characteristics as a wiring board tend to deteriorate. Therefore, the nickel-boron plating layer 6 preferably has a boron content in the range of 0.05% by weight to 3% by weight.

【0022】また前記ニッケル−ホウ素めっき層6は、
その厚さが1μm未満の薄いものになるとニッケル−ホ
ウ素めっき層6を粗面な配線層2に表面を極めて平滑と
して均一厚みに被着させるのが困難となってしまう傾向
にあり、また8μmを超えると内部応力が大きくなって
配線層2にニッケル−ホウ素めっき層6を強固に被着さ
せることが困難となってしまう。従って、前記ニッケル
−ホウ素めっき層6は、その厚さを1μm〜8μmの範
囲としておくことが好ましい。
The nickel-boron plating layer 6 is
When the thickness is thinner than 1 μm, it becomes difficult to apply the nickel-boron plating layer 6 to the rough wiring layer 2 to make the surface extremely smooth and to apply a uniform thickness. If it exceeds, the internal stress increases, and it becomes difficult to firmly apply the nickel-boron plating layer 6 to the wiring layer 2. Therefore, it is preferable that the nickel-boron plating layer 6 has a thickness in the range of 1 μm to 8 μm.

【0023】さらに前記ニッケル−ホウ素めっき層6上
には、ニッケルの含有率が99.9重量%以上の高純度
ニッケルめっき層7が所定厚みに被着されており、該高
純度ニッケルめっき層7はニッケル−ホウ素めっき層6
に金めっき層8を強固に被着接合させる作用をなす。
Further, a high-purity nickel plating layer 7 having a nickel content of 99.9% by weight or more is coated on the nickel-boron plating layer 6 to a predetermined thickness. Is the nickel-boron plating layer 6
In this case, the gold plating layer 8 is firmly adhered and bonded.

【0024】前記高純度ニッケルめっき層7は、例え
ば、酢酸ニッケル、塩化ニッケル等のニッケル化合物
と、ヒドラジン、ホルマリン等の、ニッケルめっき層中
に共析する成分を含有しない還元剤とを主成分とし、ク
エン酸、エチレンジアミン四酢酸(EDTA)またはこ
れらのナトリウム、カリウム塩等の錯化剤、ホウ酸等の
pH緩衝剤、サッカリン等の安定剤を添加して成る無電
解高純度ニッケルめっき浴を用いた無電解めっき法によ
りニッケル−ホウ素めっき層6上に被着される。この場
合、下地のニッケル−ホウ素めっき層6は表面が極めて
平滑であること、高純度ニッケルめっき層7はニッケル
−ホウ素めっき層6に対し密着性が良いことから高純度
ニッケルめっき層7をニッケル−ホウ素めっき層6表面
にピンホールやボイド等を形成することなく均一厚み
に、かつ強固に被着させることができる。
The high-purity nickel plating layer 7 comprises, as main components, a nickel compound such as nickel acetate and nickel chloride, and a reducing agent such as hydrazine and formalin which does not contain a component which is eutectoid in the nickel plating layer. Uses an electroless high-purity nickel plating bath containing a complexing agent such as acetic acid, citric acid, ethylenediaminetetraacetic acid (EDTA) or their sodium and potassium salts, a pH buffer such as boric acid, and a stabilizer such as saccharin. It is deposited on the nickel-boron plating layer 6 by the used electroless plating method. In this case, the underlying nickel-boron plating layer 6 has an extremely smooth surface, and the high-purity nickel plating layer 7 has good adhesion to the nickel-boron plating layer 6. A uniform thickness and firm attachment can be achieved without forming pinholes or voids on the surface of the boron plating layer 6.

【0025】また、前記高純度ニッケルめっき層7は熱
膨張係数が約13×10-6/℃であり、金めっき層8の
熱膨張係数(約14×10-6/℃)に近似することから
電子部品を配線層2に半田ボール5を介して接続させる
際等に熱が作用したとしても高純度ニッケルめっき層7
と金めっき層8との間には大きな熱応力が生じることは
なく、その結果、金めっき層8に剥離やフクレが生じる
ことを有効に防止することができるとともに配線層2上
に電子部品を半田ボール5を介して強固に取着すること
ができる。
The high-purity nickel plating layer 7 has a thermal expansion coefficient of about 13 × 10 −6 / ° C., which is close to that of the gold plating layer 8 (about 14 × 10 −6 / ° C.). Even when heat is applied when the electronic component is connected to the wiring layer 2 via the solder balls 5, the high-purity nickel plating layer 7
No large thermal stress is generated between the metal layer 8 and the gold plating layer 8. As a result, peeling or blistering of the gold plating layer 8 can be effectively prevented, and the electronic component is placed on the wiring layer 2. It can be firmly attached via the solder balls 5.

【0026】なお、前記高純度ニッケルめっき層7は、
ニッケルの含有率が99.9重量%未満となると共析成
分の作用によりニッケルめっき層を形成しているニッケ
ル結晶の粒径が20nm未満の非常に小さいものとなる
とともに結晶粒界が急激に増加して粒界に沿ってニッケ
ル(原子)が移動拡散し易くなり、その結果、半導体素
子3の電極を半田ボ―ル5を介して配線層2に接続する
際等において高純度ニッケルめっき層7に熱が印加され
ると該高純度ニッケルめっき層7のニッケルが金めっき
層8表面にまで移動拡散するとともにこれが酸化されて
酸化ニッケル層を形成し、この酸化ニッケル層によって
電子部品を配線層2に半田ボール5を介して強固に接続
することができなくなってしまう。従って、前記高純度
ニッケルめっき層7は、ニッケルの含有率が99.9重
量以上に特定される。
The high-purity nickel plating layer 7 is
When the nickel content is less than 99.9% by weight, the particle size of the nickel crystal forming the nickel plating layer becomes very small, less than 20 nm, and the crystal grain boundaries increase rapidly due to the effect of the eutectoid component. As a result, nickel (atoms) move and diffuse easily along the grain boundaries. As a result, when the electrodes of the semiconductor element 3 are connected to the wiring layer 2 via the solder balls 5, the high purity nickel plating layer 7 is formed. When heat is applied to the substrate, nickel of the high-purity nickel plating layer 7 moves and diffuses to the surface of the gold plating layer 8 and is oxidized to form a nickel oxide layer. Cannot be firmly connected via the solder ball 5. Therefore, the nickel content of the high-purity nickel plating layer 7 is specified to be 99.9% by weight or more.

【0027】また、前記高純度ニッケルめっき層7は、
その厚みが0.5μm未満の薄いものとなった場合、ニ
ッケル−ホウ素めっき層6を完全に被覆することができ
ず、後述する金めっき層8の被着強度が弱くなってしま
う傾向にあり、また5μmを超えると内部応力が大きく
なってニッケル−ホウ素めっき層6への被着強度が低い
ものとなってしまう傾向がある。従って、前記高純度ニ
ッケルめっき層7は、その厚さを0.5μm〜5μmの
範囲としておくことが好ましい。
The high-purity nickel plating layer 7 is
When the thickness is less than 0.5 μm, the nickel-boron plating layer 6 cannot be completely covered, and the adhesion strength of the gold plating layer 8 described later tends to be weak, On the other hand, if it exceeds 5 μm, the internal stress tends to be large and the adhesion strength to the nickel-boron plating layer 6 tends to be low. Therefore, it is preferable that the high-purity nickel plating layer 7 has a thickness in the range of 0.5 μm to 5 μm.

【0028】更に、前記ニッケル−ホウ素めっき層6お
よび高純度ニッケルめっき層7は、その合計の厚みが1
0μmを超えると、その内部応力の合力によりニッケル
−ホウ素めっき層6と配線層2との間の密着強度や、配
線層2と絶縁基体1との間の密着強度が低下し、ニッケ
ルめっき層6や配線層2のハガレ、フクレ等の不具合を
生じ易くなる傾向がある。従って、前記ニッケル−ホウ
素めっき層6および高純度ニッケルめっき層7は、その
合計の厚みを10μm以下としておくことが好ましい。
The total thickness of the nickel-boron plating layer 6 and the high-purity nickel plating layer 7 is 1
When the thickness exceeds 0 μm, the adhesion strength between the nickel-boron plating layer 6 and the wiring layer 2 and the adhesion strength between the wiring layer 2 and the insulating base 1 decrease due to the resultant force of the internal stress. And the wiring layer 2 tends to cause defects such as peeling and blistering. Therefore, it is preferable that the total thickness of the nickel-boron plating layer 6 and the high-purity nickel plating layer 7 is 10 μm or less.

【0029】前記高純度ニッケルめっき層7はまたその
表面に金めっき層8が所定厚みに被着されており、該金
めっき層8はニッケル−ホウ素めっき層6及び高純度ニ
ッケルめっき層7が酸化腐蝕するのを有効に防止するこ
とができるとともに半田を配線層2に強固に接合させる
作用をなす。
The high-purity nickel plating layer 7 has a gold plating layer 8 formed on the surface thereof to a predetermined thickness. The gold plating layer 8 is formed by oxidizing the nickel-boron plating layer 6 and the high-purity nickel plating layer 7. Corrosion can be effectively prevented, and has the effect of firmly joining the solder to the wiring layer 2.

【0030】前記金めっき層8は、例えば、従来周知の
シアン化金カリウム等の金化合物とエチレンジアミン四
酢酸(ナトリウム塩)等の錯化剤とを含有する置換型の
無電解金めっき液を用いる無電解めっき法により高純度
ニッケルめっき層7表面に形成される。
For the gold plating layer 8, for example, a substitution-type electroless gold plating solution containing a conventionally known gold compound such as potassium potassium cyanide and a complexing agent such as ethylenediaminetetraacetic acid (sodium salt) is used. It is formed on the surface of the high-purity nickel plating layer 7 by an electroless plating method.

【0031】前記金めっき層8は、その厚みが0.05
μm未満の薄いものとなると、高純度ニッケルめっき層
7やニッケル−ホウ素めっき層6の酸化を防ぐことが困
難となり、また0.8μmを超えて厚くすると、半導体
素子3の電極を配線層2に接続する半田ボール5との間
で金−錫等の脆い金属間化合物が形成され、接続部の長
期信頼性を低いものとしてしまうおそれがある。従っ
て、前記金めっき層8は、その厚さを0.05μm乃至
0.8μmの範囲としておくことが好ましい。
The gold plating layer 8 has a thickness of 0.05
When the thickness is less than μm, it is difficult to prevent oxidation of the high-purity nickel plating layer 7 and the nickel-boron plating layer 6, and when the thickness exceeds 0.8 μm, the electrodes of the semiconductor element 3 are attached to the wiring layer 2. A brittle intermetallic compound such as gold-tin may be formed between the solder ball 5 and the solder ball 5 to be connected, and the long-term reliability of the connection may be reduced. Therefore, it is preferable that the thickness of the gold plating layer 8 be in the range of 0.05 μm to 0.8 μm.

【0032】前記ニッケル−ホウ素めっき層6、高純度
ニッケルめっき層7、金めっき層8は、そのいずれもを
無電解法で形成するとめっき用電力を供給するための導
通線を配線基板4内に設ける必要がなく、配線層2を高
密度で形成することが可能で、配線基板4の小型化を容
易とすることができる。
When the nickel-boron plating layer 6, the high-purity nickel plating layer 7, and the gold plating layer 8 are all formed by an electroless method, conductive wires for supplying electric power for plating are formed in the wiring board 4. There is no need to provide the wiring layer, the wiring layer 2 can be formed at a high density, and the size of the wiring board 4 can be easily reduced.

【0033】また一方、前記半導体素子3が搭載された
絶縁基体1は、その上面に蓋体9が樹脂、ガラス、ロウ
材等から成る封止材を介して接合され、この蓋体9と絶
縁基体1とによって半導体素子3を気密に封止するよう
になっている。
On the other hand, the insulating substrate 1 on which the semiconductor element 3 is mounted has a lid 9 joined to the upper surface thereof via a sealing material made of resin, glass, brazing material, or the like. The semiconductor element 3 is hermetically sealed by the base 1.

【0034】前記蓋体9は酸化アルミニウム質焼結体や
ムライト質焼結体、窒化アルミニウム質焼結体等のセラ
ミックス材料、あるいは鉄−ニッケル−コバルト合金や
鉄−ニッケル合金等の金属材料から成り、例えば、酸化
アルミニウム質焼結体から成る場合には、酸化アルミニ
ウム、酸化珪素、酸化マグネシウム,酸化カルシウム等
の原料粉末を従来周知のプレス成形法を採用することに
よって椀状に成形するとともにこれを約1500℃の温
度で焼成することによって形成される。
The lid 9 is made of a ceramic material such as an aluminum oxide sintered body, a mullite sintered body, or an aluminum nitride sintered body, or a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy. For example, in the case of a sintered body made of aluminum oxide, a raw material powder such as aluminum oxide, silicon oxide, magnesium oxide, and calcium oxide is formed into a bowl shape by employing a conventionally known press molding method, and then formed into a bowl shape. It is formed by firing at a temperature of about 1500 ° C.

【0035】かくして本発明の配線基板4によれば、絶
縁基体1上面の搭載部表面に露出した配線層2に半導体
素子3の電極を半田ボール5を介して電気的、機械的に
接続し、しかる後、絶縁基体1の上面に金属やセラミッ
クスから成る蓋体9をガラスや樹脂、ロウ材等の封止材
を介して接合させ、絶縁基体1と蓋体9とから成る容器
内部に半導体素子3を気密に収容することによって製品
としての半導体装置が完成する。
Thus, according to the wiring board 4 of the present invention, the electrodes of the semiconductor element 3 are electrically and mechanically connected to the wiring layer 2 exposed on the surface of the mounting portion on the upper surface of the insulating base 1 via the solder balls 5. Thereafter, a lid 9 made of metal or ceramics is bonded to the upper surface of the insulating base 1 via a sealing material such as glass, resin, brazing material or the like, and a semiconductor element is placed inside the container formed of the insulating base 1 and the lid 9. The semiconductor device as a product is completed by housing 3 in an airtight manner.

【0036】なお、本発明の配線基板は上述の実施例に
限定されるものではなく、本発明の要旨を逸脱しない範
囲であれば種々の変更は可能であり、例えば、上述の実
施例では本発明の配線基板を半導体素子を収容する半導
体素子収納用パッケージに適用したが、混成集積回路基
板等の他の用途に適用してもよい。
It should be noted that the wiring board of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. Although the wiring board of the present invention is applied to a semiconductor element housing package for housing a semiconductor element, it may be applied to other uses such as a hybrid integrated circuit board.

【0037】[0037]

【発明の効果】本発明の配線基板によれば、配線層のう
ち少なくとも電子部品の電極が半田を介して接続される
領域の表面に、ニッケル−ホウ素めっき層、ニッケルの
含有率が99.9重量%以上の高純度ニッケルめっき
層、金めっき層を順次被着させ、配線層の表面に直接、
触媒活性の強いホウ素を含有するニッケル−ホウ素めっ
き層を被着させたことから配線層にニッケル−ホウ素め
っき層をピンホールやボイド等を生じることなく表面を
極めて平滑として均一厚みに、かつ強固に被着させるこ
とができ、またニッケル−ホウ素めっき層上に、該ニッ
ケル−ホウ素めっき層との密着性が良好で、かつ無電解
金めっき浴に溶解し難く金めっき層との界面にボイドを
生じ難く、さらに熱膨張係数が金めっき層に近似する高
純度ニッケルめっき層を被着させたことから、ニッケル
−ホウ素めっき層上に間に高純度ニッケルめっき層を介
して金めっき層を強固に被着させることができ、さらに
高純度ニッケルめっき層上に耐蝕性に優れ、かつ半田と
の濡れ性に優れる金めっき層を被着させたことからニッ
ケル−ホウ素めっき層及び高純度ニッケルめっき層が酸
化腐蝕するのを有効に防止することができるとともに半
田を強固に接合させることができ、これによって配線基
板の配線層に斑点状のしみやフクレが発生するのを有効
に防止することができるとともに配線層に電子部品の電
極を半田を介して極めて強固に接続することが可能とな
る。
According to the wiring board of the present invention, the nickel-boron plating layer and the nickel content of 99.9 are formed on the surface of at least the region of the wiring layer where the electrodes of the electronic components are connected via solder. A high-purity nickel plating layer and a gold plating layer of at least
The nickel-boron plating layer containing boron with a strong catalytic activity is applied, so that the nickel-boron plating layer has a very smooth and uniform thickness without any pinholes or voids on the wiring layer. It can be adhered, has good adhesion to the nickel-boron plating layer on the nickel-boron plating layer, and hardly dissolves in the electroless gold plating bath, and generates a void at the interface with the gold plating layer. Difficult, and because a high-purity nickel plating layer whose thermal expansion coefficient is close to that of the gold plating layer was deposited, the gold plating layer was firmly covered on the nickel-boron plating layer with a high-purity nickel plating layer interposed therebetween. And a gold plating layer with excellent corrosion resistance and excellent wettability with solder is deposited on the high-purity nickel plating layer. Layer and the high-purity nickel plating layer can be effectively prevented from being oxidized and corroded, and the solder can be firmly joined. This prevents spot-like spots and blisters on the wiring layer of the wiring board. It is possible to prevent it effectively and to connect the electrodes of the electronic component to the wiring layer very firmly via solder.

【0038】また本発明の配線基板によれば、高純度ニ
ッケルめっき層におけるニッケルの含有率を99.9重
量%以上とし、ニッケル結晶の平均粒径が20nm以上
で、結晶粒界が少なく、ニッケルが移動拡散し難いもの
になしたことから金めっき層の厚さを、例えば、金と半
田(錫等)とから成る脆い金属間化合物が大量に形成さ
れることを防ぐために0.05μm〜0.8μmと薄く
したとしても、ニッケルが金めっき層の表面にまで移動
拡散してニッケル酸化物層を形成し半田濡れ性を劣化さ
せるという問題を生じることはなく、その結果、電子部
品を配線層に半田を介して極めて容易かつ確実に接続す
ることが可能で、この半田接続部の長期信頼性を優れた
ものとなすこともできる。
According to the wiring board of the present invention, the nickel content in the high-purity nickel plating layer is 99.9% by weight or more, the average grain size of nickel crystals is 20 nm or more, the crystal grain boundaries are small, Is difficult to move and diffuse, the thickness of the gold plating layer is set to, for example, 0.05 μm to 0 μm to prevent the formation of a large amount of a brittle intermetallic compound composed of gold and solder (such as tin). Even if the thickness is reduced to 0.8 μm, there is no problem that nickel migrates and diffuses to the surface of the gold plating layer to form a nickel oxide layer and deteriorates solder wettability. The connection can be made very easily and reliably via solder, and the long-term reliability of the solder connection can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の配線基板を半導体素子を収容する半導
体素子収納用パッケージに適用した場合の一実施例を示
す断面図である。
FIG. 1 is a cross-sectional view showing an embodiment in which a wiring board of the present invention is applied to a semiconductor element housing package for housing a semiconductor element.

【図2】図1に示す配線基板の要部拡大断面図である。FIG. 2 is an enlarged sectional view of a main part of the wiring board shown in FIG.

【符号の説明】[Explanation of symbols]

1・・・・絶縁基体 2・・・・配線層 3・・・・半導体素子 4・・・・配線基板 5・・・・半田ボール 6・・・・ニッケル−ホウ素めっき層 7・・・・高純度ニッケルめっき層 8・・・・金めっき層 9・・・・蓋体 DESCRIPTION OF SYMBOLS 1 ... Insulating base 2 ... Wiring layer 3 ... Semiconductor element 4 ... Wiring board 5 ... Solder ball 6 ... Nickel-boron plating layer 7 ... High purity nickel plating layer 8 Gold plating layer 9 Lid

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】電子部品の電極が半田を介して接続される
配線層を有する配線基板であって、前記配線層のうち少
なくとも電子部品の電極が半田を介して接続される領域
の表面に、ニッケル−ホウ素めっき層、ニッケルの含有
率が99.9重量%以上の高純度ニッケルめっき層、金
めっき層を順次被着させたことを特徴とする配線基板。
1. A wiring board having a wiring layer to which electrodes of an electronic component are connected via solder, wherein at least a surface of a region of the wiring layer where electrodes of the electronic component are connected via solder, A wiring substrate comprising a nickel-boron plating layer, a high-purity nickel plating layer having a nickel content of 99.9% by weight or more, and a gold plating layer sequentially deposited thereon.
【請求項2】前記高純度ニッケルめっき層の厚みが0.
5μm〜5μmであることを特徴とする請求項1に記載
の配線基板。
2. The high-purity nickel plating layer has a thickness of 0.
The wiring board according to claim 1, wherein the thickness is 5 μm to 5 μm.
JP2000124681A 2000-04-25 2000-04-25 Circuit board Pending JP2001308498A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000124681A JP2001308498A (en) 2000-04-25 2000-04-25 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000124681A JP2001308498A (en) 2000-04-25 2000-04-25 Circuit board

Publications (1)

Publication Number Publication Date
JP2001308498A true JP2001308498A (en) 2001-11-02

Family

ID=18634772

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000124681A Pending JP2001308498A (en) 2000-04-25 2000-04-25 Circuit board

Country Status (1)

Country Link
JP (1) JP2001308498A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112239867A (en) * 2020-10-27 2021-01-19 中国电子科技集团公司第四十三研究所 Plating method of aluminum-based composite material electronic packaging shell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112239867A (en) * 2020-10-27 2021-01-19 中国电子科技集团公司第四十三研究所 Plating method of aluminum-based composite material electronic packaging shell

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