JP2001290128A - Gradation wiring for display device, driver for liquid crystal display device and its stress testing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect the insulation failure among gradation wirings more quickly and also to detect the failure in a short time. SOLUTION: This driver is provided with wirings WA of respective gradation of a first gradation area for outputting analog multilevel voltages of respective gradation of the first gradation area and wirings WB of respective gradation of a second gradation area which are arranged alternately with wirings of respective gradation of the first gradation area and, in the driver, first ladder resistances R1 are connected among wirings of respective gradation of the first gradation area and second ladder resistances R2 are connected among wirings of respective gradation of the second gradation area. Then, a large stress voltage can be applied among respective gradation wirings with a single voltage application by applying a 0 V to input terminals V1 to V4 connected to wirings of the first gradation area and a 12 V to input terminals V5 to V9 connected to wirings of the second gradation area.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a gray scale wiring for a display, a driver for a liquid crystal display, and a stress test method therefor.

[0002]

2. Description of the Related Art FIG. 10 is a wiring diagram of a gradation voltage generator in a liquid crystal display driver according to the prior art. The gradation voltage generation unit includes reference voltage input terminals (IC pads) V1 to V
9, a ladder resistor R, and a gradation wiring WW. The gradation wiring WW can be divided into a first half gradation wiring WA and a second half gradation wiring WB.

The gray scale wiring WW actually has 64 gray scale wirings corresponding to, for example, 64 gray scales, but here, there are 33 gray scale wirings W1 to W33 for simplification of the drawing. Will be described as an example. A ladder resistor R is connected between the gradation wirings of the gradation wirings W1 to W33. Input terminal V1
Is connected to the gradation wiring W1, and the input terminal V2 is connected to the gradation wiring W
5, the input terminal V3 is connected to the gradation wiring W9, the input terminal V4 is connected to the gradation wiring W13, the input terminal V5 is connected to the gradation wiring W17, and the input terminal V6 is connected to the gradation wiring W21. Connected, and the input terminal V7 is connected to the gradation wiring W2.
5, the input terminal V8 is connected to the gradation wiring W29, and the input terminal V9 is connected to the gradation wiring W33.

The gradation wirings W1 to W33 are connected to a liquid crystal panel (not shown), and the liquid crystal panel is driven by gradation voltages supplied from W1 to W33. A method for driving the liquid crystal panel will be described. For example, 0V is applied to the input terminal V1,
For example, 6 V is applied to the input terminal V9. Further, a voltage for interpolating between 0 and 6 V is applied to the input terminals V2 to V8.
Then, the voltage generated in the gradation wirings W1 to W33 is divided by the ladder resistance R. Thereby, the gradation wiring W1
~ W33 outputs a gamma-corrected voltage between 0 and 6V. Then, according to the image data, the gradation wiring W1
The liquid crystal panel can be driven by applying any voltage selected from W33 to W33 to the liquid crystal panel.

Although the gradation wirings of the gradation wirings W1 to W33 are connected by a ladder resistor R, foreign matter (dust) may be mixed between the gradation wirings in a manufacturing process of a driver for a liquid crystal display. If foreign matter is mixed between the gradation wirings, the gradation wirings are short-circuited, and the gradation wirings W1 to W33
Does not output a prescribed gradation voltage. If the gradation wiring is completely short-circuited, the defective driver for the liquid crystal display can be easily detected in the inspection process.

However, even if foreign matter enters between the gradation wirings,
There is a case where the gradation wirings are not completely short-circuited. In this case, it is difficult to detect a defect in the inspection process, and a defective liquid crystal display driver may be shipped. In this case, the state of the foreign matter between the wirings changes while the user is using the device, which may cause a failure on the way and prevent a normal grayscale voltage from being output. If a normal gradation voltage is not output, a line defect occurs in the pixel display on the liquid crystal panel.

In order to avoid such inconvenience, a stress test is performed when testing a driver for a liquid crystal display. In the stress test, first, a stress voltage application step is performed, and then an inspection step is performed.

[0008] The stress voltage applying step will be described. In the stress voltage application step, first, for example, a 12V stress voltage (maximum rated voltage) is applied between the input terminals V1 and V2, and then, for example, a 12V stress voltage is applied between the input terminals V2 and V3. Similarly, a stress voltage is applied between each of the input terminals V3 to V9. For example, when a foreign substance is mixed between the gray scale wirings, the application of the stress voltage makes the insulation failure between the gray scale wirings remarkable.

After applying the stress voltage, an inspection process is performed. In the inspection step, for example, 0V is applied to the input terminal V1, 6V is applied to the input terminal V9, and a voltage between 0 and 6V is applied to the input terminals V2 to V8, as in the normal driving of the liquid crystal panel. I do. Then, the gradation wiring W1
The output voltage of each gradation wiring of W33 to W33 is measured, and when the output voltage is not within the range of the specified value, the liquid crystal display driver can be removed as a defective product.

[0010]

However, in the above-described stress voltage applying step, a voltage of 12 V is applied between the gradation wirings W1 and W5.
Is applied, only about 3 V (= 12 V ＝ 4) is applied between the gradation wiring W1 and the gradation wiring W2 adjacent thereto.
Only a low voltage is applied. That is, a sufficiently large stress voltage could not be applied between the gradation wirings, and the detection rate of insulation failure between the gradation wirings was relatively low.

In the stress voltage applying step, first,
Applying a stress voltage between the input terminals V1 and V2, then applying a stress voltage between the input terminals V2 and V3,
Similarly, by applying a stress voltage between each of the input terminals V3 to V9, it is necessary to repeat a total of eight voltage application steps, and it took a long time for the stress voltage application step.

It is an object of the present invention to provide a gray scale wiring for a display, a driver for a liquid crystal display, and a stress test method therefor, which can more reliably detect insulation failure between the gray scale wirings.

Another object of the present invention is to provide a display gradation wiring capable of detecting an insulation failure between gradation wirings in a short time.
An object of the present invention is to provide a liquid crystal display driver and a stress test method thereof.

[0014]

According to the present invention, there is provided a gray scale wiring for a display, comprising: a first gray scale for outputting a voltage of a first gray scale area when a total number of gray scales of the display is divided into a plurality; A wiring of each gradation of a gradation area and a wiring of each gradation of a second gradation area for outputting a voltage of a second gradation area different from the first gradation area; , And wiring of each gradation of the second gradation area alternately arranged. When such an insulation failure of the gradation wiring is inspected, the first potential is applied to the wiring of a predetermined gradation in the first gradation area and the predetermined potential of the second gradation area is measured. By applying the second potential to the tone wiring, a stress voltage higher than the reference input voltage is applied between the wirings.

[0015] The present invention comprises the above technical means.
The same potential (first potential) is applied to each wiring in the gray scale area of the second gradation area, and the same potential (first potential) is applied to each wiring in the second gradation area alternately arranged with each wiring in the first gradation area. Also, the same potential (a second potential different from the first gradation area) is applied to each wiring of the first gradation area and the second gradation area adjacent thereto. The difference voltage between the first potential and the second potential is equally applied to each wiring. As a result, the first potential and the second potential are set to 1
It is possible to apply a large stress voltage between the gradation wirings only by applying the voltage twice.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a block diagram showing a configuration example of a liquid crystal display according to a first embodiment. The liquid crystal display has a liquid crystal panel 1 and a liquid crystal display driver 2. The liquid crystal display driver 2 includes a D / A converter 3 that converts a digital gradation value input to the input terminal IN to an analog gradation value and outputs the analog gradation value to the output terminal OUT. The D / A converter 3 has a gradation voltage generator 4 and a decoder 5.

The gradation voltage generator 4 and the decoder 5 are interconnected by, for example, 64 gradation wirings. Input terminal I
To N, a gray scale value of each pixel of the liquid crystal panel 1 is input as a digital value. The grayscale voltage generation unit 4 generates, for example, an analog voltage of 64 grayscales and outputs the analog voltage to the decoder 5 via 64 grayscale wirings. The decoder 5 converts a digital grayscale value input to the input terminal IN into an analog grayscale value based on the analog grayscale voltage value output from the grayscale wiring of the grayscale voltage generation unit 4, and Output to OUT. LCD panel 1
Inputs the analog gradation voltage of each pixel from the decoder 5 via the output terminal OUT. Liquid crystal display driver 2
Drives the liquid crystal panel 1 by controlling the gradation value of each pixel of the liquid crystal panel 1. The liquid crystal panel 1 displays each pixel having a predetermined gradation value.

FIG. 2 is a wiring diagram showing an example of the configuration of the gradation voltage generator 4 in the liquid crystal display according to the first embodiment.
The gradation voltage generation unit 4 according to the present embodiment is such that the first half gradation wiring WA and the second half gradation wiring WB in the gradation voltage generation unit shown in FIG. It is.

The gradation voltage generator 4 has reference voltage input terminals (IC pads) V1 to V9, a first half gradation wiring WA, a second half gradation wiring WB, and ladder resistors R1 and R2. Hereinafter, a gradation wiring combining both the gradation wiring WA and the gradation wiring WB is referred to as a gradation wiring WW.

The gray scale wiring WW actually has 64 gray scale wirings corresponding to, for example, 64 gray scales, but here, there are 33 gray scale wirings W1 to W33 for simplification of the drawing. Will be described as an example. The gradation wirings W1 to W33 are gradation wirings for outputting voltages of each gradation. The gradation wiring W1 is a wiring for outputting a voltage indicating a minimum gradation value, and the gradation wiring W33 is a gradation wiring for outputting a voltage indicating a maximum gradation value.

The first half of the gradation wiring WA has 16 lines for outputting the voltage of the gradation area of about half of the smaller gradation value when the total number of gradations of the liquid crystal display is divided into two. Of gray scale wirings W1 to W16. The second half of the gradation wiring WB has 17 gradations for outputting a voltage of a gradation area of about half of the larger gradation value when the total gradation number of the liquid crystal display is divided into two. Wirings W17b to W33 are included.

Each of the gradation lines W1 to W1 of the gradation line WA in the first half portion is used.
The first ladder resistor R1 is connected between W16, and each of the gradation wirings W17b to W3b of the gradation wiring WB in the latter half is connected.
A second ladder resistor R2 is connected between the three. The input terminal V1 is connected to the gradation wiring W1 indicating the minimum gradation,
The input terminal V2 is connected to the gradation wiring W5 and the input terminal V3
Is connected to the gradation wiring W9, and the input terminal V4 is connected to the gradation wiring W9.
13, the input terminal V5 is connected to gray scale wirings W17a and W17b showing an intermediate gray scale, the input terminal V6 is connected to the gray scale wiring W21, and the input terminal V7 is connected to the gray scale wiring W
25, the input terminal V8 is connected to the gradation wiring W29, and the input terminal V9 is connected to the gradation wiring W33 indicating the maximum gradation.

The gradation wirings W1 to W33 are connected to the liquid crystal panel 1 via the decoder 5 shown in FIG. Input terminals V1 to
The liquid crystal panel 1 can be driven by applying the following reference voltage to V9. That is, the input terminal V
For example, 0 V is applied to 1, and 6 V is applied to the input terminal V9. When a voltage for interpolating between 0 and 6 V is applied to the input terminals V2 to V8, the voltages of the gradation wirings W1 to W33 are divided by the ladder resistors R1 and R2, and gamma corrected as shown in FIG. A voltage between 0 and 6 V is output. In FIG. 3, the horizontal axis indicates the gray scale value, and the vertical axis indicates the output voltage of the gray scale wiring corresponding to the gray scale value. The value of the reference voltage input to the input terminals V2 to V8 is determined according to the gamma characteristic shown in FIG.

Although FIG. 2 shows the case where there are nine input terminals V1 to V9, the number of input terminals can be arbitrarily set according to the characteristic curve of gamma correction. However, input terminals V1 and V4 are connected to at least two gradation wirings W1 and W4 of the first half gradation wirings WA,
It is necessary to connect the input terminals V5 and V9 to at least two gradation wirings W17a (W17b) and W33 of the latter half gradation wiring WB.

When the above-mentioned reference voltage is applied to the input terminals V1 to V9, the first ladder resistor R1 is applied from the top to the bottom of the drawing, that is, from the gradation wiring W1 having a small gradation value to a large gradation value. Current flows toward the gray scale wiring W17a. The lower left gradation wiring W17a is the upper right gradation wiring W17b.
Is also connected to the second ladder resistor R2, the current also flows from the top to the bottom of the drawing, that is, from the gradation wiring W17b having a small gradation value to the gradation wiring W33 having a large gradation value. Flows. The direction of the current flowing through the first ladder resistor R1 is the same as the direction of the current flowing through the second ladder resistor R2. As a result, the voltages divided by the ladder resistors R1 and R2 appear on the gradation wirings W1 to W33, and specifically, the voltage values of each gradation shown in FIG. 3 appear.

Next, the stress test method will be described. The gradation wirings of the gradation wirings W1 to W33 are connected by ladder resistors R1 and R2. However, in the manufacturing process of the liquid crystal display driver 2 (FIG. 1), foreign matter (dust) is mixed between the gradation wirings. Insulation failure may occur between gradation wirings due to variations in the process.
The liquid crystal display driver 2 having poor insulation is discarded as a defective product, but the poor insulation between the gradation wirings can be detected by the following stress test. In the stress test, first, a stress voltage application step is performed, and then an inspection step is performed.

The stress voltage applying step will be described.
In the stress voltage applying step, the input terminals V1, V2, V
For example, 0V is applied to the input terminals V5, V6,
A stress voltage (maximum rated voltage) of, for example, 12 V is applied to V7, V8, and V9. When the stress voltage is applied, for example, if there is an insulation failure between the gradation wirings, the insulation failure between the gradation wirings becomes remarkable.

When the above stress voltage is applied, V1 to V1
Since the same potential of 0 V is applied to all V4, even if the voltage is divided by R1, a gray scale voltage of 0V appears at W1 to W13. On the other hand, since the same potential of 12 V is applied to all of V5 to V9, even if the voltage is divided by R2, W
A gradation voltage of 12 V appears in all of 17b to W33. As described above, 0 V is applied to the input terminal V1, and the input terminal V
Since 12V is applied to 5, a sufficiently high stress voltage of 12V can be applied between the gradation wiring W1 and the gradation wiring W17b. Since 0 V is applied to the gradation wiring W2 from the input terminals V1 and V2 via the first ladder resistor R1, a high stress voltage of 12 V is applied between the gradation wiring W2 and the gradation wiring W17b. Is applied. Similarly, except for the section described later, a high stress voltage of 12 V can be applied between the gradation wirings, and the insulation failure between the gradation wirings can be detected more reliably.

That is, in the conventional gray scale voltage generator shown in FIG. 10, only a stress voltage of 12 V is applied between the gray scale wirings W1 and W5, and about 3 V is applied between the gray scale wirings.
Only a low voltage (= 12V ÷ 4) is applied. on the other hand,
In the grayscale voltage generation unit 4 according to the present embodiment, a high stress voltage of 12 V can be applied between the grayscale wirings except for some sections, and the insulation failure between the grayscale wirings can be detected more reliably. It becomes possible.

In the conventional grayscale voltage generator shown in FIG. 10, first, a stress voltage is applied between the input terminals V1 and V2, and then a stress voltage is applied between the input terminals V2 and V3. Similarly, the stress voltage application process must be repeated a total of eight times by applying a stress voltage between the input terminals V3 to V9. However, in the gray scale voltage generation unit 4 according to the present embodiment, the input terminal 0V for V1 to V4
And only one stress voltage applying step of applying 12 V to the input terminals V5 to V9 is required, and the processing of the stress voltage applying step can be performed in a short time. This makes it possible to detect an insulation failure between the gray scale wirings in a short time.

Note that the stress voltage applying step of the present embodiment is not limited to the case where 12 V is applied to the intermediate reference voltage input terminal V5, and 0 V may be applied. That is,
0V is applied to the input terminals V1 to V5, and the input terminals V6 to V
9 may be applied with 12V. However, the input terminals V5
When 12 V is applied to V9, a voltage drop of 12 V is applied between the gradation wiring W13 and the gradation wiring W17a via the first ladder resistor R1, so that a voltage drop occurs. A large stress voltage of 12 V cannot be applied only up to the gradation wiring W17a. In that case, after applying 0V to the input terminals V1 to V4 and 12V to the input terminals V5 to V9,
If 0 V is applied to V5 and 12 V is applied to the input terminals V6 to V9, the above inconvenience can be solved. The other grayscale voltage generation unit 4 for solving the inconvenience will be described later with reference to FIG.

After applying the stress voltage, an inspection process is performed. In the inspection process, as in the normal driving of the liquid crystal panel described above, for example, 0V is applied to the input terminal V1, 6V is applied to the input terminal V9, and a voltage for interpolating between 0 to 6V is applied to the input terminals V2 to V8. Is applied. Gradation wiring W1
The output voltage of each gray scale wiring of W33 to W33 is measured, and when the output voltage is not within the range of the specified value, the liquid crystal display driver 2 can be removed as a defective product. The above-described stress voltage applying step accelerates the insulation failure between the gradation wirings, and the inspection step can more reliably detect the insulation failure between the gradation wirings.

(Second Embodiment) FIG. 4 is a wiring diagram showing a configuration example of a grayscale voltage generator 4 according to a second embodiment. In the first embodiment shown in FIG. 2, the gradation wiring WB in the latter half is provided with a gradation wiring W17b having a small gradation value on the upper side and a gradation wiring W33 having a large gradation value on the lower side. The gradation wirings W17b to W33 are arranged in the order of gradation values.
In the gradation wiring WB in the latter half of the present embodiment, the gradation wiring W18 having a small gradation value is provided on the lower side, and the gradation wiring W33 having a large gradation value is provided on the upper side, and the gradation wiring is arranged in the gradation value order. W18 ~
Arrange W33. Further, the two gradation wirings 1 shown in FIG.
Reference numerals 7a and 17b are collectively provided on one gradation wiring 17 and provided on the lowermost side. First-half gradation wiring WA of the present embodiment
Are the same as those of the first half gradation wiring WA of the first embodiment.

The first half gradation wiring WA includes seventeen gradation wirings W1 to W17 for outputting a voltage of a half gradation area having a smaller gradation value. Tone wiring WB in the latter half
Includes 16 gray scale wirings W18 to W33 for outputting a voltage of a gray scale area which is about half of the larger gray scale value.

Each of the gradation wirings W1 to W1 of the first half gradation wiring WA
The first ladder resistor R1 is connected between W17, and each of the gradation wirings W18 to W33 of the gradation wiring WB in the latter half is connected.
A second ladder resistor R2 is connected between them. The connection between the input terminals V1 to V4 and the gradation wiring WA is the same as in the first embodiment. The input terminal V5 is connected to the gradation wiring W17, the input terminal V6 is connected to the gradation wiring W21, the input terminal V7 is connected to the gradation wiring W25, and the input terminal V8
Is connected to the gradation wiring W29, and the input terminal V9 is connected to the gradation wiring W33.

In such a configuration, the input terminals V1 to V1
The liquid crystal panel 1 can be driven by applying the same reference voltage to V9 as in the first embodiment.
That is, for example, 0V is applied to the input terminal V1, 6V is applied to the input terminal V9, and 0V is applied to the input terminals V2 to V8.
A voltage for interpolating between ~ 6V is applied. When the above-described reference voltage is applied to the input terminals V1 to V9, the first ladder resistor R1 has a gradation from the top to the bottom of FIG. Wiring W17
The current flows toward. Since the second ladder resistor R2 is connected to the first ladder resistor R1 via the gradation wiring W17, the second ladder resistor R2 is connected to the lower ladder resistor R2 from the bottom to the top of the drawing, that is, a small gradation. A current flows from the gray scale wiring W17 of the value to the gray scale wiring W33 of the large gray scale value. The direction of the current flowing through the first ladder resistor R1 is opposite to the direction of the current flowing through the second ladder resistor R2. As a result, the ladder resistors R1 and R1 are connected to the gradation wirings W1 to W33.
The voltage divided by the resistor R2 appears. Specifically, FIG.
The voltage value of each gradation shown in FIG.

Further, the stress test method can be performed by the same method as in the first embodiment, and the same effect can be obtained. That is, a high stress voltage of 12 V can be applied between the gradation wirings, and the insulation failure between the gradation wirings can be more reliably detected.
A stress test can be performed in a short time.

(Third Embodiment) FIG. 5 is a wiring diagram showing a configuration example of a grayscale voltage generator 4 according to a third embodiment. The third embodiment is different from the first embodiment shown in FIG. 2 in that the intermediate input terminal V5 is replaced by two input terminals V5.
A and V5B. Other points are the first.
This is the same as the embodiment.

The gradation wiring having the smallest gradation value among the gradation wirings WB in the latter half is composed of the gradation wiring W17c and the gradation wiring W1.
7d. One gradation wiring 17c is used only for a stress test, and the other gradation wiring W17d is used as a gradation wiring for actually outputting a gradation voltage. The first ladder resistor R1 is connected to the gradation wirings W1 to W17a.
, And the second ladder resistor R2 is
It is connected between the gradation wirings of the gradation wirings W17d to W33. The input terminal V5A is connected to the gradation wirings W17a and W17c.
, And the input terminal V5B is connected to the gradation wiring W17d.

The stress voltage applying step will be described.
In the stress voltage applying step, the input terminals V1, V2, V
For example, 0V is applied to 3, V4 and V5A, and the input terminal V5
For example, a stress voltage of 12 V (maximum rated voltage) is applied to B, V6, V7, V8, and V9. In the first embodiment shown in FIG. 2, a large stress voltage could not be applied between the gray scale wiring W13 and the gray scale wiring W17a. Wiring W1
3, an input terminal V4 and an input terminal V5 to which W17a is connected.
A of the same potential is applied to A and the input terminal V5
Since 12V is applied to B and V6, a stress voltage of 12V can be applied between the gradation wirings between the gradation wiring W13 and the gradation wiring W17a. That is, a large stress voltage of 12 V can be applied between all the gradation wirings, and the insulation failure between the gradation wirings can be detected more reliably.

In the inspection step after the application of the stress voltage and the normal liquid crystal driving, the same voltage is applied to the input terminal V5A and the input terminal V5B, so that this embodiment is the first embodiment. A circuit equivalent to the embodiment (FIG. 2) can be formed and an equivalent operation can be performed.

(Fourth Embodiment) FIG. 6 is a wiring diagram showing a configuration example of a grayscale voltage generator 4 according to a fourth embodiment. In this embodiment, the intermediate input terminal V5 in the second embodiment shown in FIG. 4 is divided into two input terminals V5A and V5B, and the other points are the same as those of the second embodiment. It is.

The gradation wiring having the largest gradation value among the gradation wirings WA in the first half is a gradation wiring W17a and a gradation wiring W1.
7c. One gradation wiring 17c is used only for a stress test, and the other gradation wiring W17a is used as a gradation wiring for actually outputting a gradation voltage. The first ladder resistor R1 is connected to the gradation wirings W1 to W17a.
, And the second ladder resistor R2 is
It is connected between the gradation wirings of the gradation wirings W17c to W33. The input terminal V5A is connected to the gradation wiring W17a,
The input terminal V5B is connected to the gradation wiring W17c.

In the stress voltage applying step, the input terminal V
For example, 0V is applied to 1, V2, V3, V4, and V5A,
Input terminals V5B, V6, V7, V8, and V9, for example, 12
A V stress voltage (maximum rated voltage) is applied. In the second embodiment (FIG. 4), a large stress voltage could not be applied between the gradation wiring W13 and the gradation wiring W17. Since the same potential of 0 V is applied to the input terminals V4 and V5A to which the adjustment wirings W13 and W17a are connected, and 12V is applied to the input terminals V5B and V6, the gradation wiring W
A stress voltage of 12 V can be applied between each of the gradation wirings from 13 to the gradation wiring W17.
That is, a large stress voltage of 12 V can be applied between all the gradation wirings, and the insulation failure between the gradation wirings can be detected more reliably.

In the inspection step after the application of the stress voltage and the normal liquid crystal driving, the same voltage is applied to the input terminal V5A and the input terminal V5B, so that the present embodiment is the second embodiment. A circuit equivalent to the embodiment (FIG. 4) can be formed and an equivalent operation can be performed.

(Fifth Embodiment) FIG. 7 is a wiring diagram showing a configuration example of a grayscale voltage generator 4 according to a fifth embodiment. This embodiment is different from the third embodiment shown in FIG. 5 in that a switch SW is provided between the intermediate input terminals V5A and V5B, and the other points are the same as in the third embodiment. .

The switch SW has input terminals V5A and V5B
Can be connected or disconnected. In the present embodiment, as in the third embodiment (FIG. 5), the switch SW disconnects between the input terminals V5A and V5B during the stress voltage applying step, and during the inspection step and during normal driving of the liquid crystal panel. The switch SW connects between the input terminals V5A and V5B. Similarly, a switch SW may be provided between the terminals V5A and V5B of the fourth embodiment (FIG. 6).

FIG. 8 is a circuit diagram showing the configuration of the switch SW. The switch SW includes a combination element of a P-channel MOS transistor (transfer gate) 12 and an N-channel MOS transistor (transfer gate) 13,
And a T circuit (inverter) 11. Control terminal CTL
Is connected to the input terminal of the NOT circuit 11 and the gate of the N-channel transistor 13. The output terminal of NOT circuit 11 is connected to the gate of P-channel transistor 12. The source / drain of the transistor 12 and the transistor 13 are connected to the input terminal V5A and the input terminal V, respectively.
5B.

When a high-level voltage is applied to the control terminal CTL, the source and drain of the transistors 12 and 13 become conductive, and the input terminals V5A and V5B are connected. On the other hand, when a low-level voltage is applied to the control terminal CTL, the source and drain of the transistors 12 and 13 are cut off, and the input terminals V5A and V5
B is disconnected.

The switch SW is not limited to a configuration using a combination of P-channel and N-channel MOS transistors (transfer gates).
An S transistor (transfer gate) may be used,
A MOS transistor (transfer gate) having only a channel may be used.

As described in detail above, according to the first to fifth embodiments, the first gradation area (for example, the first half gradation area) and the second gradation area (for example, the second half area). By arranging the gradation wirings in the gradation area alternately, a sufficiently large stress voltage can be applied between the gradation wirings, and insulation failure between the gradation wirings can be detected more reliably. As a result, the failure rate due to deterioration in the market can be reduced, and the reliability can be improved. In addition, since a stress voltage can be applied between the gray scale wirings in one stress voltage applying step, insulation failure between the gray scale wirings can be detected in a short time, and the cost can be reduced by shortening the process time. Can be planned.

FIG. 9A shows a liquid crystal display driver 2.
It is sectional drawing of the semiconductor substrate of FIG. First wiring layer 2
Reference numeral 1 denotes a wiring layer of the decoder 5 (FIG. 1), on which an insulating layer 22 is formed. The second wiring layers WA and WB are formed on the insulating layer 22. The second wiring layer WA is a first half gradation wiring layer, and the second wiring layer WB is a second half gradation wiring layer. The second wiring layers WA and WB are alternately formed in the same layer in the horizontal direction. Second wiring layers WA, W
On B, an insulating layer 24 is formed.

In FIG. 9A, the case where the first half gradation wiring WA and the second half gradation wiring WB are arranged in the same wiring layer has been described as an example, but as shown in FIG. 9B. Alternatively, the first half gradation wiring WA and the second half gradation wiring WB may be arranged in different wiring layers.

FIG. 9B shows a liquid crystal display driver 2.
FIG. 1 is a sectional view of another semiconductor substrate (FIG. 1). The first wiring layer 21 is a wiring layer of the decoder 5 (FIG. 1), on which the insulating layer 22 is formed. A second wiring layer (first half gradation wiring layer) WA is formed on the insulating layer 22, and an insulating layer 24 is formed thereon. A third wiring layer (second-half gradation wiring layer) WB is formed on the insulating layer 24, and an insulating layer 26 is formed thereon.

FIG. 9C shows a driver 2 for a liquid crystal display.
FIG. 1 is a sectional view of another semiconductor substrate (FIG. 1). The first wiring layer 21 is a wiring layer of the decoder 5 (FIG. 1), on which the insulating layer 22 is formed. On the insulating layer 22, the second
(First half gradation wiring layer) WA and second wiring layer (second half gradation wiring layer) WB are alternately formed in the same layer in the horizontal direction. An insulating layer 24 is formed on the second wiring layers WA and WB. On the insulating layer 24, a third wiring layer (first half gradation wiring layer) WA and a third wiring layer (second half gradation wiring layer) WB are alternately formed in the same layer in the horizontal direction. Is done. An insulating layer 26 is formed on the third wiring layers WA and WB. Further, the wiring layers WA and WB are alternately formed also in the vertical direction between different wiring layers.

In the above embodiment, the case where the gradation wiring is divided into the first half gradation wiring WA and the second half gradation wiring WB has been described as an example, but it may be divided into three or more. . For example, in the gray scale voltage generator shown in FIG. 10, the first area of the gray scale wirings W1 to W4, the second area of the gray scale wirings W5 to W8, and the third area of the gray scale wirings W9 to W12 and the gray scale Tuning wiring W
13 to W16, the first region and the second region are alternately arranged in a comb shape, and the third region and the fourth region are alternately arranged in a comb shape. It may be arranged. In this case, it is preferable that the two areas arranged alternately are wiring areas of a gray scale area where gray scales continue to each other. The gradation wiring WB in the latter half is also 4 as in the gradation wiring WA in the first half.
It can be divided into two areas and arranged alternately.

In addition, each of the above-described embodiments is merely an example of the embodiment for carrying out the present invention, and the technical scope of the present invention is limitedly interpreted. It must not be done. That is, the present invention can be embodied in various forms without departing from the spirit or main features thereof.

The various aspects of the present invention are summarized as follows. (Supplementary Note 1) The first case where the total number of gradations of the display is divided into a plurality
Wiring for each gradation of the first gradation area for outputting the voltage of the gradation area of the second, and second wiring for outputting the voltage of the second gradation area different from the first gradation area. A wiring for each gradation in a gradation area, wherein the wiring for each gradation in the first gradation area and the wiring for each gradation in a second gradation area arranged alternately are provided. Display gradation wiring. (Supplementary note 2) The display gradation wiring according to supplementary note 1, wherein the second gradation area is a gradation area having a gradation subsequent to the gradation of the first gradation area.

(Supplementary Note 3) The wiring for each gradation in the first gradation area is a wiring for the first half gradation area when the total number of gradations of the display is divided into two. 3. The display floor according to claim 2, wherein the wiring of each gradation in the second gradation area is a wiring of a gradation area in a latter half when the total number of gradations of the display is divided into two. Tone wiring. (Supplementary Note 4) The gradation wiring for a display according to supplementary note 1, wherein the wiring of each gradation in the first and second gradation areas is a wiring for outputting a gradation voltage of a liquid crystal display. .

(Supplementary Note 5) A first ladder resistor connected between wirings of each gradation in the first gradation area and a second ladder resistor connected between wirings of each gradation in the second gradation area. 2. The display gradation wiring according to claim 1, further comprising a ladder resistor. (Supplementary Note 6) A first reference voltage input terminal connected to make the voltage of the wiring of each gradation in the first gradation area the same potential, and a wiring of the wiring of each gradation in the second gradation area The display gradation wiring according to claim 5, further comprising a second reference voltage input terminal connected to make the voltage the same potential.

(Supplementary Note 7) The direction of the current flowing through the first ladder resistor and the direction of the current flowing through the second ladder resistor when a voltage is applied between the first and second reference voltage input terminals are described. 7. The gradation wiring for a display device according to claim 6, wherein (Supplementary Note 8) When a voltage is applied between the first and second reference voltage input terminals, the direction of the current flowing through the first ladder resistor is opposite to the direction of the current flowing through the second ladder resistor. 7. The gray scale wiring for a display according to claim 6, wherein:

(Supplementary Note 9) A minimum gradation reference voltage input terminal connected to the wiring indicating the minimum gradation among the wirings, and a maximum gradation reference voltage connected to the wiring indicating the maximum gradation among the wirings 2. The display gray scale wiring according to claim 1, further comprising: a voltage input terminal; and two predetermined gray scale reference voltage input terminals connected to the wirings of the wirings that show a predetermined same gray scale. . (Supplementary Note 10) A minimum gray scale reference voltage input terminal connected to the wiring indicating the minimum gray scale among the wirings, and a maximum gray scale reference voltage input terminal connected to the wiring indicating the maximum gray scale among the wirings 4. The display gray scale wiring according to claim 3, further comprising: two intermediate gray scale reference voltage input terminals connected to a wiring indicating an intermediate gray scale among the wirings.

(Supplementary Note 11) The display gradation wiring according to supplementary note 9, further comprising a switching element for connecting or disconnecting the two predetermined gradation reference voltage input terminals. (Supplementary Note 12) The switching element includes an N channel and a P channel.
12. The display gradation wiring according to claim 11, comprising a combination element of a channel transfer gate.

(Supplementary Note 13) The switching element may be N
12. The gray scale wiring for a display according to claim 11, further comprising a transfer gate having only a channel. (Supplementary Note 14) The gradation wiring for a display according to Supplementary Note 11, wherein the switching element includes a transfer gate having only a P-channel.

(Supplementary note 15) The supplementary note 1, wherein the wiring of each gradation in the first gradation area and the wiring of each gradation in the second gradation area are arranged in the same layer. Display gradation wiring. (Supplementary note 16) The display floor according to Supplementary note 1, wherein the wiring of each gradation in the first gradation area and the wiring of each gradation in the second gradation area are arranged in different layers. Tone wiring.

(Supplementary Note 17) Each gradation in the first gradation area for outputting an analog gradation voltage of each gradation in the first gradation area when the total number of gradations of the liquid crystal display is divided into a plurality of divisions And a wiring of each gradation in a second gradation area for outputting an analog gradation voltage of each gradation in a second gradation area different from the first gradation area. A first ladder connected between the wiring of each gradation of the second gradation area and the wiring of each gradation of the second gradation area alternately arranged with the wiring of each gradation of the first gradation area; Resistance and the second
A second ladder resistor connected between the wirings of each gradation in the gradation area, and a first reference voltage input terminal connected to make the voltage of the wiring in the first gradation area the same potential. A second reference voltage input terminal connected to make the voltage of the wiring in the second gradation area the same, and output from the wiring of each gradation in the first and second gradation areas. A driver for a liquid crystal display, comprising: a decoder for converting an input digital gradation value into an analog gradation value based on the analog gradation voltage value. (Supplementary Note 18) Wiring of each gradation in the first gradation area for outputting a voltage of the first gradation area when the total number of gradations of the display is divided into a plurality of parts, and the first gradation A wiring of each gradation of a second gradation area for outputting a voltage of a second gradation area different from the area, the wiring being arranged alternately with the wiring of each gradation of the first gradation area. A stress test method for a driver for a liquid crystal display, comprising: a wiring of each gradation in a second gradation area, wherein a first potential is applied to a wiring of a predetermined gradation in the first gradation area; Applying a stress voltage higher than a reference input voltage between the wirings by applying a second potential to the wiring of a predetermined gradation in the second gradation area; Applying the reference input voltage of each gradation to the wiring of the predetermined gradation in the gradation area, LCD dexterity driver method stress test, characterized by a step of inspecting the presence or absence of abnormality of the output voltage by measuring the voltage output from the wiring.

[0067]

According to the present invention configured as described above,
A sufficiently large stress voltage can be applied between the gradation wirings, and insulation failure between the gradation wirings can be detected more reliably. In addition, since a stress voltage can be applied between the gradation wirings in one stress voltage application step, insulation failure between the gradation wirings can be detected in a short time.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display according to a first embodiment.

FIG. 2 is a wiring diagram illustrating a configuration of a gradation voltage generation unit in the liquid crystal display according to the first embodiment.

FIG. 3 is a graph showing a relationship between a gradation value and a voltage.

FIG. 4 is a wiring diagram illustrating a configuration of a grayscale voltage generation unit according to a second embodiment.

FIG. 5 is a wiring diagram illustrating a configuration of a gradation voltage generation unit according to a third embodiment.

FIG. 6 is a wiring diagram illustrating a configuration of a grayscale voltage generation unit according to a fourth embodiment.

FIG. 7 is a wiring diagram illustrating a configuration of a grayscale voltage generation unit according to a fifth embodiment.

FIG. 8 is a circuit diagram illustrating a configuration of a switch.

FIGS. 9A to 9C are cross-sectional views of a semiconductor substrate of a liquid crystal display driver.

FIG. 10 is a wiring diagram showing a configuration of a gradation voltage generation unit according to a conventional technique.

[Explanation of symbols]

 Reference Signs List 1 liquid crystal panel 2 liquid crystal display driver 3 D / A converter 4 gradation voltage generator 5 decoder 11 NOT circuit 12 P-channel MOS transistor 13 N-channel MOS transistor 21 first wiring layers 22, 24, 26 insulating layers V1 to V9 Reference voltage input terminals W1 to W33 Gradation wiring WA First half gradation wiring WB Second gradation gradation wiring R1, R2, R Ladder resistance SW switch

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) G09G 3/36 G09G 3/36 (72) Inventor Seiji Yamagata 4-1-1 Kamikodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Fujitsu In-house F term (reference) 2G014 AA15 AB21 AC07 2H093 NA53 NC03 NC59 ND06 ND56 NE02 NE03 NE07 5C006 AA16 AF65 EA03 EB03 FA20 FA36 FA56 5C080 AA10 DD09 DD30 FF03 JJ02 JJ03 JJ05 JJ06 KK02

Claims (9)

[Claims] 1. A wiring for each gradation of a first gradation area for outputting a voltage of the first gradation area when the total number of gradations of the display is divided into a plurality of divisions, and the first floor A wiring of each gradation of a second gradation area for outputting a voltage of a second gradation area different from the gradation area, the wiring being arranged alternately with the wiring of each gradation of the first gradation area. And a wiring for each gradation in a second gradation area. 2. The gray scale wiring for a display device according to claim 1, wherein the second gray scale area is a gray scale area having a gray scale subsequent to the gray scale of the first gray scale area. . 3. The display floor according to claim 1, wherein the wiring of each gradation in the first and second gradation areas is a wiring for outputting a gradation voltage of a liquid crystal display. Tone wiring. 4. A first ladder resistor connected between wirings of each gradation in the first gradation area, and a second ladder connected between wirings of each gradation in the second gradation area. 2. The gradation wiring for a display device according to claim 1, further comprising a resistor. 5. A minimum gray scale reference voltage input terminal connected to a wiring indicating a minimum gray scale among the wirings, and a maximum gray scale reference voltage input connected to a wiring indicating a maximum gray scale among the wirings. 2. The gray scale wiring for a display device according to claim 1, further comprising: a terminal; and two predetermined gray scale reference voltage input terminals connected to a wiring showing a predetermined same gray scale among the wirings. 6. The wiring according to claim 1, wherein the wiring of each gradation in the first gradation area and the wiring of each gradation in the second gradation area are arranged in the same layer. Display gradation wiring. 7. The display according to claim 1, wherein the wiring of each gradation in the first gradation area and the wiring of each gradation in the second gradation area are arranged in different layers. Dexterous gradation wiring. 8. A wiring of each gradation of the first gradation area for outputting an analog gradation voltage of each gradation of the first gradation area when the total number of gradations of the liquid crystal display is divided into a plurality of divisions. A wiring of each gradation in a second gradation area for outputting an analog gradation voltage of each gradation in a second gradation area different from the first gradation area, A wiring of each gradation of the second gradation area alternately arranged with the wiring of each gradation of the gradation area; a first ladder resistor connected between the wirings of each gradation of the first gradation area; A second ladder resistor connected between the wirings of each gradation in the second gradation area, and a first reference connected to make the voltage of the wiring in the first gradation area the same potential. A voltage input terminal and a second reference voltage connected to make the voltage of the wiring in the second gradation area the same potential A power terminal, and a decoder for converting an input digital grayscale value into an analog grayscale value based on an analog grayscale voltage value output from each grayscale wiring in the first and second grayscale areas. A driver for a liquid crystal display, comprising: 9. A wiring for each gradation of the first gradation area for outputting a voltage of the first gradation area when the total number of gradations of the display is divided into a plurality of divisions, and the first floor A wiring of each gradation of a second gradation area for outputting a voltage of a second gradation area different from the gradation area, the wiring being arranged alternately with the wiring of each gradation of the first gradation area. A stress test method for a driver for a liquid crystal display, comprising: a wiring of each gradation in a second gradation area; and applying a first potential to the wiring of a predetermined gradation in the first gradation area. Applying a second potential to a wiring of a predetermined gradation in the second gradation area to apply a stress voltage higher than a reference input voltage between the wirings; Apply a reference input voltage of each gradation to the wiring of a predetermined gradation in the gradation area, and LCD dexterity driver method stress test, characterized by a step of inspecting the presence or absence of abnormality of the output voltage by measuring the voltage output from the wiring.