KR100206568B1 - Lcd device with gate line defect discrimination sensing method - Google Patents

Abstract

The present invention relates to a liquid crystal display device having gate line defect detecting means,

Wherein each switch pair is composed of two switch elements which are the same as the number of gate lines, and each switch pair is composed of two switch elements coupled in parallel to each other, And a defect detection circuit connected to both ends of each pair of switches such that a test voltage is commonly applied,

It is possible to inspect the short circuit between the gate line and the sustain electrode line before the assembly process is performed through the defect detection circuit, thereby improving the yield of the liquid crystal display device manufacturing process.

Description

A liquid crystal display device having gate line defect detecting means

The present invention relates to a liquid crystal display device having a gate line defect detecting means and more particularly to a liquid crystal display device capable of detecting a position where a short circuit and a short circuit occur between each gate line and a sustain electrode line adjacent thereto, ≪ / RTI >

In particular, the present invention is applied to a liquid crystal display device having separate independent wirings for each gate line in order to form a storage capacitor.

Hereinafter, a general independent wiring type liquid crystal display device will be described with reference to the accompanying drawings.

1 is a configuration diagram of a general liquid crystal display device,

2 is an equivalent circuit diagram of a pixel in a liquid crystal panel in the liquid crystal display shown in FIG.

1, a general independent wiring type liquid crystal display device comprises an interface part 1, a gate driving part 2, a source driving part 3 and a liquid crystal panel 4, And a sustain electrode line is provided for each of the gate lines. Also, a sustain voltage Vstg is applied to the sustain electrode line, and the sustain voltage Vstg is generated through a separate voltage generator (not shown).

Fig. 2 is a circuit diagram showing an equivalent pixel of a certain pixel in the liquid crystal panel 4 shown in Fig.

As shown in FIG. 2, a gate of a thin film transistor (TFT) is connected to a gate line G1 connected to the gate driver 2 of FIG. 1 and connected to the source driver 3 of FIG. 1 A source of the thin film transistor TFT is connected to the data line D1 and a liquid crystal capacitor Cp and a storage capacitor Cstg are connected to a drain of the thin film transistor TFT. Terminal is connected to the sustain electrode line S1. The holding capacitor Cstg allows the liquid crystal capacitor Cp to maintain the current charged voltage until the next signal is applied.

On the other hand, in the liquid crystal panel having the above structure, the gate line and the sustain electrode line are horizontally positioned on the same plane, and the two lines are formed of the same material. For example, the gate line G1 and the sustain electrode line S1 in FIG. 2 are made of polysilicon.

The independent wiring type liquid crystal panel has a disadvantage in that the aperture ratio of the pixel is lowered because the sustain electrode line covers the pixel electrode by the width thereof. In order to overcome this disadvantage, the sustain electrode line is arranged so as to have a width as small as possible within the allowance of the process, and to approach the gate line.

However, in the process of forming the sustain electrode lines and the gate lines as described above, errors are inevitably generated in performing etching or the like, and thus the gate lines and the sustain electrode lines may be too close to each other and short-circuited. A short circuit between the gate line and the sustain electrode line seriously lowers the overall yield of the liquid crystal display device.

It is also important to detect the defects before performing an assembly process of joining the upper and lower plates of the liquid crystal panel. This is because, if the defects can be detected before the assembly process, it is possible to repair defects or to process defective plates only in advance, thereby increasing the overall yield. However, conventionally, after the assembly process is performed, whether or not a defect is judged through an image displayed through the assembled liquid crystal display device, waste of resources is extremely serious when it is judged to be a defect.

Therefore, in the independent wiring type liquid crystal display device, there is a demand for a method of inspecting the short circuit between the gate line and the sustain electrode line of the liquid crystal panel before the assembly process is performed.

It is an object of the present invention to provide a liquid crystal display device having a defect detecting means that enables short-circuiting between each gate line and a sustain electrode line.

Particularly, since the defect detecting means operates irrespective of whether or not the assembly process is performed, the liquid crystal display device of the present invention provides an advantage that short circuit inspection can be performed before the assembly process.

1 is a configuration diagram of a general liquid crystal display device.

FIG. 2 is an equivalent circuit diagram of a pixel in a liquid crystal panel in the liquid crystal display shown in FIG. 1; FIG.

3 is a configuration diagram of a liquid crystal display device according to an embodiment of the present invention;

FIG. 4 is a detailed circuit diagram of the defect detection circuit shown in FIG. 3; FIG.

5 is a waveform diagram illustrating the operation of the defect detection circuit.

According to an aspect of the present invention, there is provided a liquid crystal display device comprising:

A liquid crystal panel having a plurality of gate lines and data lines, and sustain electrode lines arranged in parallel to the respective gate lines;

An interface unit receiving the vertical and horizontal synchronizing signals and the color signals and generating a control signal necessary for driving the liquid crystal panel;

A gate driver for generating a signal for driving each gate line of the liquid crystal panel according to a control signal of the interface and applying the generated signal to the gate line;

A source driving unit for generating a signal for driving a data line of the liquid crystal panel according to a control signal of the interface unit and applying the generated signal to the data line; And

Wherein each switch pair is composed of two switch elements which are the same as the number of gate lines, and each switch pair is composed of two switch elements coupled in parallel to each other, And a defect detection circuit connected to both ends of each pair of switches such that a test voltage is commonly applied.

In the above-described defect detection circuit of the liquid crystal display device, a voltage generator for providing a test voltage and an ammeter are additionally connected.

The gate driver applies a signal for sequentially turning on the gate line to the liquid crystal panel, and a switch element of a corresponding pair of switches in the defect detection circuit is turned on by a turn-on voltage applied to any one gate line of the liquid crystal panel Turn on. At this time, since the gate lines in the liquid crystal panel are sequentially turned on, only one switch element is normally turned on in each switch pair in the defect detection circuit.

However, if any one gate line of the liquid crystal panel and a corresponding one of the sustain electrode lines are short-circuited, both the switch elements of the switch pair corresponding to the gate line and the sustain electrode line in the defect detection circuit are turned on. Thus, two current paths occur, doubling the amount of current compared to the case without a short circuit.

That is, the tester senses a change in the amount of current through the defect detection circuit, tracks the turn-on time of the gate line causing the short circuit, and detects the short circuit between the gate line and the sustain electrode line in the liquid crystal panel and detects the position of the gate line can do.

Also, since the defect inspection according to the present invention is independent of the display operation of the liquid crystal panel, it is possible to perform the defect inspection without performing the assembly process of the liquid crystal panel.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a configuration diagram of a liquid crystal display device according to an embodiment of the present invention,

FIG. 4 is a detailed circuit diagram of the defect detection circuit shown in FIG. 3,

5 is a waveform diagram illustrating the operation of the defect detection circuit.

First, the configuration of a liquid crystal display device according to an embodiment of the present invention will be described with reference to FIGS. 3 and 4. FIG.

3, the liquid crystal display according to the embodiment of the present invention includes an interface 1, a gate driver 2, a source driver 3, a liquid crystal panel 4, and a defect detection circuit 5 .

A vertical synchronizing signal VSYNC, a horizontal synchronizing signal HSYNC and a color signal RGB are input to the interface unit 1 and the interface unit 1 is connected to the liquid crystal panel 4 using the input signal And supplies the generated control signal to the gate driver 2 and the source driver 3, respectively.

The gate driver 2 generates a voltage for sequentially turning on a gate line on the liquid crystal panel 4 according to a control signal provided from the interface unit 1 and supplies the generated voltage to the liquid crystal panel 4, Respectively.

The source driver 3 receives a control signal and a color signal from the interface unit 1 and selects a gray scale voltage corresponding to a color signal and applies the selected gray scale voltage to each data line of the liquid crystal panel 4.

The liquid crystal panel 4 has a plurality of gate lines and a plurality of data lines arranged to intersect with the plurality of gate lines, and has a plurality of sustain electrode lines arranged in parallel to the respective gate lines. The sustain electrode line is driven by the sustain electrode voltage Vstg, and the sustain electrode voltage Vstg is generated in a separate voltage generator (not shown).

A defect detection circuit 5 is connected to the liquid crystal panel 4 and the defect detection circuit 5 is connected to a plurality of gate lines via a sustain electrode line.

The defect detection circuit 5 will be described in more detail with reference to FIG.

As shown in FIG. 3, the defect detection circuit 5 is composed of the same number of transistors as the number of gate lines, and each transistor pair is composed of two NMOS transistors whose sources and drains are connected to each other. In the embodiments of the present invention, particularly, NMOS transistors are used, but other equivalent elements which can replace the NMOS transistors and exert control switch functions can be used.

The common drains of each transistor pair are connected to each other to form a voltage terminal VDD, and a common source is also connected to each other to form a ground terminal VSS. Corresponding gate lines G1 to Gn and sustain electrode lines S1 to Sn are connected to the gates of the two transistors of each transistor pair.

The transistors of each pair of transistors act as switch elements and are turned on or off according to the gate voltage.

Next, the operation of the defect detection circuit will be described with reference to the waveform diagram of FIG.

Before describing the operation, a voltage generator (not shown) is connected to the voltage terminal VDD in the defect detection circuit 5 shown in FIG. 4, and an ammeter (not shown) is connected between the voltage generator and the ground terminal ) Are assumed to be connected. The voltage generator provides a test voltage commonly to each pair of transistors in the fault detection circuit 5 via a voltage terminal VDD and the ammeter is connected to the ground terminal Size is detected.

A gate line voltage having a turn-on period sequentially is applied to the gate line on the liquid crystal panel 4 by the gate driving unit 2 shown in FIG. 3 as shown in FIG.

Only one transistor in the defect detection circuit 5 is turned on by the gate voltage as described above. For example, when the voltage of the gate line G1 is a turn-on period, only the transistor connected to the gate line G1 is turned on, and the amount of current having a predetermined magnitude is detected by an ammeter connected to the ground terminal VSS. Since a voltage having a sequential turn-on period is applied to each of the gate lines G1 to Gn, the transistors connected to the gate lines G1 to Gn are sequentially turned on.

However, when one of the gate lines and the corresponding one of the sustain electrode lines is short-circuited, the potentials of the gate line and the sustain electrode line become the same, so that both transistors of the transistor pair corresponding to the gate line and the sustain electrode line Turn on. Thus, two current paths are formed, and the external voltage applied through the voltage terminal VDD is the same, so that the amount of current detected through the ground terminal VSS is twice that in the normal case.

The waveform of the current Ids1 in FIG. 5 is a normal case, and the waveform of the current Ids2 is a case in which a short circuit occurs between the gate line G3 and the sustain electrode line S3.

From the current waveform diagram of FIG. 5, it can be seen that the magnitude of the current detected in the turn-on period of the short-circuited gate line is twice that of the normal case.

Accordingly, it is possible to detect the occurrence of a short circuit between any gate line in the liquid crystal panel and the corresponding sustain electrode line and the occurrence of a short circuit in a few gate lines by using the change in the amount of the current detected as described above. In addition, since the short circuit inspection is independent of the pixel display operation of the liquid crystal panel, the liquid crystal display according to the present invention makes it possible to perform the defect inspection before performing the assembly process on the upper and lower panels of the liquid crystal panel.

The liquid crystal display device of the present invention described above has a defect detection circuit having a plurality of pairs of switches controlled by a gate line and a sustain electrode line, and before the assembly process is performed through the defect detection circuit, Line short-circuit test. Accordingly, since the generation of defects is reduced in advance through the short circuit test, the yield of the liquid crystal display device manufacturing process can be improved.

Claims (3)

A liquid crystal panel having a plurality of gate lines and data lines, and sustain electrode lines arranged in parallel to the respective gate lines; An interface unit receiving the vertical and horizontal synchronizing signals and the color signals and generating a control signal necessary for driving the liquid crystal panel; A gate driver for generating a signal for driving each gate line of the liquid crystal panel according to a control signal of the interface and applying the generated signal to the gate line; A source driving unit for generating a signal for driving a data line of the liquid crystal panel according to a control signal of the interface unit and applying the generated signal to the data line; And Wherein each switch pair is composed of two switch elements which are the same as the number of gate lines, and each switch pair is composed of two switch elements coupled in parallel to each other, And a defect detection circuit connected to both ends of each pair of switches such that a test voltage is commonly applied. A liquid crystal display device comprising gate line defect detecting means. 2. The semiconductor device according to claim 1, wherein the switch element is an NMOS transistor, A liquid crystal display device comprising gate line defect detecting means. 3. The apparatus of claim 1 or 2, further comprising: voltage generating means for generating the test voltage; And Further comprising an ammeter connected between the voltage generating means and the defect detecting circuit for detecting the magnitude of a current flowing in the plurality of pairs of switches, A liquid crystal display device comprising gate line defect detecting means.