JP2001274290A - Circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To overcome the defects that such a supporting board of a circuit device having mounted semiconductor elements as a printed board, ceramic board, and flexible sheet is originally unnecessary material, and its thickness makes the circuit device large-sized. SOLUTION: After forming separation grooves 54 on a conductive foil 60, circuit elements 52 are so mounted on the conductive foil 60 as to use it as a supporting board and coat them with an insulation resin 50. Then, after reversing the intermediate up and down, the conductive foil 60 is so polished by using the insulation resin 50 as a supporting board this time as to divide the conductive foil 60 into conductive passages 51. Therefore, without adopting such a supporting board as a printed board, there can be realized a circuit device 53 wherein the conductive passages 51 and the circuit elements 52 are supported by the insulation resin 50. Moreover, slits SLT are so provided in the conductive passages 51 and slopes SL are so provided in the insulation resin 50 coating the periphery of the circuit device 53 as to make preventable the bent of the circuit device 53.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit device,
In particular, the present invention relates to a thin circuit device that does not require a support substrate.

[0002]

2. Description of the Related Art Conventionally, a circuit device set in an electronic device is employed in a cellular phone, a portable computer, and the like, and therefore, a reduction in size, thickness, and weight is required.

For example, a semiconductor device will be described as an example of a circuit device. As a general semiconductor device, there is a package type semiconductor device sealed with a conventional transfer mold. This semiconductor device 1 is, as shown in FIG.
It is mounted on the printed circuit board PS.

In the package type semiconductor device 1, the periphery of a semiconductor chip 2 is covered with a resin layer 3.
The lead terminal 4 for external connection is led out from the side part of FIG.

However, this package type semiconductor device 1 has
The lead terminals 4 were outside the resin layer 3, and the overall size was large, and the size, thickness and weight were not satisfied.

Therefore, various companies have competed to develop various structures in order to realize miniaturization, thinning and weight reduction, and recently called a CSP (chip size package), a wafer scale CSP equivalent to the chip size. Alternatively, a CSP having a size slightly larger than the chip size has been developed.

FIG. 28 shows a case where a glass epoxy substrate 5 is used as a supporting substrate, and the CS is slightly larger than the chip size.
It shows P6. Here, the glass epoxy substrate 5
It is assumed that the transistor chip T is mounted on the semiconductor device.

A first electrode 7, a second electrode 8, and a die pad 9 are formed on the surface of the glass epoxy substrate 5, and a first back electrode 10 and a second back electrode 11 are formed on the back surface.
Are formed. And, through the through hole TH,
The first electrode 7 and the first back electrode 10 are electrically connected, and the second electrode 8 and the second back electrode 11 are electrically connected. The bare transistor chip T is fixed to the die pad 9, and the emitter electrode of the transistor and the first electrode 7 are fixed.
Are connected via the thin metal wire 12, and the base electrode of the transistor and the second electrode 8 are connected via the thin metal wire 12. Further, a resin layer 13 is provided on the glass epoxy substrate 5 so as to cover the transistor chip T.

Although the CSP 6 employs the glass epoxy substrate 5, unlike the wafer scale CSP, the structure extending from the chip T to the back surface electrodes 10 and 11 for external connection is simple, and the CSP 6 can be manufactured at low cost. Have.

The CSP 6 is mounted on a printed circuit board PS as shown in FIG. In the printed circuit board PS,
The CSP is provided with electrodes and wiring constituting an electric circuit.
6. The package type semiconductor device 1, the chip resistor CR or the chip capacitor CC and the like are electrically connected and fixed.

The circuit constituted by the printed circuit board is mounted in various sets.

Next, a method of manufacturing the CSP will be described with reference to FIGS. In FIG. 30,
Reference is made to the flow diagram entitled Central Glass Epoxy / Flexible Substrate.

First, a glass epoxy substrate 5 is prepared as a substrate (supporting substrate), and C
The u foils 20 and 21 are pressed. (See FIG. 29A above.) Subsequently, the first electrode 7, the second electrode 8, the die pad 9,
The Cu foils 20 and 21 corresponding to the first back surface electrode 10 and the second back surface electrode 11 are coated with an etching resistant resist 22, and the Cu foils 20 and 21 are patterned. Note that the patterning may be performed separately on the front and back (see FIG. 29B).
Subsequently, a hole for the through hole TH is formed in the glass epoxy substrate using a drill or a laser, and the hole is plated to form the through hole TH. The first electrode 7 and the first back electrode 1 are formed by the through hole TH.
0, the second electrode 8 and the second back electrode 10 are electrically connected. (Refer to FIG. 29C.) Further, although not shown in the drawing, the first electrode 7 and the second electrode 8 serving as the bonding posts are plated with Ni, and the die pads 9 serving as the die bonding posts are provided with Au.
Plating is performed, and the transistor chip T is die-bonded.

Finally, the emitter electrode of the transistor chip T and the first electrode 7, and the base electrode and the second electrode 8 of the transistor chip T are connected via a thin metal wire 12 and covered with a resin layer 13. (See FIG. 29D above.) Then, if necessary, dicing is performed to separate individual electric elements. In FIG. 29, the glass epoxy substrate 5
Although only one transistor chip T is provided, a large number of transistor chips T are provided in a matrix. Therefore, they are finally separated by a dicing device.

By the above manufacturing method, a CSP type electric element using the support substrate 5 is completed. This manufacturing method
The same applies to the case where a flexible sheet is used as the support substrate.

On the other hand, a manufacturing method using a ceramic substrate is shown in the flow on the left side of FIG. After preparing a ceramic substrate that is a support substrate, a through hole is formed, and then
The front and back electrodes are printed and sintered using conductive paste. After that, until the resin layer of the previous manufacturing method is coated, the manufacturing method is the same as that of FIG. 29. However, the ceramic substrate is very fragile, and unlike a flexible sheet or a glass epoxy substrate, it is chipped immediately, so a mold is used. There is a problem that can not be molded. For this reason, after sealing resin is potted and cured, it is polished to flatten the sealing resin, and finally separated individually using a dicing device.

[0017]

In FIG. 28, a transistor chip T, connecting means 7 to 12 and a resin layer 13 are shown.
Is a necessary component for electrical connection to the outside and protection of the transistor, but it is difficult to provide an electric circuit element that realizes reduction in size, thickness, and weight with only these components. Was.

Further, the glass epoxy substrate 5 serving as the support substrate is essentially unnecessary as described above. However, in the manufacturing method, the glass epoxy substrate 5 is used as a supporting substrate for bonding the electrodes, and the glass epoxy substrate 5 cannot be eliminated.

Therefore, the use of the glass epoxy substrate 5 increases the cost, and further, since the glass epoxy substrate 5 is thick, the circuit element becomes thick.
There was a limit to miniaturization, thinning, and weight reduction.

Further, in the case of a glass epoxy substrate or a ceramic substrate, a step of forming a through hole for connecting electrodes on both surfaces is indispensable, and there has been a problem that the manufacturing process becomes long.

In FIG. 29, the resin layer 13 is formed by a transfer molding process using a thermosetting resin. This step is performed to cure the resin 170-2.
With the heat treatment at 10 ° C., this temperature exceeds the glass transition point (110 ° C.) of the resin layer 13, so that the linear expansion coefficient in the temperature range exceeding the temperature reaches 30 ppm / ° C. For that reason,
Linear expansion coefficient of silicon of transistor chip T (3 pp
m / ° C.), a contraction force acts on the resin layer 13 due to a temperature difference from the processing temperature to cooling to room temperature.

When the resin layer 13 is molded and then cooled to room temperature by such a shrinking force, the end of the substrate 5 is lifted up, and the external dimensions are changed. In particular, this phenomenon becomes conspicuous due to the large planar size and the fact that the substrate 5 is attached to the entire back surface of the CSP.

If the end of the board 5 is lifted in this manner, the horizontal of the board 5 cannot be maintained, and unexpected troubles may occur when the board 5 is mounted on the mounting board.

[0024]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned many problems, and firstly, a plurality of conductive paths which are electrically separated by separation grooves, and which are fixed on desired conductive paths. A circuit element, and an insulating resin that covers the circuit element and fills the separation groove between the conductive paths and exposes the back surface of the conductive path to integrally support the circuit element, The problem is solved by providing a slit in the conductive path.

Second, in addition to the first solution, the problem is solved by reducing the thickness of the insulating resin toward the periphery of the circuit device.

Third, a plurality of conductive paths electrically separated by the separation groove, a desired semiconductor chip fixed on the conductive path, and an electrode of the semiconductor chip and another conductive path are connected. A circuit device comprising: a connecting means; and an insulating resin that covers the semiconductor chip and is filled in the separation groove between the conductive paths and exposes the back surface of the conductive path to integrally support the conductive path. The problem is solved by providing a slit in the insulating resin and reducing the thickness of the insulating resin from the periphery of the semiconductor chip toward the periphery of the circuit device.

Fourth, a plurality of conductive paths electrically separated by separation grooves, a desired semiconductor chip and passive element fixed on the conductive path, and desired electrodes of the semiconductor chip and passive element. A connecting means for connecting with the other conductive path, and an insulating resin which covers the semiconductor chip and the passive element and is filled in the separation groove between the conductive paths to expose and support the back surface of the conductive path integrally; A circuit device provided with: a slit provided in the conductive path, and the thickness of the insulating resin is reduced from the area where the semiconductor chip and the passive element are arranged toward the periphery of the circuit device. It is.

With this configuration, the number of components can be minimized, a plurality of conductive paths can be integrally supported by the insulating resin filled in the separation groove, and the back surface of the conductive path is used for connection to the outside. This has the advantage that through holes can be eliminated.

Furthermore, by providing slits and / or reducing the thickness of the insulating resin around the semiconductor device, the degree of curvature of the entire circuit device can be reduced.

The cause of the warpage is considered to be a difference in linear expansion coefficient between the semiconductor chip and the insulating resin, and a difference in linear expansion coefficient between the conductive path and the insulating resin.

As described in the section for solving the problem, as shown in FIG. 29, if the substrate 5 is bonded to the entire back surface of the CSP 6, a large warp is generated due to the bimetal principle.
This is the same even when the conductive foil is attached to the entire back surface of the circuit device. However, in the present invention, the conductive foil is
Ultimately, it is separated individually and a slit is provided, so that this warpage can be suppressed.

Further, by reducing the amount of the insulating resin existing around the area where the circuit elements such as the semiconductor chips are arranged, the contraction force of the insulating resin is reduced, and the degree of curvature of the entire circuit device is reduced. Can be. Therefore, the circuit device is warped by the following three points: the conductive paths are individually separated; the slits are provided; and the amount of the insulating resin is reduced toward the periphery of the circuit device. Significantly suppressed.

[0033]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment for Explaining a Circuit Device First, the structure of a circuit device according to the present invention will be described with reference to FIG. 1A is a cross-sectional view of the circuit device, and FIG. 1B is a plan view. FIG. 1C is a perspective view illustrating a conductive path.

FIG. 1 has a conductive path 51 embedded in an insulating resin 50, and a circuit element 52 is provided on the conductive path 51.
A circuit device 53 is shown in which the conductive path 51 is supported by the insulating resin 50. The conductive path 5
One side may have a curved structure 59. See Figure 5 for details.
See

This structure comprises circuit elements 52A and 52B, a plurality of conductive paths 51A, 51B and 51C,
A, 51B, and 51C are formed of three materials of insulating resin 50 embedded therein.
Separation grooves 54 filled with zeros are provided. The conductive path 51 is supported by the insulating resin 50.

As the insulating resin, a thermosetting resin such as an epoxy resin, or a thermoplastic resin such as a polyimide resin or polyphenylene sulfide can be used. As the insulating resin, any resin can be adopted as long as the resin can be hardened using a mold, or can be coated by dipping or coating. Further, as the conductive path 51, a conductive foil mainly composed of Cu, a conductive foil mainly composed of Al, a conductive foil composed of an alloy such as Fe-Ni, or the like can be used. Of course, other conductive materials are also possible. Particularly, a conductive material that can be etched and a conductive material that evaporates by laser are preferable.

The present invention is characterized in that the separation groove 54 is also filled with the insulating resin 50 and the conductive path 51 is supported by the insulating resin 54, so that the conductive path 51 can be prevented from coming off. Further, by performing dry etching or wet etching as a non-anisotropic etching, as shown in FIG. 5, the side surface of the conductive path 51 may be formed into a curved structure 59 to generate an anchor effect. it can. As a result, a structure in which the conductive path 51 does not come off from the insulating resin 50 can be realized.

The connection means of the circuit element 52 includes a thin metal wire 55A, a conductive ball made of a brazing material, a flat conductive ball, a brazing material 55B such as a solder, a conductive paste 55C such as an Ag paste, a conductive film or an anisotropic conductive material. Resin. These connection means are selected depending on the type of the circuit element 52 and the mounting form of the circuit element 52. For example, in the case of a bare semiconductor element, a thin metal wire is selected for the connection between the electrode on the surface and the conductive path 51, and in the case of a face-down type such as CSP, a solder ball or a solder bump is selected. For the chip resistor and the chip capacitor, the solder 55B is selected. There is no problem even if a packaged circuit element, for example, a BGA or the like is mounted on the conductive path 51, and when this is adopted, solder is selected as the connection means.

The adhesion between the circuit element and the conductive path 51A is as follows.
If no electrical connection is required, an insulating adhesive is chosen,
When electrical connection is required, a conductive coating is used. Here, at least one conductive film is sufficient.

The material considered as the conductive film is A
g, Au, Pt, Pd, or the like, and is coated by deposition under low or high vacuum such as vapor deposition, sputtering, or CVD, plating, or sintering.

For example, Ag adheres to Au and also adheres to the brazing material. Therefore, if the Au film is coated on the back surface of the chip, the chip can be thermocompression-bonded by directly covering the conductive path 51A with the Ag film, Au film, or solder film, and the chip can be fixed via a brazing material such as solder. .
Here, the conductive film may be formed on the uppermost layer of the conductive film laminated in a plurality of layers. For example, a conductive path 51 of Cu
On top of A, two layers of Ni coating and Au coating are sequentially applied, three layers of Ni coating, Cu coating and solder coating are sequentially applied, two layers of Ag coating and Ni coating are provided. Those coated in order can be formed. There are many other types and laminated structures of these conductive films, but they are omitted here.

In this circuit device, since the conductive path 51 is supported by the insulating resin 50 as a sealing resin, a support substrate is not required, and the conductive path 51, the circuit element 52 and the insulating resin 5 are not required.
0. This configuration is a feature of the present invention. As described in the section of the related art, the conductive path of the conventional circuit device is supported by a support substrate or supported by a lead frame, and therefore, a configuration that may be unnecessary originally is added. However, this circuit device has a feature that it is thin and inexpensive because it is composed of the minimum necessary components and does not require a support substrate.

In addition to the above configuration, there is provided an insulating resin 50 which covers the circuit element 52 and fills the separation groove 54 between the conductive paths 52 and integrally supports the same.

A separation groove 54 is formed between the conductive paths 51.
By filling the insulating resin 50 here, the conductive path 51 is formed.
This has the merit that the insulation can be prevented at the same time as the separation can be prevented. Furthermore, if the side surface of the conductive path is formed into a curved structure 59, the conductive path 51 can be prevented from coming off more.

The circuit element 52 is covered and the conductive path 5
There is an insulating resin 50 that is filled in the separation groove 54 between the two and that only the back surface of the conductive path 51 is exposed and supported integrally.

The fact that the back surface of the conductive path is exposed is one of the features of the present invention. The back surface of the conductive path can be used for connection to the outside, and has a feature that the through hole TH of the conventional structure as shown in FIG. 28 can be eliminated.

Further, when the circuit element is directly fixed via a conductive film of brazing material, Au, Ag, or the like, the conductive path 51
Is exposed, the heat generated from the circuit element 52A can be transmitted to the mounting board via the conductive path 51A. In particular, the present invention is effective for a semiconductor chip capable of improving characteristics such as an increase in drive current due to heat radiation.

Further, the surface of the separation groove 54 and the surface of the conductive path 51 have substantially the same structure. This structure is
This is a feature of the present invention, and as shown in FIG.
Since the eleven steps are not provided, the circuit device 53 can be moved horizontally as it is. As is clear from the above description, the present circuit device can be made as thin as about 0.3 mm to 0.5 mm. However, since it is very thin and the amount of the insulating resin 50 is much larger than the amount of the conductive path 51, there is a problem that warpage occurs as shown in FIG.

In FIG. 4, the insulating resin 50 may be sealed and molded by a mold using a thermosetting resin or a thermoplastic resin. This process involves insulating resin 5
With the heat treatment for hardening 0, the linear expansion coefficient at the time of molding reaches as high as 30 ppm / ° C. Therefore, the linear expansion coefficient of silicon of the semiconductor chip 52A (3 ppm / ° C.)
The contraction force as shown by the arrow in the drawing acts on the insulating resin 50 due to the temperature difference from the processing temperature to cooling to the normal temperature.

Due to such a shrinking force, the insulating resin 50
When the molded product was cooled to room temperature, the end of the circuit device 53 was lifted up, causing a problem that the external dimensions changed (warped).

For example, the thickness of the insulating resin 50 (400 μm)
m), the height of the end of the insulating resin 50 increases, and the mounting height (FIG. 4: reference t2) when the circuit device is mounted on the mounting substrate increases. Become. In the current direction of miniaturization, such an increase in the height t2 is not permissible, and there is a risk that the height t2 sometimes falls outside the standard.

In consideration of this problem, the present invention provides a slit SLT in at least one of the conductive paths 51A to 51C, or removes the slit SLT from the periphery of the arrangement region of the circuit elements 52A and 52B. Insulating resin 5 toward the periphery
0 is made thinner. By doing so, the amount of the conductive path located on the back surface of the circuit device is reduced, and the amount of the resin existing in the periphery of the arrangement region of the circuit elements 52A and 52B is reduced. Since the contraction force of the insulating resin that causes the curvature is proportional to the amount of the resin, the thickness of the conductive path, and the area of the conductive path, by reducing the amount of the insulating resin, by reducing the area of the conductive path, The contraction force can be reduced, and the degree of curvature can be reduced.

For example, in FIG. 1, it is possible to suppress the lifting amount t1 by providing a slit SLT extending to the back surface of the circuit element 52A in the conductive path 51A or by providing the slit SLT and the inclined surface SL. became. As a method of reducing the amount of the insulating resin, in addition to providing the inclined surface SL, it is also possible to reduce the resin thickness of the peripheral portion by providing a step. As shown in FIG. 2, two types of methods for forming the inclined surface SL or the step can be considered. FIG. 2A shows that the plane of the circuit device 53 is substantially a square. In this case, the inclined surface or the step is provided on each of four sides. FIG. 2B shows that the plane of the circuit device 53 is substantially rectangular. In this case, the inclined surface SL or the step is provided on the opposite short sides.

Also, by forming the inclined surface SL while suppressing the lifting amount t1, the advantage that the change in the mounting height when the semiconductor device is mounted is small is produced.

In FIG. 3, when the insulating resin 50 around the semiconductor chip 52A is lifted by the lifting amount t1, the inclined surface SL prevents the mounting height t2 from increasing. That is, the insulating resin 50 at the peripheral end of the package is reduced by one due to the inclined surface SL.
Since it is cut by about 00 μm, the mounting height t2 does not increase when the peripheral end of the circuit device 53 is lifted by about 50 μm. The outline of the conventional package is indicated by a dotted line. Therefore, the lifting amount t1 is grasped in advance by experiments and other methods,
If the height difference t3 is set to a value larger than the grasped value,
The increase in the mounting height t2 in FIG. 4 can be completely prevented.

As described in the section for solving the problem, FIG.
When the substrate 5 is adhered to the entire back surface of the CSP 6 as shown in FIG. 9, a large warp occurs due to the bimetal principle. This is the same even when the conductive foil is attached to the entire back surface of the circuit device. However, in the present invention, since the conductive foil is finally separated individually, the warpage due to the difference in linear expansion coefficient between the conductive foil and the insulating resin can be significantly suppressed.
Furthermore, by providing the slit SLT, the area of the conductive path can be reduced, and the amount of insulating resin on the conductive path side can be increased, so that the difference between the amount of resin on the front side of the circuit device and the amount of resin on the back side of the circuit device can be reduced. Imbalance can be reduced,
It can contribute to alleviation of warpage. Second Embodiment for Explaining Circuit Device Next, a circuit device 56 shown in FIG. 11 will be described.

This structure is substantially the same as the structure shown in FIG. 1 except that the side surface of the conductive path 51 and / or the side surface of the slit SLT is a curved structure 59 and a conductive film 57 is formed on the surface. . Since the effect of the curved structure 59 has been described in the previous embodiment, the conductive film 5 is used here.
7 will be described.

The first feature is that the second material forming the conductive film 57 has an anchor effect.
Since the eaves 58 are formed of the second material, and the eaves 58 attached to the conductive paths 51 are embedded in the insulating resin 50, an anchor effect is generated and a structure in which the conductive paths 51 can be prevented from coming off is obtained. .

In the present invention, both the curved structure 59 and the eaves 58 generate a double anchor effect to prevent the conductive path 51 from coming off.

The circuit device in which the transistor chip 52A and the passive element 52B are mounted has been described as a circuit device. However, the present invention relates to a circuit device in which one semiconductor chip is sealed as shown in FIG. , As shown in FIG.
A circuit device 81 in which a face-down type element 80 such as SP is mounted, or a circuit device 83 in which a passive element 82 such as a chip resistor or a chip capacitor is sealed as shown in FIG. First Embodiment Explaining Method for Manufacturing Circuit Device Next, a method for manufacturing a circuit device 53 will be described with reference to FIGS. 6 to 10 and FIG. Here, the circuit device 53 in which the conductive path 51 has the curved structure 59 will be described.

First, as shown in FIG. 6, a sheet-shaped conductive foil 60 is prepared. The material of the conductive foil 60 is selected in consideration of the adhesion of the brazing material, the bonding property, and the plating property.
As the material, a conductive foil mainly containing Cu, a conductive foil mainly containing Al, a conductive foil made of an alloy such as Fe-Ni, or the like is used.

The thickness of the conductive foil is preferably about 10 μm to 300 μm in consideration of the later etching.
A 0 μm (2 oz) copper foil was employed. But 300μ
Basically, it is good even if it is more than m or less than 10 μm. As will be described later, it is only necessary that the separation groove 61 shallower than the thickness of the conductive foil 60 can be formed.

The sheet-shaped conductive foil 60 is prepared by being wound into a roll with a predetermined width, and may be conveyed to each step described later, or the conductive foil cut into a predetermined size may be used. It may be prepared and transported to each step described later.

Subsequently, there is a step of removing the conductive foil 60 where the slit SLT is to be formed and the conductive foil 60 excluding at least a region to be the conductive path 51, which is thinner than the thickness of the conductive foil 60. Then, there is a step of coating the insulating resin 50 on the separation groove 61, the slit SLT and the conductive foil 60 formed in this removing step.

First, as shown in FIG. 7, a photoresist PR (etching resistant mask) is formed on the Cu foil 60, and the photoresist PR is patterned so that the conductive foil 60 excluding the region that becomes the conductive path 51 is exposed. . Here, since the slit SLT is also etched, the photoresist PR is not provided in a portion corresponding to the formation region of the slit SLT. Then, as shown in FIG. 8A, etching is performed via the photoresist PR.

The present manufacturing method is characterized in that it is non-anisotropically etched by wet etching or dry etching, and its side surface becomes rough and curved. Note that the depth of the separation groove 61 formed by etching is about 50 μm.

In the case of wet etching, ferric chloride or cupric chloride is employed as an etchant, and the conductive foil is dipped in the etchant or
This etchant is showered.

In particular, as shown in FIG. 8B, immediately below the photoresist PR serving as an etching mask, the etching in the horizontal direction is difficult to proceed, and a deeper portion is etched in the horizontal direction. As shown in the figure, if the opening diameter of the opening corresponding to the position becomes smaller from a position on the side surface of the separation groove 61 upward, the separation groove 61 has a reverse tapered structure, and has a structure having an anchor structure. In addition, by employing a shower ring, etching proceeds in the depth direction and etching in the horizontal direction is suppressed, so that this anchor structure appears remarkably.

In the case of dry etching, anisotropy,
Non-anisotropic etching is possible. At present, it is said that it is impossible to remove Cu by reactive ion etching, but it can be removed by sputtering. Further, etching can be performed anisotropically or non-anisotropically depending on sputtering conditions.

It is needless to say that the side surface of the conductive path 51 can be formed straight or curved depending on the processing method.

In FIG. 7, instead of the photoresist PR, a conductive film having corrosion resistance to an etching solution may be selectively coated. When the conductive film is selectively applied to a portion to be a conductive path, the conductive film serves as an etching protective film, and the separation groove can be etched without employing a resist.
Also in this case, no conductive film is formed on the slit SLT. Materials considered as the conductive coating are Ni, A
g, Au, Pt or Pd. Moreover, these corrosion-resistant conductive films have a feature that they can be utilized as they are as die pads and bonding pads.

For example, an Ag film adheres to Au and also adheres to a brazing material. Therefore, if the Au film is coated on the back surface of the chip, the chip can be thermocompression-bonded to the Ag film on the conductive path 51 as it is, and the chip can be fixed via a brazing material such as solder. Further, since the Au thin wire can be bonded to the Ag conductive film, wire bonding is also possible. Therefore, there is an advantage that these conductive films can be used as die pads and bonding pads as they are.

Subsequently, as shown in FIG. 9, there is a step of electrically connecting and mounting the circuit element 52 to the conductive foil 60 in which the separation groove 61 and the slit SLT are formed.

The circuit element 52 is a semiconductor element 52A such as a transistor, a diode, or an IC chip, and a passive element 52B such as a chip capacitor or a chip resistor. Although the thickness is increased, a face-down semiconductor element such as a CSP or a BGA can be mounted.

Here, the bare transistor chip 52
A is die-bonded to the conductive path 51A, and the emitter electrode and the conductive path 51B, and the base electrode and the conductive path 51B are connected via a thin metal wire 55A fixed by ball bonding by thermocompression bonding or web bonding by ultrasonic waves. 52B is a chip capacitor or a passive element, which is a brazing material such as solder or a conductive paste 55.
B is fixed. When the brazing material is fixed to the conductive path on which the slit SLT is formed via a brazing material, the brazing material also flows on the side surface of the slit SLT, so that the bonding strength between the conductive path and the circuit element increases via the brazing material. Also have.

Further, as shown in FIG.
There is a step of attaching the insulating resin 50 to the slit SLT and the curved separation groove 61. This can be achieved by transfer molding, injection molding, or dipping. As the resin material, a thermosetting resin such as an epoxy resin can be realized by transfer molding, and a thermoplastic resin such as a polyimide resin and polyphenylene sulfide can be realized by injection molding.

In the present embodiment, the thickness of the insulating resin coated on the surface of the conductive foil 60 is adjusted so as to cover about 100 μm from the top of the fine metal wire 55A.
This thickness can be increased or reduced in consideration of the strength of the circuit device.

The feature of this step is that the conductive foil 60 serving as the conductive path 51 becomes a supporting substrate until the insulating resin 50 is covered. Conventionally, as shown in FIG. 29, the conductive paths 7 to 11 are formed by using the support substrate 5 which is not originally required. However, in the present invention, the conductive foil 60 serving as the support substrate is required as an electrode material. Material. Therefore, there is a merit that the operation can be performed while omitting the constituent materials as much as possible, and the cost can be reduced.

Since the separation grooves 61 are formed shallower than the thickness of the conductive foil, the conductive foils 60 are not individually separated as the conductive paths 51. Therefore, the sheet-shaped conductive foil 60
When molding insulating resin,
It has the feature that the work of transporting to the mold and mounting on the mold is very easy.

Further, the separation groove 6 having the curved structure 59
1. Since the slit SLT is filled with the insulating resin 50, an anchor effect occurs in this portion, and the insulating resin 50
Can be prevented, and conversely, the conductive path 51 separated in a later step can be prevented from coming off. As described in the first embodiment of the circuit device, the inclined surface SL is formed in this step. The inclined surface SL can be easily formed by using a mold, but can also be formed by polishing or grinding.

The reason for preventing warpage will be described below from the viewpoint of the manufacturing method. As described above, in a molding process using a mold using a thermosetting resin or a thermoplastic resin as the insulating resin 50, heat treatment is performed to cure the insulating resin 50, and the coefficient of linear expansion during molding is Is 30 ppm / ° C
Also reach. Therefore, due to the difference from the linear expansion coefficient (3 ppm / ° C.) of silicon of the semiconductor chip 52A, the contraction force indicated by the arrow in FIG. work.

The contraction force causes the insulating resin 50
When the mold is cooled to room temperature after molding, the end of the circuit device 53 is lifted, causing a problem that the external dimensions change (warp). (See FIG. 4 for the shape of the warp.) When about 100 μm is covered from the top of the thin metal wire 55 </ b> A and the thickness from the surface of the insulating resin 50 to the conductive path 51 side is 400 μm, the circuit device 53 The thickness is 0.
It is about 5 to 0.6 mm.

On the other hand, this circuit device is actually formed in a matrix as shown in FIG. 10B, and the size of the sealing body M formed by taking eight circuit devices 53, for example, is such that one side T is 45 mm and the other side is 45 mm. Is set to 28 mm. In this case, the end portion is lifted by the contraction force. This warpage naturally occurs also on the side S. If there is a lift at the end of the sealing body M, horizontality cannot be maintained and an unexpected trouble occurs.

For example, along the dotted line in FIG.
Are diced and individually separated as the circuit device 53, the following problem occurs. As shown in FIG. 10C, an encapsulant M is placed on a dicing film DF having a thickness of about 130 μm.
The sealing body M is not flatly bonded even if the back side of the sealing member M is bonded. For example, the gap between the sealing body M and the dicing film DF gradually increases toward the periphery of the sealing body M. Therefore, since the warped portion is not fixed to the dicing film DF, there is a problem that the individually separated circuit devices 53 fly out of the dicing film DF. In addition, during dicing, there is a problem that burrs B are formed downward between the dicing film DF and the sealing body M.
Due to the problem of the burrs B, there arises a problem that the individually separated circuit devices 53 cannot be arranged flat. In addition, sealing body M
As the dicing advances to the end of the sealing body M, the original dicing line of the sealing body M and the position of the dicing blade BL gradually shift. Therefore, as dicing is performed toward the end of the sealing body M, a problem of cutting the sealed semiconductor chip and the conductive path also occurs. This remarkably occurs when the size of the circuit device is as small as about 1 mm × 1 mm and the number of circuit devices is large. Of course, there is a problem that the warpage of the sealing body M deteriorates the work in holding and transporting the sealing body M in the operation of this step.

Therefore, here, after sealing the insulating resin 50, the sealing body M is heated to 100 ° C. to 150 ° C., and a weight of, for example, several kilograms is applied to the entire surface of the sealing body M.
When this load is applied and cooling is performed while suppressing the warpage of the sealing body M, the warpage can be significantly suppressed.

It is to be noted that, when the dicing is performed, if the back surface of the conductive path 51 is arranged upward, there is a merit that the space between the conductive paths can be recognized as a dicing line. The way of warping at this time is opposite to that of FIG. 10C, but the problem caused by this warping is the same as the problem described above. Subsequently, there is a step of chemically and / or physically removing the back surface of the conductive foil 60 and separating it as the conductive path 51. Here, the removing step is performed by polishing, grinding, etching, laser metal evaporation, or the like.

In the experiment, the entire surface was shaved by about 30 μm with a polishing device or a grinding device, and the insulating resin 50 was removed from the separation groove 61.
Is exposed. This exposed surface is indicated by a dotted line in FIG. As a result, the conductive path 5 having a thickness of about 40 μm is formed.
It is separated as 1. Alternatively, the entire surface of the conductive foil 60 may be wet-etched before the insulating resin 50 is exposed, and thereafter, the entire surface may be ground by a polishing or grinding device to expose the insulating resin 50. Further, a photoresist may be formed on the back surface corresponding to the conductive path 51, and the photoresist may be used as an etching resistant mask to perform an etching process.

As a result, a structure in which the surface of the conductive path 51 is exposed to the insulating resin 50 is obtained. Then, the separation groove 61 is shaved to form the separation groove 54 of FIG. (Refer to FIG. 10 above.) Finally, a conductive material such as solder is applied to the exposed conductive path 51 as necessary to complete a circuit device.

When a conductive film is applied to the back surface of the conductive path 51, the conductive film may be formed in advance on the back surface of the conductive foil shown in FIG. In this case, the portion corresponding to the conductive path may be selectively applied. The deposition method is, for example, plating. The conductive film is preferably made of a material having resistance to etching. When this conductive film is employed, it can be separated as the conductive path 51 only by etching without polishing.

In the present manufacturing method, only the transistor and the chip resistor are mounted on the conductive foil 60, but they may be arranged as a unit in a matrix.
One of the circuit elements may be arranged in a matrix as one unit. Also, a plurality of semiconductor chips, a wiring for electrically connecting a plurality of passive elements is formed by the conductive path,
A circuit having a desired function may be configured by the semiconductor chip, the passive element, the wiring, and the like, and the circuits may be arranged in a matrix. In this case, as will be described later, they are individually separated by a dicing device.

Even after the individual separation, the inclined portion S of the present invention
If L is not formed, the circuit device 53 will be lifted by about 100 μm as t1. With this lifting, the height of the end of the insulating resin 50 increases,
The mounting height (FIG. 4: reference t2) when the circuit device is mounted on the mounting board is increased. In the current direction of miniaturization, such an increase in the height t2 is not permissible, and there is a risk that the height t2 sometimes falls outside the standard. The lifting amount t1 is measured with reference to the back surface of the conductive path under the semiconductor chip 52B.

In consideration of this problem, the present invention reduces the thickness of the insulating resin 50 from the periphery of the arrangement region of the circuit elements 52A and 52B toward the periphery of the circuit device 53, thereby reducing the circuit element 52A, The amount of resin existing in the periphery of the arrangement region of 52B is reduced. Also slit SLT
By filling the slit SLT with an insulating resin, the area of the conductive path is reduced, and conversely, the amount of the insulating resin on the back surface side is increased. Since the shrinking force of the insulating resin that causes bending is proportional to the amount of the resin, the shrinking force is reduced by reducing the amount of the insulating resin, and the degree of bending is reduced. As a method of reducing the amount of the insulating resin, in addition to providing the inclined surface SL, it is possible to reduce the resin thickness of the peripheral portion by providing a step.
As shown in FIG. 2, two types of methods for forming the inclined surface SL or the step can be considered. For example, when the size of the circuit device 53 is large, it is desirable to form the inclined surface on four sides. In FIG. 2A, the plane of the circuit device 53 is substantially a square, and the inclined surface or the step is provided on each of four sides. FIG. 2B shows that the plane of the circuit device 53 is substantially rectangular. In this case, the inclined surface SL or the step is provided on the opposite short sides.

In addition to the suppression of the lifting amount t1, the formation of the inclined surface SL produces an advantage that a change in the mounting height of the semiconductor device is small when the semiconductor device is mounted.

Referring to FIG. 3, when insulating resin 50 around semiconductor chip 52A is lifted by lifting amount t1, provision of inclined surface SL can prevent mounting height t2 from increasing. That is, the insulating resin 50 at the peripheral end of the package is reduced by one due to the inclined surface SL.
Since it is cut by about 00 μm, the mounting height t2 does not increase when the peripheral end of the circuit device 53 is lifted by about 50 μm. The outline of the conventional package is indicated by a dotted line. Therefore, the lifting amount t1 is grasped in advance by experiments and other methods,
If the height difference t3 is set to a value larger than the grasped value,
The increase in the mounting height t2 in FIG. 4 can be completely prevented. Although the insulating resin 50 on the upper part of the semiconductor chip 11 is similarly deformed by the resin shrinkage, it is one-tenth of the lifting amount t1 at the peripheral end.
The following transformations are enough.

As shown in FIG. 10A, when the conductive foil 60 is adhered to substantially the entire back surface of the circuit device 53, the difference in the linear expansion coefficient between the conductive foil 60 and the insulating resin 50 causes the circuit device 53 to have a bimetal effect. 53 is greatly warped. However, the conductive paths 51 are separated from each other, the conductive paths 51 are formed thinner than the conductive foil 60, and the slits SLT are formed in at least one of the conductive paths 51. At the same time, an insulating resin is provided between the conductive paths. 50 is embedded. Therefore, this bimetal effect is suppressed, and there is an advantage that warpage is reduced.

According to the above manufacturing method, the insulating resin 50
Is embedded in the conductive path 51 and the slit SLT, and a substantially flat circuit device 56 in which the back surface of the insulating resin 50 and the back surface of the conductive path 51 match can be realized.

The feature of the present manufacturing method is that the conductive path 51 can be separated using the insulating resin 50 as a supporting substrate. The insulating resin 50 is made of a conductive path 51 or a slit SL.
It is necessary as a material to be embedded in T. Unlike the conventional manufacturing method shown in FIG. 29, an unnecessary supporting substrate 5 is not required. Therefore, it has a feature that it can be manufactured with a minimum amount of material and that cost reduction can be realized.

Incidentally, the thickness of the insulating resin from the surface of the conductive path 51 can be adjusted when the insulating resin is adhered in the previous step. Accordingly, the thickness of the circuit device 56 has a characteristic that it can be thick or thin, though it differs depending on the circuit element to be mounted. Here, 40 μm is applied to the insulating resin 50 having a thickness of 400 μm.
The mounting substrate has the m conductive paths 51 and circuit elements embedded therein. Further, since the warp t1 of the circuit device 53 varies depending on the thickness of the insulating resin, the inclined surface S
It is necessary to adjust the height t3 of L. (Refer to FIG. 5 above) Second Embodiment Explaining a Method of Manufacturing a Circuit Device Next, a method of manufacturing a circuit device 56 having an eave 58 will be described with reference to FIGS. Except that the second material 70 serving as the eaves is adhered, the manufacturing method is substantially the same as that of the first embodiment which describes the manufacturing method, and thus the detailed description is omitted.

First, as shown in FIG. 12, a second material 7 having a small etching rate is formed on a conductive foil 60 made of a first material.
A conductive foil 60 coated with “0” is prepared.

For example, when Ni is deposited on a Cu foil, Cu and Ni can be etched at once by ferric chloride or cupric chloride or the like, and Ni is formed as an eave 58 by a difference in etching rate. Therefore, it is suitable. Thick solid line is N
i, a conductive film having a thickness of 1 to 10 μm.
m is preferable. In addition, the eaves 5
8 is easily formed.

The second material may be coated with a material which can be selectively etched with the first material. In this case, first, a film made of the second material is patterned so as to cover the formation region of the conductive path 51, and the first film is formed using this film as a mask.
This is because the eaves 58 can be formed by etching the coating made of the above material. As the second material, Al, A
g, Au and the like are conceivable. (Refer to FIG. 12 above.) Subsequently, there is a step of removing the conductive foil 60 excluding at least a region to be the conductive path 51 so as to be thinner than the thickness of the conductive foil 60.

As shown in FIG. 13, a photoresist PR is formed on Ni 70 and Ni
The photoresist PR may be patterned so that 70 is exposed, and etching may be performed via the photoresist as shown in FIG.

As described above, when etching is performed by using an etchant of ferric chloride or cupric chloride or the like, since the etching rate of Ni70 is lower than the etching rate of Cu60, the eaves 58 appear as the etching proceeds.

The conductive foil 6 on which the separation groove 61 is formed
0, a step of mounting the circuit element 52 (FIG. 15), covering the conductive foil 60 and the separation groove 61 with an insulating resin 50, and chemically and / or physically removing the back surface of the conductive foil 60;
Step of separating as conductive path 51 (FIG. 16) and step of forming a conductive film on the back surface of conductive path to completion (FIG. 11)
Is the same as that of the previous manufacturing method, and the description thereof is omitted. Third Embodiment for explaining a method for manufacturing a circuit device Subsequently, one type of circuit element is arranged in a matrix,
A method of manufacturing a discrete device and an IC device after sealing and separating them individually will be described with reference to FIGS. This manufacturing method is almost the same as that of the first embodiment for explaining the manufacturing method, and therefore, the same parts will be described briefly.

First, as shown in FIG. 17, the sheet-like conductive foil 60
Prepare

The sheet-shaped conductive foil 60 is prepared by being wound into a roll with a predetermined width, and may be conveyed to each step described later, or the conductive foil cut into a predetermined size may be used. It may be prepared and transported to each step described later.

Subsequently, there is a step of removing the conductive foil 60 excluding at least a region to be the conductive path 51 so as to be thinner than the thickness of the conductive foil 60.

First, as shown in FIG. 18, on a Cu foil 60,
A photoresist PR is formed, and the photoresist PR is patterned so as to expose the conductive foil 60 and the slit SLT formed in the conductive path 51 except for the region to be the conductive path 51. Then, as shown in FIG.
Etching may be performed through a hole.

The depth of the separation groove 61 and the slit SLT formed by etching is, for example, 50 μm.
Since the side surface is rough, the adhesiveness with the insulating resin 50 is improved.

The side walls of the separation groove 61 are curved because they are non-anisotropically etched. This removal step
Wet etching and dry etching can be adopted.
The curved structure provides a structure in which an anchor effect is generated. (For details, refer to the first
Incidentally, in FIG. 18, instead of the photoresist PR, a conductive film having corrosion resistance to an etching solution may be selectively coated. If the conductive film is selectively applied to a portion to be a conductive path, the conductive film serves as an etching protection film, and the separation groove and the slit SLT can be etched without using a resist.

Subsequently, as shown in FIG. 20, there is a step of electrically connecting and mounting the circuit element 52A to the conductive foil 60 in which the separation groove 61 is formed.

As the circuit element 52A, a transistor,
Semiconductor devices such as diodes and IC chips, and passive devices such as chip capacitors and chip resistors. Although the thickness is increased, a face-down semiconductor element such as a CSP or a BGA can be mounted.

Here, the bare transistor chip 52
A is die-bonded to the conductive path 51A, and the emitter electrode and the conductive path 51B, and the base electrode and the conductive path 51B are connected via the thin metal wire 55A.

Further, as shown in FIG.
0, insulating resin 50 in slit SLT and separation groove 61
Is attached. This can be achieved by transfer molding, injection molding, or dipping.

In the present embodiment, the thickness of the insulating resin coated on the surface of the conductive foil 60 is adjusted so as to cover about 100 μm from the highest point of the mounted circuit element. This thickness can be increased or reduced in consideration of the strength of the circuit device.

The feature of this step is that, when the insulating resin 50 is coated, the conductive foil 60 that becomes the conductive path 51 becomes a supporting substrate. Conventionally, as shown in FIG. 29, the conductive paths 7 to 11 are formed by using the support substrate 5 which is not originally required. However, in the present invention, the conductive foil 60 serving as the support substrate is required as an electrode material. Material. Therefore, there is a merit that the operation can be performed while omitting the constituent materials as much as possible, and the cost can be reduced.

Since the separation grooves 61 are formed shallower than the thickness of the conductive foil, the conductive foils 60 are not individually separated as the conductive paths 51. Therefore, the sheet-shaped conductive foil 60
When molding insulating resin,
It has the feature that the work of transporting to the mold and mounting on the mold is very easy.

When sealing using a mold, a surface corresponding to the inclined surface SL is formed on the mold, and the inclined surface SL is formed after sealing. Although the warpage is suppressed by the formation of the inclined surface SL, the warp is large due to the bimetal effect since the conductive foil 60 is formed on the entire back surface of the sealing body. Subsequently, there is a step of chemically and / or physically removing the back surface of the conductive foil 60 and separating it as the conductive path 51. Here, the removing step includes polishing, grinding,
This is performed by etching, laser metal evaporation, or the like.

In the experiment, the entire surface was shaved by about 30 μm with a polishing device or a grinding device to expose the insulating resin 50. This exposed surface is indicated by a dotted line in FIG.
As a result, the conductive paths 51 having a thickness of about 40 μm are separated. Alternatively, the entire surface of the conductive foil 60 may be wet-etched before the insulating resin 50 is exposed, and thereafter, the entire surface may be ground by a polishing or grinding device to expose the insulating resin 50.

Further, as shown in FIG.
Is coated with a conductive material such as solder.

Finally, as shown in FIG. 23, there is a step of separating each circuit element to complete a circuit device.

The separation line is indicated by an arrow, and can be realized by dicing, cutting, pressing, chocolate break, or the like. The symbol P shown in FIG. 22 is a line when viewed in plan. If inclined surfaces SL are provided on four sides of the circuit device, these lines are formed in a lattice shape. This lattice-shaped line becomes a chocolate break line and can be used as a dicing recognition line.

In particular, dicing is preferred because it is frequently used in a normal method of manufacturing a semiconductor device and can separate very small objects.

The right side of FIG. 30 shows a flow chart briefly summarizing the present invention. Preparation of Cu foil, Ag or N
The circuit device can be realized by nine steps of plating of i, etc., half etching, die bonding, wire bonding, transfer molding, removal of backside Cu foil, backside treatment of conductive paths, and dicing. Moreover, all processes can be performed in-house without supplying a supporting substrate from a manufacturer. An embodiment describing types of circuit devices and a method for mounting them.

FIG. 24 shows a face-down type circuit element 8.
9 shows a circuit device 81 in which a “0” is mounted. The circuit element 80 corresponds to a bare semiconductor chip, a CSP or BGA with a sealed surface, or the like. FIG. 25 shows a circuit device 83 on which a passive element 82 such as a chip resistor or a chip resistor is mounted. Since they do not require a supporting substrate, they are thin and are sealed with an insulating resin, so that they have excellent environmental resistance.

FIG. 26 illustrates a real layer structure. The circuit devices 53, 81, and 83 of the present invention described above are mounted on conductive paths 85 formed on a mounting substrate 84 such as a printed substrate, a metal substrate, or a ceramic substrate.

In particular, since the conductive path 51A to which the back surface of the semiconductor chip 52 is fixed is thermally coupled to the conductive path 85 of the mounting substrate 84, the heat of the circuit device is radiated through the conductive path 85. be able to. When a metal substrate is used as the mounting substrate 84, the heat dissipation of the metal substrate is also helped, and the temperature of the semiconductor chip 52 can be further reduced. Therefore, the driving capability of the semiconductor chip can be improved.

For example, power MOS, IGBT, SIT,
Transistor for driving large current, IC for driving large current (M
OS type, BIP type, Bi-CMOS type) memory element and the like are preferable.

As the metal substrate, an Al substrate, a Cu substrate, or an Fe substrate is preferable, and an insulating resin and / or an oxide film is formed in consideration of a short circuit with the conductive path 85.

[0130]

As is apparent from the above description, according to the present invention, a plurality of conductive paths electrically separated by a separation groove, a circuit element fixed on the desired conductive path, and a circuit element An insulating resin that covers and is filled in the separation groove between the conductive paths and that exposes only the back surface of the conductive path and integrally supports the conductive paths, thereby minimizing the conductive paths and the insulating resin. As a result, the circuit device has no waste in resources. Therefore, there is no extra component until completion, and a circuit device that can greatly reduce the cost can be realized. Further, by setting the coating thickness of the insulating resin and the thickness of the conductive foil to optimal values, it is possible to realize a very small, thin, and lightweight circuit device.

Further, since only the back surface of the conductive path is exposed from the insulating resin, the back surface of the conductive path can be immediately used for connection to the outside, and the back electrode and the through hole of the conventional structure as shown in FIG. 28 are unnecessary. It has the advantage that can be.

Further, when the circuit element is directly fixed, the back surface of the conductive path is exposed, so that the heat generated from the circuit element can be directly transmitted to the mounting board via the conductive path. In particular, this heat dissipation makes it possible to mount a power element.

In the present circuit device, the surface of the separation groove and the surface of the conductive path have a flat surface substantially coincident with each other, and the circuit device itself can be horizontally moved as it is when a narrow pitch QFP is mounted. Therefore, it is extremely easy to correct the lead deviation.

Further, by providing the slit, the area of the conductive path on the back side of the circuit device can be reduced, and by providing the inclined surface so as to cut off the corner of the insulating resin, the thin circuit can be obtained. The lifting amount t1 around the device can be significantly reduced. Therefore, it is possible to provide a circuit device in which the external dimensions of the present circuit device are less deformed and the change in the mounting height during mounting is suppressed.

Further, the side surfaces of the conductive path have a straight or curved structure, and further, by forming a coating made of the second material on the surface of the conductive path, an eave attached to the conductive path can be formed. Therefore, an anchor effect can be generated, and the conductive path can be prevented from warping or coming off.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a circuit device of the present invention.

FIG. 2 is a diagram illustrating an external shape of a circuit device according to the present invention.

FIG. 3 is a diagram illustrating a circuit device according to the present invention.

FIG. 4 is a diagram illustrating warpage in the circuit device of the present invention.

FIG. 5 is a diagram illustrating a circuit device according to the present invention.

FIG. 6 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 7 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 8 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 9 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 10 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 11 is a diagram illustrating a circuit device according to the present invention.

FIG. 12 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 13 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 14 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 15 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 16 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 17 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 18 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 19 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 20 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 21 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 22 is a diagram illustrating a method for manufacturing a circuit device according to the present invention.

FIG. 23 is a diagram illustrating the method for manufacturing the circuit device according to the present invention.

FIG. 24 is a diagram illustrating a circuit device of the present invention.

FIG. 25 is a diagram illustrating a circuit device of the present invention.

FIG. 26 is a diagram illustrating a method for mounting the circuit device of the present invention.

FIG. 27 is a diagram illustrating a mounting structure of a conventional circuit device.

FIG. 28 is a diagram illustrating a conventional circuit device.

FIG. 29 is a diagram illustrating a method for manufacturing a conventional circuit device.

FIG. 30 is a diagram illustrating a method for manufacturing a circuit device according to the related art and the present invention.

[Explanation of symbols]

 Reference Signs List 50 insulating resin 51 conductive path 52 circuit element 53 circuit device 54 separation groove 58 eaves 59 curved structure SL inclined surface SLT slit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Junji Sakamoto 2-5-5 Keihanhondori, Moriguchi-shi, Osaka Sanyo Electric Co., Ltd. (72) Inventor Shigeaki Mashimo 2-5-2 Keihanhondori, Moriguchi-shi, Osaka No. 5 Sanyo Electric Co., Ltd. (72) Katsumi Okawa 2-5-5 Keihanhondori 2-chome, Moriguchi-shi, Osaka Prefecture (72) Inventor Eiji Hisashi Maehara 2 Keihanhondori, Moriguchi-shi, Osaka 5-5-5 Sanyo Electric Co., Ltd. (72) Inventor Koji Takahashi 29 Kitacho, Isesaki-shi, Gunma F-term in Kanto Sanyo Electronics Co., Ltd. 4M109 AA01 BA01 CA21 DA03 DA04 FA02

Claims (11)

[Claims] 1. A plurality of conductive paths electrically separated by a separating groove, a desired circuit element fixed on the conductive path, and filling the separating groove between the conductive paths while covering the circuit element. A circuit device comprising: an insulating resin that exposes a back surface of the conductive path and integrally supports the conductive path, wherein a slit is provided in the conductive path. 2. The circuit device according to claim 2, wherein the thickness of the insulating resin is reduced toward the periphery of the circuit device. 3. A plurality of conductive paths electrically separated by a separation groove, a semiconductor chip fixed on a desired conductive path,
Connecting means for connecting the electrodes of the semiconductor chip to the other conductive paths; and covering the semiconductor chip and filling the separation grooves between the conductive paths to expose and support the conductive paths at the back surface. A circuit device provided with an insulating resin, wherein a slit is provided in the conductive path, and the film thickness of the insulating resin is reduced from the periphery of the semiconductor chip toward the periphery of the circuit device. . 4. A plurality of conductive paths electrically separated by a separation groove, a desired semiconductor chip and a passive element fixed on the conductive path, a desired electrode of the semiconductor chip and the passive element, and other elements. Connecting means for connecting the conductive path,
An insulating resin that covers the semiconductor chip and the passive element and is filled in the separation groove between the conductive paths and exposes the back surface of the conductive path and integrally supports the insulating chip. Wherein the thickness of the insulating resin is reduced from the region where the semiconductor chip and the passive element are arranged toward the periphery of the circuit device. 5. The circuit device according to claim 1, wherein a side surface of the slit is curved and fitted to the insulating resin. 6. The circuit device according to claim 1, wherein a side surface of the conductive path is curved and fitted to the insulating resin. 7. The circuit device according to claim 1, wherein the conductive path is made of a conductive foil of any of copper, aluminum, and iron-nickel. 8. The circuit device according to claim 1, wherein a conductive film made of a metal material different from that of the conductive path is provided on an upper surface of the conductive path. 9. The circuit device according to claim 8, wherein the conductive film is made of nickel, silver, aluminum or gold. 10. The circuit device according to claim 3, wherein said connecting means is formed of a bonding thin wire. 11. The circuit device according to claim 1, wherein said conductive path is used as an electrode, a wiring, a bonding pad, or a die pad area.