JP2001250885A - Circuit substrate with built-in capacitor and semiconductor device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a circuit substrate with a built-in capacitor, where a high dielectric layer consisting of perovskite structural oxide or the like is used and an Fe-base conductive member is used as a base substrate, at a low cost. SOLUTION: A first conductive layer formed of a high melting point metal such as Cr, a second conductor layer with a layer formed of conductive oxide or noble metal, a dielectric layer and a third electrode layer are laminated one by one on a base substrate consisting of an Fe-base conductive member, and a capacitor is formed. After a capacitor is formed, a base substrate is processed and a via electrically connecting front and rear surfaces is formed, thus obtaining a circuit substrate which is proper for an interposer. A capacitor is used as a decoupling capacitor by connecting a first electrode formed of a base substrate to a ground terminal and a counter electrode to a power supply terminal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board having a built-in capacitor, and more particularly, to a circuit board having a built-in capacitor formed on a base substrate made of a conductive member containing iron as a main component.

[0002]

2. Description of the Related Art Recently, integrated circuit elements have been used in semiconductor chips.
The operation speed has been increasing year by year as the density of ICs (hereinafter, referred to as ICs) increases. In addition, when the degree of integration of the IC increases and the number of elements in the semiconductor chip increases, power consumption tends to be reduced in order to suppress power consumption.

Accordingly, in response to the above-mentioned high-density, high-speed, and low-power IC circuits, passive circuit components such as capacitors mounted on a circuit board on which a semiconductor chip is mounted have been reduced in size and capacity. Further, excellent high frequency response characteristics are required.

[0004] Further, as the operating speed of the IC increases or the power supply voltage decreases, switching noise generated inside the semiconductor chip has been highlighted as a factor that causes malfunction of the IC.

To reduce the switching noise, it is effective to provide a decoupling capacitor between the ground terminal and the power supply terminal. The performance of the capacitor used can correspond to a higher density of IC and an increase in operation speed. Large capacity and low inductance characteristics are required.

In order to increase the capacitance density and lower the inductance of the capacitor, it is effective to reduce the thickness of the dielectric layer, which is also suitable for the above-described power supply voltage reduction. Furthermore, it is effective to apply a material having a high dielectric constant such as a perovskite structure oxide to the dielectric layer.

An intermediate substrate (interposer or semiconductor chip carrier) in which a thin film capacitor having a thin dielectric layer and a thin film dielectric layer effective for reducing inductance is incorporated as a decoupling capacitor is disclosed in Japanese Patent Laid-Open No. 6-3 / 1994.
No. 18672 and Japanese Patent Application Laid-Open No. 9-213835.
No. 0 and Japanese Patent Application Laid-Open No. 7-30257.

On the other hand, in order to increase the capacity of a thin film capacitor, application of a perovskite structure oxide having a high dielectric constant to a dielectric layer has also been proposed, as disclosed in JP-A-9-202621 and JP-A-10-335179. Is 1000
Materials exhibiting a relative dielectric constant of 2500 or more at a frequency of MHz are disclosed.

Further, a method for reducing the inductance of a capacitor by lowering the resistance of an electrode portion constituting the capacitor using a conductive substrate is disclosed in Japanese Patent Laid-Open No. Hei 8-8831.
No. 8 discloses this.

Conventionally, alumina and glass ceramic (borosilicate glass, cordierite glass, anorthite glass, etc.) have been conventionally used as a base substrate for forming a thin film capacitor or a base substrate of an interposer incorporating a thin film capacitor. ), Mullite-based ceramics, and other ceramic-based substrates have been mainly used. As other base substrates, materials such as organic or inorganic polymers, polyimide-epoxy, epoxy-fiberglass, Teflon, and silicon are disclosed in JP-A-6-3186.
No. 72, molybdenum (Mo) and tantalum (T
a), a conductive member such as tungsten (W)
No. 8318 is disclosed.

[0011]

The surface of a ceramic substrate is not always smooth and flat. Therefore, when forming a capacitor on the surface, it is necessary to form a thick dielectric layer, and it is difficult to obtain a capacitor having a high capacitance density and a small inductance component even if a material having a high dielectric constant is used.

In order to increase the capacitance density by reducing the thickness of the dielectric layer and reduce the inductance component, it is necessary to smooth the surface of the ceramic substrate. But,
It is difficult to smooth the surface of the ceramic substrate because voids and the like exist on the surface. Therefore, one method is to use an organic insulating resin such as polyimide or glazed glass for smoothing the surface of the ceramic substrate.However, depending on the heat resistance, mechanical characteristics, and chemical characteristics, there are dielectric materials and processes that can be adopted. Due to limitations, a circuit board with a built-in capacitor having a sufficient capacity is not always obtained.

For example, in a capacitor using a perovskite structure oxide having a high dielectric constant as a dielectric layer, it is necessary to perform a high-temperature process at 600 ° C. or more in an oxidizing atmosphere in order to sufficiently bring out its characteristics. . Therefore,
Since it is difficult to apply an organic insulating resin or glazed glass to a high-temperature process of 600 ° C. or more, when using an organic insulating resin or glazed glass as a base, a circuit board incorporating a capacitor having a sufficient capacitance density is required. Hard to get. Further, in the case of the perovskite structure oxide, RTA (R
apid Thermal Anealing) process is often included, and cracks are likely to occur in the ceramic base substrate. Furthermore, even when the conductive via in the ceramic base substrate is made of a material having poor heat resistance in an oxidizing atmosphere such as Cu or W, a high-temperature process in an oxidizing atmosphere cannot be applied.

As described above, when a ceramic-based material is used as a base substrate, a capacitor having a capacitance corresponding to the dielectric material is built in even if a dielectric layer made of a perovskite structure oxide having a high dielectric constant is used. It is difficult to obtain a circuit board that has been set.

When an organic insulating resin substrate such as an organic (or inorganic) polymer, a polyimide-epoxy, an epoxy-fiber glass, or Teflon (registered trademark) is used as a base substrate,
A dielectric material and a process which can be applied are restricted by its heat resistance and mechanical characteristics, and a circuit board having a capacitor having desired characteristics is not always obtained.

The reason for this is that, as described above, the organic insulating resin substrate has poor heat resistance, and it is difficult to apply a high-temperature process at 600 ° C. or higher. Therefore, the substrate is made of a perovskite oxide having a high dielectric constant. This is because even a capacitor using a dielectric layer cannot obtain a capacity corresponding to the dielectric material.

As a base substrate material for solving the above problems, a metal plate made of a high melting point metal such as molybdenum (Mo), tantalum (Ta), or tungsten (W) proposed in JP-A-8-88318 is used. is there. By using these as a base substrate, a high-temperature process of 600 ° C. or higher can be applied. Further, according to JP-A-8-88318, a thin film capacitor having a small equivalent series resistance can be obtained by using these refractory metals for one electrode.

In this known example, platinum (Pt) is provided to prevent oxidation of a base substrate made of a high melting point metal. However, in order to prevent short-circuiting of a thin film capacitor when formed on a conductive base substrate, No special consideration was given.
In addition, by providing vias in the base substrate that are electrically separated from the base substrate, capacitors are formed on both sides of the base substrate to increase the capacity of the built-in capacitor or to be used as an interposer. Not considered. Therefore, when a metal such as Mo, Ta, or W is used as an actual process, it must be said that it is extremely difficult to form through holes and vias at low cost. Further, the base substrate made of the high melting point metal material is not always inexpensive.

Therefore, the first object of the present invention is to provide Mo or T
a, a capacitor using a conductive member having iron (Fe) as a main component, which is less expensive than W, as a base substrate and using a dielectric layer having a high dielectric constant such as a perovskite structure oxide requiring a high-temperature heat process; It is an object of the present invention to provide a structure of a circuit board which can be embedded.

A second object of the present invention is to provide Mo, Ta, W
It is possible to incorporate a capacitor using a dielectric layer having a high dielectric constant such as a perovskite structure oxide requiring a high-temperature thermal process as a base substrate using a conductive member containing Fe as a main component, which is inexpensive. An object of the present invention is to provide a circuit board suitable for an interposer.

A third object of the present invention is to provide a semiconductor device capable of reducing switching noise by using a capacitor built in the circuit board as a decoupling capacitor.

[0022]

SUMMARY OF THE INVENTION According to the present invention, a first substrate is provided on at least one main surface of a base substrate made of a conductive member.
A second conductive layer formed of at least one or more conductive thin film layers, a dielectric layer formed of at least one or more layers, and a second conductive layer formed of at least one or more conductive thin film layers. And a third electrode layer is sequentially stacked, a first electrode is constituted by the base substrate, the first conductor layer and the second conductor layer, and a second electrode is constituted by the third conductor layer.
A circuit board provided with a capacitor having the dielectric layer sandwiched between the first electrode and the second electrode, wherein the base substrate has at least nickel (Ni), chromium ( Cr), cobalt (Co), an iron (Fe) -based alloy containing any of aluminum (Al), and the first conductor layer has a high melting point metal having a melting point of 1000 ° C. or more, or a high melting point metal thereof. The capacitor according to claim 1, wherein the conductive thin film layer made of nitride and in contact with the dielectric layer of the second conductive layer is made of a conductive oxide or a noble metal. Achieved by a circuit board.

That is, by forming the base substrate for forming the capacitor from an Fe-based alloy containing at least one of Ni, Cr, Co and Al, the cost is lower than when the base substrate is made of Mo, Ta or W. it can. The short circuit of the capacitor due to the base substrate made of the Fe-based alloy is caused by the first conductive layer made of a high melting point metal having a melting point of 1000 ° C. or more or its nitride, and the conductive thin film in contact with the dielectric layer. This is prevented by covering the base substrate with a second conductor layer whose layer is made of a conductive oxide or a noble metal.

[0024] The reason for this is that the surface roughness of the base substrate can be reduced by coating the laminated film composed of the first conductive layer and the second conductive layer, and the surface of the base substrate can be prevented from being roughened due to oxidation. Because. According to experiments by the inventors, it was difficult to sufficiently obtain this effect by coating with only a Pt film as described in JP-A-8-88318. This is because it was difficult to obtain a defect-free Pt film. Further, in the second conductive layer, a layer that is in contact with the dielectric layer is formed of a conductive oxide or a noble metal, thereby suppressing oxygen extraction from the dielectric and reducing the film quality of the dielectric layer due to oxygen deficiency. Deterioration is prevented.

According to the present invention, a first conductor layer and at least one or more conductive layers are provided on two main surfaces of a first main surface and a second main surface of a base substrate made of a conductive member. A second conductive layer composed of a thin film layer, a dielectric layer composed of at least one or more layers, and a third conductor layer composed of at least one conductive thin film layer are sequentially laminated; A first electrode is constituted by the substrate, the first conductor layer and the second conductor layer, a second electrode is constituted by the third conductor layer, and the first electrode and the second electrode are constituted by the third conductor layer. A circuit board provided with a capacitor having the dielectric layer sandwiched by two electrodes, wherein the base substrate is made of an Fe-based alloy containing at least one of Ni, Cr, Co, and Al; and The first conductor layer has a melting point of 1000 ° C. or higher. The layer made of a refractory metal or a nitride thereof, and the layer of the second conductor layer that contacts the dielectric layer is made of a conductive oxide or a noble metal, and the first layer of the base substrate The second electrode of the capacitor provided on the main surface and the second electrode of the capacitor provided on the second main surface are electrically connected to each other by a conductive via provided in the base substrate via an insulating layer. Thus, a circuit board with a built-in capacitor is formed.

That is, the above-mentioned capacitor is formed on both the front and back surfaces of the base substrate, and the second electrodes of the capacitors formed on the front and back surfaces are electrically connected to each other by conductive vias provided in the base substrate. As a result, the capacitor on the first main surface side and the capacitor on the second main surface side are connected in parallel, and the capacity of the capacitor built in the circuit board can be increased.

Further, in the above-mentioned circuit board, at least one of the conductive thin film layers constituting the second conductor layer is formed by a dip coating method, a spin coating method, a spray coating method, a roll coating method,
It is formed by any of flow coating methods. According to this, a liquid material is applied on the first conductor layer, and the repair of a defect such as a pinhole on a base for forming a capacitor and the reduction of surface irregularities are effectively performed. Therefore, it is possible to prevent a short circuit due to a base defect of the capacitor formed on the base substrate made of the conductive member.

According to the present invention, in the above-mentioned circuit board, the high-melting point metal constituting the first conductor layer may be Cr, Ti, N
It is selected from any one of i, W, Ta, and Mo. In a thin film layer made of such a material, the progress of oxidation into the inside of the layer is slow, and the oxide in an oxygen-deficient state shows electrical conductivity. This can prevent the base substrate from being roughened due to oxidation while suppressing an increase in resistance of the first electrode.

Further, the conductive oxide constituting the second conductor layer is indium oxide, tin oxide, a mixture of indium oxide and tin oxide, zinc oxide, ruthenium oxide, rhodium oxide, rhenium oxide, iridium oxide, iridium oxide, A perovskite oxide (Ba, C) comprising at least one element of osmium, barium (Ba), calcium (Ca), strontium (Sr), titanium (Ti) and oxygen (O)
a, Sr) TiO _x (where x <3).

Thus, deterioration of the film quality of the oxide dielectric layer due to oxygen extraction and oxidation of the first conductor layer are suppressed. The reason is that the diffusion of oxygen from the dielectric layer side to the first conductor layer side is suppressed by the presence of this layer.

According to the present invention, the dielectric layer of the capacitor incorporated in the circuit board is made of SrTiO ₃ , (Ba, Sr) Ti
O ₃ , BaTiO ₃ , (Pb, La) (Zr, Ti) O ₃ , P
b (Zr, Ti) O ₃ , PbTiO ₃ , Pb (Mg _1/3 N
b _2/3 ) O ₃ , and at least one material selected from perovskite structure oxides.

The present invention also provides at least one or more mounting connection terminals connected to the first electrode and at least one or more mounting connection terminals connected to the second electrode. By connecting the semiconductor chip to the terminal, a decoupling capacitor can be provided near the IC element.

The connection terminal for mounting of the circuit board is connected to a wiring board and / or a semiconductor chip, and the first electrode and the second electrode are used as either a power supply layer or a ground layer. It is. As a result, a large-capacity decoupling capacitor can be arranged close to the semiconductor chip, and switching noise can be reduced without lowering the mounting density of the semiconductor device.

[0034]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a sectional view of a main part of the first embodiment. In the figure, 1000 is a circuit board to which the present embodiment is applied, 40 is a capacitor, 1 is a base substrate made of a 42 alloy alloy (Fe alloy containing about 42% Ni), and 2 is a Cr substrate. 1 is a conductor layer, 3 is a second conductor layer made of a mixture of indium oxide and tin oxide (hereinafter abbreviated as ITO), and 4 is a conductor layer.
Reference numeral 5 denotes a dielectric layer made of (Ba, Sr) TiO3, and 5 denotes a base substrate 1, a first conductive layer 2, and a second conductive layer 3.
The first electrode layer of the capacitor 40 made of
The second electrode layer of the capacitor 40 made of a Cu / Cr laminated film is shown. In this figure, the portions indicated by reference numerals 2 to 6 are enlarged in order to make the details of the portion constituted by the thin film layer easy to understand. In particular, the film thickness direction was expanded.

In this embodiment, a 42 alloy is used as the base substrate 1, and the main surface of the base substrate 1 on which the capacitor 40 is formed is formed of the first conductive layer 2 made of Cr and the I
It is covered with a laminated film of a second conductor layer made of TO. This is where the present invention is applied. With such a configuration, F which is easily oxidized like a 42 alloy alloy
Provided is a circuit board capable of incorporating a capacitor using a dielectric layer having a high dielectric constant such as a perovskite structure oxide formed by a high-temperature thermal process even when an e-based alloy is used as the base substrate 1. are doing.

In the present embodiment, (Ba, Sr) TiO ₃
Is used as a dielectric layer, but a heat treatment at 600 ° C. or more in an oxidizing atmosphere is required to bring out the performance of the dielectric layer. However, when exposed to this condition, the 42 alloy is oxidized and its surface irregularities increase.
As a result, the capacitor formed on the base substrate 1 made of the 42 alloy is short-circuited.

In the present embodiment, the 42 alloy base substrate 1 is covered with a laminated film of the first conductor layer 2 made of Cr and the second conductor layer 3 made of ITO. Capacitor 4 formed on substrate 1
0 short circuit is prevented. That is, the oxidation of the 42 alloy base substrate is prevented by the laminated film of the first conductor layer 2 made of Cr and the second conductor layer made of ITO.
Cr is oxidized by diffusion of oxygen from ITO, but the electrical conductivity is not lost, and the resistance of the first electrode layer 5 is hardly increased. Also, the IT used for the second conductor layer 3
Since O is an oxide, diffusion of oxygen from the dielectric layer 4 side to the first conductive layer 2 side is suppressed, and deterioration of the film quality of the dielectric layer due to oxygen deficiency can be prevented.

In the experiments conducted by the inventors, short-circuiting of the capacitor formed on the 42-alloy base substrate 1 was only achieved by coating the base substrate 1 made of the 42-alloy with a single thin film layer of ITO, Cr, Pt, or the like. The effect of prevention was small.

In order to obtain the effect of this embodiment, the first
The conductive layer 2 is formed by a dielectric layer forming process (film formation,
It is necessary that the oxide exhibit electrical conductivity in an oxygen-deficient state (including heat treatment). That is, Cr, T
A high melting point metal having a melting point of 1000 ° C. or more, such as i, Ni, W, Ta, and Mo, is preferable as the first conductor layer 2.

A noble metal such as Pt is also effective as the first conductor layer 2, but is expensive, and its processing process is Cr,
It is more difficult than a high melting point metal such as Ti, Ni, W, Ta, and Mo, and has a problem in adhesion to a base.

It is important that the second conductor layer 3 has resistance to a dielectric layer forming process (including film formation and heat treatment) and does not deteriorate the film quality of the dielectric layer 4. Therefore, in this embodiment, ITO which is an oxide is used, but the dielectric layer 4 made of an oxide such as a perovskite structure oxide is used.
If oxygen can be prevented from diffusing from
It is not limited to TO. That is, the layer of the second conductor layer 3 which is in contact with the dielectric layer 4 is a precious metal such as Pt, indium oxide, tin oxide, a mixture of indium oxide and tin oxide, zinc oxide, ruthenium oxide, rhodium oxide, Rhenium oxide, iridium oxide, osmium oxide, barium (Ba), calcium (Ca), at least one element of strontium (Sr), titanium (Ti) and oxygen (O) perovskite structure oxide (Ba, Ca,
Any conductive oxide such as Sr) TiO _x (where x <3) may be used.

In the case of the present embodiment, the base substrate 1
Is used, but any iron-based alloy containing Fe as a main component may be used. Here, 42 alloy is selected as the base substrate 1 because it has a coefficient of thermal expansion (about 4 ppm / deg) close to that of a silicon chip. However, at least Ni, Cr, Co, Al
The Fe-based alloy containing any one of the above can adjust the coefficient of thermal expansion by changing its composition, and can be applied as a mounting substrate for a semiconductor chip such as a gallium arsenide chip.

In order to increase the capacitance of the capacitor 40, SrTiO ₃ , (Ba, Sr) TiO ₃ , Ba
TiO ₃ , (Pb, La) (Zr, Ti) O ₃ , Pb (Zr, T
i) O ₃ , PbTiO ₃ , Pb (Mg _1/3 Nb _2/3 )
It is preferable to use a perovskite structure oxide having a high dielectric constant, such as O ₃ , as the dielectric layer 4, but it is not limited to this. For example, tantalum oxide film, silicon nitride film,
A silicon oxide film, an alumina film, or the like can also be used.
However, in consideration of a high-temperature process in an oxidizing atmosphere for film formation, heat treatment (including RTA), and the like, the effects of the present invention can be sufficiently exhibited in the case of a perovskite structure oxide.

Next, the manufacturing method of the first embodiment will be described. FIG. 6 is a process flow chart showing an example of a manufacturing process of the circuit board 1000 in a sectional view of a main part. Hereinafter, the manufacturing process of the circuit board 1000 will be described with reference to FIG.

(6A) Preparation of the base substrate 1: The main surface side of the base substrate 1 made of a 42 alloy, on which capacitors are formed, is smoothed by polishing or micro-dust treatment (trade name of Nikkoshi Co., Ltd.). Next, the surface is cleaned by using an organic solvent and an alkaline detergent.

(6B) Formation of the first conductor layer 2: A Cr film is formed on both surfaces of the base substrate 1 by a sputtering method to form the first conductor layer 2. The thickness of the Cr film is, for example, 150 nm on the front surface side where the capacitor is formed and 300 nm on the back surface side. Here, the reason for increasing the film thickness on the back surface side is to maintain the balance between the fact that the back surface is not smoothed and the film stress on the front and back surfaces after the capacitor is formed.

(6C) Formation of the second conductor layer 3: An ITO film is formed on the surface of the base substrate 1 where the capacitor 40 is to be formed by the MOD method. The thickness of the ITO film is, for example,
60 nm.

(6D) Formation of the dielectric layer 4: On the first electrode layer 2, a physical method such as a sputtering method or a known method such as a chemical vapor deposition method, a sol-gel method, or a MOD method is used.
A 0 nm (Ba, Sr) TiO3 film is formed, and a dielectric layer 4 is formed.
And Next, a heat treatment at 600 ° C. to 900 ° C. is performed in an atmosphere containing an oxidizing gas such as oxygen or water vapor to improve the crystallinity of the dielectric layer 4. In this case, RTA is performed as needed.

(6E) Formation of the second electrode layer 6: 100 nm Cr film and 500 nm C
A Cr / Cu / Cr film in which a u film is laminated is formed. Next, unnecessary portions are removed by a known method such as a photo-etching method, and a predetermined pattern including the second electrode layer 6 and a predetermined pattern including the dielectric layer 4 are formed. Next, heat treatment is performed to recover the characteristics of the capacitor 100 degraded in the second electrode pattern forming step. The heat treatment condition may be determined while observing the characteristic recovery state of the capacitor 100. Although a Cr / Cu / Cr laminated film is used here as the second electrode layer 6, Pt, Ti, ruthenium or the like is used.
Another material such as (Ru) may be used. Needless to say, the film formation technique is not limited to the sputtering method. Further, the thickness of the second electrode layer 6 is not limited to the value here.

Through the above steps, the circuit board 1000 shown in FIG. 1 is completed. In the manufacturing method shown here, the ITO film is formed by the MOD method in the step (6C). In the MOD method, a film is obtained by applying a liquid material and baking it. Therefore, the pinholes existing in the first conductive layer 2 and the scratches and small holes caused by the base substrate 1 are repaired. As a result, the capacitor 40
The effect of the present invention, which is to prevent short-circuiting and increase the production yield, is made effective. In this case, a dip coating method, a spin coating method, a roll coating method, a spray coating method, a flow coating method, or the like may be used as a method of applying a liquid material.

Here, the first conductor layer 2 C
The thickness of the r film is 150 nm, and the thickness of the IT
Although the thickness of the O film is set to 60 nm, it is not limited to this, and may be determined by considering the state of occurrence of a short circuit of the capacitor 40 and the warped state of the substrate. Also, the dielectric layer 4
In the case of the (Ba, Sr) TiO ₃ film of
The thickness is not limited to 0 to 400 nm, and may be determined in view of necessary capacity, occurrence of short circuit, occurrence of cracks, and warpage of the substrate.

As described above, according to the present embodiment, the perovskite structure formed by the high temperature process can be used even when the base substrate is made of Mo, Ta, W, or other inexpensive conductive material containing Fe as a main component. It is possible to provide a circuit board which can form a film of an oxide or the like and can incorporate a capacitor using a dielectric layer having a high dielectric constant.

Next, a second embodiment will be described with reference to FIG.

FIG. 2 is a sectional view of a main part of a circuit board according to a second embodiment. In the figure, reference numeral 2000 denotes a circuit board to which the present invention is applied, 7 denotes a first insulating layer provided on the capacitor 40, and 8 denotes a first insulating layer of the capacitor 40.
The terminal metallization layer (connection terminal) connected to the electrode 5 of
Reference numeral 9 denotes a terminal metallization layer (connection terminal) connected to the second electrode 6 of the capacitor 40, and reference numeral 10 denotes a through hole provided in the dielectric layer 4. Other symbols are the same as those in FIG. In FIG. 2 as well, the portions indicated by reference numerals 2 to 10 are enlarged in order to make the details of the portion constituted by the thin film layers easy to understand. In particular, the film thickness direction was expanded.

In this embodiment, basically, the first insulating layer 7 is formed on both sides of the circuit board 1000 of the first embodiment, and the first insulating layer 7 and the dielectric layer 4 are formed. The contact terminal metallization layers 8 and 9 are provided in the through hole 10 formed in the above. Therefore, also in the case of the present embodiment, the first
The same effect as that of the embodiment can be obtained. That is, also in this embodiment, even when a conductive member mainly composed of Fe, which is cheaper than Mo, Ta, and W, is used as the base substrate, a dielectric constant such as a perovskite structure oxide requiring a high temperature process is used. Circuit board capable of incorporating a capacitor using a high dielectric layer.
The first insulating layer 7 is made of an organic insulating film such as polyimide or epoxy, and the terminal metallization layer is made of chromium (Cr) and nickel in consideration of solder connection.
(Ni), a laminated film of gold (Au), a laminated film of Cr and a Ni—Cu alloy, a laminated film of Cr and a Ni—W alloy, and the like are used.

In this embodiment, basically, the first insulating layer 7 is formed on both sides of the circuit board 1000 of the first embodiment, and the first insulating layer 7 and the dielectric layer 4 are formed. The contact terminal metallized layers 8 and 9 are provided in the through hole 10 formed in the above. Therefore, the same effects as those of the first embodiment can be obtained in the case of the present embodiment.

That is, also in this embodiment, Mo and T
a, a capacitor that uses a conductive member mainly composed of Fe, which is less expensive than W, as a base substrate and uses a dielectric layer having a high dielectric constant such as a perovskite structure oxide that requires a high-temperature thermal process. And a circuit board that can be provided. Note that an organic insulating film such as polyimide or epoxy is used as the first insulating layer 7, and chromium (Cr), nickel (Ni), and gold (Au) are used as terminal metallization layers in consideration of solder connection and the like. , A laminated film of Cr and a Ni—Cu alloy, a laminated film of Cr and a Ni—W alloy, and the like.

In this configuration, each terminal metallization layer (connection terminal) 8, 9 is connected to another wiring board (not shown) or a semiconductor chip (not shown), and the capacitor 40 is connected to a desired element (IC). It can be arranged in the vicinity. For this reason,
By connecting the first electrode 5 and the second electrode 6 of the capacitor 40 to a power supply terminal and a ground terminal, it is possible to use the capacitor 40 as a decoupling capacitor.

Further, by applying the present invention, a capacitor having a small dielectric layer thickness can be manufactured with a good yield, which is effective for reducing switching noise of a semiconductor device.
A circuit board having a built-in decoupling capacitor having a small inductance component can be provided at low cost.

The third embodiment will be described with reference to FIG.

FIG. 3 is a sectional view of a main part of a circuit board according to a third embodiment. In the figure, reference numeral 3000 denotes a circuit board to which the present invention is applied, 12 denotes a conductive via provided in the base substrate 1, 11 denotes a conductive via 12 and a second insulating layer that insulates the base substrate 1, 13 denotes Denotes a conductive thin film pattern, 14 denotes a third insulating layer provided on the first insulating layer 7, 100 denotes the first main surface side of the circuit board 3000, and 200 denotes the second main surface side of the circuit board 3000. The main surface side is shown. Other reference numerals are the same as those in FIGS. Also in the case of FIG. 3, the portions indicated by reference numerals 2 to 14 are enlarged in order to make the details of the portions formed by the thin film layers easy to understand. In particular, the film thickness direction was expanded.

Circuit board 3000 in the present embodiment
Is that the capacitor 40 is formed not only on the first main surface side 100 but also on the second main surface side 200.
The capacitor 4 on the first main surface side 100 and the capacitor 40 on the second main surface side 200 are connected in parallel by the conductive via 12 formed therein. The other configuration is the same as that of the second embodiment. Therefore, in the case of the present embodiment, the same effect as in the case of the second embodiment can be obtained.

That is, the following effects can be obtained.

(1) Even when a conductive member mainly composed of Fe, which is less expensive than a high melting point metal plate made of Mo, Ta, or W, is used as a base substrate, a perovskite structure oxide or the like which requires a high temperature process is used. Further, it is possible to provide a circuit board which can incorporate a capacitor using a dielectric layer having a high dielectric constant.

(2) By connecting the first electrode 5 and the second electrode 6 of the capacitor 40 to a power terminal or a ground terminal, the capacitor 40 can be used as a decoupling capacitor.

(3) By applying the present invention, a capacitor with a small dielectric layer thickness can be manufactured with good yield, and a circuit board having a built-in decoupling capacitor with a small inductance component effective for reducing switching noise of a semiconductor device can be manufactured. It can be provided at low cost.

Further, in the case of the present embodiment, since capacitor 40 on first main surface side 100 and capacitor 40 on second main surface side 200 are connected in parallel, they can be built in circuit board 3000. The capacitance of the capacitor can be made larger than that of the circuit board 1000 of the first embodiment or the circuit board 2000 of the second embodiment.

Next, a method of manufacturing the circuit board 3000 shown in FIG. 3 will be described. FIG. 7 is a process flow chart showing an example of a manufacturing process of the circuit board 3000 in a sectional view of a main part.

(7A) Formation of Capacitor 40 on Front and Back Surfaces of Base Substrate 1: Base substrate 1 made of a 42 alloy alloy by the same steps as in the first embodiment shown in (6A) to (6D) of FIG. The capacitor 40 is formed on the first main surface side 100 and the second main surface side 200 of FIG. Material used is 1st
This is the same as the embodiment. That is, the first conductor layer 2 is a Cr film, the second conductor layer 3 is an ITO film, the dielectric layer 4 is a (Ba, Sr) TiO3 film, and the second electrode layer 6 is a C film.
An r / Cu / Cr film.

(7B) Processing of the second electrode layer 6 of the capacitor 40 formed on the first main surface side: The pattern separation of the second electrode layer 6 is performed by using a known method such as photo etching. 1 provided on the main surface side 100
Of the second electrode pattern 6 is formed.

(7C) Processing of the dielectric layer 4 of the capacitor 40 formed on the first main surface side:
The dielectric layer 4 is processed using a known method, and unnecessary portions of the dielectric layer 4 are removed.

(7D) Formation of via 12 on first main surface side:
Using a known method such as a photoetching method or a laser processing method, the second conductive layer 3 on the first main surface side 100 is removed.
The conductive layer 2 and the base substrate 1 are sequentially processed to form a ring-shaped groove 15 and a portion 120 on the main surface side of the via 12. Here, the first conductor layer 2 is provided on the surface side of the portion 120 on the first main surface side of the via 12.
And the second conductor layer 3 is left, but these may be removed.

(7E) Filling of second insulating layer on first main surface side 100 and formation of first insulating layer: A prepreg or RCC (Resin c
oatedcopper) or other organic insulating sheet.
Of the second insulating layer 11 in the groove 15 around the conductive via 12 on the first main surface side.
10 and at the same time, a first insulating layer 7 is formed on the first main surface side 100. In addition, as an organic insulating sheet,
The selection may be made in consideration of the embedding property in the ring-shaped groove 15, the workability of through-hole processing, and the heat resistance. Further, the liquid insulating material may be formed by another method such as a dipping method, a printing method, a spray coating, and a transfer method. Also,
In the present embodiment, the second insulating layer 11 and the first insulating layer 7
Are formed in the same step and using the same material, but the present invention is not limited to this, and they may be formed in different steps using different materials. (7F) Processing of second main surface side 200 and formation of insulating layer
In the above steps (7B) to (7E), the second main surface side of the conductive via 12 is formed by processing the second main surface side 200, and the second insulating layer 11 is formed.
Is filled, and the first insulating layer 7 is formed on the second main surface 200. Thereby, the conductive via 12
And a first insulating layer 7 and a second insulating layer 11 are formed.

(7G) Formation of conductive thin film pattern 13:
Using a well-known method such as a photo-etching method or a laser processing method, the first main surface side 100 and the second main surface side 20 are formed.
A through-hole is formed in the first insulating layer 7 of FIG. Then, using a physical method such as a sputtering method or a vacuum deposition method, a known method such as a chemical vapor deposition method, a sol-gel method, or a plating method,
Then, a conductive thin film layer is formed on the main surface side 100 and the second main surface side 200. Next, the conductive thin film layer is processed by using a known method such as a photoetching method, and the first main surface side 10
0 and the conductive thin film pattern 1 on the second main surface side 200
Form 3 As a material used for the conductive thin film pattern 13, a material having low resistance such as Cu or Al is preferable,
However, it is not limited to these. Considering reliability,
What is necessary is just to select the material and the layer configuration.

After the above steps, both surfaces of the circuit board shown in FIG. 7G are covered with the third insulating layer 14, and through holes are formed at predetermined locations. Next, by providing terminal metallization layers (connection terminals) 8 and 9 in through holes provided in the third insulating layer 14 on the first main surface side 100, the circuit board 3000 is completed.

The characteristic feature of the circuit board manufacturing method described here is that the two main surfaces of the base substrate 1 (the first main surface side 1
00 and the second main surface side 200), a conductive via 12 made of the same conductive member as the base substrate is formed in the base substrate 1, and the first conductive via 12 Is connected in parallel to the capacitor 40 on the main surface side 100 and the capacitor 40 on the second main surface side 200. According to such a manufacturing method, it is possible to form the conductive via 12 in the base substrate 1 while increasing the formation temperature of the capacitor 40. That is, SrTi
O ₃ , (Ba, Sr) TiO ₃ , Pb (Zr, Ti) O ₃ , P
When a capacitor using a dielectric layer composed of a perovskite structure oxide such as b (Mg _1/3 Nb _2/3 ) O ₃ is formed on a circuit board with vias, a high-temperature process of 600 ° C. or more can be applied. Become.

As described above, according to the present embodiment, the base member is made of a conductive member mainly composed of Fe, which is less expensive than a high melting point metal plate made of Mo, Ta, W, etc. It is possible to provide a circuit board with vias, in which capacitors using a dielectric layer having a high dielectric constant, such as a perovskite structure oxide formed by the high temperature process described above, are provided on both sides of the base substrate 1.

In the present embodiment, the conductive vias 12 in the base substrate 1 are formed of the same member as the base substrate 1, but the present invention is not limited to this. A through-hole is provided in the base substrate 1, the second insulating layer 11 is filled, a through-hole is opened again, and the through-hole is filled with another material such as Cu to form the conductive via 1.
2 may be formed.

Next, a fourth embodiment will be described with reference to FIG.

FIG. 4 is a cross-sectional view of the main part. In the figure, reference numeral 4000 denotes a circuit board to which the present invention is applied, and other reference numerals are the same as those in FIGS. In circuit board 4000, terminal metallization layer 8 connected to first electrode layer 5 of capacitor 40 and terminal metallization layer 9 connected to second electrode layer 6 are connected to first main surface side 1
00 and the second main surface side 200.
Terminal metallization layers 8 provided on first main surface side 100 and second main surface side 200 are connected by conductive base substrate 1, and terminal metallization layers 9 are formed by conductive vias 12.
Connected by As the first insulating layer 7, the second insulating layer 11, and the third insulating layer 14, an organic insulating film such as polyimide or epoxy is used. Terminal metallization layer 8,
9, when solder connection is considered, Cr, Ni, A
u, a laminated film of Cr and a Ni—Cu alloy,
A stacked film of an i-W alloy or the like is used.

In FIG. 4 as well, the portions indicated by reference numerals 2 to 14 are enlarged in order to make the details of the portion constituted by the thin film layers easy to understand. In particular, the film thickness direction was expanded.

In this embodiment, basically, in the circuit board 2000 of the second embodiment, not only the first main surface side 100 (capacitor formation surface) of the base substrate 1 but also
The second main surface 200 (the surface opposite to the surface on which the capacitor is formed) is also provided with connection terminals with other wiring boards and semiconductor chips. In this configuration, a semiconductor chip (not shown) is provided on the first main surface side 100 connection terminals (terminal metallization layers) 8 and 9, and the second main surface side 20 on the opposite side.
Another wiring board (not shown) is connected to the 0 connection terminals (terminal metallization layers) 8 and 9. That is, the circuit board 400
0 can be used as an intermediate substrate (interposer) with a built-in capacitor. Therefore, the decoupling capacitor can be arranged close to the semiconductor chip without lowering the mounting density. It is also apparent that the present embodiment has the same effects as the second embodiment described below.

(1) Even when a conductive member mainly composed of Fe, which is less expensive than a high melting point metal plate made of Mo, Ta, or W, is used as a base substrate, a perovskite structure oxide or the like which requires a high temperature process is used. Further, it is possible to provide a circuit board which can incorporate a capacitor using a dielectric layer having a high dielectric constant.

(2) By connecting the first electrode layer 5 and the second electrode layer 6 of the capacitor 40 to a power supply terminal or a ground terminal, the capacitor 40 can be used as a decoupling capacitor.

(3) By applying the present invention, a capacitor having a small dielectric layer thickness can be manufactured with good yield, and a circuit board having a built-in decoupling capacitor with a small inductance component effective for reducing switching noise of a semiconductor device can be manufactured. It can be provided at low cost.

Next, a method of manufacturing the circuit board 4000 shown in FIG. 4 will be described. FIG. 8 shows a circuit board 4000
FIG. 4 is a process flow chart showing an example of the manufacturing process in a cross-sectional view of a main part.

(8A) First Main Surface Side 10 of Base Substrate 1
Formation of Capacitor 40, First Insulating Layer 7, Second Insulating Layer 11, and Via 12 at 0: 42 by the same steps as in the third embodiment shown in FIGS. 7A to 7E. On the first main surface side 100 of the base substrate 1 made of an alloy alloy, the capacitor 40, the first insulating layer 7, the second insulating layer 11,
A via 12 is formed. The materials used are the same as in the case of the third embodiment. That is, the first conductor layer 2 is made of Cr
Film, the second conductive layer 3 is an ITO film, and the dielectric layer 4 is (Ba,
Sr) TiO ₃ film, the second electrode layer 6 is made of Cr / Cu / Cr
The film, the first insulating layer 7 and the second insulating layer 11 are organic insulating films such as polyimide and epoxy, and the via 12 is the same member as the base substrate 1.

(8B) Second Main Surface Side 20 of Base Substrate 1
Removal of 0: The first conductive layer 2 on the second main surface side 200 and the portion on the second main surface side 200 of the base substrate 1 are sequentially etched to form the second dielectric layer 11 and the via 12 2 is exposed on the main surface side 200.

(8C) Formation of the first insulating layer 7 on the second main surface side 200: A known method such as a vacuum hot pressing method is used, and an organic insulating sheet such as prepreg or RCC (Resin coated copper) is used. The first main surface side 200 of the substrate 1 is attached, and the first insulating layer 7 is formed on the second main surface side 200. The organic insulating sheet may be selected in consideration of adhesion, workability, and heat resistance. Further, the liquid insulating material may be formed by another method such as a dip coating method, a printing method, a spray coating, and a transfer method.

(8D) Formation of the conductive thin film pattern 13: The first main surface side 100 and the second main surface side 200 are formed by using a known method such as a photo-etching method or a laser processing method.
A through hole is formed in the first insulating layer 7 of FIG. Then, using a physical method such as a sputtering method or a vacuum deposition method, a known method such as a chemical vapor deposition method, a sol-gel method, or a plating method,
Then, a conductive thin film layer is formed on the main surface side 100 and the second main surface side 200. Next, a conductive thin film pattern 13 is formed on the first main surface side 100 and the second main surface side 200 using a known method such as a photoetching method. Examples of the material used for the conductive thin film pattern 13 include Cu and Al.
Materials with low resistance are preferred, but not limited thereto. The material selection and the layer configuration may be selected in consideration of reliability.

After the above steps, both surfaces of the circuit board shown in FIG. 8D are covered with the third insulating layer 14, and through holes are formed at predetermined locations. Next, by providing terminal metallization layers (connection terminals) 8 and 9 in the through-hole portions provided in the third insulating layer 14, the circuit board 4000 according to the present embodiment is completed.

The characteristic feature of the circuit board manufacturing method described here is that after forming the capacitor 40 on the first main surface side 100 of the base substrate 1, the same conductive material as that of the base substrate is formed in the base substrate 1. Forming a conductive via 12 made of a conductive member,
The via 12 is electrically separated from the base substrate 1 by removing the second main surface side 200 of the base substrate 1. According to the manufacturing method shown here, the third
As in the embodiment, the conductive via 12 can be formed in the base substrate 1 while increasing the formation temperature of the capacitor 40. That is, SrTiO ₃ or (Ba, Sr)
TiO ₃ , Pb (Zr, Ti) O ₃ , Pb (Mg _1/3 Nb
_2/3 ) When forming a capacitor using a dielectric layer made of a perovskite structure oxide such as O ₃ on a circuit board with vias, a high-temperature process of 600 ° C. or more can be applied. Also, since the electrical separation of the via 12 from the base substrate 1 is performed by removing the second main surface side 200 of the base substrate 1, the process is simplified as compared with the third embodiment. I have.

As described above, according to the present embodiment, F is less expensive than a high melting point metal plate made of Mo, Ta, or W.
It is possible to provide a circuit board suitable for an interposer, in which a capacitor 40 having a dielectric layer 4 of a perovskite structure oxide having a high dielectric constant can be incorporated while a conductive member mainly containing e is used as a base substrate 1. .

In the present embodiment, the conductive vias 12 in the base substrate 1 are formed of the same member as the base substrate 1, but the present invention is not limited to this. A through hole is provided in the base substrate 1, the second insulating layer 11 is filled, a through hole is opened again, and another material such as Cu is filled in the through hole to form the conductive via 12.
May be formed.

Next, a fifth embodiment will be described below.

FIG. 5 is a sectional view of a main part of a fifth embodiment. In the figure, reference numeral 5000 denotes a circuit board to which the present invention is applied, and other reference numerals are the same as those in FIGS. In the circuit board 5000, the base board 1
A capacitor 40 is provided on both surfaces of the capacitor 40, and a terminal metallization layer 8 connected to the first electrode layer 5 and a terminal metallization layer 9 connected to the second electrode layer 6 of the capacitor 40 have a first main surface. It is formed on both sides of the side 100 and the second main surface side 200. The terminal metallization layers 8 provided on the first main surface side 100 and the second main surface side 200 are connected by a conductive base substrate 1, and the terminal metallization layers 9 are connected by conductive vias 12. Also in the case of FIG. 5, the portions indicated by reference numerals 2 to 14 are enlarged in order to make the details of the portion constituted by the thin film layers easy to understand. In particular, the film thickness direction was expanded.

This embodiment is basically the same as the fourth embodiment, and the capacitor 40 is formed not only on the first main surface side 100 but also on the second main surface side 200. The only difference is that the capacitor 4 on the first main surface side 100 and the capacitor 40 on the second main surface side 200 are connected in parallel by the conductive via 12 formed in the base substrate 1. In addition, the circuit board 5000 according to the present embodiment can be manufactured by the manufacturing process described in the third embodiment. That is, this embodiment is a combination of the fourth embodiment and the third embodiment. Therefore, in the present embodiment, the effect obtained in the fourth embodiment and the effect obtained in the third embodiment can be obtained. That is, the following effects can be obtained.

(1) Even when a conductive member mainly composed of Fe is used as a base substrate and is less expensive than a high melting point metal plate made of Mo, Ta, or W, a perovskite structure oxide or the like which requires a high temperature process is used. Further, it is possible to provide a circuit board which can incorporate a capacitor using a dielectric layer having a high dielectric constant.

(2) By connecting the first electrode layer 5 and the second electrode layer 6 of the capacitor 40 to a power supply terminal or a ground terminal, the capacitor 40 can be used as a decoupling capacitor.

(3) By applying the present invention, a capacitor having a small dielectric layer thickness can be manufactured with good yield, and a circuit board having a built-in decoupling capacitor with a small inductance component effective for reducing switching noise of a semiconductor device can be manufactured. It can be provided at low cost.

(4) A circuit board with a built-in capacitor can be provided as an interposer.

(5) By forming the capacitors on both sides of the base substrate, the capacity of the capacitors built in the circuit substrate can be increased.

[0104]

As described above, according to the present invention, even when the base member is made of a conductive member mainly composed of Fe, which is inexpensive than the refractory metal plate made of Mo, Ta, or W, the high temperature can be obtained. Perovskite structure oxides that require a process,
It is possible to provide a circuit board capable of incorporating a capacitor using a dielectric layer having a high dielectric constant. By passing conductive vias through the base substrate of this circuit board, a circuit board with a built-in capacitor can be provided as an interposer. Furthermore, by connecting capacitors formed on the front and back surfaces in parallel, the capacitance of the capacitor built into the circuit board can be provided. Can also be large. In addition, by applying the present invention, a capacitor having a small dielectric layer thickness and a small inductance component can be manufactured with high yield. Therefore, a semiconductor device with reduced switching noise can be provided by using a built-in capacitor as a decoupling capacitor. .

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a main part of a circuit board with a built-in capacitor according to a first embodiment.

FIG. 2 is a sectional view of a main part of a circuit board with a built-in capacitor according to a second embodiment.

FIG. 3 is a cross-sectional view of a main part of a circuit board with a built-in capacitor according to a third embodiment.

FIG. 4 is a sectional view of a main part of a circuit board with a built-in capacitor according to a fourth embodiment;

FIG. 5 is a sectional view of a main part of a circuit board with a built-in capacitor according to a fifth embodiment.

FIG. 6 is a process flow chart for describing an example of a manufacturing process of the circuit board with a built-in capacitor shown in the first embodiment.

FIG. 7 is a process flowchart for explaining an example of a manufacturing process of the circuit board with a built-in capacitor shown in the third embodiment.

FIG. 8 is a process flow chart for describing an example of a manufacturing process of the circuit board with a built-in capacitor shown in the fourth embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Base board, 2 ... 1st conductor layer, 3 ... 2nd conductor layer, 4
... dielectric layer, 5 ... first electrode layer, 6 ... second electrode layer, 7,
11, 14: insulating layer, 8, 9, terminal metallization layer (connection terminal), 10: through hole, 12: via, 13: conductive thin film pattern, 40: capacitor, 1000, 2000,
3000, 4000, 5000: Circuit board with built-in capacitor

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H05K 1/09 H01L 23/12 B 1/16 H01G 4/06 102 (72) Inventor Yoichi Abe Yokohama, Kanagawa 292, Yoshida-cho, Totsuka-ku, Ichitochi, Ltd., Hitachi, Ltd., Production Technology Laboratory (72) Inventor Naoki Matsushima 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture, Ltd., Hitachi, Ltd., Production Technology Laboratory (72) Inventor, Takehiko Hasebe Kanagawa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi 5E001 AB03 AB06 AC04 AE01 AE02 AE03 AH01 AH02 AH03 AJ01 AJ02 5E082 AB01 AB03 EE05 EE35 FF05 FG03 FG26 FG42 LL02 PP06 5 E315 AA05 BB01 BB02 BB03 BB05 BB09 CC16 DD13 GG07

Claims (8)

[Claims] A first conductive layer on at least one main surface of a base substrate made of a conductive member;
A second conductive layer composed of at least one conductive thin film layer, a dielectric layer composed of at least one layer,
A third conductive layer composed of at least one conductive thin film layer, and a first conductive layer, the first conductive layer and the second conductive layer constitute a first electrode;
A circuit board provided with a capacitor formed by forming a second electrode with the third conductive layer and sandwiching the dielectric layer between the first electrode and the second electrode; Is at least nickel (Ni), chromium (C
r), cobalt (Co), an iron (Fe) -based alloy containing any of aluminum (Al), and the first conductor layer, a high melting point metal having a melting point of 1000 ℃ or more or A circuit board with a built-in capacitor, wherein the conductive thin film layer made of nitride and in contact with the dielectric layer of the second conductive layer is made of a conductive oxide or a noble metal. A first conductive layer and at least one conductive thin film layer on two main surfaces of a first main surface and a second main surface of a base substrate made of a conductive member. A second conductor layer, a dielectric layer composed of at least one or more layers, and a third conductor layer composed of at least one conductive thin film layer are sequentially laminated, and the base substrate and the A first electrode is formed by the first conductor layer and the second conductor layer, a second electrode is formed by the third conductor layer, and the first electrode and the second electrode are formed. A circuit board provided with a capacitor having the dielectric layer interposed therebetween, wherein the base substrate has at least Mo, C
the first conductor layer is made of a high melting point metal having a melting point of 1000 ° C. or more or a nitride thereof, and the first conductor layer is made of a Fe-based alloy containing any of r, Co, and Al. A conductive thin film layer in contact with the dielectric layer of the second conductive layer is made of a conductive oxide or a noble metal; and a capacitor provided on a first main surface of the base substrate and a second thin film layer are formed on the first main surface of the base substrate. A circuit board with a built-in capacitor, wherein the second electrodes of the capacitor provided on the main surface are electrically connected to each other by a conductive via provided in the base substrate via an insulating layer. 3. The method according to claim 1, wherein at least one of the conductive thin film layers constituting the second conductive layer is formed by a dip coating method.
3. The circuit board with a built-in capacitor according to claim 1, wherein the circuit board is formed by any one of a spin coating method, a spray coating method, a roll coating method, and a flow coating method. 4. The high-melting point metal constituting the first conductor layer is chromium (Cr), titanium (Ti), nickel (Ni), tungsten (W), tantalum (Ta), or molybdenum (Mo). The circuit board with a built-in capacitor according to any one of claims 1 to 3, wherein the circuit board is any one of the circuit boards. 5. The conductive oxide forming the second conductive layer is indium oxide, tin oxide, a mixture of indium oxide and tin oxide, zinc oxide, ruthenium oxide, rhodium oxide, rhenium oxide, iridium oxide, oxidized oxide. osmium,
Barium (Ba), calcium (Ca) and strontium
At least one element of (Sr), titanium (Ti) and oxygen
(O) perovskite oxide (Ba, Ca, S
The circuit board with a built-in capacitor according to any one of claims 1 to 4, wherein r) is a material selected from TiO _x (where x <3). 6. A method according to claim 1, wherein said dielectric layer is made of SrTiO ₃ , (Ba, S
_{r) TiO 3, BaTiO 3,} (Pb, La) (Zr, Ti)
O ₃ , Pb (Zr, Ti) O ₃ , PbTiO ₃ , Pb (Mg
_1/3 Nb _2/3) capacitors built according to any one of claims 1 to 5, characterized in that it is constituted by at least one or more materials selected from among O perovskite structure oxide such as ₃ Circuit board. 7. At least one electrode connected to the first electrode
The built-in capacitor according to any one of claims 1 to 7, wherein at least one mounting connection terminal and at least one mounting connection terminal connected to the second electrode are provided. Circuit board. 8. A first conductor layer and at least one main surface on at least one main surface of a base substrate made of a conductive member.
A second conductive layer composed of at least one conductive thin film layer, a dielectric layer composed of at least one layer,
A third conductive layer comprising at least one conductive thin film layer, wherein a first electrode comprising the base substrate, the first conductive layer and the second conductive layer is used for a first mounting. A second electrode connected to the connection terminal and formed of the third conductive layer is connected to a second mounting connection terminal, and the first mounting connection terminal or the second mounting connection terminal is connected to the second mounting connection terminal. The other end of the semiconductor device is connected to a wiring board and / or a semiconductor chip, and the first electrode and the second electrode are connected to one of a power supply layer and a ground layer. .