JP2001246124A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a fraudulent act by using a fraudulent board on a game machine. SOLUTION: When counting by using a counter (random 1) for jackpot counting number within a prescribed range progresses and the count comes back to the initial value, a random 6 constituted of 2-bytes to determine the initial value is extracted. The count with the counter to generate the random 6 at the time point is stored and the value is set in the counter for jackpot determination. Accordingly, the counter for jackpot determination starts counting from a new initial value at the time point. A value in the counter for jackpot determination is stored for a prescribed period even if the power source is cut out and the counter for jackpot determination starts counting from the stored value.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a game machine such as a pachinko game machine, a coin game machine, a slot machine, etc., in which a game is played in accordance with a player's operation. A gaming machine in which a game is played in accordance with a game machine.

[0002]

2. Description of the Related Art As an example of a gaming machine, when a game medium such as a game ball is fired into a game area by a launching device, and a game medium wins a winning area such as a winning opening provided in the game area, a predetermined number of game media are played. Some prize balls are paid out to players. Further, a variable display unit whose display state can be changed is provided, and when a display result of the variable display unit becomes a predetermined specific display mode, a predetermined game value is provided to the player. There is.

[0003] The game value means that the state of the variable prize ball device provided in the game area of the gaming machine is in an advantageous state for a player who is likely to win a hit ball, or in an advantageous state for the player. Or a condition in which the conditions for paying out prize game media are easily satisfied. Also, the addition of a predetermined amount of game balls or coins or the addition of points is included in the game value.

In some pachinko gaming machines, when the display result of the variable display section for displaying a special symbol is a combination of predetermined specific display modes, a specific gaming state advantageous to the player is attained. A combination of specific display modes is usually referred to as a “big hit”. When a big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the state shifts to a big hit game state in which a hit ball is easy to win. Then, in each open period, when a predetermined number (for example, 10) of winning prizes is won, the winning prize opening is closed. The number of opening of the special winning opening is fixed to a predetermined number (for example, 16 rounds). The opening time (for example, 29.5) for each opening
Seconds) is determined, and if the opening time elapses even if the number of winnings does not reach a predetermined number, the winning port is closed. If the predetermined condition (for example, winning in the V zone provided in the special winning opening) is not satisfied at the time when the special winning opening is closed, the big hit gaming state ends.

[0005] Further, among the combinations of display modes other than the combination of "big hits", when a part of the display results of the plurality of variable display portions is not yet derived and displayed, it is already definite or temporary. A state in which the display mode of the variable display unit on which the various display results are derived and displayed satisfies the display condition that is a combination of the specific display modes is referred to as “reach”. If the display result of the identification information variably displayed on the variable display unit does not satisfy the condition of "big hit", the result is "missing" and the variable display state ends. A player plays a game while enjoying how to generate a big hit.

In the game control of such a gaming machine, a random number is generated when a predetermined condition (for example, a start winning which is a condition for starting a variable display) is satisfied, and the random number value matches a predetermined jackpot determination value. Then it becomes a "big hit". When another random number value matches a predetermined value, the state shifts to a positive change state or a time saving state in which a "big hit" is likely to occur. Further, a circuit portion for performing game control for noise suppression or the like is reset and restarted at a predetermined time interval (for example, 2 ms). Since the random number value is generated using a predetermined counter, and the updating of the counter value is performed in the circuit portion that performs the game control, the value of the generated random number depends on the time interval of the activation of the circuit portion that performs the game control. I have to synchronize.

[0007] Then, if the time interval of activation is detected by some means, the timing of updating the counter value is recognized. Further, the timing at which a random number value of "big hit" occurs is recognized. Then, by aiming for the start winning at the timing when the random number value of “big hit” is generated, it is possible to frequently generate “big hit”.

There is a case where an illegal board is attached to a game machine in order to detect a start timing of a circuit portion for performing game control. Such a fraudulent board introduces a signal output from the circuit portion performing the game control to the outside, detects the activation timing of the circuit portion performing the game control based on the signal, and detects a random number value causing a “big hit”. The occurrence timing is detected. Then, the illegal board can send a start winning signal to a circuit portion that performs game control at that timing, thereby making it possible to illegally generate a "big hit".

For example, a display control board on which a display control microcomputer for controlling a display state of a variable display section is mounted is a display board for changing a display state from a main board on which a circuit for performing game control is mounted. A control command is sent. As described above, the circuit portion for performing the game control is reset, for example, every 2 ms, so that the transmission interval of the display control command is synchronized with 2 ms. The illegal board is connected between the main board and the display control board, and, for example, after introducing the original start winning signal and recognizing the counter value update timing based on the display control command transmission interval,
If a false start winning signal is sent to the main board in order to generate a random number value that generates a “big hit”, that is, a random number value that matches the big hit determination value, a “big hit” will be generated illegally.

[0010]

Since various components such as a variable display device, a decorative lamp, and a sound generating device are present in a gaming machine, a signal line from a circuit portion for performing game control to those components is eliminated. Can not. Accordingly, there is still room for the illegal board to be attached and illegal gaming to be performed. Therefore, how to prevent illegal gaming using illegal substrates has become an important issue in gaming machines.

Accordingly, an object of the present invention is to provide a gaming machine capable of effectively preventing an attack on a game by an unauthorized board.

[0012]

A gaming machine according to the present invention comprises:
While performing a game based on the operation of the player, it is possible to control to a specific game state advantageous to the player when a predetermined condition for setting the specific game state is satisfied, and determine whether to set the specific game state. A gaming machine that updates a value of a specific game state determination counter for determination and changes its initial value every predetermined round, and at least a RAM (for temporarily storing necessary data) of a game control means is provided. It is characterized in that the contents can be retained for a predetermined period even if the power supply is stopped. It should be noted that one round of the count value means that the count value has advanced from the initial value to reach the position just before the initial value. Also, the term “predetermined rotation” means that one such rotation has occurred a predetermined number of times.

The game control means may store the value of the specific game state determination counter when the power supply is stopped, and may continue the updating process from the stored value when the power supply is restored. Good.

[0014] An initial value determining counter for determining an initial value of the specific game state determining counter may be provided, and the initial value determining counter may be configured to be updated at least in an infinite loop.

[0015] The initial value determination counter may be configured to be updated even during the game control processing.

The game control means is configured to store the value of the initial value determining counter when the power supply is stopped, and to use the stored value of the initial value determining counter after the power supply is restored. May be.

It is preferable that the range that the value of the specific game state determination counter can take is the same as the range that the value of the initial value determination counter can take.

The game control process may be configured to be started in response to a timer interrupt.

It is preferable that the generation period of the timer interrupt is longer than the time required for the game control process.

The initial value determination counter may be composed of a plurality of parts, and the game control means may be configured to update each part of the initial value determination counter.

When the power supply is stopped, the game control means may be configured to perform predetermined power supply stop processing upon interruption, and prohibit RAM access during the power supply stop processing. .

When the game control means executes the power supply stop processing,
Check data related to the content of M is created and held, and a check based on the held check data is performed at the time of power supply restoration, and if the check result is normal, the game state is restored to the state at the time of power supply suspension. Do the processing,
If the check result is not normal, the RAM may be initialized.

The interrupt generated when the power supply is stopped is preferably the interrupt having the highest priority among the interrupts used for control.

[0024]

An embodiment of the present invention will be described below with reference to the drawings. First, the overall configuration of a pachinko gaming machine, which is an example of a gaming machine, will be described. 1 is a front view of the pachinko gaming machine 1 as viewed from the front, FIG. 2 is an overall rear view showing the internal structure of the pachinko gaming machine 1, and FIG. 3 is a rear view of the pachinko gaming machine 1 as viewed from the back. Here, a pachinko gaming machine is shown as an example of a gaming machine, but the present invention is not limited to a pachinko gaming machine, and may be, for example, a coin gaming machine.

As shown in FIG. 1, the pachinko gaming machine 1
It has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2, there is a hit ball supply tray 3. Below the hitting ball supply tray 3, a surplus ball receiving tray 4 for storing storage balls overflowing from the hitting ball supply tray 3 and a hitting operation handle (operation knob) 5 for firing a hitting ball are provided. Behind the glass door frame 2,
The game board 6 is detachably attached. A game area 7 is provided on the front of the game board 6.

In the vicinity of the center of the game area 7, a variable display section 9 for variably displaying a plurality of types of symbols and a 7-segment L
A variable display device 8 including a variable display 10 using an ED is provided. In addition, a pass storage display (ordinary symbol storage display) 41 including four LEDs is provided below the variable display 10. In this embodiment, the variable display section 9 has three symbol display areas of “left”, “middle”, and “right”. On the side of the variable display device 8, a passing gate 11 for guiding a hit ball is provided. The hit ball that has passed through the passing gate 11 is guided to the starting winning opening 14 via the ball exit 13. In the passage between the passage gate 11 and the ball exit 13, there is a gate switch 12 for detecting a hit ball passing through the passage gate 11. The winning ball that has entered the starting winning port 14 is guided to the back of the game board 6 and is turned on by the starting port switch 17.
Is detected by In addition, a variable winning ball device 15 that performs opening and closing operations is provided below the starting winning port 14.
The variable winning ball device 15 is opened by the solenoid 16.

An opening / closing plate 20 which is opened by a solenoid 21 in a specific game state (big hit state) is provided below the variable winning ball apparatus 15. In this embodiment, the opening and closing plate 20 serves as a means for opening and closing the special winning opening. The winning ball that enters one (V zone) of the winning balls guided from the opening / closing plate 20 to the back of the game board 6 is detected by the V count switch 22. The winning ball from the opening / closing plate 20 is detected by the count switch 23. Variable display device 8
A start winning prize storage display 18 having four display sections for displaying the number of winning balls entering the starting winning prize port 14 is provided below. In this example, the start winning prize storage display 18 increases the number of lit display units by one each time there is a starting prize, with the upper limit being four. Then, each time the variable display of the variable display unit 9 is started, the number of the lit display units is reduced by one.

The game board 6 is provided with a plurality of winning ports 19 and 24, and the winning of the game balls to the winning ports 19 and 24 is detected by the winning port switches 19a and 24a. At the left and right sides of the game area 7, there are provided decorative lamps 25 which are displayed blinking during the game, and at the lower part there is an out port 26 for absorbing hit balls which have not won. In addition, two speakers 27 that emit sound effects are provided at upper left and right sides outside the game area 7. A gaming effect LED 2 is provided on the outer periphery of the gaming area 7.
8a and gaming effect lamps 28b and 28c are provided.

In this example, one of the speakers 27
Is provided with a prize ball lamp 51 which is lit when a premium ball is paid out, and a ball out lamp 52 which is lit up when the supply ball is out is provided near the other speaker 27. Further, FIG. 1 also shows a card unit 50 which is installed adjacent to the pachinko gaming table 1 and enables lending of a ball by inserting a prepaid card.

The card unit 50 has a usable indicator lamp 151 for indicating whether or not the card is ready for use. If there is a fraction (less than 100 yen) in the balance information recorded in the card, the fraction is displayed. Fraction display switch 1 for displaying on a frequency display LED provided near hit ball supply tray 3
52, a connecting stand direction indicator 15 indicating which side of the pachinko gaming machine 1 the card unit 50 corresponds to
3. Card insertion indicator 154 indicating that a card has been inserted into card unit 50, card insertion slot 155 into which a card as a recording medium is inserted, and a card reader provided on the back of card insertion slot 155 A card unit lock 156 is provided to release the card unit 50 when checking the mechanism of the writer.

The hit ball fired from the hitting ball launching device enters the game area 7 through the hitting rail, and thereafter, the game area 7
Come down. When a hit ball is detected by the gate switch 12 through the passage gate 11, the display number of the variable display 10 is changed continuously. Further, when a hit ball enters the starting winning opening 14 and is detected by the starting opening switch 17, the symbol in the variable display section 9 starts rotating if the symbol can be changed. If it is not possible to start changing the symbol, the start winning memory is increased by one.

The rotation of the image in the variable display section 9 stops when a certain time has elapsed. If the combination of images at the time of stop is a combination of big hit symbols, the game shifts to a big hit game state. That is, the opening / closing plate 20 is opened until a predetermined time elapses or until a predetermined number (for example, 10) of hit balls is won. Then, when a hit ball wins in the specific winning area while the opening and closing plate 20 is opened and is detected by the V count switch 22, a continuation right is generated and the opening and closing plate 20 is opened again. Generation of the continuation right is permitted a predetermined number of times (for example, 15 rounds).

If the combination of images in the variable display section 9 at the time of stoppage is a combination of big hit symbols with probability fluctuation, the probability of the next big hit becomes high. That is, a high probability state, which is more advantageous for the player, is obtained. Also, when the stop symbol on the variable display 10 is a predetermined symbol (hit symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the high probability state, the probability that the stop symbol on the variable display 10 hits the symbol is increased, and the opening time and the number of times the variable winning ball device 15 is opened are increased.

Next, the structure of the back surface of the pachinko gaming machine 1 will be described with reference to FIG. On the back of the variable display device 8, as shown in FIG. 2, a prize ball tank 38 is provided above the mechanism plate 36, and when the pachinko gaming machine 1 is installed on the gaming machine installation island, a prize ball is provided from above. Premium ball tank 3
8 is supplied. The prize ball in the prize ball tank 38 passes through the guiding gutter 39 and reaches the ball payout device.

On the mechanism plate 36, a variable display control unit 29 for controlling the variable display section 9 via the relay board 30, and a game control board (main board) covered with a board case 32 and mounted with a game control microcomputer and the like. ) 31, a relay board 33 for relaying a signal between the variable display control unit 29 and the game control board 31, and a payout control board 37 mounted with a payout control microcomputer for performing payout control of a prize ball. is set up. Further, the mechanism plate 36 includes a hitting ball firing device 34 for shooting a hitting ball into the game area 7 using the rotational force of a motor, a game effect lamp / LED 28
a, 28b, and 28c, a prize ball lamp 51, and a lamp control board 35 for sending signals to the ball out lamp 52.

FIG. 3 is a rear view of the gaming board of the pachinko gaming machine 1 as viewed from the rear. On the back of the game board 6, FIG.
As shown in the figure, the winning ball set cover 4 for guiding the winning ball winning each winning port and the winning ball device along a predetermined winning path.
0 is provided. Of the prize balls guided to the prize ball collection cover 40, those that have won through the opening / closing plate 20 pay out a relatively large number of prize balls (for example, 15) with a ball payout device (not shown in FIG. 3). Is controlled as follows. The winning prize through the starting winning opening 14 is controlled so that the ball payout device pays out a relatively small number of prize balls (for example, 6). And, the prize winning through the other prize port 24 and the prize ball device is controlled so that the ball payout device pays out a relatively medium number of prize balls (for example, 10). Note that FIG. 3 illustrates the relay board 33 as an example.

Signals from the winning ball detection switch 99, the starting port switch 17 and the V count switch 22 are sent to the main board 31 to perform the winning ball payout control. The winning is detected by the winning ball detection switch 99,
When the ON signal of the winning ball detection switch 99 is sent to the main board 31, a winning ball control command is sent from the main board 31 to the payout control board 37. For example, when the winning ball detection switch 99 is turned on in response to the turning on of the starting port switch 17, a winning ball control command indicating the number of winning balls “6” is output, and the count switch 23 or the V count switch 22 is turned on. When the winning ball detection switch 99 is turned on, a winning ball control command indicating the number of winning balls “15” is output. When the winning ball detection switch 99 is turned on when these switches are not turned on, a winning ball control command indicating the number of winning balls "10" is output.

FIG. 4 is a block diagram showing an example of a circuit configuration of the main board 31. As shown in FIG. FIG. 4 also shows the payout control board 37, the lamp control board 35, the sound control board 70, the emission control board 91, and the display control board 80.
The pachinko machine 1 is provided on the main board 31 according to the program.
And a switch circuit 58 for giving signals from the gate switch 12, the starting port switch 17, the V count switch 22, the count switch 23, the winning port switches 19a and 24a, and the prize ball count switch 301A to the basic circuit 53. And a solenoid circuit 59 for driving the solenoid 16 for opening and closing the variable winning ball device 15 and the solenoid 21 for opening and closing the opening and closing plate 20 in accordance with a command from the basic circuit 53.

According to the data supplied from the basic circuit 53, jackpot information indicating the occurrence of a jackpot, effective start information indicating the number of start winning balls used to start image display on the variable display section 9, and probability fluctuation have occurred. And an information output circuit 64 that outputs probability change information or the like indicating the fact to a host computer such as a hall management computer.

The basic circuit 53 includes a ROM 54 for storing a game control program and the like, a RAM 55 as an example of storage means used as a work memory, a CPU 56 for performing control operations according to the program, and an I / O port unit 5.
7 inclusive. In this embodiment, the ROM 54 and the RAM 5
5 is built in the CPU 56. That is, the CPU 5
Reference numeral 6 denotes a one-chip microcomputer. In addition, 1
The chip microcomputer has at least the RAM 55
And the ROM 54 and the I / O port unit 57 may be external or internal. The I / O port unit 57 is a terminal capable of inputting and outputting information in the microcomputer.

The main board 31 has a system reset circuit 65 for resetting the basic circuit 53 when the power is turned on, and an I / O port unit 57 which decodes an address signal given from the basic circuit 53 and decodes the address signal. I /
An address decode circuit 67 for outputting a signal for selecting the O port is provided. Note that the ball payout device 9
There is also switch information input to the main board 31 from 7,
In FIG. 4, they are omitted.

A hit ball launching device that hits and fires a game ball is driven by a drive motor 94 controlled by a circuit on a launch control board 91. Then, the driving force of the driving motor 94 is adjusted according to the operation amount of the operation knob 5. That is, the circuit on the firing control board 91 is controlled so that the hit ball is fired at a speed corresponding to the operation amount of the operation knob 5.

In this embodiment, the lamp control means mounted on the lamp control board 35 is used to display the start memory display 18, the gate passage memory display 41 and the decorative lamp 25 provided on the game board. Controls the game and the game effect lamp / LED 28 provided on the frame side.
a, 28b, and 28c, display control of the award ball lamp 51, and the ball out lamp 52 are performed. Here, the lamp control unit is an example of the illuminant control unit. The display control of the variable display unit 9 for variably displaying special symbols and the variable display 10 for variably displaying ordinary symbols is performed by display control means mounted on the display control board 80.

FIG. 5 is a block diagram showing an example of the configuration around the CPU 56. As shown in FIG. 5, the voltage drop signal from the first power supply monitoring circuit (first power supply monitoring means)
It is connected to the non-maskable interrupt terminal (NMI terminal) of PU56. The first power supply monitoring circuit is a circuit that monitors the voltage of any one of various DC power supplies used by the gaming machine and detects a drop in the power supply voltage. In this embodiment, the power supply voltage of VSL is monitored, and when the voltage value falls below a predetermined value, a low-level voltage drop signal is generated. VSL is the largest DC voltage used in gaming machines,
In this example, it is + 30V. Therefore, the CPU 56 can confirm the occurrence of power interruption by the interrupt processing.
In this embodiment, the first power supply monitoring circuit is mounted on a power supply board described later.

FIG. 5 also shows a system reset circuit 65, but in this embodiment, the system reset circuit 65 also functions as a second power supply monitoring circuit (second power supply monitoring means). That is, the reset IC 651
When the power is turned on, the output is set to the low level for a predetermined time determined by the capacity of the external capacitor, and the output is set to the high level after the predetermined time has elapsed. That is, the reset signal is raised to a high level to make the CPU 56 operable. The reset IC 651 monitors the power supply voltage of VSL, which is the same power supply voltage as the power supply voltage monitored by the first power supply monitoring circuit, and sets the voltage value to a predetermined value (the first power supply monitoring circuit outputs a voltage drop signal). When the voltage falls below the power supply voltage value), a low-level voltage drop signal is generated. Accordingly, the CPU 56 performs a predetermined power supply stop processing in response to the voltage drop signal from the first power supply monitoring circuit, and then performs a system reset. In this embodiment, the reset signal and the voltage drop signal from the second power supply monitoring circuit are the same signal.

As shown in FIG. 5, the reset signal from the reset IC 651 is input to the NAND circuit 947 and also to the clear terminal of the counter IC 941 via the inverting circuit (NOT circuit) 944. Counter I
When the input to the clear terminal goes low, the C941 counts the clock signal from the oscillator 943.
The Q5 output of the counter IC 941 is output to the NOT circuit 9
45, 946 and input to the NAND circuit 947. The Q6 output of the counter IC 941 is input to a clock terminal of a flip-flop (FF) 942.
The D input of the flip-flop 942 is fixed at a high level, and the Q output is input to an OR circuit (OR circuit) 949. The other input of the OR circuit 949 is connected to the NAND circuit 9.
The output of 47 is introduced via NOT circuit 948. The output of the OR circuit 949 is connected to the reset terminal of the CPU 56. According to such a configuration, two reset signals (low-level signals) are supplied to the reset terminal of the CPU 56 when the power is turned on.
Starts operation reliably.

Then, for example, the detection voltage of the first power supply monitoring circuit (the voltage at which the voltage drop signal is output) is increased by +
22 V, and the detection voltage of the second power supply monitoring circuit is +9 V. In such a configuration, since the first power supply monitoring circuit and the second power supply monitoring circuit monitor the voltage of the same power supply VSL, the timing at which the first voltage monitoring circuit outputs the voltage drop signal The difference between the timings at which the second voltage monitoring circuit and the second voltage monitoring circuit output the voltage drop signal can be reliably set to a desired predetermined period. The desired predetermined period is a period from the start of the power supply stop processing in response to the voltage drop signal from the first power supply monitoring circuit until the power supply stop processing is completely completed.

In this example, the first detection condition that the first power supply monitoring means outputs a detection signal is that the +30 V power supply voltage has dropped to +22 V, and the second power supply monitoring means outputs the detection signal. The second detection condition to be output is that the +30 V power supply voltage has dropped to +9 V.
However, the voltage value used here is an example,
Other values may be used.

However, although the monitoring range is narrowed, the monitoring voltage of the first voltage monitoring circuit and the second voltage monitoring circuit is +
It is also possible to use a 5V power supply voltage. Also in that case, the detection voltage of the first voltage monitoring circuit is set higher than the detection voltage of the second voltage monitoring circuit.

While power is not supplied from the + 5V power supply which is the driving power supply of the CPU 56 and the like, at least a part of the RAM is backed up by the backup power supply supplied from the power supply board, and the contents are maintained even if the power supply to the gaming machine is cut off. Is saved. Then, when the + 5V power supply is restored, a reset signal is issued from the system reset circuit 65, so that the CPU 56 returns to the normal operation state. At that time, since the necessary data is stored in the backup RAM, it is possible to return to the gaming state at the time of the occurrence of the power failure when recovering from a power failure or the like.

In FIG. 5, when the power is turned on, the CPU 56
A reset signal (low-level signal) is given twice to the reset terminal. However, in the case of using a CPU in which reset is surely released even if the reset signal rises only once, Reference numerals 941 to 9
The circuit element indicated by 49 is unnecessary. In that case, the output of the reset IC 651 is directly connected to the reset terminal of the CPU 56.

FIG. 6 is a block diagram showing an example of the configuration of a power supply board 910 of a gaming machine. The power supply board 910 is installed independently of the electric component control boards such as the main board 31, the display control board 80, the audio control board 70, the lamp control board 35, and the payout control board 37, and each of the electric component control boards in the gaming machine and Generates voltages used by mechanical components. In this example, AC24V, VSL (DC + 30V), DC + 21
V, + 12V DC and + 5V DC. Also,
The capacitor 916 serving as a backup power supply is DC + 5
V, that is, charged from a power supply line for driving an IC or the like on each substrate.

The transformer 911 converts an AC voltage from an AC power supply to 24V. AC 24V voltage is applied to connector 9
15 is output. Further, the rectifier circuit 912 includes an AC24
A DC voltage of +30 V is generated from V and output to the DC-DC converter 913 and the connector 915. DC-D
The C converter 913 has + 22V, + 12V and + 5V.
V is generated and output to the connector 915. Connector 91
5 is connected to, for example, a relay board, from which electric power of a voltage required for each electric component control board and mechanism components is supplied. A power switch 918 for stopping and starting power supply to the gaming machine is provided on the input side of the transformer 911.

+5 V from DC-DC converter 913
The line branches to form a backup + 5V line. A large-capacity capacitor 916 is connected between the backup + 5V line and the ground level. The capacitor 916 is provided with an electric power so as to be able to hold a storage state in a backup RAM (power-backed-up RAM, that is, storage means that can be in a storage state) when the power supply to the gaming machine is cut off. Backup power supply. Also,
A diode 917 for preventing backflow is inserted between the + 5V line and the backup + 5V line.

Note that a battery that can be charged from a + 5V power supply may be used as a backup power supply. In the case of using a battery, a rechargeable battery is used which runs out of capacity when power is not supplied from a + 5V power supply for a predetermined time.

The power supply board 910 has the first
The power supply monitoring IC 902 constituting the power supply monitoring circuit of FIG. The power supply monitoring IC 902 detects the occurrence of power interruption by introducing the VSL power supply voltage and monitoring the VSL power supply voltage. Specifically, when the VSL power supply voltage becomes equal to or lower than a predetermined value (+22 V in this example), a voltage drop signal is output assuming that power supply is cut off. The power supply voltage to be monitored is preferably higher than the power supply voltage (+5 V in this example) of the circuit element mounted on each electric component control board. In this example, VSL, which is a voltage immediately after conversion from AC to DC, is used. The voltage drop signal from the power supply monitoring IC 902 is supplied to the main board 31, the payout control board 37, and the like.

The predetermined value for the power supply monitoring IC 902 to detect the power-off is lower than the normal voltage, but is a voltage at which the CPU on each electric component control board can operate for a while. Further, the power supply monitoring IC 902 is configured to monitor a voltage higher than a voltage for driving a circuit element such as a CPU (+5 V in this example) and a voltage immediately after conversion from AC to DC. Therefore, the monitoring range can be extended for the voltage required by the CPU. Therefore,
More precise monitoring can be performed. Furthermore, when VSL (+30 V) is used as the monitoring voltage, since the voltage supplied to the various switches of the gaming machine is +12 V, prevention of erroneous switch-on detection upon momentary power interruption can be expected. That is, when monitoring the voltage of the + 30V power supply,
The drop can be detected at a stage before + 12V generated after the generation of 0V starts to fall. Therefore, when the voltage of the + 12V power supply decreases, the switch output comes to the on state. However, if the + 30V power supply voltage that drops faster than + 12V is monitored and the power cutoff is recognized, the power supply is turned on before the switch output turns on. It is possible to enter a state of waiting for restoration and to enter a state where the switch output is not detected.

Since the power supply monitoring IC 902 is mounted on the power supply board 910 separate from the electric component control board, the first power supply monitoring circuit supplies a voltage drop signal to the plurality of electric component control boards. Can be. Regardless of how many electric component control boards require a voltage drop signal, it is sufficient that only one first power supply monitoring means is provided, so that each electric component control means in each electric component control board performs a return control described later. Doing so does not add much to the cost of the gaming machine.

In the configuration shown in FIG. 6, the detection output (voltage drop signal) of the power supply monitoring IC 902 is supplied to the respective electric component control boards (for example, the main board 31 and the payout control) via buffer circuits 918 and 919. Although transmitted to the board 37), for example, a configuration in which one detection output is transmitted to the relay board, and the same signal is distributed from the relay board to each electric component control board may be employed. Further, a buffer circuit may be provided according to the number of substrates requiring a voltage drop signal.

Next, the operation will be described. 7 and 8 are flowcharts showing the game control of the CPU 56 on the main board 31. FIG. 7 shows a main process executed by the CPU 56, and FIG. 8 shows a timer interrupt process. When the power-on reset is released, the CPU 56 first performs necessary initialization processing (step S1). In the initial setting process, setting of a stack pointer, initialization of a device with a built-in CPU and an external device are performed.

Then, when the power is turned off last time, the backup R
It is confirmed whether or not the data protection processing of the AM area (for example, a power failure occurrence NMI processing such as addition of parity data) has been performed (step S2). When an unexpected power failure occurs, a process for protecting data in the backup RAM area is performed as described later. The case where such protection processing has been performed is regarded as backup. After confirming that there is no backup, the CPU 56 executes an initialization process (step S7). In this embodiment, whether or not there is backup data in the backup RAM area is confirmed by the state of the backup flag set in the backup RAM area when the power is turned off. For example,
If "55H" is set in the backup flag area, it means that there is a backup (on state) and "55H"
If a value other than is set, it means no backup (off state).

If there is backup data in the backup RAM area, the CPU 56
A data check (for example, a parity check) of the M area is performed (step S3). If the power is restored after an unexpected power failure, the data in the backup RAM area should have been saved, and the check result becomes normal. If the check result is not normal, since the internal state cannot be returned to the state at the time of power failure, the initialization processing executed at the time of power-on without power recovery is executed (steps S4 and S7).

If the check result is normal, the CPU 56
Performs a game state restoring process for returning the internal state to the state when the power is turned off (step S5). Therefore, when the value of the backup flag is set to “55H” and the check result is normal, the game state restoring process of step S5 is executed. The saved value of the PC (program counter) stored in the backup RAM area is P
Set to C and return to that address.

The game state restoring process is a process of returning the game state to the state at the time of power-off.
The data stored in the AM is used. At least a jackpot determination counter (a counter for generating random 1) is stored in the backup RAM. Therefore, at the time of recovery from an unexpected power-off or the like, the value of the big hit determination counter is continuously counted up from the value at the time of the power-off. Even if the illegal board is connected to the gaming machine, it is unlikely that the circuit operation on the illegal board will be continued from the state at the time of power-off. That is, it is more difficult to predict the timing of a big hit using an incorrect board or the like at the time of recovery from an unexpected power interruption or the like.

In the initialization process of step S7, a RAM clear process, a process of activating a built-in timer, and setting so that a timer interrupt is activated after a predetermined period (for example, after 2 ms) are performed. When the initialization process is completed,
Display random number update processing (Step S8), random 1 initial value determination counter update processing (Step S9), and random 3 initial value determination counter update processing (Step S1)
Execute 3).

FIG. 9 is an explanatory diagram showing each random number used in the gaming machine. Each random number is used as follows. (1) Random 1: Determine whether or not to generate a big hit (for big hit determination: for specific game state determination) (2) Random 2-1 to 2-3: for left and right middle out-of-design symbols determination (3) Random 3 : Determine the symbol combination at the time of the big hit (for big hit symbol determination = for mode determination, identification information determination, for special game state determination) (4) Random 4: Determine whether or not to reach at the time of loss (for reach determination) (5) Random 5: Determine reach type (for reach type determination) (6) Random 6: Determine initial value of counter that generates random 1 (for random 1 initial value determination = initial value determination) ( 7) Random 7: Determine the initial value of the counter that generates random 3 (for determining the initial value of random 3 = for determining the initial value of the special game state determining counter, and for determining the initial value of the mode determining counter).

Incidentally, random numbers other than the above-mentioned random numbers (1) to (7) are used in order to enhance the gaming effect. For example, a random number for determining whether or not to win based on the display result of the variable display 10 that normally displays symbols,
There is a random number for determining a stop symbol of the variable display 10, a random number for determining whether to give a so-called notice or the like.

In the process of step S8, the count-up (addition of 1) of the counter for generating the random number for determining a lost symbol in (2), the random number for reach determination in (4), and the random number for reach operation in (5) is performed. Done. Therefore, they are counters for generating display random numbers. However, the random 2-2 is counted up when the carry of the random 2-1 occurs, that is, when the value of the random 2-1 becomes “15” and is returned to “0”. Also,
The random 2-3 is counted up when the carry of the random 2-2 occurs, that is, when the value of the random 2-2 becomes “15” and is returned to “0”.

As shown in FIG. 8, when a timer interrupt occurs, a timer interrupt flag is set in a timer interrupt process (step S16). If necessary, a timer setting process is performed so that the timer interrupt is restarted after a predetermined period (for example, after 2 ms).

The CPU 56 executes step S1 of the main process.
When it is detected that the timer interrupt flag is set at 0, the timer interrupt flag is reset (step S11), and a game control process is executed (step S12). According to the above control, in this embodiment, the game control process is started every 2 ms.
In this embodiment, only the flag is set in the timer interruption processing, and the game control processing is executed in the main processing. However, the game control processing may be executed in the timer interruption processing.

FIG. 10 is a flowchart showing the game control processing in step S12. In the game control process,
The CPU 56 firstly receives the gate sensor 12, the starting port sensor 17, and the count sensor 23 through the switch circuit 58.
And the state of the winning opening switches 19a and 24a,
It is determined whether or not there is a prize for each winning port or prize device (switch processing: step S21).

Next, various abnormality diagnosis processes are performed by the self-diagnosis function provided in the pachinko gaming machine 1, and an alarm is issued if necessary according to the result (error process: step S22).

Next, a process of updating each counter indicating a random number for determination such as a random number for big hit determination used in game control is performed (step S23). In this embodiment, of the counters for generating the random numbers shown in FIG. 7, the counters for generating the big hit determining random number (1) and the big symbol determining random number (3) are counted. Up (1 addition) is performed. However, a counter for generating a big hit symbol determination random number (a big hit symbol determination counter)
Is counted up when the counter for generating the jackpot determination random number (the jackpot determination counter) reaches the maximum value and is returned to the initial value. In addition,
In this embodiment, the big hit symbol determination counter also serves as a counter for determining whether or not to make a probability change.

The CPU 56 further performs processing for updating display random numbers such as random numbers for determining the type of stop symbol (step S24). The processing in step S24 is the same as the processing in step S8 in the main processing.

Next, the CPU 56 performs a special symbol process (step S25). In the special symbol process control, a corresponding process is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to a gaming state. Then, the value of the special symbol process flag is updated during each processing according to the gaming state. Also, a normal symbol process is performed (step S26). In the normal symbol process process, a corresponding process is selected and executed according to a normal symbol process flag for controlling the variable display 10 using the 7-segment LED in a predetermined order. Then, the value of the normal symbol process flag is updated during each process according to the gaming state.

The CPU 56 sets a display control command (special symbol control command or ordinary symbol control command) sent to the display control board 80 in a predetermined area of the RAM 55, and then executes a special symbol control command or a special symbol control command. A process of outputting a normal symbol control command is performed (special symbol command control process: step S27, normal symbol command control process: step S28).

Next, the CPU 56 performs a process of outputting the contents of the storage area for various output data to each output port (data output process: step S29). Note that the CPU 5
6 also performs other processing such as output data setting processing for setting output data such as big hit information, start information, and probability variation information output to the hall management computer in the storage area.

When a predetermined condition is satisfied, the CPU 56 issues a drive command to the solenoid circuit 59 (step S30). The solenoid circuit 59 drives the solenoids 16 and 21 in response to the drive command, and brings the variable winning ball device 15 or the open / close plate 20 into an open state or a closed state.

The CPU 56 performs a random 1 initial value determining counter updating process (step S31), which is the same process as step S9, and a random 3 initial value determining counter updating process, which is the same process as step S13. (Step S33).

Further, the CPU 56 determines that each winning opening 17 and 2
The number of prize balls is set based on the detection of 3, 19a, and 24a (step S32). That is, when a predetermined condition is satisfied, a payout control command is output to the payout control board 37. Dispensing control CP mounted on the dispensing control board 37
U371 sets the ball payout device 97 in response to the payout control command.
Drive.

As described above, the main processing includes the processing for determining whether or not to shift to the game control processing.
Since a flag is set to determine whether or not to shift to the game control process in the timer interrupt process based on the timer interrupt that is periodically generated by the 56 internal timers, all the game control processes are reliably executed. Is done. In other words, until all of the game control processes have been executed, it is not determined whether or not to shift to the next game control process, so it is guaranteed that all processes in the game control process will be completed. ing.

Here, the CPU 56 of the main board 31
Is executed in response to a flag set in a timer interrupt process based on a timer interrupt that is periodically generated by an internal timer of the CPU 56, but the signal is periodically (for example, every 2 ms). A hardware circuit which generates the signal may be provided, a signal from the circuit may be introduced to an external interrupt terminal of the CPU 56, and a flag for determining whether or not to shift to the game control process based on the interrupt signal may be set. Good.

A reset signal may be periodically (eg, every 2 ms) externally supplied to the reset input terminal of the CPU 56, and the CPU 56 may be periodically reset.

The random 1 initial value determination counter updating process in steps S9 and S31 is
This is a process of updating (+1) a random 1 initial value determination counter for generating. In addition, the random 3 initial value determination counter updating process of steps S13 and S33 is a process of updating (+1) the random 3 initial value determination counter for generating random 7. Since the time required for steps S21 to S32 is shorter than 2 ms, the timer interrupt cycle in this embodiment, 2 ms
The display random number update processing and the random 1 initial value determination counter and the random 3 initial value determination counter update processing are repeatedly executed in the remaining time until the processing reaches (Steps S8, S9, S13). It should be noted that the time required for steps S21 to S32 differs when the game situation differs, so that the remaining time is not a fixed time.

FIG. 11 is a flowchart showing an example of a power failure occurrence NMI process, that is, a process at the time of stopping power supply, which is executed in response to an NMI based on a voltage change signal from a power supply monitoring circuit (power supply monitoring IC 902) of the power supply board 910. is there. As described above, when the power supply to the gaming machine is cut off and the voltage of VSL falls below a predetermined value, the voltage change signal goes to a level indicating power off. When the voltage change signal reaches such a level, NMI is applied.

In the power failure occurrence NMI process, the CPU 56
First, in order to back up the interrupt permission / prohibition state immediately before the power failure such as a power failure, the contents of the interrupt prohibition flag are stored in the parity flag (step S41). Next, interrupt prohibition is set (step S42). In the power failure occurrence NMI process, a checksum generation process is performed to ensure that the contents of the RAM are preserved. If other interrupt processing is performed during that processing, the voltage may drop to a level where the CPU cannot operate before the checksum generation processing is completed. Is set so as not to occur. Steps S44 to S50 in the power failure occurrence NMI process are an example of a power supply stop process. If a CPU having a specification that does not cause another interrupt during the interrupt processing is used, step S
The processing of 42 is unnecessary.

Next, the CPU 56 checks whether or not the backup flag has already been set (step S).
42). If the backup flag has already been set, no further processing is performed. If the backup flag is not set, the following power supply stop processing is executed. That is, the processing from step S44 to step S50 is executed.

First, the contents of each register are backed up by R
It is stored in the AM area (step S44). Thereafter, a backup flag is set (step S45). Then, an appropriate initial value is set in the backup check data area of the backup RAM area (step S46),
The exclusive value is sequentially ORed with respect to the initial value and the data in the backup RAM area and then inverted (step S4).
7), the final operation value is set in the backup parity data area (step S48). Further, the RAM access is prohibited (step S49). When the power supply voltage decreases, the levels of various signal lines become unstable and the contents of the RAM may be corrupted.
If M access is prohibited, backup RAM
The data inside is not garbled. As described above, among the counters for generating random numbers, at least the big hit determination counter and the random 1 initial value determination counter are provided in the backup RAM. Of course, all counters for generating random numbers may be provided in the backup RAM.

Further, the CPU 56 outputs a clear signal to all output ports mounted on the main board 31. Then, all the output ports are cleared by the clear signal and turned off (step S50). As described above, the configuration in which the output port is cleared at the time of the power-off processing allows the large winning opening to be closed before the stop state. Further, the power-off state can be set in a state in which the operation of other electric components is stopped, such as closing the variable winning ball apparatus 15 before the stop state. Therefore, each electric component controlled by the main board 31 can be brought into an appropriate operation stop state. Note that a configuration in which a part of the output port is cleared may be employed.

Next, the CPU 56 enters a loop process. That is, no processing is performed. Therefore, before the operation is disabled from the outside by the system reset signal from the reset IC 651 shown in FIG. 5, the operation is stopped internally. Therefore, when the power is turned off, the operation of the CPU 56 is reliably stopped. As a result, the RAM access prohibition control and the operation stop control described above can reliably prevent the contents of the RAM from being destroyed due to an abnormal operation that may occur as the power supply voltage decreases. .

In this embodiment, the power failure occurrence NM
In I processing, the program was looped in the last part,
It may be configured to issue a HALT instruction.

The backup flag set after storing the contents of the register in the RAM area is, as described above, whether or not there is backup data to be restored when the power is turned on (whether or not to recover from a power failure). Used to judge. Further, the processing of steps S41 to S50 is completed before the CPU 56 receives the system reset signal from the system reset circuit 65. In other words, the detection voltage of the voltage monitoring circuit is set so as to be completed before receiving the system reset signal from the system reset circuit 65.

In this embodiment, the backup flag is checked at the start of the power supply stop processing. If the backup flag has already been set, the power supply stop processing is not executed. As mentioned above,
The backup flag is a flag indicating that the backup of necessary data has been completed and then the power supply stop processing has been completed. Therefore, for example, even if the NMI occurs again for some reason in the reset waiting loop state, the power supply stop processing will not be repeatedly executed.

However, when using a CPU having a specification such that another interrupt does not occur during the interrupt processing, the determination in step S43 is unnecessary.

Next, a method of determining a symbol variably displayed on the variable display section 9 based on a winning in the starting winning opening 14 (starting winning) will be described with reference to flowcharts of FIGS. 12 shows a process for determining that the hit ball has won the starting winning opening 14, FIG. 13 shows a process for determining a symbol and a variation mode, and FIG. 14 shows a big hit determination process. The processes shown in FIGS. 12 to 14 are executed in the special symbol process process (step S25) in the game control process shown in FIG.

When the hit ball wins the starting winning port 14 provided in the game board 6, the starting port switch 17 is turned on.
The CPU 56 includes a switch circuit 58 and an I / O port 5
When it is detected that the start port switch 17 has been turned on via step 7 (step S41), it is checked whether or not the number of start winning memories has reached the start memory upper limit (step S4).
2). If the start winning storage number has not reached the start storage upper limit value, the starting winning storage number is increased by 1 (step S43).
In this embodiment, the starting memory upper limit value is 4.

Then, the value of the counter for generating the random 1 is extracted, and the extracted value is used as the number of stored s (s
= 1, 2, 3,..., Starting memory upper limit value) (Step S)
44). In addition, when the start winning storage number has reached the start storage upper limit value, the processing of steps S43 to S44 is not performed.

When the CPU 56 is ready to start variable display on the image display section 9, it performs the processing shown in the flowchart of FIG. That is, the CPU 56 first checks the value of the number of memorized start winnings (step S50). If the start winning prize memory number is not 0, the value stored in the random number value storage area corresponding to the start prize storing number = 1 is read (step S51), and the value of the starting prize storing number is reduced by one.
In addition, the value of each random number value storage area is shifted (step S52). That is, the number of start winning memories = s (s = 2,
The values stored in the random number value storage area corresponding to (3,...) Are stored in the random number value storage area corresponding to the number of startup winning storage numbers = s−1.

Then, the CPU 56 determines a winning / losing based on the value read in step S51, that is, the value of the extracted big hit determining random number (step S53). In this embodiment, the big hit determination random number takes a value in the range of 0 to 316. And FIG.
As shown in FIG. 4, when the probability is low, for example, when the value is “3”, “big hit” is determined, and when the value is any other value, “miss” is determined. When the probability is high, for example, the values are “3”, “7”, “79”, “103”, “10”.
7 is determined to be "big hit", and other values are determined to be "out".

If it is determined that a big hit has occurred, the CPU 56
Determines the stop symbol based on the value of the big hit symbol determination random number (random 3). In this embodiment, it is assumed that there are 12 types of symbols variably displayed in the left and right symbol display areas. It is assumed that a big hit occurs when the left and right middle stop symbols are aligned. In addition, when the right and left symbols are aligned with a specific type of symbol, the state is entered into a certain change state. If the symbol type is designated by symbol numbers 0 to 11, the symbol of the specific type is, for example, an odd-numbered symbol.

When the combination of stop symbols is determined, the reach type is determined according to the value of random 5 (step S65). Then, whether or not to make a big hit, whether to make a positive change, a symbol in the case of a big hit, and a reach type are set in a predetermined storage area. The storage area is provided in the RAM 55 of the basic circuit 53.

If it is determined in step S53 that there is a deviation, the CPU 56 determines whether or not to reach (step S59). For example, when the value of the reach determination random number shown in FIG. 9 is any of “0” to “104”, the reach is determined. When determining to reach, the CPU 56 determines a stop symbol. In this embodiment, the left and right symbols are determined according to the value of the random 2-1 (step S60). In addition, the middle symbol is determined according to the value of the random 2-2 (step S61). Here, if the determined middle symbol matches the left and right symbols, the symbol corresponding to the value obtained by adding 1 to the value of the random number corresponding to the middle symbol is determined as the middle symbol, so that it does not match the big hit symbol. I do.

Further, the CPU 56 determines a reach type according to the value of the random number 5 (step S65). Then, "reach", a reach symbol, and a reach type are set in a predetermined storage area. If the lottery result in step S59 is out of order, random 2-1 to 2-3
The left and right middle symbols are determined according to the value of (Step S63),
In a predetermined storage area, a lost symbol and a lost symbol are set.

In this embodiment, it is determined whether or not to reach, and then the stop symbol is determined. However, the stop symbol of the left and right middle symbol is determined, and when the left and right symbols match, the reach is performed. Otherwise, it may be determined to be out.

FIG. 15 is a flowchart showing an example of a special symbol process processing program executed by the CPU 56. The special symbol processing shown in FIG.
Is a specific process of step S24 in the flowchart of FIG. When performing the special symbol process process, the CPU 56 performs a variation reduction timer subtraction process (step S310), and then performs steps S300 to S300 according to the internal state.
309 is performed. The fluctuation shortening timer is a timer for setting the fluctuation time when the fluctuation time of the special symbol is shortened.

The fluctuation shortening timer subtraction processing in step S310 is performed in accordance with the condition for shortening the fluctuation time of the special symbol (for example, whether a predetermined time has elapsed from the detection of a start winning prize to the execution of the processing based on the starting prize). Whether or not the condition is satisfied is checked, and if the condition is satisfied, a process of subtracting the fluctuation reduction timer is performed. And step S300 ~
In each process of S309, the following process is executed.

Special symbol change waiting process (step S30)
0): The start winning port 14 (in this embodiment, the winning port of the variable winning ball device 15) is hit and the start port sensor 17 is turned on. When the starting port sensor 17 is turned on, the starting winning memory number is increased by + if the starting winning memory number is not full.
1 and a big hit determination random number is extracted. That is, the processing shown in FIG. 12 is executed. Special symbol determination processing (step S301): When a state in which the variable display of the special symbol can be started, the number of start winning prizes is confirmed. If the starting prize storage number is not 0, it is determined whether to make a big hit or a non-big hit according to the value of the extracted big hit determining random number. That is, the first half of the process shown in FIG. 13 is executed. Stop symbol setting process (step S302): A stop symbol for the left and right middle symbols is determined. That is, the middle half of the processing shown in FIG. 13 is executed.

Reach operation setting processing (step S30)
3): Whether or not to perform the reach operation is determined according to the value of the reach determination random number, and the fluctuation period at the time of reach is determined according to the value of the reach type determination random number. That is, FIG.
Is executed in the latter half of the process shown in FIG.

All symbols change start processing (step S30)
4): In the variable display section 9, control is performed so that all symbols start to change. At this time, with respect to the display control board 80,
The left and right middle final stop symbols and information instructing the variation mode are transmitted. When processing is completed, the internal state (process flag)
Is updated to shift to step S305.

All symbols stop waiting process (step S30)
5): When a predetermined time (time indicated by the fluctuation shortening timer in step S310) elapses, control is performed so that all the symbols displayed on the variable display unit 9 are stopped. And
If the stop symbol is a combination of big hit symbols, the internal state (process flag) is updated so as to shift to step S306. If not, the internal state is updated to shift to step S300.

Opening process of opening the special winning opening (step S30)
6): Control for opening the special winning opening is started. Specifically, the counter and the flag are initialized, and the solenoid 21 is driven to open the special winning opening. Also, a big hit flag (a flag indicating that a big hit is being made) is set. Upon completion of the process, the internal state (process flag) is updated so as to shift to step S307.

Processing during opening of the special winning opening (step S30)
7): Control for transmitting display control command data for the special winning opening round display to the display control board 80, processing for confirming establishment of the closing condition of the special winning opening, and the like are performed. When the final closing condition of the special winning opening is satisfied, the internal state is updated to shift to step S308.

Specific area effective time processing (step S30)
8): The presence or absence of passage of the V count switch 22 is monitored, and a process of confirming that the big hit game state continuation condition is satisfied is performed. If the condition of the jackpot game state continuation is satisfied and there is still a remaining round, the internal state is changed to step S30.
Update to move to 6. If the big hit game state continuation condition is not satisfied within the predetermined effective time, or if all rounds have been completed, the internal state is updated to shift to step S309.

Big hit end processing (step S309): A display for notifying the player that the big hit gaming state has ended is performed. When the display is completed, the internal state is updated so as to shift to step S300.

As described above, when a hit ball is won in the starting winning opening 14, the CPU 56 determines whether or not to make a big hit or a miss, a stop symbol, a reach mode, a certain change in the special symbol process processing. However, a control command such as a display control command according to the determination is transmitted to an electric component control unit such as a display control unit. For example, in the display control means, display control of the variable display unit 9 is performed according to a display control command from the main board 31. Then, in this embodiment, whether or not to change the probability is determined by the type of the determined stop symbol. That is, the random number 3, which is a random number for determining a jackpot symbol, is also used as a random number for determining whether or not to change the probability.

Embodiment 1 FIG. 16 is a flowchart showing a random number updating process for determination (step S23) in the game control process shown in FIG. In the determination random number update process, the CPU 56 increments the value of a counter that generates random 1 (big hit determination random number) (step S101). If the value of the counter for generating random 1 is (maximum value + 1) (step S10
2) Return the counter value to 0 (step S103). In this embodiment, (maximum value + 1) is 317.

Next, the CPU 56 checks whether or not the value of the counter for generating random 1 matches the value stored as the initial value (step S104). If they do not match, the counter value remains unchanged. If they match, random 6 is extracted (step S10).
5). That is, the count value of the counter for generating the random 6 is input. Then, the extracted value is stored as an initial value (step S106), and the extracted value is set in a counter for generating random 1 (step S107). Therefore, at this point, the initial value of the counter that generates random 1 is changed. Note that, when the power of the gaming machine is turned on, “0” is generally stored as an initial value, but such processing is not performed when the data in the RAM is stored in a power backup. That is, the processing is continued using the stored random 1 and random 6.

Then, the value of the counter for generating the random number 3 (the random number for determining the big hit symbol) is incremented by 1 (step S1).
08). When the value of the counter for generating the random number 3 is (maximum value + 1) (step S109), the counter value is returned to 0 (step S110). In this embodiment, (maximum value + 1) is 12.

Next, the CPU 56 checks whether or not the value of the counter for generating the random number 3 matches the value stored as the initial value (step S111). If they do not match, the counter value remains unchanged. If they match, a random 7 is extracted (step S11).
2). That is, the count value of the counter for generating the random number 7 is input. Then, the extracted value is stored as an initial value (step S113), and the extracted value is set in a counter for generating random 3 (step S114). Therefore, at this point, the initial value of the counter that generates random 3 is changed.

FIG. 17 is an explanatory diagram showing an example of the value of a counter that generates a random 1 that changes by the determination random number updating process shown in FIG. In this example, the first value of random 1 is 0. Since “0” is initially stored as the initial value, the counter value becomes “31”.
6 ”, and when it is incremented by 1 and the value returns to 0 (steps S101, S102, S103), step S10
In the process of 4, it is detected that the counter value matches the initial value. Then, random 6 is extracted in the process of step S105. This point is indicated by A in FIG. Further, the value of random 3 for determining the big hit symbol is incremented by one.

Here, it is assumed that the count value of the counter for generating the random number 6 at that time is "19". Then, “19” is extracted as the random number 6, the value is stored (step S106), and the value is set in the counter that generates the random 1. Therefore, from this point on, the counter that generates random 1 starts increasing from the initial value “19”.

When the value of the counter for generating random 1 becomes "19" again, it is detected in step S104 that the counter value matches the initial value. Then, random 6 is extracted in the process of step S105. In addition,
This point is indicated by B in FIG. The count value of the counter that generates random 6 at that time is “1”.
95 ". Then, "1" as random 6
95 ”is extracted and its value is stored (step S106), and the value is set in a counter that generates random 1. Therefore, from this point, the counter that generates random 1 starts increasing from the initial value “195”.
Also, the value of random 3 for determining the big hit symbol is +
1 is done.

When the value of the counter for generating random 1 becomes "195" again, it is detected in the process of step S104 that the counter value matches the initial value. Then, random 6 is extracted in the process of step S105. This point is indicated by C in FIG. It is assumed that the count value of the counter that generates random 6 at that time is “x”. Then, “x” is extracted as random 6 and its value is stored (step S106), and the value is set in the counter that generates random 1. Therefore, from this point, random 1
Is incremented from the initial value “x”. Also, the value of random 3 for determining the big hit symbol is +1
Is done.

Then, it is assumed that the power supply is interrupted while the circuit is proceeding. The values of the counters for generating random 1 and random 6 are backed up so that the contents thereof are preserved for a predetermined period even when the power is turned off. In the example shown in FIG. 17, the count value “y” is stored as the value of a counter that generates a random “1”. When the power is restored,
If the determination result in step S4 shown in (1) is normal, the gaming state is restored to the state immediately before the power-off in the gaming state restoring process in step S5. Also, the value of the counter that generates random 1 is held. Accordingly, as shown in FIG. 17, the updating of the counter for generating random 1 is continued from the stored value (“y” in this example). In addition,
In FIG. 17, an asterisk (*) indicates a position at which the counter value is "3 (big hit determination value at low probability)".

As described above, a new initial value is set as a count value each time the value of the counter for generating random 1 makes one round (317 counts), and thereafter, the counter proceeds from that value. . Counter for generating random 1, that is, a counter for determining the initial value of the jackpot determination counter (counter for generating random 6)
Is counted up by the remaining time of the game control process executed by the CPU 56 (the time from the end of the game control process to the next occurrence of the timer interrupt). The surplus time differs depending on the progress of the game, and is a random period. As a result, the generated random 6 value is also a random value, so that the initial value of the jackpot determination counter also changes randomly.

That is, every time the value of the big hit determination counter makes one round, the counter starts to advance from a random initial value again. Then, even if the illegal board is connected to the main board 31 and the timing of updating the jackpot determination counter value is recognized based on the signal output from the main board 31, the timing at which the jackpot determination counter value becomes the jackpot determination value is determined. It is difficult to send an incorrect start winning signal to the main board 31 for the purpose. According to this embodiment, as indicated by the asterisk in FIG. 17, the timing at which the big hit determination counter value becomes the big hit determination value is not regular but random.

Further, what is characteristic of this embodiment is that the count value of the counter for determining the big hit symbol (the count value for extracting random 3) is 1 Lap (317 count)
And the count value for extracting random 3 is increased by one round (0 to 1 in this example).
1) Then, the initial value is changed. By such control, when it is determined that a big hit is to be made, a stop symbol can be randomly generated. In this embodiment, when the stop symbol is a symbol having an odd symbol number, the state enters the probability change state, and as a result, the condition for changing to the probability change state can be randomly generated.

Further, in this embodiment, the value of the big hit symbol determining counter is incremented by one each time the value of the big hit determining counter makes one round. By performing such control, for example, when there are twelve types of symbols and half of them (the symbol number is an odd number) are determined to be probable, the probability of probable intrusion may be reduced to １ ／. Guaranteed.
That is, it is possible to generate the conditions for bringing the state into the probable change state without bias.

It is assumed that the circulation progresses, the value of the counter for generating random 1 matches the stored initial value, and the time indicated by D in FIG. 17 has been reached. At that time, it is assumed that the count value of the counter for generating the random 3 matches the stored initial value (step S
111). Then, the random 7 is extracted, and its value is stored as a new initial value, and is set in a counter for generating the random 3.

In this embodiment, the random number for determining the jackpot symbol is also used as a random number for determining whether or not to make a probable change. However, the present invention is not limited to such a case. Can be realized according to the design value even if random numbers for determining are prepared separately from random numbers for determining symbols. In that case, every time the value of the jackpot determination counter makes one round, the value of the counter for generating a random number for determining whether or not to make the probability change is incremented by one, and whether or not to make the probability change When the value of the counter for generating a random number for determining the value matches the stored initial value, a new initial value is set in the counter.

If a counter for generating a random number for determining whether or not to make a jackpot is counted up once every 2 ms as in the past, there is a possibility that the jackpot symbol will be biased. Also, a counter for generating a random number for determining whether or not to make a probability change is 2 m as in the past.
When counted up to s once, there is a possibility that the certainty inrush rate may not be as designed.

As a result of the timing at which the random number for jackpot determination matches the jackpot determination value varies, the value of the random number for jackpot symbol determination is generated evenly at that timing, or This cannot be guaranteed to occur evenly. In addition, when the remaining time of the game control process for 2 ms does not vary much, there is a possibility that a probability change symbol is continuously generated as a result of the lottery.

However, in this embodiment, it is guaranteed that all the jackpot symbol determining random numbers are generated evenly at the timing when the jackpot determining random number matches the jackpot determination value. Accordingly, when the probability change / non-probability is determined by the type of the big hit symbol, the value of the random number for the big hit symbol determination is generated evenly, so that the probability of occurrence of the certainty change is as designed. In addition, even when random numbers for determining the probability change / non-probability are separately prepared, the random number values for determining the probability change / non-probability vary evenly, and the probability that the probability change occurs is as designed. Is guaranteed.

Further, since the initial value is changed every time the count value of the counter for generating the random 3 goes around once, the random 3 at the time when the random 1 matches the big hit determination value in a long period of time. Will occur randomly. When the control for changing the initial value of the counter for generating the random 3 is not performed, the count value of the counter for generating the random 3 is changed every time the counter for generating the random 1 makes one round. Always count up in order. Then, it becomes easy to play a game aiming at a specific value of random 3. For example, in a gaming machine in which symbols with odd symbol numbers are probable variations, it is easier to aim for a period in which the random number 3 is an even value (corresponding to non-probability variation). Then, when the player interrupts the game during that period, a game aiming at an odd value of random 3 is performed as a result, and the operating rate of the gaming machine is reduced. However, in this embodiment, a random 3
Since the initial value of the counter for generating is randomly changed, it is possible to effectively prevent an act of aiming at a specific value of random 3.

In this embodiment, the value of the random number 3 is incremented by one when the value of the big hit determination counter has reached one cycle.
The value of the random number 3 may be incremented by one when the value of the jackpot determination counter makes a predetermined plurality of rounds. In addition, the initial value of the value of the big hit determination counter is changed after one round, but the initial value may be changed after a predetermined number of rounds. That is, the value of the jackpot determination counter is N
When (N: natural number) goes around, the initial value is changed, and when the value of the jackpot determination counter goes n (n: natural number), random 3
Can be configured such that the value of +1 is increased. In that case, n = N or n ≠ N.

When the count value of the big hit symbol determination counter or the special game state determination counter makes one round, the initial value is not changed, but the count value is 2 or more.
The initial value may be changed after the rotation (M: natural number). Here, M may be the same value as N or n, or may be a different value. Further, the count value of the big hit symbol determination counter or the special game state determination counter may be configured to be continuously updated in an infinite loop, as in this embodiment, or may be configured by another counter for generating a random number. It may be the time when carry occurs.

Further, when the big hit symbol determining counter and the special game state determining counter for determining whether to make a probability change or the like are separate counters, when the value of the big hit determining counter reaches n times, the special game is determined. The state determination counter and the big hit symbol determination counter may be configured to increment by one. However, the count value of the special game state determination counter is incremented when the value of the big hit determination counter has reached n times, and each time the count value of the special game state determination counter makes m (m: natural number) turns, The counter may be incremented by one. In this case, m may be the same value as N or n, or may be a different value.
Even if such control is performed, when a big hit occurs, the count value of the special game state determination counter is generated evenly,
In addition, it is guaranteed that the count values of the big hit symbol determination counters are evenly generated. Further, even when the big hit symbol determination counter and the special game state determination counter for determining whether to make a probability change or the like are separate counters, both counters have a big hit determination counter of n
The count may be incremented after the lap.

The update range of the big hit symbol determination counter and the special game state determination counter (0 to 11 in this example)
And the update range of the big hit determination counter (specific game state determination counter) (0 to 31 in this example).
6 (317 counts) are preferably relatively prime. This is because if they are disjoint, the initial values are not synchronized even if the update timings of the initial value determination counters for both are the same as in this embodiment.

As shown in FIG. 18, a counter for generating random 6 (random 1 initial value determination counter) is formed of a plurality of parts. In the example shown in FIG. 18, it is formed of two bytes (two parts) of an upper byte and a lower byte. In this embodiment, the random 1 initial value determination counter is formed in the RAM area backed up by the power supply together with the jackpot determination counter.

The updating process of the counter for generating random 6, that is, the counter for determining the initial value of random 1 (random 1 initial value determining counter) is repeated in step S 9 in the main process shown in FIG. Be executed. That is, it is executed in an infinite loop. The process of updating the random 1 initial value determination counter in step S9 shown in FIG. 7 is repeatedly executed with the extra interrupt time. After a lapse of 2 ms, a timer interrupt is applied to the CPU 56, and the CPU 56 starts the game control process of step S12. Then, it is also executed in step S31 in the game control process shown in FIG.

FIG. 19 is a flowchart showing an example of a random 1 initial value determination counter updating process. CPU
56 loads the lower byte of the random 1 initial value determination counter into the register A (step S13).
1). The random 1 initial value determination counter is a basic circuit 5
3 is a 2-byte area in the RAM 55. Note that the register A is a built-in register of the CPU 56 and 1
It is a byte configuration.

Then, the 8-bit value loaded into the register A is incremented by 1 (step S132), and the addition result is saved below the random 1 initial value determination counter (step S133). If a carry (when FF (H) is incremented by 1) has occurred, the upper byte is updated. That is, the upper byte of the random 1 initial value determination counter is loaded into the register A (step S13).
5), the value of the 8-bit loaded into the register A is incremented by 1 (step S136), and the addition result is saved above the random 1 initial value determination counter (step S13).
7).

Further, when the value of the random 1 initial value determination counter reaches 317 (step S141),
Clear data (= 00 (H)) is set for each of the upper byte and the lower byte (steps S142 and S1).
43). As described above, the value of the random 1 initial value determination counter is incremented by one.

Embodiment 2 In the above embodiment, a counter (random 1 initial value determining counter) for determining the initial value of the big hit determining counter and a counter (random 3 initial value determining) for determining the initial value of the big hit symbol determining counter are set. The value of the counter for the game) was counted up in the remaining time of the game control processing in order to ensure randomness. However, the updating means for updating the initial value determining counter relating to the specific game state determining counter and the updating means for updating the initial value determining counter relating to the special gaming state determining counter (or the big hit symbol determining counter) are configured to update the initial value. Any configuration may be used as long as the randomness of the value of the counter for determination is ensured.
For example, if there is a signal in the CPU 56 that is not synchronized with the 2 ms interrupt signal, the value of the counter for determining the initial value may be updated based on the signal.

FIG. 20 shows an example in which a clock signal generated outside the CPU 56 and not synchronized with the timer interrupt cycle is input to the CPU 56. In the example shown in FIG. 20, a clock signal having a period of 0.89 ms is input from the oscillation circuit 68 to the interrupt terminal of the CPU 56. Since the oscillation circuit 68 is a circuit separate from the CPU 56, the clock signal having a cycle of 0.89 ms is not synchronized with the cycle of the timer interrupt inside the CPU 56.

When a clock is input from the oscillation circuit 68, the CPU 56 performs an interrupt process shown in FIG. In the interrupt processing, the values of the high-speed counter 1 and the high-speed counter 2 are incremented by 1 (step S121). When the value of the high-speed counter reaches 317 (step S122), the value is returned to 0 (step S123). The high-speed counter 1 corresponds to an initial value determination counter related to the specific game state determination counter. The high-speed counter 2 corresponds to an initial value determination counter related to a special game state determination counter (or a big hit symbol determination counter).

In this embodiment, the main processing is performed as shown in FIG.
Is performed as shown in FIG. That is, since the updating of the random 1 initial value determining counter and the random 3 initial value determining counter is updated by the interrupt processing based on the external interrupt shown in FIG. 21, the main processing ( The random 1 initial value determining counter updating process and the random 3 initial value determining counter updating process (steps S9 and S13) performed in FIG. 7) are not executed. Also, in this embodiment, in the game control process, a random 1
The initial value determining counter updating process and the random 3 initial value determining counter updating process (steps S31 and S33) are not executed.

FIG. 23 is a flowchart showing a random number updating process for judgment in this embodiment. As shown in FIG. 23, when the value of the counter that generates random 1 matches the value stored as the initial value (step S104), the value of high-speed counter 1 is extracted (step S105A), and the value is extracted. Is stored as an initial value (step S106). If the value of the counter that generates the random number 3 matches the value stored as the initial value (step S111), the value of the high-speed counter 2 is extracted (step S112A), and the value is stored as the initial value. Is performed (step S113). Other processes are the same as those in the first embodiment.

In this embodiment, the CPU 56 determines the initial value of the jackpot determination counter and the initial value of the jackpot symbol determination counter based on a clock signal that is not synchronized with the timer interrupt cycle. Is not synchronized with the timer interrupt cycle, the count value of the high-speed counter is random with respect to the increment of the jackpot determination counter. Therefore, the initial values of the jackpot determination counter and the jackpot symbol determination counter are also random,
As in the case of the first embodiment, it is difficult to send an incorrect start winning signal to the main board 31 with the aim of the timing when the big hit determination counter value becomes the big hit determination value. In addition, it becomes difficult to perform an illegal act aiming at a probable symbol.

As described above, according to each of the above embodiments, the initial value is randomly changed every time the jackpot determination counter makes N (N: natural number) rotations. The timing that matches the jackpot determination value is random. Therefore, it is difficult to predict the time outside, and the gaming machine is less susceptible to fraud. Although the initial value of the jackpot determination counter is appropriately changed, the count value advances one or more rounds from each initial value, and the range of the random one initial value determination counter is the range of the jackpot determination counter. Therefore, the jackpot occurrence probability does not change.

Since the RAM in which the random 1 generation counter (big hit determination counter) and the random 1 initial value determination counter are formed is backed up by a power supply, the big hit determination counter and the like are powered off. When the power is restored later, the count value at the time of power failure is held. That is, when the power is restored, the counting is continued from the count value at the time of the power failure. Therefore, when the game is resumed after the power is cut off, it becomes more difficult to externally capture the value of the jackpot determination counter, and it is more difficult to predict the jackpot timing using an illegal board or the like. It becomes difficult.

In the above embodiment, since the random 1 initial value determination counter is backed up by the power supply, the initial value set in the jackpot determination counter after the power is restored is the value when the power is turned off. Used. That is, the random 1 initial value determination counter also maintains continuity between when the power is turned off and when the power is restored. However, at least one of the jackpot determination counter and the random 1 initial value determination counter is set to the RA backed up by the power supply.
M may not be formed. In addition, the jackpot symbol determination counter and the random 3 initial value determination counter are also used to maintain continuity between when the power is turned off and when the power is restored.
It may be formed in a RAM that is backed up by a power supply. When a special game state determination counter is separately provided, the counter may be formed in a RAM that is backed up by a power supply.

Further, the random 1 initial value determination counter has a 2-byte configuration and each value is updated, so that the randomness is further improved. In the first embodiment (Embodiment 1), the game control process is started in response to the internal timer interrupt, that is, the remaining period of the process based on the previous timer interrupt ends.
In a case where the remainder period is configured to end in response to a reset signal periodically input from outside the CPU 56, the remainder period may end immediately after the process of step S135 shown in FIG. 18, for example. In such a case, only the lower byte is updated and the upper byte is not updated, so that the continuity of the count value is interrupted and the randomness is further increased.

Further, in the power failure occurrence NMI process (process at the time of power supply stop), a process is performed such that at least the value of the RAM including the value of the big hit determination counter is saved, but this process is the highest priority. It is executed based on a high degree of NMI (non-maskable interrupt). Therefore, when the power supply voltage becomes equal to or less than the predetermined value, processing for surely storing the value of the big hit determination counter and the like is executed.

Further, the counter for determining the initial value of the jackpot determination counter (random 1 initial value determination counter) is updated in an infinite loop (loop of steps S8 to S10) as shown in FIG. Figure 10
The game control processing is also updated as shown in FIG. Therefore, it is guaranteed that the update is performed once in a predetermined period (for example, 2 ms).

Further, in each of the above-described embodiments, the case where the probability of occurrence of a “big hit” is increased when a predetermined condition is satisfied as a special game state is described. Variable display time (variable time)
The present invention can be applied to a gaming machine using another special gaming state such as a time saving state in which the time is shortened. Further, the present invention can be applied to a gaming machine having a plurality of modes (for example, a plurality of types of time savings) as a special gaming state. That is, since the randomness of the timing at which the special game state is generated is improved, it is possible to prevent, for example, an illegal act aiming at the most advantageous state among the special game states.

In the gaming machine of each of the above embodiments, that is, the pachinko gaming machine shown in the front view of FIG. 1, a special symbol stop symbol variably displayed on the variable display portion 9 based on a winning start is displayed. Although it was a first-class pachinko gaming machine in which a predetermined game value could be given to a player when a predetermined combination of symbols was reached, a predetermined area was determined when an electric accessory that was opened based on a start winning prize entered a predetermined area. Winning a second-class pachinko gaming machine that allows a player to give a game value to a player, and a predetermined electric role that is opened when a stop symbol of a symbol variably displayed based on a winning start becomes a predetermined symbol combination. The present invention can be applied to a third-type pachinko gaming machine in which a predetermined right is generated or continued when there is a certain right. Further, the present invention is not limited to the pachinko gaming machine, but can be changed to a gaming state advantageous to the player, and the present invention can be applied to any gaming machine having an even more advantageous gaming state.

The variable display section 9 may be realized by any means, for example, a CRT or LED display, or a drum-type or belt-type variable display device.

Further, in each of the above embodiments, the jackpot determination is performed, the initial value of the jackpot determination counter is changed, and the number of revolutions is changed using the extracted random numbers as they are. However, using the extracted random numbers,
Search the contents of the table in which each numerical value according to each random value is set in advance, and use the numerical values searched from the table to determine the jackpot, change the initial value of the jackpot determination counter, and change the round of the jackpot determination counter. The number of times may be determined.

[0160]

As described above, according to the present invention, the value of the specific game state determining counter for determining whether or not the gaming machine is in the specific game state is updated, and the initial value is updated every predetermined round. At least, the RAM of the game control means is configured to be able to hold the contents for a predetermined period even if the power supply is stopped, so that the output from the game control means is synchronized with a predetermined start timing. Observing various signals
It becomes impossible to estimate the timing at which the value for the specific game determination matches the determination value, and as a result, it becomes impossible to externally provide a signal for illegally generating a big hit, thereby effectively preventing the illegal game action. In addition to this, there is an effect that data for restoring the state is saved even if a shortage of power supply or the like occurs, so that a disadvantage is not given to the player.

When the game control means is configured to store the value of the specific game state determination counter when the power supply is stopped, and to continue the updating process from the stored value when the power supply is restored. In this case, it becomes more difficult to predict the timing of a big hit by using an unauthorized board or the like at the time of recovery from a power failure or the like.

If the counter for determining an initial value is provided for determining an initial value of the counter for determining a specific game state, and the counter for determining an initial value is configured to be updated at least in an infinite loop, The randomness of the initial value of the gaming state determination counter is improved, and as a result, illegal gaming can be more effectively prevented.

If the initial value determination counter is configured to be updated even during the game control process, it is guaranteed that the counter is updated once in a predetermined period.

The game control means is configured to store the value of the initial value determination counter when the power supply is stopped, and to use the stored value of the initial value determination counter after the power supply is restored. In this case, there is an effect that the continuity of the value of the initial value determination counter is maintained between when the power is turned off and when the power is restored.

If the range in which the value of the specific game state determination counter can take is the same as the range in which the value of the initial value determination counter can take, the probability of transition to the specific game state is high. Has an effect that does not change.

When the game control process is configured to be started in response to a timer interrupt, there is an effect that all of the game control process is reliably executed.

If the timer interrupt generation cycle is configured to be longer than the time required for the game control process, the remaining time until the next timer interrupt occurs is ensured, and the remaining time is set to the initial value. If the determination counter is updated, the randomness of the counter value is improved.

In the case where the initial value determining counter is composed of a plurality of parts and the game control means is configured to update each part of the initial value determining counter, there is an effect that the randomness is further improved. .

When the game control means interrupts the power supply, it performs a predetermined power supply stop process triggered by an interrupt,
If the configuration is such that the RAM access is prohibited during the processing at the time of power supply stop, the RA caused by the abnormal operation that may occur as the power supply voltage decreases.
It is possible to reliably prevent the destruction of the contents of M, and to surely protect the data stored in the RAM which is restored when the power is turned on thereafter.

When the game control means executes the power supply stop processing,
Check data related to the content of M is created and held, and a check based on the held check data is performed at the time of power supply restoration, and if the check result is normal, the game state is restored to the state at the time of power supply suspension. Do the processing,
If the configuration is such that the RAM is initialized if the check result is not normal, the game state recovery control based on the normal backup data can be performed, and the recovery based on the data that was not normally backed up can be performed. Execution of processing can be prevented.

If the interrupt generated when the power supply is stopped is the highest-priority interrupt, a process for surely storing the value of the big hit determination counter when the power supply is stopped is executed. Has the effect of being done.

[Brief description of the drawings]

FIG. 1 is a front view of a pachinko gaming machine viewed from the front.

FIG. 2 is a rear view of the mechanical plate of the pachinko gaming machine as viewed from the rear.

FIG. 3 is a rear view of the gaming board of the pachinko gaming machine as viewed from the rear.

FIG. 4 is a block diagram illustrating a configuration example of a main board.

FIG. 5: C for power supply monitoring and power supply backup
FIG. 3 is a block diagram illustrating a configuration example around a PU.

FIG. 6 is a block diagram illustrating a configuration example of a power supply board.

FIG. 7 is a flowchart illustrating an example of a main process executed by a CPU on a main board.

FIG. 8 is a flowchart illustrating an example of a 2 ms timer interrupt process.

FIG. 9 is an explanatory diagram showing each random number.

FIG. 10 is a flowchart illustrating an example of a game control process.

FIG. 11 is a flowchart illustrating an example of a power failure occurrence NMI process.

FIG. 12 is a flowchart illustrating a process of determining that a hit ball has won a start winning opening.

FIG. 13 is a flowchart showing a process for determining a symbol.

FIG. 14 is a flowchart showing a jackpot determination process.

FIG. 15 is a flowchart showing a special symbol process process.

FIG. 16 is a flowchart illustrating a determination random number update process according to the first embodiment.

FIG. 17 is an explanatory diagram showing an example of the progress of a big hit determination counter.

FIG. 18 is an explanatory diagram showing a configuration example of a big hit determination counter and a random 1 initial value determination counter.

FIG. 19 is a flowchart illustrating an example of a random 1 initial value determination counter update process.

FIG. 20 is a block diagram illustrating an example in which a clock signal that is not synchronized with a 2 ms timer interrupt is input to a CPU;

FIG. 21 is a flowchart showing an interrupt process based on a clock signal that is not synchronized with a 2 ms timer interrupt.

FIG. 22 is a flowchart illustrating a main process according to the second embodiment.

FIG. 23 is a flowchart illustrating a random number updating process for determination according to the second embodiment.

[Explanation of symbols]

 31 main board 53 basic circuit 54 ROM 55 RAM 56 CPU 57 I / O port

Claims (12)

[Claims] A game can be performed based on an operation of a player and can be controlled to a specific game state advantageous to the player when a predetermined condition for setting a specific game state is satisfied. A game machine that updates the value of a specific game state determination counter for deciding whether or not to play the game and changes the initial value every predetermined round, and temporarily stores data of at least game control means for executing game control processing. A gaming machine characterized in that the RAM for temporarily storing can retain its contents for a predetermined period even when the power supply is stopped. 2. The game control means according to claim 1, wherein the game control means stores a value of a specific game state determination counter when the power supply is stopped, and continues the update process from the stored value when the power supply is restored. Gaming machine. 3. The apparatus according to claim 1, further comprising an initial value determining counter for determining an initial value of the specific game state determining counter, wherein the initial value determining counter is updated at least in an infinite loop. Gaming machine. 4. The gaming machine according to claim 3, wherein the initial value determination counter is updated even during the game control processing. 5. The game control means stores a value of an initial value determination counter when power supply is stopped, and uses the stored value of the initial value determination counter after power supply is restored. A gaming machine according to claim 3 or claim 4. 6. The gaming machine according to claim 3, wherein the range in which the value of the specific game state determination counter can take is the same as the range in which the value of the initial value determination counter can take. 7. The gaming machine according to claim 1, wherein the game control process is started in response to a timer interrupt. 8. The gaming machine according to claim 7, wherein the timer interrupt generation cycle is longer than the time required for the game control processing. 9. The gaming machine according to claim 3, wherein the initial value determining counter comprises a plurality of parts, and the game control means updates each part of the initial value determining counter. 10. The game control means according to claim 1, wherein when the power supply is stopped, a predetermined power supply stop processing is performed in response to an interrupt, and the RAM access is prohibited during the power supply stop processing. 9. The gaming machine according to 9. 11. The game control means creates and holds check data relating to the contents of a RAM in a power supply stop processing, performs a check based on the held check data when power supply is restored, and checks the check result. The gaming machine according to claim 10, wherein if it is normal, a process of restoring the gaming state to a state at the time of stopping power supply is performed, and if the check result is not normal, the RAM is initialized. 12. The gaming machine according to claim 10, wherein the interrupt generated when the power supply is stopped is an interrupt having the highest priority among interrupts used for control.