JP2001236496A - 絶対差分の合計および対称濾波用の再構成可能ｓｉｍｄコプロセッサ構造 - Google Patents

絶対差分の合計および対称濾波用の再構成可能ｓｉｍｄコプロセッサ構造

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Publication number
JP2001236496A
JP2001236496A JP2000342670A JP2000342670A JP2001236496A JP 2001236496 A JP2001236496 A JP 2001236496A JP 2000342670 A JP2000342670 A JP 2000342670A JP 2000342670 A JP2000342670 A JP 2000342670A JP 2001236496 A JP2001236496 A JP 2001236496A
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Prior art keywords
data
adder
pairs
pair
memory
Prior art date
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Abandoned
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JP2000342670A
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English (en)
Japanese (ja)
Other versions
JP2001236496A5 (enExample
Inventor
Han Chin-Yuu
− ユー ハン チン
W Estevez Leonard
ダブリュ、エステベズ レオナルド
A Rabadie Wissam
エイ、ラバディ ウィッサム
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Texas Instruments Inc
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Texas Instruments Inc
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Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JP2001236496A publication Critical patent/JP2001236496A/ja
Publication of JP2001236496A5 publication Critical patent/JP2001236496A5/ja
Abandoned legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141—Discrete Fourier transforms
    • G06F17/142—Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/147—Discrete orthonormal transforms, e.g. discrete cosine transform, discrete sine transform, and variations therefrom, e.g. modified discrete cosine transform, integer transforms approximating the discrete cosine transform
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/43—Hardware specially adapted for motion estimation or compensation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/43—Hardware specially adapted for motion estimation or compensation
    • H04N19/433—Hardware specially adapted for motion estimation or compensation characterised by techniques for memory access
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/436—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation using parallelised computational arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/503—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding involving temporal prediction
    • H04N19/51—Motion estimation or motion compensation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/544—Indexing scheme relating to group G06F7/544
    • G06F2207/5442—Absolute difference

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computational Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Databases & Information Systems (AREA)
  • Algebra (AREA)
  • Discrete Mathematics (AREA)
  • Computing Systems (AREA)
  • Image Processing (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Microcomputers (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
JP2000342670A 1999-10-04 2000-10-04 絶対差分の合計および対称濾波用の再構成可能ｓｉｍｄコプロセッサ構造 Abandoned JP2001236496A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US411124 1989-09-22
US09/411,124 US6526430B1 (en) 1999-10-04 1999-10-04 Reconfigurable SIMD coprocessor architecture for sum of absolute differences and symmetric filtering (scalable MAC engine for image processing)

Publications (2)

Publication Number Publication Date
JP2001236496A true JP2001236496A (ja) 2001-08-31
JP2001236496A5 JP2001236496A5 (enExample) 2007-11-22

Family

ID=23627669

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000342670A Abandoned JP2001236496A (ja) 1999-10-04 2000-10-04 絶対差分の合計および対称濾波用の再構成可能ｓｉｍｄコプロセッサ構造

Country Status (2)

Country Link
US (2) US6526430B1 (enExample)
JP (1) JP2001236496A (enExample)

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JP2006515941A (ja) * 2002-10-31 2006-06-08 ロックヒード マーティン コーポレーション 多数パイプライン・ユニットを有するパイプライン加速器、関連計算マシン、並びに、方法
JP2007004338A (ja) * 2005-06-22 2007-01-11 Renesas Technology Corp データ処理装置
JP2007531134A (ja) * 2004-03-31 2007-11-01 イセラ・インコーポレーテッド 非対称二重経路処理のための装置および方法
JP2007531135A (ja) * 2004-03-31 2007-11-01 イセラ・インコーポレーテッド 二重データ経路処理のための装置および方法
JP2007531133A (ja) * 2004-03-31 2007-11-01 イセラ・インコーポレーテッド 二重経路プロセッサの処理制御のための装置および方法
US7430577B2 (en) 2002-09-24 2008-09-30 Interdigital Technology Corporation Computationally efficient mathematical engine
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JP2011054012A (ja) * 2009-09-03 2011-03-17 Nec Computertechno Ltd 積和演算装置及び積和演算装置の制御方法
JP2011108265A (ja) * 2002-08-09 2011-06-02 Marvell World Trade Ltd アライメントまたはブロードキャスト命令を含むマルチメディア・コプロセッサの制御メカニズム
US7987341B2 (en) 2002-10-31 2011-07-26 Lockheed Martin Corporation Computing machine using software objects for transferring data that includes no destination information
JP2013045219A (ja) * 2011-08-23 2013-03-04 Nippon Telegr & Teleph Corp <Ntt> データ処理システム、データ処理方法、リソースマネージャ装置、アクセラレータ装置及びプログラム
JP2013512491A (ja) * 2009-11-30 2013-04-11 コミサリアト ア レネルジー アトミクー エ オ エネルジーズ アルタナティヴズ Ｆｆｔ／ｉｆｆｔを実行するバタフライ演算器を有するデジタルデータ処理プロセッサおよび移動通信端末
JP2013512492A (ja) * 2009-11-30 2013-04-11 コミサリアト ア レネルジー アトミクー エ オ エネルジーズ アルタナティヴズ 加算／減算ハードウェア演算器、プロセッサおよびこのような演算器を備える移動通信端末
JP2014160516A (ja) * 2014-06-09 2014-09-04 Univ Of Tokyo 画像処理装置及び画像処理方法
KR20140122672A (ko) * 2013-04-10 2014-10-20 로베르트 보쉬 게엠베하 데이터 기반 함수 모델의 모델 계산 유닛, 제어 장치 및 계산 방법
JP2014238861A (ja) * 2011-10-14 2014-12-18 アナログ・デバイシズ・インコーポレーテッド 動的に再構成可能なパイプライン型プリプロセッサ
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CN115955733A (zh) * 2022-12-30 2023-04-11 中国科学院计算技术研究所 一种通信基带处理器

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