JP2001210682A - Semiconductor-sorting apparatus - Google Patents

Semiconductor-sorting apparatus

Info

Publication number
JP2001210682A
JP2001210682A JP2000015997A JP2000015997A JP2001210682A JP 2001210682 A JP2001210682 A JP 2001210682A JP 2000015997 A JP2000015997 A JP 2000015997A JP 2000015997 A JP2000015997 A JP 2000015997A JP 2001210682 A JP2001210682 A JP 2001210682A
Authority
JP
Japan
Prior art keywords
pellet
result
sorting
pellets
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000015997A
Other languages
Japanese (ja)
Other versions
JP4570719B2 (en
Inventor
Michiaki Tanizawa
道明 谷澤
Yasuhiro Matsukawa
泰広 松川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP2000015997A priority Critical patent/JP4570719B2/en
Publication of JP2001210682A publication Critical patent/JP2001210682A/en
Application granted granted Critical
Publication of JP4570719B2 publication Critical patent/JP4570719B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54453Marks applied to semiconductor devices or parts for use prior to dicing
    • H01L2223/54466Located in a dummy or reference die
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/5448Located on chip prior to dicing and remaining on chip after dicing

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To automatically put defect marks on chips that are located around a defective chip, when a continuous defect distribution is generated in measurement of a wafer. SOLUTION: A data file obtained by acquiring measurement result, with reference to the coordinates of each chip on a wafer, is converted to generate data, based on which failure marks are put.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はウエハプローバ、特
に、潜在的な不良を事前に把握し選別する技術に関し、
例えば、半導体装置の製造工程において、ウエハにおけ
るペレット群についての良品、不良品を選別するのに利
用して有効な技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wafer prober, and more particularly to a technique for grasping and selecting potential defects in advance.
For example, the present invention relates to a technique which is effective for use in selecting non-defective products and defective products in a group of pellets on a wafer in a semiconductor device manufacturing process.

【0002】[0002]

【従来の技術】半導体装置の製造工程において、ウエハ
におけるペレット群についての良品、不良品を選別検査
する半導体選別装置として、ウエハプローバ、プローブ
針のペレットに対するプロービング、ペレットに作り込
まれた集積回路とテスタとのテスト交信、テスト結果で
ある良品、不良品のウエハ1枚当たりの総数の計算並び
にその印刷、およびプローブ中に不良品が連続して発生
した場合の検査の中断並びにその警報を自動的に実施す
るように構成され、又テスト結果である良品、不良品の
マーカーによるマーキングを実施するものがある。
2. Description of the Related Art In a semiconductor device manufacturing process, as a semiconductor sorting device for sorting and inspecting non-defective products and defective products in a group of pellets on a wafer, a wafer prober, probing for a probe needle pellet, an integrated circuit built in the pellet, and the like. Test communication with the tester, calculation of the total number of good and defective test results per wafer and their printing, and automatic interruption of inspection and alarm when a defective product occurs continuously in the probe. In some cases, the marking is performed using a marker for a non-defective product or a defective product as a test result.

【0003】なお、ウエハプローバを述べてある例とし
ては、株式会社工業調査会発行「電子材料別冊1984年版
超LSI製造・試験装置ガイドブック」昭和58年11月1
5日発行 P195〜P198、がある。
[0003] An example of a wafer prober is described in "Electronic Materials Separate Volume 1984 Edition Ultra LSI Manufacturing and Test Equipment Guidebook" published by the Industrial Research Institute, November 1, 1983.
There are P195-P198, issued on the 5th.

【0004】[0004]

【発明が解決しようとする課題】このような半導体選別
装置においては、ウェハ面内で不良品が継続的に頻発し
た場合や、局所的な不良分布が発生した場合に、不良品
の周辺ペレットに潜在的な不良を内在していたり、ある
いは選別規格ギリギリであって選別結果が良品とされる
可能性があるという問題点があった。
In such a semiconductor sorting apparatus, when defective products continuously and frequently occur in the wafer surface or when a local defective distribution occurs, the pellets around the defective products are removed. There is a problem that a potential defect is inherent, or the screening result is just before the screening standard and the screening result may be regarded as a good product.

【0005】本発明の目的は、潜在的な不良(選別規格
ギリギリであって後に不良となるペレットを含む)を選
別することができる半導体選別装置を提供すること目的
とする。
It is an object of the present invention to provide a semiconductor sorting apparatus capable of sorting out potential defects (including pellets that are barely at the end of the sorting standard and subsequently defective).

【0006】[0006]

【課題を解決する為の手段】上述した課題を解決し、目
的を達成するため、ウエハ内のペレットの位置座標デー
タと前記位置座標データに対応する前記ペレットの選別
結果データから、第1の選別結果のペレットと前記第1
の選別結果のペレットの周辺部の第2の選別結果のペレ
ットにマーキングする。
In order to solve the above-mentioned problems and to achieve the object, a first sorting is performed from position coordinate data of a pellet in a wafer and sorting result data of the pellet corresponding to the position coordinate data. The resulting pellet and the first
Is marked on the pellets of the second sorting result around the pellets of the sorting result.

【0007】これによれば、第1の選別結果のペレット
と前記第1の選別結果のペレットの周辺部の第2の選別
結果のペレットにマーキングすることにより、潜在的な
第1の選別結果のペレットにマーキングすることができ
る。
[0007] According to this, by marking the pellets of the first sorting result and the pellets of the second sorting result around the pellet of the first sorting result, the potential of the first sorting result is marked. The pellet can be marked.

【0008】また、ウエハ内のペレットの位置座標デー
タと前記位置座標データに対応する前記ペレットの選別
結果データから、第1の選別結果のペレットが島状に存
在する該ペレットと、第1の選別結果のペレットが島状
に存在する該ペレットに隣接する第2の選別結果のペレ
ットにマーキングする。
[0008] Further, based on the position coordinate data of the pellets in the wafer and the pellet selection result data corresponding to the position coordinate data, the first selection result pellets are present in the form of islands; The resulting pellet is marked on a second sorted pellet adjacent to the island-shaped pellet.

【0009】これによれば、第1の選別結果のペレット
が島状に存在する該ペレットに隣接する第2の選別結果
のペレットにマーキングすることにより、潜在的な第1
の選別結果のペレットにマーキングすることができる。
[0009] According to this, the pellets of the first sorting result are marked on the pellets of the second sorting result adjacent to the pellets present in the form of islands, whereby the potential of the first sort is obtained.
Can be marked on the pellets of the sorting result.

【0010】また、ウエハ内のペレットの位置座標デー
タと前記位置座標データに対応する前記ペレットの選別
結果データから、第1の選別結果のペレットと前記第1
の選別結果のペレットに囲まれた第2の選別結果のペレ
ットにマーキングする。
[0010] Further, based on the position coordinate data of the pellets in the wafer and the pellet selection result data corresponding to the position coordinate data, the first selection result pellet and the first selection result are obtained.
Are marked on the pellets of the second sorting result surrounded by the pellets of the sorting result.

【0011】これによれば第1の選別結果のペレットと
前記第1の選別結果のペレットに囲まれた第2の選別結
果のペレットにマーキングすることにより、潜在的な第
1の選別結果のペレットにマーキングすることができ
る。
According to this, by marking the pellets of the first sorting result and the pellets of the second sorting result surrounded by the pellet of the first sorting result, the potential pellets of the first sorting result are marked. Can be marked.

【0012】[0012]

【発明の実施の形態】以下に添付図面を参照して、この
発明にかかる半導体選別装置の好適な実施の形態を詳細
に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a semiconductor sorting apparatus according to the present invention will be described below in detail with reference to the accompanying drawings.

【0013】[0013]

【実施例】本発明は半導体素子の電気的特性検査時にウ
ェハー面内の各ペレットの情報としてペレットの座標情
報と良品または不良品の情報を例えばフロッピーディス
ク、あるいはネットワークを通じて他のコンピュータの
ハードディスクといった補助記憶装置に格納しておき、
更に1枚のウェハーの測定終了時、あるいはロットの測
定終了時にマーキングを実施する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention uses the coordinate information of pellets and the information of non-defective or defective products as information of each pellet in the wafer surface at the time of electrical characteristic inspection of a semiconductor device, for example, using a floppy disk or a hard disk of another computer through a network. Stored in the storage device,
Further, the marking is performed when the measurement of one wafer is completed or the measurement of the lot is completed.

【0014】図4においてプローバ装置のステージ部7
にウエハ6をセットし、接触子4、5を備えたプローブ
カードを用いて、ウエハ6内の各ペレットを、IC検査
装置2で選別検査を行い、各ペレットに対応する座標と
選別検査結果を取得したデータファイル9を作り、その
データを一定の規則に従い不良ペレット周辺が不良にな
るように座標変換したファイルを作成し、このデータか
ら、ステージ部15、X−Y座標制御部16とマーク部
13を備えたマーキング装置12でウエハ14上の不良
周辺ペレットに、一定の規則に基づきマークを打つよう
に構成されている。そして、ステージ部7にウエハ6を
のせ、接続されたIC検査装置2でペレットを順番に測
定し、ウエハペレット座標(X,Y)に対応した測定結
果を取得したデータを作成する。
In FIG. 4, the stage 7 of the prober device
The wafer 6 is set on the wafer, and each pellet in the wafer 6 is selected and inspected by the IC inspection apparatus 2 using a probe card provided with the contacts 4 and 5, and the coordinates and the selected inspection result corresponding to each pellet are obtained. The acquired data file 9 is created, and a file obtained by performing coordinate conversion on the data according to a certain rule so that the area around the defective pellet becomes defective is created. From this data, the stage unit 15, the XY coordinate control unit 16, the mark unit The marking device 12 provided with a mark 13 marks a defective peripheral pellet on the wafer 14 based on a certain rule. Then, the wafer 6 is placed on the stage unit 7, and the pellets are sequentially measured by the connected IC inspection apparatus 2, and data is obtained which has obtained the measurement results corresponding to the wafer pellet coordinates (X, Y).

【0015】図1において、例として、ウエハ上の座標
(B、e)なら測定結果P、座標(C、c)なら測定結
果P、座標(C、c)なら測定結果2、のようにデータ
を測定順に取得し図3の20、21、22ような内容の
データファイル9を作成する。
In FIG. 1, as an example, data such as a measurement result P for coordinates (B, e) on the wafer, a measurement result P for coordinates (C, c), and a measurement result 2 for coordinates (C, c) are shown. Are acquired in the order of measurement, and a data file 9 having contents such as 20, 21, and 22 in FIG. 3 is created.

【0016】データファイル9はペレットのX,Y座標
に対し、良品、不良等の選別結果の種類が記述されてい
る。次に、ウエハの電気特性試験で特定の不良項目で連
続的不良分布を持つ不良27が発生した時、不良項目2
3のペレット座標(D、J)に着目し、不良項目のペレ
ット周辺座標+1(図1の24)又は、不良周辺座標+
2(図1の25)が不良になるようにデータファイル9
の座標データを変換する。この変換を、特定の不良項目
ペレット全てに対して自動的に座標変換するプログラム
を使いマーキング用データを作成する。不良座標に対し
プラス幾つ不良にするかは、不良分布の程度によって変
更できるようにしておく。
The data file 9 describes the types of sorting results such as non-defective products and defective products with respect to the X and Y coordinates of the pellet. Next, when a defect 27 having a continuous defect distribution in a specific defect item occurs in the electrical characteristic test of the wafer, the defect item 2
Paying attention to the pellet coordinates (D, J) of No. 3, the pellet peripheral coordinates of the defective item + 1 (24 in FIG. 1) or the defective peripheral coordinates +
2 so that data file 9 (25 in FIG. 1) becomes defective.
Is converted. For this conversion, marking data is created using a program for automatically performing coordinate conversion for all the specified defective item pellets. The number of defects plus defect coordinates can be changed according to the degree of defect distribution.

【0017】次に、このデータファイルをマーキング装
置12でマーキングを行なうことで図3の26のように
不良分布がどのような形でも、均一に不良周辺マークす
る事ができる。
Next, by marking this data file with the marking device 12, it is possible to uniformly mark the defect periphery regardless of the shape of the defect distribution as shown at 26 in FIG.

【0018】[0018]

【発明の効果】本発明は、ウエハ電気特性試験後、ウエ
ハ面内で不良分布が発生した時に特定の測定不良項目の
不良周辺ペレットの良品に対し、ウエハ上で不良マーク
付けることにより、パッケージ実装後の不良率の低減を
可能にするものである。
According to the present invention, after a wafer electrical property test, when a defect distribution occurs in the wafer surface, a defective mark on a defective peripheral pellet of a specific defective measurement item is marked on the wafer, thereby mounting the package. This makes it possible to reduce the defective rate later.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態にかかる半導体選別装置に
よるウエハマップの図である。
FIG. 1 is a diagram of a wafer map by a semiconductor sorting device according to an embodiment of the present invention.

【図2】本発明の実施の形態にかかる半導体選別装置に
よる不良ペレット周辺に不良マークをしたウエハマップ
の図である。
FIG. 2 is a diagram of a wafer map in which a defect mark is formed around a defective pellet by the semiconductor sorting device according to the embodiment of the present invention.

【図3】本発明の実施の形態にかかる半導体選別装置に
よるマーキングデータのデータ構造を示した表である。
FIG. 3 is a table showing a data structure of marking data by the semiconductor sorting device according to the embodiment of the present invention.

【図4】本発明の実施の形態にかかる半導体選別装置の
第1の概略図である。
FIG. 4 is a first schematic diagram of a semiconductor sorting device according to an embodiment of the present invention.

【図5】本発明の実施の形態にかかる半導体選別装置の
第2の概略図である。
FIG. 5 is a second schematic diagram of the semiconductor sorting device according to the embodiment of the present invention.

【図6】従来の半導体選別装置の概略図である。FIG. 6 is a schematic diagram of a conventional semiconductor sorting device.

【符号の説明】[Explanation of symbols]

1、28 プローバ装置 2、29 IC検査装置 3、30 プローブカード 4、5、31、32 接触子 6、14、33 ウエハ 7、15、35 ステージ部 8 XーY座標制御部 9、17 データファイル 10、18 X−Y座標データ 11 測定結果データ 12 マーキング装置 13 マーキング部 16 X−Y座標制御部、 19 ペレットの測定結果データ 20 (B、e)座標のペレットの良品測定結果P 21 (C、c)座標のペレットの良品測定結果P 22 (C、d)座標のペレットの不良項目測定結果2 23 不良ペレット座標 24 不良ペレット周辺(+1)の座標を不良にしたペ
レット 25 不良ペレット周辺(+2)の座標を不良にしたペ
レット 26 連続不良ペレット周辺をマーキングしたペレット 27 不良ペレットの連続不良が発生した分布 34 インクマーク部
1,28 Prober device 2,29 IC inspection device 3,30 Probe card 4,5,31,32 Contact 6,14,33 Wafer 7,15,35 Stage unit 8 XY coordinate control unit 9,17 Data file 10, 18 XY coordinate data 11 Measurement result data 12 Marking device 13 Marking unit 16 XY coordinate control unit, 19 Pellet measurement result data 20 Non-defective measurement result P 21 (C, c) Result of measurement of non-defective pellet P22 (C, d) Result of defective item of pellet 2 22 Result of defective pellet coordinate 24 Result of defective pellet around defective pellet (+1) 25 Result of defective pellet periphery (+2) Pellets with bad coordinates 26 Pellets marked around continuous defective pellets 27 Distribution of continuous defective pellets 34 Ink mark area

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 ウエハ内のペレットの位置座標データと
前記位置座標データに対応する前記ペレットの選別結果
データから、第1の選別結果のペレットと前記第1の選
別結果のペレットの周辺部の第2の選別結果のペレット
にマーキングすることを特徴とする半導体選別装置。
A first sorting result pellet and a first sorting result pellet peripheral portion based on the pellet sorting result data corresponding to the position coordinate data. 2. A semiconductor sorting device, wherein marking is performed on pellets obtained as a result of sorting.
【請求項2】 ウエハ内のペレットの位置座標データと
前記位置座標データに対応する前記ペレットの選別結果
データから、第1の選別結果のペレットが島状に存在す
る該ペレットと、前記第1の選別結果のペレットが島状
に存在する該ペレットに隣接する第2の選別結果のペレ
ットにマーキングすることを特徴とする半導体選別装
置。
2. A method according to claim 1, wherein the first and second pellets having a first sorting result in the form of an island are obtained from the position coordinate data of the pellets in the wafer and the sorting result data of the pellets corresponding to the position coordinate data. A semiconductor sorting apparatus, wherein the sorting result pellet is marked on a second sorting result pellet adjacent to the island-shaped pellet.
【請求項3】 ウエハ内のペレットの位置座標データと
前記位置座標データに対応する前記ペレットの選別結果
データから、第1の選別結果のペレットと前記第1の選
別結果のペレットに囲まれた第2の選別結果のペレット
にマーキングすることを特徴とする半導体選別装置。
3. The method according to claim 1, wherein the position coordinate data of the pellets in the wafer and the pellet selection result data corresponding to the position coordinate data include a first selection result pellet and a first selection result pellet surrounded by the first selection result pellet. 2. A semiconductor sorting device, wherein marking is performed on pellets obtained as a result of sorting.
JP2000015997A 2000-01-25 2000-01-25 Semiconductor sorting device Expired - Lifetime JP4570719B2 (en)

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JP2009010303A (en) * 2007-06-29 2009-01-15 Ricoh Co Ltd Method for sorting nondefective chip on wafer, method for evaluating chip quality using the same, program for chip sorting, program for evaluating chip quality, marking mechanism and manufacturing method for semiconductor device
CN102468119A (en) * 2010-11-19 2012-05-23 上海华虹Nec电子有限公司 Thin film for fast selecting failed crystal grains from wafer and use method
WO2019111394A1 (en) * 2017-12-07 2019-06-13 株式会社Fuji Information management device and information management method

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107768281B (en) * 2017-09-11 2019-09-20 广东利扬芯片测试股份有限公司 Wafer coordinate reading device and method

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JPH04356938A (en) * 1991-04-26 1992-12-10 Nec Yamagata Ltd Probing apparatus
JPH0574880A (en) * 1991-09-17 1993-03-26 Nec Yamagata Ltd Semiconductor marker

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JP2009010303A (en) * 2007-06-29 2009-01-15 Ricoh Co Ltd Method for sorting nondefective chip on wafer, method for evaluating chip quality using the same, program for chip sorting, program for evaluating chip quality, marking mechanism and manufacturing method for semiconductor device
CN102468119A (en) * 2010-11-19 2012-05-23 上海华虹Nec电子有限公司 Thin film for fast selecting failed crystal grains from wafer and use method
WO2019111394A1 (en) * 2017-12-07 2019-06-13 株式会社Fuji Information management device and information management method
JPWO2019111394A1 (en) * 2017-12-07 2020-12-17 株式会社Fuji Information management device and information management method
US11452251B2 (en) 2017-12-07 2022-09-20 Fuji Corporation Information management device

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