JP2001187191A - Pachinko machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realizes a Pachinko machine of which the freedom of game board designing is increased by improving the power supply system. SOLUTION: AC of 24 V supplied by the main power source 70 is converted to DC of 32 V by a rectifying circuit 81 and supplied to a main board 100 and a ball dispense control board 200 respectively. The DC of 32 V is converted to 12 V by a DC/DC converter 82 and respectively supplied to the main board 100, special symbol display 32, lamp controller 75, sound controller 79 and ball dispense control board 200. The AC of 24 V in the main power source 70 is supplied to a CR connection board 56. Thus the power supply system can be unified because a required electric current can be supplied to each board from a single power source board 80.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pachinko machine for controlling a game by a computer.

[0002]

2. Description of the Related Art Conventionally, as a pachinko machine of this type, when a game ball passes through a predetermined area, a plurality of symbols are variably displayed by a symbol display device, and when a stop symbol is aligned with a predetermined symbol, a big hit is hit. It is known that a large amount of prize balls can be paid out by generating and opening a special winning opening a plurality of times. In such a pachinko machine, a large number of circuit boards for controlling a game are used. For example, a main board on which a CPU for determining whether or not a big hit is mounted, a payout control board for controlling payout of award balls, a special symbol control board for controlling display of a special symbol, and a sound effect during a game are controlled. A voice control board, a lamp control board for controlling an LED which is turned on at the time of winning, a decorative LED, and the like are used. In addition, a relay board for relaying a signal and a power supply is provided between the predetermined boards. The power supplied from the main power supply is directly supplied to each substrate, or supplied to each substrate via a relay substrate, and each substrate is transformed into a voltage required by the substrate.

[0003]

However, as described above, the conventional pachinko machine has a configuration in which the power supplied from the main power supply is transformed into a voltage required by each substrate in each substrate. If the board configuration is different for each manufacturing model, a power supply path and a transformer circuit for each board must be designed for each manufacturing model. That is,
There is a problem that the production yield of the pachinko machine is poor because the degree of freedom in designing the substrate is low. In addition, since the power supply voltage used for each board cannot be managed at one place, there is a problem that a voltage change monitoring system becomes complicated. Further, a transformer circuit provided for each substrate hinders space saving of the substrate.

The present invention has been made in order to solve the above-mentioned problems, and an object of the present invention is to realize a pachinko machine capable of improving the degree of freedom in board design by improving a power supply system. I do.

[0005]

In order to achieve the above object, according to the present invention, a plurality of substrates including a main substrate having a function of determining whether or not a hit has occurred are provided. And a single power supply substrate for generating power required for a predetermined substrate among the plurality of substrates and supplying the power to each substrate.

[0006] The power supply board is single, and the power supply board is
A power source required for a predetermined substrate among a plurality of substrates including a main substrate having a function of determining whether or not a hit has occurred is generated and supplied to each substrate.

In other words, since a single power supply board can supply necessary power to each predetermined board, even if the board configuration is different for each manufacturing model, the power supply board can be connected to each predetermined board. Since it is only necessary to wire the power supply line, there is no need to design a power supply path and a transformer circuit for each predetermined substrate for each manufacturing model. Therefore, since the degree of freedom in designing the substrate can be increased, the production yield of the pachinko machine can be improved. In addition, since the power supply voltage used for each predetermined board can be managed at one place of the power supply board, a voltage change monitoring system can be unified. further,
Since there is no need to provide a transformer circuit for each predetermined substrate, it is possible to save space on the substrate.

According to a second aspect of the present invention, in the pachinko machine according to the first aspect, the power supply board and the predetermined board are connected by lines for supplying power, respectively. The technical means that at least one of the terminals attached to both ends of the predetermined wire is common to each other.

That is, since at least one of the terminals attached to both ends of the predetermined line among the lines for supplying power from the power supply substrate to each predetermined substrate is common to each of the predetermined lines, Since it is possible to save the trouble of selecting a wire as compared with a case where wires having different terminals are used, the connection process of the wires can be performed easily and in a short time. Further, since the number of wires that can be used in common is large, the manufacturing cost can be reduced as compared with a case where several types of wires having different terminals are manufactured.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a pachinko machine according to the present invention will be described below with reference to the drawings. In the following embodiment, a so-called first-class pachinko machine will be described as an example of the pachinko machine according to the present invention. [Overall Main Configuration] First, the main configuration of the pachinko machine of this embodiment will be described with reference to FIG. FIG. 1 is an explanatory view of the pachinko machine of this embodiment as viewed from the front.
The pachinko machine 10 is provided with a front frame 11 so as to be openable and closable. A metal frame 12 is attached to the front frame 11 so as to be openable and closable. Mounted on A game board 14 is provided inside the glass frame 13. On the lower right of the front frame 11 is a firing motor (reference numeral 15 in FIG. 3) for firing game balls to the game board 14.
(shown by e) is rotatably mounted on a firing handle 15a, and a guide rail 16 is provided on the left side of the game board 14 for guiding the fired game balls to a game area. . The firing handle 15a is provided with a firing stop button 15b for stopping the firing operation.

A keyhole decoration 17 having a keyhole 15 into which a key for opening and closing the glass frame 13 is inserted is provided on the right side of the front frame 11, and a frame lamp 18 a is provided above the front frame 11. A front plate 19 is provided under the glass frame 13, and a prize ball / lending ball supply port 20a to which a prize ball or a lending ball is supplied is formed on an upper left portion of the front plate 19, On the supply side of the prize ball / lending ball supply port 20a, an upper receiving tray 20 for storing prize balls or lending balls supplied from the prize ball / lending ball supply port 20a is attached. Below the upper tray 20, there is formed an outlet 21a for discharging a prize ball that has flowed in excess of the number that can be accommodated in the upper tray 20, a game ball discharged from the upper tray 20 by operating the upper tray ball removing lever 20b, and the like. Have been. On the discharge side of the discharge port 21a, a lower tray 21 for storing the game balls discharged from the discharge port 21a is provided. On the left side of the front frame 11, there is provided a device outside the gaming machine 22 such as a prepaid card unit having a slit 22a for inserting a prepaid card.

[Main Structure of Game Board 14] Next, the game board 1
4 will be described with reference to FIG. A center case 30 is provided substantially at the center of the game board 14. The center case 30 has a prize entrance 31
And a normal symbol display device 34 including three LEDs, and 4 indicating the number of times the normal symbol display device 34 is operated.
A normal symbol storage display LED 35 composed of a plurality of LEDs, a special symbol display device 32 for variably displaying a plurality of symbols, for example, 0-9 special symbols on a liquid crystal display, and a display 4 for displaying the number of times the special symbol display device 32 has been started. And a special symbol storage display LED 36 composed of a plurality of LEDs.

On the left and right sides of the center case 30, a normal symbol operation gate 2 for operating the normal symbol display device 34 is provided.
6, 26 are provided. Below the center case 30, a first type starting port 27 having a function of operating the special symbol display device 32 is provided. Below the first type starting port 27, a stop symbol of the ordinary symbol display device 34 is provided. Ordinary electric accessory 28 that opens both wings when hit
Is provided. The opened ordinary electric accessory 28 has a function of starting the operation of the special symbol display device 32, similarly to the first type starting port 27. A variable winning device 40 which is activated when the stop symbol of the special symbol display device 32 hits the symbol is provided below the ordinary electric accessory 28.

The variable winning device 40 has a large winning opening 41 in the form of a door which is opened when a hit occurs. The winning winning opening 41 is provided on both sides of the large winning opening 41. Are provided respectively. Further, inside the special winning opening 41, there is provided a specific area 42 having a function of continuously opening the special winning opening 41, and a specific area switch (reference numeral 42 in FIG. 3) for detecting a game ball passing through the specific area 42.
a) and a special winning opening switch (indicated by reference numeral 43a in FIG. 3) for counting the number P of game balls that have won the special winning opening 41.

In addition, the game board 14 has windmills 23, 23
, Sleeve entrance prize opening 24, 24, corner decoration lamp 18
b, 18b, a prize lamp 18c that lights up when a prize is won,
An out-of-ball lamp 18d that lights up when the ball runs out, side decoration lamps 18e, 18e, and an out port 45 for collecting game balls that did not win as out balls are provided.
Further, many nails 28 are driven into the game board 14, and the game balls fired on the game board 14 fall while disturbing between the nails 28.

[Electrical Configuration of Pachinko Machine 10] Next, the electrical configuration of the pachinko machine 10 will be described with reference to FIG. The pachinko machine 10 is provided with a main board 100, on which a microprocessor 110 is mounted. The microprocessor 110 has a main CP for executing game control.
U112 and a ROM 11 in which various control programs for the main CPU 112 to execute various controls are recorded.
And a RAM 116 for temporarily storing various data such as a control program read from the ROM 114 when the main CPU 112 executes various control programs and data relating to a big hit occurring during a game.

The following components are electrically connected to the main substrate 100. Power supply board 80, payout control base 200 for controlling payout of award balls, etc., special symbol display device 3
2. A lamp control device 75 for controlling lamps provided on the game board 14, a sound control device 79 for controlling a sound reproduction device (not shown) for reproducing sound effects during a game, etc., a first type start of a game ball. A first-type start-up switch 27a for detecting the passage of the mouth 27; a game frame information terminal board 5 for transmitting game board information relating to winnings, big hits, etc. to a computer (not shown) provided in a pachinko hall management room or the like;
2. The board relay board 51 and the game frame relay board 55.

The payout control board 200 is equipped with a microprocessor 210 which operates by inputting a control command sent from the main board 100. The microprocessor 210 has a sub CPU which controls payout of prize balls and the like.
212, a ROM 214 in which various control programs for the sub CPU 212 to execute control such as payout of prize balls, and a control program read from the ROM 214 when the sub CPU 212 executes various control programs and a game And a RAM 216 for temporarily storing various data such as the number of prize balls generated in the RAM. In addition, the power supply board 80, the CR connection board 56, the firing motor drive board 15c for driving the firing motor 15e, the game frame information terminal board 52, and the payout relay board 55 are electrically connected to the payout control board 200. I have.

The game frame relay board 53 has a full detection switch 2 for detecting that the lower tray 21 is full of prize balls.
1b and the sensor relay board 54 are electrically connected. The sensor relay board 54 is electrically connected to the prize ball payout sensors 62a and 62b and the payout relay board 55 provided in the prize ball unit 62. The prize ball unit 62
Prize ball payout sensors 62a, 62b and prize ball payout motor 6
2c. There are two prize ball payout mechanisms for efficiently paying out prize balls, and each payout mechanism is driven by a prize ball payout motor 62c. The prize ball payout sensor 62a is provided in one mechanism, and the prize ball payout sensor 62b is provided in the other mechanism. Detection signals from the prize ball payout sensors 62a and 62b are transmitted from the sensor relay board 54 to the main board 100 via the game frame relay board 53.
The CPU 120 counts the number of paid-out balls based on the signal.

The payout relay board 55 is electrically connected to a ball-off switch 61 for detecting that the ball is no longer available, a winning ball payout motor 62c, and a ball-for-ball unit 63. The following components are electrically connected to the board-surface relay board 51. Ordinary electric accessory solenoid 28a for opening and closing the ordinary electric accessory 28, ordinary symbol display device 34, symbol actuation opening switch 26a, large winning opening switch 43a, and sleeve winning opening switch 24 for detecting winning in the sleeve winning opening 24.
a, a lower prize port switch 29a for detecting a prize to the lower prize port 29, a lower prize port switch 31a for detecting a prize to the lower prize port 31;

A special winning area solenoid 42b, a special winning area solenoid 43b, and a specific area switch 42a are electrically connected to the special winning opening relay board 50. The power supply board 80 is electrically connected to the CR connection board 56,
The CR connection board 56 is electrically connected to the gaming machine external device portion 22 including a frequency display board for displaying the remaining frequency of the prepaid card and a device for reading the prepaid card. The power supply board 80 is a 24 V AC (50 Hz / 6
(0 Hz) from the main power supply 70.

[Main Hardware Configuration] Next, the main hardware configuration of the pachinko machine 10 is shown in FIG.
This will be described with reference to FIG. Here, the main CPU 112 of the main board 100 and the sub C of the payout control board 200
The hardware configuration of the interface between the PUs 212 will be described as an example. Main CP of main board 100
Various control commands output from U112
Output to the output port 120 via the PU bus 118;
The output various control commands are temporarily stored in the output buffer 126 via the main CPU parallel output port 124, and then stored in the input buffer 220 connected to the sub CPU 212. And the main CPU
The transfer signal output from the main CPU bus 1
When the trigger signal (TRG2) 226 of the sub CPU 212 is input from the sub-CPU 212 via the output port 122, the output buffer 128, and the input buffer 222, various control commands accumulated in the input buffer 220 are transmitted to the sub-CPU 212.
The data is input to the input port 224 of the sub CPU 212 via the parallel input port 228. And the sub CPU
The 212 performs analysis such as what the captured various control commands mean, and outputs an award ball payout command to the award ball unit 62 based on the analysis result. Note that the main CPU 1 of the main board 100
The hardware configuration between the sub-CPU 12 and the sub CPU mounted on a board other than the payout control board 200 is the same as the above-described configuration.

[Main Configuration of Power Supply Board 80, Power Supply Board 80
Next, the main configuration of the power supply board 80 and the connection relation between the power supply board 80 and each board will be described with reference to FIGS. FIG. 5 is an explanatory diagram showing a main configuration of the power supply board 80 together with a connection relationship with each substrate, and FIG. 6 is an explanatory diagram showing details of a connection relationship between the power supply substrate 80 and each substrate. As shown in FIG. 5, the 24 V AC current supplied from the main power supply 70 is converted to 32 V DC by the rectifier circuit 81 via the fuse F <b> 1 and supplied to the main board 100 and the payout control board 200, respectively. The 32 V direct current is supplied to the DC / DC converter 82.
To 12V. The 12 V DC is applied to the main board 100, the special symbol display device 32, and the lamp control device 7.
5, are supplied to the voice control device 79 and the payout control board 200, respectively. Further, the AC 24 V of the main power supply 70 is supplied to the CR connection substrate 56 through the 24 V line 85 via the fuse F2.

The 32 V direct current supplied to the main board 100 is supplied to the board relay board 51 (FIG. 3), and drives the ordinary motor accessory solenoid 28a. Special symbol display device 32
12V DC supplied to the lamp controller 75 drives the liquid crystal and the like of the special symbol display, and the 12V DC supplied to the lamp control device 75 converts the corner decoration lamp 18b and the winning lamp 18c.
Lights or flashes. The 12 V DC supplied to the voice control device 79 drives the speaker via the voice circuit, and the 12 V DC supplied to the payout control board 200.
V direct current is transmitted to the prize ball unit 6 via the payout relay board 55.
2 and the ball rental unit 63, and the prize ball payout motor 62
drive c and the like. Further, the 32 V direct current supplied to the payout control board 200 is supplied to the ball letting unit 63 (FIG. 3) via the payout relay board 69, and a solenoid for operating a shutter member that divides the supplied ballpark by a predetermined number is operated. Drive.

The DC current converted to 12 V by the DC / DC converter 82 is converted to 5 V by the DC / DC converter 83, and the 5 V DC is supplied to the main board 100, the special symbol display device 32, and the lamp control device. 7
5, are supplied to the voice control device 79 and the payout control board 200, respectively. The 5 V DC supplied to the main board 100 serves as a drive power supply for the microprocessor 110 (FIG. 3), and the 5 V DC supplied to the payout control board 200 serves as a drive power supply for the microprocessor 210 (FIG. 3). The 5 V DC supplied to the special symbol display device 32, the lamp control device 75, and the audio control device 79 serves as a drive power supply for a microprocessor (not shown) provided in each device.

That is, the power of each board is supplied from a single power board 80, and the power board 80 controls the power of each board. For this reason, even if the board configuration is different for each manufacturing model, it is only necessary to wire the power supply line from the power board 80 to each board, so that the power supply path and the transformer circuit of each board are different for each manufacturing model. There is no need to design. Therefore, since the degree of freedom in designing the substrate can be increased, the production yield of the pachinko machine can be improved. Further, since it is not necessary to provide a transformer circuit for each substrate, it is possible to save the space of the substrate.

As shown in FIG. 6, the power supply board 80 has a No. for supplying power to the main board 100. A 6-pin connector CN2a of 1 to 6 is attached, and this connector CN2a is connected to a connector CN1 attached to the main board 100 by a cable L1. Cable L1
Has a terminal C for connecting to the connector CN2a.
N2b is attached, and a terminal (not shown) for connecting to the connector CN1 on the main board 100 side is attached to the other end. The power supply board 80 has the No. for supplying power to the payout control board 200. An 8-pin connector CN3a of 1 to 8 is attached, and the connector CN3a is connected to the payout control board 200 by a cable L2.
Is connected to the connector CN1 attached to the. A terminal CN3b for connection to the connector CN3a is attached to one end of the cable L2, and a terminal (not shown) for connection to the connector CN1 on the payout control board 200 is attached to the other end. .

Further, the power supply board 80 includes a connector CN.
7a, CN4a, CN5a, CN6a, CN1a are attached. The connector CN7a is connected to the CR connection board 56 by a cable L3.
Is connected to a connector CN7a at one end.
7b is attached, and a terminal (not shown) for connecting to the connector CN2 on the CR connection board 56 side is attached to the other end. The connector CN4a is connected to the cable L4
Is connected to a special symbol control board 32a provided in the special symbol display device 32, a terminal CN4b for connecting to the connector CN4a is attached to one end of the cable L4, and a special symbol control board is attached to the other end. A terminal (not shown) for connecting to the connector CN1 on the 32a side is attached.

The connector CN5a is connected to a lamp control board 75 provided in the lamp control device 75 by a cable L5.
a terminal CN5b for connecting to the connector CN5a is attached to one end of the cable L5, and the connector CN on the lamp control board 75a side is attached to the other end.
A terminal (not shown) for connecting to the terminal 1 is attached. The connector CN6a is connected to a voice control board 79a provided in the voice control device 79 by a cable L6. A terminal CN6b for connecting to the connector CN6a is attached to one end of the cable L6, and the other end is connected to the other end. A terminal (not shown) for connecting to the connector CN1 on the audio control board 79a side is attached. Connector C
N1a is connected to the main power supply 70 by a power cord L7, and one end of the power cord L7 has a connector CN1a.
A terminal CN1b for connection to the terminal is attached.

Since the cables L4 to L6 have the same number of terminal pins, a common cable can be used. Therefore, it is possible to save the trouble of selecting a cable as compared with a case where cables having different numbers of terminal pins are used, so that the cable connection processing can be performed easily and in a short time. In addition, since the number of cables that can be used in common is large, the manufacturing cost can be reduced as compared with the case where many types of cables having different numbers of terminal pins are manufactured.

[Voltage Monitoring Function] Next, the function of monitoring the voltage of the power supplied from the power supply substrate 80 to each substrate will be described with reference to FIGS. 5, 6 and 7B.
FIG. 7B is an explanatory diagram illustrating a main configuration of the power supply voltage monitoring IC. As shown in FIG. 5, the power supply board 80 is provided with a power supply voltage monitoring IC 84 for monitoring the voltage of the power supply supplied to each board. Power supply voltage monitoring IC84
Are 32V line 86, 12V line 87, 5V line 8 from voltage detection lines A1, A2 and A3, respectively.
8 is detected. The power supply voltage monitoring IC 84 is shown in FIG.
As shown in (B), an A / D conversion circuit 84a that converts a voltage detected from the 32V line 86 into a digital signal,
A / D conversion circuit 84b for converting the voltage detected from the 12V line 87 into a digital signal, and A / D conversion circuit 8 for converting the voltage detected from the 5V line 88 into a digital signal
4c. Each A / D conversion circuit is connected to a CPU 84e. The CPU 84e takes in a digital signal output from each A / D conversion circuit, calculates a voltage, and determines a voltage drop or the like based on the calculated value. I do. The CPU 84e is connected to each board, outputs a RESET signal to each board according to the determination result, and resets the board that has dropped to a predetermined voltage.

[Data Backup Function] Next, a function of backing up data stored in the RAM 216 built in the microprocessor 210 will be described with reference to FIGS. 5 and 7A. FIG. 7A is an explanatory diagram showing a connection relationship between the power supply board 80 and the microprocessor 210. In the following description, the sub-substrate refers to each substrate other than the main substrate 100 and the payout control substrate 200. As shown in FIG. 5, the DC / DC converter 8
Power supply line 8 for connecting 3 to payout control board 200
A diode D1 is connected in series to 3a, and a capacitor C1 as a backup power supply is connected in parallel to the output side of the diode D1. This capacitor C1
Is charged by a 5 V DC current supplied from the DC / DC converter 83. The discharge current of the capacitor C1 is supplied to the built-in RAM backup power supply terminal VBB of the microprocessor 210 via the backup power supply line L2a in the cable L2 as shown in FIG.

As shown in FIG. 7A, one of the outputs of the voltage monitoring IC 84 is a microprocessor 210
NMI (Non-Maskable Interrupt) terminal. Here, the connector CN3b (FIG. 6) attached to one end of the cable L2 is removed from the connector CN3a provided on the power supply board 80, or a connector (not shown) attached to the other end of the cable L2 is dispensed. By disconnecting from the connector CN1 (FIG. 6) on the control board 200 side, the supply of the backup power from the capacitor C1 can be stopped. Thereby, the RAM 21
Even if data important for paying out prize balls stored in 6 is rewritten due to electrostatic noise or fraud, the supply of backup power can be stopped quickly and easily. Can be minimized to a minimum. In this embodiment, the capacitor C1 is an electric double-layer capacitor, and has a nominal capacitance of 0.1 F and a rated voltage of 5.5 V. The cables L1 to L6 are FPCs (flexible print circuits).

[Main Control of Power Supply and Discharge Control Board] Next, control of the power supply of each board and main control of the discharge control board 200 will be described with reference to FIGS.
FIG. 8 is a flowchart showing the flow of a program start process executed by the sub CPU 212, and FIG.
6 is a flowchart illustrating a flow of a main program process executed by a PU 212. FIG. 10 is a flowchart illustrating a flow of a command input process executed by the sub CPU 212, and FIG. 11 is a flowchart illustrating a flow of an NMI interrupt process executed by the sub CPU 212. FIG.
5 is a timing chart showing the rise and fall of the power supply of each substrate.

(Startup of Power Supply) When the main power supply 70 (FIG. 5) is started up, 5 V is applied from the DC / DC converter 83 to each substrate.
Power is supplied. Then, when the voltage becomes equal to or higher than the minimum operating voltage of the voltage monitoring IC connected to the microprocessor mounted on each board, a system reset signal (low level) is output on all the boards and the board is stabilized. Subsequently, after a time Trs from when the 5V power supply reaches the voltage Vus, the system reset signal of the sub-substrate is released (low level to high level), and control of each sub-substrate is started. Then, 12V power is supplied to each substrate from the DC / DC converter 82, and after a time Trh from when the 12V power reaches the voltage Vuh, the system reset signal of the dispensing control substrate 200 is released, and the sub CPU 212 (FIG. 7) Perform the check. In this security check,
A check is made as to whether there is any abnormality in the computer program recorded in the ROM 214. Subsequently, when the security check ends, the sub CPU 212 starts operating.

(Program Start Process of Sub CPU 212) Here, a program start process executed by the sub CPU 212 will be described with reference to FIG. Sub C
The PU 212 sets the interrupt prohibition (step (hereinafter, referred to as “step”).
10), a stack pointer for holding the address of the main routine when shifting from the main routine to the subroutine is set at the bottom of the address (S12). Subsequently, the sub CPU 212
Access permission is set (S14), and the interrupt mode is set to mode 2 (S16). Subsequently, the sub CPU 21
2 sets the address to be used in mode 2 in the interrupt register (S18), and determines whether the check data in the RAM 216 is correct, for example, A5A5H (S20), and if the check data is correct (S20). S
20: Yes), the area other than the backup area in the RAM 216 is cleared to 0 (initialization). If the check data is not correct (S20: No), all the area (for example, 256 bytes) of the RAM 216 is cleared to 0 (initialization). ) And store the check data (for example, A5A5H) (S24). Subsequently, the sub CPU 212
Initialization of built-in devices such as a watchdog timer which is a timer for monitoring runaway of U212 (S2
6) Initial setting of the work area is performed (S28). Subsequently, the sub CPU 212 sets interruption permission (S30), and shifts to an infinite loop in which this S30 is repeated. And 12
After a time Trm after the V power supply reaches the voltage Vum, the main substrate 10
The system reset signal of 0 is released, and the main CPU 112 of the main board 100 starts the operation after executing the security check. At this stage, the pachinko machine 10 is in a playable state. As described above, since control can be started in the order of the sub-substrate, the payout control substrate 200, and the main substrate 100, a command reception omission from the main substrate 100 occurs in all the substrates managed by the main substrate 100. Never do.

(Main Program Processing of Sub CPU 212) Here, the flow of the main program processing executed by the sub CPU 212 of the payout control board 200 will be described with reference to FIG. This main program processing is performed by CTC
This is executed by a channel 3 interrupt of (timer counter) 218 (FIG. 7). The sub CPU 212 sets interruption permission (S100) and restarts the watchdog timer (S200). Subsequently, the sub CPU 212
Is based on data from the output process (S300), input process (S400), storage of the number of prize balls to be paid out and prize ball processing (S500) such as a payout command, and data from the CR connection board 56 (FIG. 3). A ball lending process (S600) for controlling the ball lending unit 63 is executed.

(Command Input Processing of Sub CPU 212)
Next, a flow of a command input process executed by the sub CPU 212 will be described with reference to FIG. This command input processing is executed by the channel 2 interrupt of the CTC 218. The sub CPU 212 inputs a control command such as a payout command sent from the main board 100 (S50), and checks the input control command (S52). For example, the control command is 2 bytes composed of an 8-bit signal, and is distributed to each byte. Subsequently, the sub CPU 212 determines whether the input control command is a control command meaning, for example, a command indicating a payout command of 5 prize balls, a command indicating a payout command of 15 prize balls, or the like. Analysis is performed (S54), and interruption permission is set (S56). As described above, the command input process is assigned to the channel 2 interrupt, and is executed in the second priority order following the NMI interrupt process described later. For example, the sub CPU 212 outputs a pulse to the winning ball payout motor 62c. Even if the main board sends a control command for paying out a prize ball, the control command can be analyzed with priority. Therefore, it is possible to eliminate a prize ball payout error or a delay in award ball payout due to a failure to receive a control command from the main board 100.

(Shutdown of power supply) When the main power supply 70 is cut off due to power cutoff, power outage or power supply abnormality at the end of pachinko hall business, when the 12V power supply reaches the voltage Vdm, the system is reset to the main board 100. A signal is generated (high level → low level). Subsequently, when the 12 V power supply reaches the voltage Vdh (for example, 10.3 V), an NMI signal is generated, and this NMI signal continues for a time period Tnmi. During this time Tnmi, data such as the number of award balls
It is backed up to AM 216. At this time, the discharge current of the capacitor C1 (FIG. 5) is
Is supplied to the backup power supply terminal VBB (FIG. 7), so that the RAM 216 can maintain the storage of data such as prize ball data. (NMI Interrupt Process of Sub CPU 212) Here, the NMI interrupt process executed by the sub CPU 212 is shown in FIG.
This will be described with reference to FIG. When the NMI signal is generated, the sub CPU 212 sets access prohibition in the access register for the RAM 216 (S70). This interrupt process is executed with the highest priority over other interrupt processes. In other words, by prohibiting access to the RAM 216, the prize ball data stored in the RAM 216 is prevented from being rewritten.

For example, at the time of backing up the RAM 216, if another interrupt process has already been executed and a new interrupt has been prohibited, and if the processing time of the other interrupt process becomes longer, an interrupt is subsequently issued. If processing is permitted and access to the RAM 216 is to be prohibited, it may be too late to destroy part or all of the stored contents of the RAM 216. Therefore, NMI
By prohibiting access to the RAM 216 by interrupt processing, destruction of the storage contents of the RAM 216 is prevented. When the time Tnmi has elapsed, the NMI signal stops, a system reset signal is generated in the payout control board 200, and the payout control board 200 is reset. Then, 5
When the V power supply reaches the voltage Vds, a system reset signal is generated on the sub-substrate, and the sub-substrate is reset. If the power is turned on while the RAM 216 is being backed up, the sub CPU 212
The prize ball payout motor 62c (FIG. 3) is driven with reference to the prize ball number stored in the 216, and the prize ball corresponding to the prize ball number is paid out.

(Power supply monitoring process) Next, the power supply voltage monitoring I
The flow of the power supply voltage monitoring process executed by the CPU 84e provided in the C84 will be described with reference to the flowchart of FIG. Here, a case where the voltage of the 12V line 87 is monitored will be described as an example. C
When the PU 84e takes in a timing signal from a timer (not shown) and determines that it is the timing to detect the power supply voltage (S80: Yes), the PU 84e controls each A / D conversion circuit via the control line 84f (FIG. 7B). A control signal is sent to the server (S82). Each of the A / D conversion circuits that take in the control signal takes in current from each voltage line, converts the voltage value of the taken current into a digital signal,
84e.

Then, the CPU 84e calculates the voltage V1 by counting the received digital signals, and determines whether the voltage V1 is equal to or lower than a predetermined voltage (S86). here,
The predetermined voltage is, for example, the minimum operating voltage required for the functioning of the board, and is 10.3 V for a board with a 12 V power supply, for example. Subsequently, the CPU 84e sets the voltage V
If 1 is 10.3 V or less (S86: Yes),
RESET to each board functioning with 12V power supply
A signal is transmitted (S88), and a notification LED 89 (FIG. 5) provided at a predetermined location of the pachinko machine 10 (for example, on a board for transmitting a RESET signal or at a location visible from the outside of the pachinko machine 10) is lit. (S9
0). By turning on the notification LED 89, it is possible to report that a non-functioning substrate has occurred due to a decrease in the power supply voltage. For this reason, a measure for restoring the function of the substrate can be performed at an early stage.

As described above, if the pachinko machine 10 of this embodiment is used, a single power supply board 80 can supply necessary power to each board, so that the board configuration differs for each manufacturing model. Even in this case, there is no need to design a power supply path, a transformer circuit for each board, and the like for each manufacturing model. Therefore, since the degree of freedom in designing the substrate can be increased, the production yield of the pachinko machine can be improved. In addition, since the power supply voltage used in each board can be managed in one place of the power supply board, a voltage change monitoring system can be unified. Further, since there is no need to provide a transformer circuit for each substrate, it is possible to save the space of the substrate. Note that the main CPU 112 or the sub CPU 212 may monitor the voltage. in this case,
Voltage monitoring may be independent of other processing, or may be interrupt processing.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a pachinko machine according to an embodiment of the present invention as viewed from the front.

FIG. 2 is an explanatory diagram showing a main configuration of a game board 14 provided in the pachinko machine 10 shown in FIG.

FIG. 3 is an explanatory diagram showing an electrical configuration of the pachinko machine 10 by blocks.

FIG. 4 is an explanatory diagram showing a main hardware configuration of the pachinko machine 10;

FIG. 5 is an explanatory diagram showing a main configuration of a power supply board 80 together with a connection relationship with each board.

FIG. 6 is an explanatory diagram showing details of a connection relationship between a power supply board 80 and each board.

FIG. 7A is an explanatory diagram showing a connection relationship between a power supply board 80 and a microprocessor 210;
(B) is an explanatory view showing a main configuration of a power supply voltage monitoring IC.

FIG. 8 is a flowchart illustrating a flow of a program start process executed by a sub CPU 212;

FIG. 9 is a flowchart illustrating a flow of a main program process executed by a sub CPU 212;

FIG. 10 is a flowchart illustrating a flow of a command input process executed by a sub CPU 212;

FIG. 11 is a flowchart illustrating a flow of an NMI interrupt process executed by a sub CPU 212;

FIG. 12 is a timing chart showing the rise and fall of the power supply of each substrate.

FIG. 13 is a flowchart illustrating a flow of a power supply voltage monitoring process executed by a CPU 84e.

[Explanation of symbols]

 10 Pachinko machine 70 Main power supply 80 Power supply board 84 Power supply voltage monitoring IC 100 Main board 112 Main CPU 200 Dispensing control board 212 Sub CPU CN1, CN3a, CN3b Connector (terminal)

Claims (2)

[Claims] 1. A plurality of substrates including a main substrate having a function of determining whether or not a hit has occurred, and a power source required for a predetermined substrate among the plurality of substrates is generated and supplied to each substrate. A pachinko machine comprising: a power supply board; 2. The power supply board and the predetermined board are connected by a line for supplying power, respectively, and at least one of terminals attached to both ends of the predetermined line among the lines is The pachinko machine according to claim 1, wherein each of the pachinko machines is common.