JP2001144252A - Semiconductor capacitance element and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent generation of particles in a capacitance element by eliminating residue of a film formed on the upper electrode at the sidewall portion of the lower electrode circumference, which is generated when the upper electrode is formed. SOLUTION: This semiconductor capacitance element has a structure, where an upper electrode 104 is formed on a lower electrode 102 at the center thereof where is not overlapped on the peripheral portion of the lower electrode 102 and that a residue pattern 105 consisting of the upper electrode forming film is provided separated from the upper electrode 104 on the peripheral portion of the lower electrode 102, overlapping with the peripheral portion of the lower electrode 102.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a capacitor formed on a semiconductor substrate and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, systematization of LSIs has progressed, and the demand for one-chip digital and analog circuits has been further increased. In particular, at present, a high-precision analog circuit requires a capacitive element with small voltage dependency.

FIG. 3 shows the structure of a conventionally used capacitive element. The capacitor shown in FIG. 3 has a structure in which a capacitor insulating film 302 is sandwiched between a lower electrode 301 and an upper electrode 303 made of a polycrystalline silicon film.

FIG. 4 shows a method of manufacturing a conventional capacitive element. In FIG. 4, a first conductive film 402 made of a polycrystalline silicon film is deposited on a semiconductor substrate 401, and a lower electrode 403 is formed by using a known photolithography technique and an etching technique. After that, a capacitor insulating film 404 is grown on the lower electrode 403, and a second conductive film 405 made of a polycrystalline silicon film is further deposited. Second conductive film 4
An upper electrode 406 is formed on the capacitor 05 and the capacitor insulating film 404 by using a known photolithography technique and etching technique.

[0005]

However, in the above-described capacitive element structure and manufacturing method, the second polycrystalline silicon film covering the lower electrode side wall during anisotropic etching for forming the upper electrode. Has been left as a sidewall on the side wall of the lower electrode.
This etching residue not only causes a short circuit failure between the adjacent capacitive elements, but also causes a serious problem of peeling off from the side wall portions and forming particles, leading to a reduction in yield.

An object of the present invention is to solve this problem, and it is an object of the present invention to prevent an etching residue from being generated on a side wall of a lower electrode during etching for forming an upper electrode.

[0007]

In order to solve this problem, a semiconductor capacitor according to the present invention has an upper electrode formed on a lower electrode and a central portion of the lower electrode which does not overlap with a peripheral portion of the lower electrode. On the electrode, on the lower electrode peripheral portion overlapping with the lower electrode peripheral portion, the upper electrode forming film is formed separately from the upper electrode, and has a configuration to cover the lower electrode peripheral portion with the upper electrode film. I have.

The method of manufacturing a semiconductor capacitor according to the present invention includes a step of forming a first conductive film on a semiconductor substrate;
Forming a lower electrode of the capacitor by partially etching the first conductive film, forming an insulating film on the first conductive film, and forming a second conductive film on the insulating film And partially etching the second conductive film and the insulating film to form an upper electrode of the capacitive element on the lower electrode, on the lower electrode central portion which does not overlap with the lower electrode peripheral portion. And simultaneously leaving a second conductive film on the lower electrode peripheral portion overlapping the lower electrode peripheral portion on the lower electrode.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a semiconductor capacitor according to the present invention. FIG. 1 (a) is a sectional view, and FIG. 1 (b) is a plan view. In FIG. 1, 101 is a semiconductor substrate, 102 is a lower electrode,
103 is a capacitor insulating film, 104 is an upper electrode, and 105 is a residue prevention pattern. In FIG. 1, an upper electrode 104 is provided on the lower electrode 102 and on a central portion of the lower electrode 102 which does not overlap with a peripheral portion of the lower electrode 102.
Further, on the peripheral portion of the lower electrode 102 overlapping with the peripheral portion of the lower electrode 102, the upper electrode 104 is separated from the upper electrode 104 to have a residue prevention pattern 105 formed of an upper electrode forming film.

[0011] With this structure, in etching at the time of forming the upper electrode, the peripheral portion of the lower electrode is formed as a film having a shape in which the upper electrode forming film is accurately patterned, so that the non-uniform etching residue on the side wall of the lower electrode. As a result, it is possible to prevent the upper electrode forming film from remaining.

FIG. 2 shows a method of manufacturing a semiconductor capacitor according to the present invention.

First, as shown in FIG. 2A, a first polycrystalline silicon film is deposited on a semiconductor substrate 201 as a first conductive film 202 by a known CVD method to a thickness of about 250 nm. Next, as shown in FIG. 2B, the first polycrystalline silicon film is anisotropically etched using a known lithography technique and an etching technique to form a lower electrode 203. next,
As shown in FIG. 2C, the semiconductor substrate 201 on which the lower electrode 203 is formed is thermally oxidized at 800 degrees to form an oxide film of about 5 nm as the insulating film 204. A known CV is formed on this oxide film.
By a method D, a second polycrystalline silicon film is deposited as the second conductive film 205 to a thickness of about 300 nm. Next, as shown in FIG. 2D, using a known lithography technique and an etching technique,
The second polycrystalline silicon film is anisotropically etched to form a region on the central portion of the lower electrode to be the upper electrode 206 and a region surrounding the peripheral portion of the lower electrode.

According to this manufacturing method, the upper electrode forming film can be accurately patterned on the lower electrode peripheral portion and the lower electrode side wall, and a sidewall having a width of about 0.3 μm can be formed accurately on the lower electrode side wall portion. .

By positively leaving the upper electrode forming film on the lower electrode peripheral portion and on the lower electrode side wall as described above, it is possible to prevent the etching residue that cannot be controlled when the upper electrode is etched.

[0016]

As described above, according to the present invention, an excellent semiconductor capacitor capable of preventing the occurrence of etching residue on the lower electrode side wall by covering the lower electrode peripheral portion and the lower electrode side wall with the upper electrode forming film. And a method for manufacturing the same.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view and a plan view of a semiconductor capacitor according to a first embodiment of the present invention.

FIG. 2 is a manufacturing process diagram of the semiconductor capacitance element according to the first embodiment of the present invention.

FIG. 3 is a sectional view and a plan view of a conventional semiconductor capacitor.

FIG. 4 is a manufacturing process diagram of a conventional semiconductor capacitor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Semiconductor substrate 102 Lower electrode 103 Capacitance insulating film 104 Upper electrode 105 Residue prevention pattern

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Chiaki Kudo, Inventor 1-1, Yukicho, Takatsuki-shi, Osaka Matsushita Electronics Co., Ltd. (72) Inventor Toshiki Yabu 1-1, Yukicho, Takatsuki-shi, Osaka Matsushita Electronics Co., Ltd. F-term (reference) 5F038 AC05 AC15 EZ20

Claims (3)

[Claims] 1. A semiconductor capacitance element formed on a semiconductor substrate and having an insulating film interposed between a lower electrode and an upper electrode, wherein the upper electrode overlaps a peripheral portion of the lower electrode on the lower electrode. The upper electrode forming film is formed separately from the upper electrode on the lower electrode peripheral portion formed on the central portion of the lower electrode not overlapping with the lower electrode peripheral portion on the lower electrode. A semiconductor capacitor characterized by the above-mentioned. 2. A step of forming a first conductive film on a semiconductor substrate; a step of partially etching the first conductive film to form a lower electrode of a capacitor; Forming an insulating film on the conductive film, forming a second conductive film on the insulating film, partially etching the second conductive film and the insulating film, Forming an upper electrode of a capacitive element on a central portion of the lower electrode that does not overlap with a peripheral portion of the lower electrode on the lower electrode;
Simultaneously leaving the second conductive film on the lower electrode peripheral portion overlapping with the lower electrode peripheral portion on the lower electrode. 3. The semiconductor capacitor according to claim 1, wherein the lower electrode and the upper electrode are polycrystalline silicon films.