JP2001135650A - Alignment method for liner sensor chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for aligning a liner sensor chip for enabling alignment even when a monitor chip is not complete and for enabling appropri ate alignment even if the search by the monitor chip fails or may possibly fail. SOLUTION: In a method for searching by monitor chips II, IIa-IIh and for performing alignment based on the search when aligning linear sensor chips a-1-h-1, and a-2-h-2 being formed on a wafer I, monitor chips except the corresponding monitor chips search when the search by the corresponding monitor chips fails or the search failure or inappropriate search is predicted, and the target ship is aligned or the alignment is verified by the searched monitor chip by performing search by the monitor chips other than the corresponding monitor chips.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for aligning a linear sensor chip. More specifically, the present invention relates to an alignment method for searching for a monitor chip corresponding to an alignment target chip when aligning a linear sensor chip formed on a wafer and performing alignment of the target chip based on information of the monitor chip. It provides an improved approach.

[0002]

2. Description of the Related Art A linear sensor is formed by picking up a linear sensor chip formed on a wafer and bonding it to a package. This bonding is generally die-bonded to the package using a device called a linear sensor die bonder.

In the linear sensor die bonder, it is necessary to correctly align (position) a linear sensor chip to be die-bonded to a package, pick up the linear sensor chip from a wafer, and die-bond the package to the package. Hereinafter, the configuration and operation of a typical conventional linear sensor die bonder will be described with reference to FIGS.

FIG. 2 is a block diagram of a linear sensor die bonder, and FIG. 3 is a block diagram of a linear sensor die bonder. In the apparatus configuration shown in FIG. 2, the wafer alignment unit 1 includes a wafer table 11 on which a wafer is placed, and an imaging device 12 (in the illustrated example, a CCD camera) for capturing an image of the wafer.

[0005] First, a wafer cut by a dicer is mounted on the wafer alignment unit 1 and θ correction and extension of the wafer itself are performed.

Then, based on the map information obtained through the network or the floppy disk in the data processing unit, a non-defective linear sensor chip is searched for a pair of monitor chips using pattern research,
Alignment is performed based on the position information. This pattern research and alignment are performed by the system shown in the system configuration diagram of FIG. In FIG. 3, reference numeral 3 denotes an alignment controller / image processing apparatus, 4 denotes a host controller, 5 denotes a control computer main body, 6 denotes a data processing computer, and 7 denotes floppy data.
Indicates data transmitted via the network.

After the completion of the alignment, the chip is pushed up and picked up by the pickup unit 2 shown in FIG. The picked-up chip is die-bonded to the package to which the silver paste has been applied in the silver application section 9 in the die-bonding section 9a. The linear sensor die bonder performs a series of operations up to die bonding to this package. 9b and 9e are changers, 9
c is a carrier transport unit, and 9d is a transfer unit.

In this case, when searching for the monitor chip to be paired with the linear sensor chip by using pattern research, the pattern search of the monitor chip corresponding to the non-defective linear sensor chip may fail. . Or, pattern search may not be possible. In such a case, alignment cannot be performed on the linear sensor chip. Hereinafter, this problem will be described.

FIG. 4 shows a layout example of a linear sensor chip wafer. On the wafer of the linear sensor chip, a monitor chip is usually formed for measuring the characteristics of the wafer after pattern formation. The pattern of the monitor chip is within one shot during exposure (usually 4 to 1).
4), which is a unique characteristic (a characteristic that allows pattern research). In the example of FIG. 4, as shown in FIG. 5, eight chips constitute one shot. As shown in FIG. 1 described later in detail, in a set II of monitor chips in which eight chips are the monitor chips IIa to IIh, eight chips corresponding to one shot have different patterns and can be searched. (However, in the description of the operation of the present invention, the pattern of the monitor chip IIc corresponding to c-1 and the pattern of the monitor chip IId corresponding to d-1 are assumed to be the same or confusing, and The correction will be described in an embodiment example).

In the example shown in FIG. 4, in the first row of the wafer, monitor chips II and II 'of 8 and 7 chips are formed at the top and bottom of the figure, respectively. 11 chips and 10 chips of monitor chips III and III 'are formed, and in the third row of the wafer, 2 chips and 1 chip of monitor chips IV and IV' are formed at the top and bottom of the figure.

As described above, utilizing the fact that the monitor chip is characteristic within one shot, the position of the target chip is roughly calculated from the map information and the wafer exposure information.
The wafer table is moved so that the target monitor chip enters the field of view of the image processing apparatus.

In this process, a pattern search is performed using the target monitor chip pattern which has been previously taught, the position of the monitor chip is accurately obtained, and the linear sensor chip to be picked up is aligned based on the position.

FIG. 1 shows an example of the arrangement of chip patterns. This is the case where the eight monitor chips IIa to IIh are the set II of monitor chips,
This is similar to the monitor chip II of FIG. The monitor chips IIa to IIh correspond to the rows a-1 to h-1 of the linear sensor chips, respectively. In this example, one shot is composed of eight chips, and the monitor chip paired with the linear sensor chip is in the same exposure shot, and the positional relationship is specified by the type of wafer.

However, as can be understood from the example of the monitor chip indicated by the reference numeral IIa in the first column in FIG. 4, the monitor chip may be chipped at an end or the like because the wafer I is circular. Alternatively, the monitor chip may be image-defective even if the linear sensor itself is not affected by the influence of the chemical solution or the wafer holder on the outer periphery. In these cases, chip alignment cannot be performed. In addition, since characteristic measurement is not performed for all monitor chips, the chip
Due to the chip that does not hit, the variation of the trace, etc., even with the monitor chip of the same pattern, the image will change,
In some cases, the pattern search fails.

Further, when the number of chips in an exposure shot increases, the same chip pattern for monitoring may occur in the exposure shot in some cases (for example, for the monitor chips IIa to IIh in FIG.
If the number of chips in the shot is not eight but further increases, any two of them will have the same pattern). In such a case, the alignment of the linear sensor chip is impossible, or the alignment may be performed on a chip wrong in the map information.

As described above, in the prior art, alignment is not possible when the monitor chip is not perfect at the peripheral portion of the wafer, or the monitor chip image is defective or inappropriate due to various effects. May fail or increase the probability of failure, making alignment impossible or improper.

[0017]

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems of the prior art, and enables alignment even when a monitor chip is not perfect, increases the yield on a wafer, and makes it possible to search for a monitor chip. It is an object of the present invention to provide a linear sensor chip alignment method that enables proper alignment even when a failure or a high possibility of failure occurs.

[0018]

SUMMARY OF THE INVENTION The present invention provides a method for aligning a linear sensor chip formed on a wafer.
In an alignment method for searching for a monitor chip corresponding to an alignment target chip and performing alignment of the target chip based on information of the monitor chip, when the search for the corresponding monitor chip has failed, or the search has failed or is inappropriate. If the search for the corresponding monitor chip fails when a proper search is expected, or if the search fails or an improper search is expected, search for monitor chips other than the corresponding monitor chip. And the alignment of the target chip or the confirmation of the alignment is performed by the searched monitor chip.

According to the present invention, even when alignment cannot be performed when the monitor chip is not perfect at the peripheral portion of the wafer or the like, the alignment of the target chip is performed using an appropriate monitor chip that is not the corresponding incomplete monitor chip. Therefore, alignment can be performed even when the monitor chip is not perfect, and the yield on the wafer is increased. In addition, even if the search for a specific monitor chip fails due to the influence of the test pin and various other effects, in addition to the corresponding monitor chip, for example, by performing correction from a peripheral chip, the linear sensor chip can be corrected. Alignment becomes possible. Therefore, even if the search for the monitor chip fails or is likely to fail,
Appropriate alignment becomes possible.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below, and specific examples thereof will be described with reference to the drawings. However, needless to say, the present invention is not limited to the embodiments described below.

In the method for aligning a linear sensor chip according to the present invention, it is preferable that the monitor chip is characterized and a search is performed based on the characterization. This characterization of the monitor chip can be applied to the monitor chip pattern. Search is
The search can be performed by utilizing the fact that the monitor chip pattern is characteristic in the shot at the time of wafer exposure. This search can be performed based on map information obtained in advance from the wafer in the measurement process.

Hereinafter, preferred specific embodiments of the present invention will be described with reference to FIG.

Embodiment 1 In this embodiment, when a search for a monitor chip for a linear sensor chip to be aligned, especially when a pattern search fails or is predicted to fail, a monitor close to the target chip is used. A chip is searched, and alignment or confirmation of alignment is performed using the chip. In particular, a pattern search is performed on the same monitor chip in the next row of the target chip, or one before or after the repetition order of the same row, or a monitor chip of a combination thereof, and based on the pattern search, the Ensure that alignment is performed accurately and reliably.

Referring to FIG. 1, the configuration of this embodiment will be described in detail.
In the case of the arrangement of the chips shown in FIG. 1, the following search is performed to perform the alignment mark.

(1) If the linear sensor chip to be aligned is at the position a-1 in the figure, it is known that the corresponding monitor chip IIa is missing and incomplete and cannot be searched. The same monitor chip in the next row, that is, the monitor chip IIa2 corresponding to the next row a-2 is searched for alignment.

(2) When the linear sensor chip to be aligned is located at the position c-1 in the figure, the corresponding monitor chip IIc is similar to the monitor chip IId, so that it is distinguished from d-1. The monitor chip IIb corresponding to b-1 is searched and confirmed. Upon confirmation, correction is made as necessary.

(3) When the linear sensor chip to be aligned is located at the position d-1 in the figure, the corresponding monitor chip IId is similar to the monitor chip IIc, so that it is distinguished from c-1. The monitor chip IIe corresponding to e-1 is searched and confirmed. Upon confirmation, correction is made as necessary.

(4) For c and d, the same search is performed for the other columns, that is, for each column of c-2..., D-2.

A search instruction recipe corresponding to a wafer pattern as described above is created, and search, alignment, or confirmation is performed based on the recipe.

As shown in this example, if the arrangement shown in FIG. 1 is used as a measure against search errors, if a search error occurs, the Y axis (vertical axis in FIG. 1) is fixed and the X axis direction (horizontal axis in FIG. 1). The search is performed by moving one line in the direction, and if successful, the linear sensor chip is aligned based on the information. For example, at the time of success, for example, 10 mm in the X-axis plus direction from the search position of the corresponding monitor chip
If there is a linear sensor chip at
If the search fails and the monitor chip in the second row is successfully searched, the linear sensor chip is located at a position 10 mm in the negative X-axis direction from the search position of the monitor chip. In this way, proper alignment becomes possible.

According to the alignment method of the linear sensor chip of this embodiment, the alignment of the linear sensor chip can be performed when the monitor chip is not perfect at the peripheral portion of the wafer, and the yield on the wafer is increased. Further, even if the search for a specific monitor chip fails due to the influence of the test pin or various other effects, the alignment of the linear sensor chip becomes possible by performing correction from the peripheral chip, for example. Therefore, even when the search for the monitor chip fails or is likely to fail, proper alignment is possible.

[0032]

As described above, according to the alignment method of the linear sensor chip, alignment can be performed even when the monitor chip is not perfect, the yield on the wafer is increased, and the search for the monitor chip fails. In addition, even when the possibility of failure is high, an effect that proper alignment can be achieved is exhibited.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining a first embodiment of the present invention, showing an example of the arrangement of chip patterns;

FIG. 2 is an apparatus configuration diagram of a linear sensor die bonder.

FIG. 3 is a system configuration diagram of a linear sensor die bonder.

FIG. 4 is a diagram showing an example of a wafer layout.

FIG. 5 is a diagram illustrating an exposure shot.

[Explanation of symbols]

I: wafer, II, IIa to IIh: monitor chip, a-1 to h-1, a-2 to h-2: linear sensor chip.

Claims (7)

[Claims] 1. An alignment method for searching for a monitor chip corresponding to an alignment target chip when aligning a linear sensor chip formed on a wafer, and performing alignment of the target chip based on information of the monitor chip. If the search for the corresponding monitor chip fails,
Alternatively, when a search failure or improper search is expected, a search is performed on monitor chips other than the corresponding monitor chip, and the alignment of the target chip or confirmation of alignment is performed by the searched monitor chip. A method for aligning a linear sensor chip. 2. The method according to claim 1, wherein the monitor chip is characterized, and a search is performed based on the characterization. 3. The method of claim 2, wherein the characterization of the monitor chip is performed on a monitor chip pattern. 4. The linear sensor chip alignment method according to claim 3, wherein a pattern search for the monitor chip is performed by utilizing the fact that the monitor chip pattern is characteristic in shots during wafer exposure. . 5. The linear sensor chip alignment method according to claim 1, wherein the search is performed based on map information obtained in advance from a wafer in a measurement step. 6. A mode for performing a search for a monitor chip other than the corresponding monitor chip when the search for the corresponding monitor chip fails, or when the search fails or an improper search is expected. ,
2. The linear sensor chip alignment method according to claim 1, wherein a monitor chip close to the target chip is searched, and the target chip is aligned by the searched monitor chip. 7. A search for the same monitor chip in the next row of the target chip, one before or after the repetition order of the same row, or a monitor chip in a combination thereof as a search for the monitor chip closest to the target chip. 7. The method for aligning a linear sensor chip according to claim 6, wherein: