JP2001127280A - Method for manufacturing semiconductor device and p- channel type semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device wherein, at post-oxidation for improved characteristics and reliability, a metal layer constituting a gate electrode is prevented from being oxidized while the fluctuation in threshold voltage is suppressed. SOLUTION: The method for manufacturing a p-channel type semiconductor device comprises a process A where a gate insulating film 22 is formed on the surface of a semiconductor layer 20, a process B where a gate electrode 23 is formed where a metal layer 23C and a silicon layer 23A comprising p-type impurity are laminated, a process C where an oxidizing gas permeable layer 25 is so formed on the semiconductor layer 20 as to cover the side surface of silicon layer 23A while allows the metal layer 23C to protrude, a process D where an oxidation-resistant layer 27 covers the top surface and side surface of the metal layer 23C which protrudes above the oxidizing gas permeable layer 25, a process E where the oxidizing gas permeable layer 25 is selectively removed and is left out on the side surface of silicon layer 23A, and a process F where an oxide film 23D is formed on the side surface of silicon layer 23A by a thermal process in an oxidizing atmosphere.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device and a method for manufacturing a p-channel type semiconductor device.

[0002]

2. Description of the Related Art In recent years, the voltage of CMOS transistors has been reduced in order to reduce power consumption. For this reason, p-channel semiconductor devices and n-channel semiconductor devices have been required to have a sufficiently low voltage. Moreover, a symmetric threshold voltage is required. In order to cope with such a demand, in a p-channel type semiconductor device, instead of the conventional gate electrode composed of a polysilicon layer containing an n-type impurity, a gate electrode composed of a polysilicon layer containing a p-type impurity is used. A gate electrode is used. The CMOSFET having such a structure is called a CMOSFET having a dual gate structure. However, boron atoms (B), which are commonly used p-type impurities, easily pass through the gate insulating film from the gate electrode to the silicon semiconductor substrate by various heat treatments in a semiconductor device manufacturing process after the gate electrode is formed. , The threshold voltage of the p-channel semiconductor device is varied. Such a phenomenon appears more conspicuously when the gate insulating film is made thinner for lowering the voltage.

Further, with the recent increase in the degree of integration of semiconductor integrated circuits due to the miniaturization of semiconductor devices, there has been the problem that the operating speed of semiconductor devices is limited by RC delay in electrodes such as gate electrodes and wiring such as gate wiring. is there. Therefore, a gate electrode having a two-layer structure (polycide structure) of a polysilicon layer and a metal silicide layer is used instead of a single polysilicon layer. However, in a semiconductor device of the 0.25 μm generation or later, a gate electrode having a lower resistance than a gate electrode having a polycide structure has been demanded, and a gate electrode having a polymetal structure has recently attracted attention. here,
A gate electrode having a polymetal structure has a structure in which a polysilicon layer and a tungsten layer are stacked. Note that a reaction preventing layer made of, for example, WN is formed between the polysilicon layer and the tungsten layer in order to prevent a reaction between silicon and tungsten.

In a manufacturing process of a semiconductor device, after a gate electrode is formed, post-oxidation is performed for the purpose of improving characteristics and reliability of the semiconductor device. By performing post-oxidation, the side of the polysilicon layer is oxidized,
The thickness of the gate insulating film in the vicinity of the end of the gate insulating film is increased, so that the occurrence of leakage current through the gate insulating film in the vicinity of the end of the gate insulating film can be suppressed.

[0005] In the gate electrode having a polycide structure consisting of a polysilicon layer and a tungsten silicide (WSi _X) layer, usually, a tungsten silicide layer, than X = 2.0 is a stoichiometric composition,
A tungsten silicide layer containing excess Si is used.
In the post-oxidation step, the semiconductor substrate is placed in an oxidizing atmosphere while heating the semiconductor substrate on which the gate electrode is formed. Thus, the excess Si tungsten silicide (WSi _X) layer is oxidized, not only the side surface of the exposed polysilicon layer, on the surface of the tungsten silicide layer a silicon oxide film is formed.

[0006]

[SUMMARY OF THE INVENTION On the other hand, if the post-oxidation is a polysilicon layer and a tungsten layer is applied to the gate electrode having the polymetal structure is laminated, a tungsten layer is oxidized, and WO _3. Since the oxidation of the tungsten layer involves a large volume expansion, there is a problem that the tungsten layer is peeled off and the semiconductor device cannot be manufactured.

[0007] Such oxidation of the tungsten layer is prevented.
For example, Japanese Patent Application Laid-Open No. 60-9166 discloses
Is known. The technology disclosed in this patent publication
According to the report, a gate oxide film is formed on a silicon semiconductor substrate
And an electrode made of, for example, tungsten on the gate oxide film.
Is formed in a temperature range of 500 to 1200 ° C.
_TwoH containing O at 10 ppm to 10%_TwoHeat treatment in carrier gas
Work. H_TwoThe thickness of the gate oxide film depends on the presence of O
Thicker, H_TwoAcid in the tungsten layer due to the presence of gas
Is prevented, resulting in a selective silicon semiconductor substrate.
Is oxidized.

When the technology disclosed in this patent application is applied to a gate electrode having a polymetal structure in which a polysilicon layer and a tungsten layer are stacked, the ambient temperature is set to 8
It must be at least 00 ° C. However, boron atoms, which are commonly used p-type impurities, easily pass through the gate insulating film from the gate electrode to the silicon semiconductor substrate in the oxidation step, and change the threshold voltage of the p-channel semiconductor device. Let it. In addition, since the high-temperature post-oxidation atmosphere contains hydrogen gas, accelerated diffusion by hydrogen occurs, and boron atoms more easily pass through the gate insulating film from the gate electrode to the silicon semiconductor substrate. I do.

Accordingly, an object of the present invention is to provide a gate electrode having a polymetal structure, for example, when performing post-oxidation for the purpose of improving the characteristics and reliability of a semiconductor device, the side surface of a silicon layer forming the gate electrode is selectively formed. And a p-channel type semiconductor device capable of preventing oxidation of a metal layer forming a gate electrode, and further suppressing variation in threshold voltage of the semiconductor device due to post-oxidation as much as possible. An object of the present invention is to provide a method for manufacturing a device.

[0010]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of (a) forming a silicon layer and a metal layer on a semiconductor layer sequentially; After that, a step of patterning the metal layer and the silicon layer to form a laminate in which the silicon layer is exposed on the side surface, and (ii) a semiconductor layer covering the side surface of the silicon layer and projecting the metal layer A step of forming an oxidizing gas permeable layer thereon, and (c) a step of covering the top surface and side surfaces of the metal layer protruding from the oxidizing gas permeable layer with an oxidation resistant layer;
(D) selectively removing the oxidizing gas permeable layer on the semiconductor layer and leaving the oxidizing gas permeable layer on the side surface of the silicon layer; and (e) performing heat treatment in an oxidizing atmosphere to form the silicon layer. Forming an oxide film on the side surface of the substrate.

[0011] In order to achieve the above object, the second aspect of the present invention.
The method for manufacturing a semiconductor device according to the aspect, (a) after sequentially forming a silicon layer, a metal layer and an oxidation-resistant layer on the semiconductor layer, patterning the oxidation-resistant layer, the metal layer and the silicon layer, Forming a laminated body having a silicon layer exposed on the side surface; and (b) oxidizing gas permeable layer on the semiconductor layer so as to cover the side surface of the silicon layer and project the oxidation resistant layer and the metal layer. (C) covering the side surface of the metal layer protruding from the oxidizing gas permeable layer with an oxidation resistant film; and (d) selectively removing the oxidizing gas permeable layer on the semiconductor layer. (E) leaving an oxidizing gas permeable layer on the side surface of the silicon layer; and (e) forming an oxide film on the side surface of the silicon layer by performing heat treatment in an oxidizing atmosphere.

The first object of the present invention for achieving the above object is as follows.
The method for manufacturing a p-channel semiconductor device according to the aspect
(A) a step of forming a gate insulating film on a surface of a semiconductor layer; and (B) a step of forming a gate electrode on which a silicon layer containing a p-type impurity and a metal layer are stacked on the gate insulating film. (C) covering the side surface of the silicon layer, and
Forming an oxidizing gas permeable layer on the semiconductor layer so that the metal layer protrudes, and (D) covering the top and side surfaces of the metal layer protruding from the oxidizing gas permeable layer with an oxidation resistant layer (E) selectively removing the oxidizing gas permeable layer on the semiconductor layer and leaving the oxidizing gas permeable layer on the side surface of the silicon layer; and (F) performing heat treatment in an oxidizing atmosphere. Forming an oxide film on the side surface of the silicon layer.

The second object of the present invention for achieving the above object is as follows.
The method for manufacturing a p-channel semiconductor device according to the aspect
(A) a step of forming a gate insulating film on the surface of a semiconductor layer; and (B) a gate electrode in which a silicon layer containing a p-type impurity, a metal layer, and an oxidation-resistant layer are stacked on the gate insulating film. (D) forming an oxidizing gas-permeable layer on the semiconductor layer so as to cover the side surface of the silicon layer and project the oxidation-resistant layer and the metal layer; and (D)
A step of coating the side surface of the metal layer protruding from the oxidizing gas permeable layer with an oxidation resistant film; and (E) selectively removing the oxidizing gas permeable layer on the semiconductor layer, and replacing the oxidizing gas permeable layer with a silicon layer. And (F) forming an oxide film on the side surface of the silicon layer by performing a heat treatment in an oxidizing atmosphere.

In the method of manufacturing a semiconductor device according to the first or second aspect of the present invention, the metal layer is made of tungsten (W) or molybdenum (Mo), and the silicon layer is made of polysilicon or amorphous silicon. The body can be configured to form a gate electrode. Further, p according to the first or second aspect of the present invention
In the method of manufacturing a channel-type semiconductor device, it is preferable that the metal layer is made of tungsten (W) or molybdenum (Mo), and the silicon layer is made of polysilicon or amorphous silicon. In these cases, between the metal layer made of tungsten or molybdenum and the silicon layer made of polysilicon or amorphous silicon, in order to prevent the reaction between the silicon atoms forming the silicon layer and the metal atoms forming the metal layer, For example, WN, Ti
It is preferable to form a reaction prevention layer made of various metal nitrides such as N, ZrN, and HfN.

A method of manufacturing a semiconductor device according to the first or second embodiment of the present invention, or a method of manufacturing a p-channel semiconductor device according to the first or second embodiment of the present invention (hereinafter, these are collectively referred to as In some cases, the oxidizing gas-permeable layer (a layer through which oxygen gas and water vapor can pass) is preferably made of silicon oxide (SiO ₂ ). On Glas
s), PSG (PhosphoSicicate Glass), BPSG (Bo
ro-PhosphoSicicate Glass), BSG, AsSG, Pb
SG, SbSG, NSG, LTO (Low Temperature Ox
ide, low-temperature CVD-SiO ₂ ), low dielectric constant insulating material having a relative dielectric constant of 3.5 or less (for example, polyarylether, cycloperfluorocarbon polymer, benzocyclobutene), organic polymer material such as polyimide, or these. Can be listed.

On the other hand, the oxidation-resistant layer and the oxidation-resistant film (a layer or a film hardly permeating oxygen gas or water vapor) are preferably made of silicon nitride (SiN) or SiON.

The p according to the first or second aspect of the present invention
In a method of manufacturing a channel-type semiconductor device, as a method of forming a gate electrode formed by stacking a silicon layer containing a p-type impurity (for example, a polysilicon layer or an amorphous silicon layer) and a metal layer, for example, a p-type impurity (for example, boron) ) Is formed on the gate insulating film based on the CVD method, a metal layer is formed on the entire surface, and then the metal layer and the silicon layer are patterned. The silicon layer containing no impurities is formed by the CVD method. After a p-type impurity (for example, boron or BF ₂ ) is implanted into the silicon layer by ion implantation, a metal layer is formed on the entire surface, and then the metal layer and the silicon layer are formed. A patterning method can be used.

In the present invention, the semiconductor layer may be composed of, for example, the silicon semiconductor substrate itself,
Substrate on which silicon or Si-Ge mixed crystal system is epitaxially grown on spinel, and silicon or Si-
A substrate obtained by epitaxially growing a Ge mixed crystal system and a substrate obtained by melting and recrystallizing polycrystalline silicon on an insulating film can be exemplified. As the silicon semiconductor substrate, an n-type silicon semiconductor substrate doped with an n-type impurity or a p-type silicon semiconductor substrate doped with a p-type impurity can be used. The silicon semiconductor substrate (silicon single crystal wafer) may be a silicon semiconductor substrate manufactured by any method such as a CZ method, an MCZ method, a DLCZ method, and an FZ method, or may be a substrate to which hydrogen annealing has been added in advance. Good. Further, the semiconductor layer is formed on an insulating layer formed on the surface of the support, that is, a so-called SOI (Semiconductor-On-I
nsulator) layer. When the semiconductor layer is composed of the silicon semiconductor substrate itself, the semiconductor device is a so-called bulk semiconductor device,
When the semiconductor device is composed of an I layer, the semiconductor device
An OI type semiconductor device is obtained. The semiconductor layer may be composed of Si, or may be composed of a Si-Ge mixed crystal system.

As a method of forming the SOI layer, a semiconductor substrate and a supporting substrate are bonded together via an insulating layer, and then the semiconductor substrate is ground and polished from the back surface, so that the supporting body made of the supporting substrate, the insulating layer, A substrate bonding method in which a semiconductor layer composed of a semiconductor substrate after grinding and polishing is obtained. After an insulating layer is formed on the semiconductor substrate, hydrogen ions are ion-implanted into the semiconductor substrate, and a release layer is formed inside the semiconductor substrate. The substrate and the supporting substrate are attached to each other with an insulating layer interposed therebetween, and then the semiconductor substrate is separated (cleaved) from the separation layer by performing a heat treatment, and the remaining semiconductor substrate is ground and polished from the back surface, so that the supporting substrate is Smart cut method to obtain a semiconductor layer consisting of a support, an insulating layer, and a semiconductor substrate after grinding and polishing. After that, a heat treatment is performed to form an insulating layer inside the semiconductor substrate, a support consisting of a part of the semiconductor substrate below the insulating layer, and a part of the semiconductor substrate above the insulating layer. SIMOX (Separation b)
y IMplanted OXygen) method By forming a single crystal semiconductor layer in a gas phase or a solid phase on an insulating layer formed on a semiconductor substrate corresponding to a support, a support composed of a semiconductor substrate, an insulating layer, and a single crystal semiconductor layer are formed. A method for obtaining a semiconductor layer composed of a crystalline semiconductor layer By forming an insulating layer by partially making the surface of the semiconductor substrate porous by anodic oxidation, a support comprising a part of the semiconductor substrate under the insulating layer, And a method for obtaining a semiconductor layer composed of a part of the semiconductor substrate on the insulating layer. Here, as a supporting substrate, a silicon semiconductor substrate, a substrate on which silicon is epitaxially grown on spinel, a substrate on which sapphire is epitaxially grown on silicon, a substrate on which polycrystalline silicon is melted and recrystallized on an insulating film, a glass substrate, A quartz substrate can be exemplified.

The oxidizing atmosphere in the present invention includes an atmosphere containing dry oxygen gas and an atmosphere containing steam. The thickness of the oxide film formed on the side surface of the silicon layer is 2 nm to 20 nm, preferably 4 nm to 10 nm.
nm is desirable. As the temperature of the oxidizing atmosphere in the present invention, the temperature at which the p-type impurity passes through the gate insulating film from the silicon layer and does not reach the semiconductor layer in this step, specifically, water vapor is applied to the semiconductor layer. Above the temperature at which no condensation occurs, preferably 200
It is desirable that the temperature be in the range of ゜ C to 1000 ° C, more preferably 200 ° C to 900 ° C.

According to the first or second aspect of the present invention, p
In the method for manufacturing a channel-type semiconductor device, dry oxygen gas and water vapor can be used as oxidizing species for forming a gate insulating film on the surface of the semiconductor layer in the step (A).

The method of generating steam includes a method of burning oxygen gas and hydrogen gas (pyrogenic oxidation method), a method of heating pure water, a method of bubbling heated pure water with an oxygen gas or an inert gas, and a catalyst. (For example,
Ni-based catalysts such as NiO, Pt-based catalyst ₂ such as Pt or PtO, Pd and Pd-based catalyst such as PdO, Ir-based catalysts, Ru-based catalyst such as Ru and RuO _2, Ag-based catalyst such as Ag or Ag ₂ O , An Au-based catalyst, a Cu-based catalyst such as CuO, a Mn-based catalyst such as MnO ₂ , and a Co-based catalyst such as Co ₃ O ₄ ). It is possible to use 1 GHz for hydrogen gas and oxygen gas.
To 100 GHz microwave (for example, 2.45 GHz
z microwave) (hereinafter referred to as a plasma oxidation method for convenience), that is, after the semiconductor layer is carried into a plasma processing apparatus, a 1 GHz to 100 GHz microwave (for example, 2 .45 GHz microwave) to generate water vapor and oxidize the surface of the semiconductor layer using the water vapor, or a method of forming an oxide film on the side surface of the silicon layer. Note that a method of forming a gate insulating film on the surface of a semiconductor layer based on a method of generating water vapor or a method of forming an oxide film on a side surface of a silicon layer may be collectively referred to as a humidifying oxidation method.

In the oxygen plasma generated by the microwave discharge, the ground state O ₂ (X ³ Σg ⁻ ) changes into the excited state O ₂ (A ³ Σu ⁺ ) or O ₂ (B ³ Σ) due to the collision of electrons.
u ^-) to be excited, respectively, to dissociate the oxygen atom by the following equation.

O ₂ (X ³ Σg ⁻ ) + e → O ₂ (A ³ Σu ⁺ ) + e Equation (1-1) O ₂ (A ³ Σu ⁺ ) + e → O ( ³ P) + O ( ³ P) ) + E Formula (1-2) O ₂ (X ³ Σg ⁻ ) + e → O ₂ (B ³ Σu ⁻ ) + e Formula (1-3) O ₂ (B ³ Σu ⁻ ) + e → O ( ³ P) + O ( ¹ D) + e Formula (1-4)

Accordingly, excited oxygen molecules and oxygen atoms are present in the oxygen plasma, and these become reactive species. When hydrogen H ₂ is introduced here, the following plasma is generated.

H ₂ + e → 2H Formula (2)

In the oxygen plasma, for example, the formula (1)
The oxygen plasma generated in -2) reacts with the hydrogen plasma generated in equation (2) to generate water vapor. Then, the surface of the heated semiconductor layer or the side surface of the silicon layer forming the stacked body or the gate electrode is oxidized by the water vapor through the oxidizing gas permeable layer, and an oxide film is formed on the surface. In the present invention, a microwave (for example, 1 GHz to 100 GHz) is added to the oxygen gas and the hydrogen gas.
The water vapor generated by irradiating (a microwave of 2.45 GHz) is partially in a plasma state.

2H + O ( ³ P) → H ₂ O Formula (3)

The p according to the first or second aspect of the present invention
In the method for manufacturing a channel-type semiconductor device, the step of forming the gate insulating film on the surface of the semiconductor layer in the step (A) can include a step of nitriding the gate insulating film. This nitriding step is a step of nitriding the surface of the gate insulating film with nitrogen molecules, nitrogen molecule ions, nitrogen atoms or nitrogen atom ions in an excited state generated by irradiating a nitrogen-based gas with electromagnetic waves (for convenience, plasma nitriding treatment). ). As the nitrogen-based gas to be irradiated with electromagnetic waves, nitrogen gas (N ₂ gas) and N
Gases that are compounds of a nitrogen atom and an oxygen atom, such as O, N ₂ O and NO ₂ , can be exemplified. That is, the nitrogen-based gas is
At least one gas selected from the group consisting of N ₂ , NO, N ₂ O and NO ₂ can be used. The nitrogen-based gas may be a mixture of at least two of these gases. It is preferable to perform heat treatment after performing nitriding treatment on the surface of the gate insulating film in order to reduce damage caused to the gate insulating film. The heat treatment is desirably performed in an atmosphere of an inert gas such as nitrogen gas. The heat treatment temperature is, for example, 800 ° C. to 1200 ° C., and the heat treatment time is 10 seconds to 1 hour.

When a nitrogen (N ₂ ) gas is used as the nitrogen-based gas, the nitrogen (N ₂ ) is excited in the microwave plasma by the following formula, for example. That is, the electrons existing in the plasma are excited, and the nitrogen molecules and the nitrogen molecule ions excited by the inelastic collision of the electrons with the nitrogen molecules are generated. These excited nitrogen molecules and nitrogen molecule ions are bonded to oxygen atoms and atoms mainly constituting the semiconductor layer on the surface of the gate insulating film (for example, when the atoms mainly constituting the semiconductor layer are Si, Si— The O bond is cut to form a nitrided oxide (e.g., Si-ON bond), and the surface of the gate insulating film is nitrided. The composition of the surface of the gate insulating film is represented by SiO _X N _Y when atoms mainly constituting the semiconductor layer are Si.

N ₂ (X ¹ Σg) + e → N ₂ (A ³ Σu ⁺ ) + e Equation (4-1) N ₂ (N ¹ Σg) + e → N ₂ (C ³ Πu) + e Equation ( 4-2) N ₂ (C ³ Πu) + e → N ₂ (B ³ Πg) + hv formula (4-3) N ₂ (B ³ Πg) + e → N ₂ (A ³ Σu ⁺ ) + hv formula (4-4)

As described above, by performing the plasma nitriding treatment, the surface of the gate insulating film can be nitrided,
Further, it is not necessary to perform a nitriding treatment at a high temperature as in the thermal nitriding method. For example, a nitriding treatment for nitriding the surface of the gate insulating film at room temperature can be performed. There is no adverse effect on the characteristics of the semiconductor device such as a problem in the introduction into the semiconductor device, that is, a decrease in current driving capability due to nitrogen intrusion into the silicon semiconductor substrate. Further, the phenomenon that the boron atoms contained in the silicon layer reach the semiconductor layer through the gate insulating film and fluctuate the threshold voltage of the p-channel semiconductor device can be more reliably avoided by performing the nitriding treatment. can do.

As an electromagnetic wave, 1 GHz to 100 G
Hz microwave (for example, 2.45 GHz microwave) can be used. The semiconductor layer, the stack, or the gate electrode may be exposed to an atmosphere in which steam and hydrogen gas are diluted with an inert gas such as nitrogen, argon, helium, neon, krypton, or xenon. Also,
As a gas to be irradiated with electromagnetic waves, instead of oxygen gas,
NO and N ₂ O can also be used.

When manufacturing a semiconductor device based on a silicon semiconductor substrate, conventionally, before forming a gate insulating film,
Wash with aqueous NH ₄ OH / H ₂ O ₂ and further add HCl / H ₂ O ₂
The surface of the silicon semiconductor substrate is cleaned by RCA cleaning in which cleaning is performed with an aqueous solution, and fine particles and metal impurities are removed from the surface. By the way, when the RCA cleaning is performed, the surface of the silicon semiconductor substrate reacts with the cleaning liquid to have a thickness of 0.5 to 1.
A silicon oxide film of about nm is formed. The thickness of such a silicon oxide film is not uniform, and a cleaning liquid component remains in the silicon oxide film. Therefore, the silicon semiconductor substrate is immersed in an aqueous solution of hydrofluoric acid to remove the silicon oxide film, and further to remove chemical components with pure water. Thereby, it is possible to obtain a surface of the silicon semiconductor substrate that is mostly terminated with hydrogen and extremely partially terminated with fluorine. In this specification, obtaining a surface of a silicon semiconductor substrate that is mostly terminated with hydrogen and a very small portion is terminated with fluorine is referred to as exposing the surface of the silicon semiconductor substrate in this specification. I do. Thereafter, a gate insulating film is formed on the surface of the silicon semiconductor substrate.

By the way, if the atmosphere before forming the gate insulating film based on the humidifying oxidation method is a high-temperature nitrogen gas atmosphere, the surface of the silicon semiconductor substrate may be roughened (irregularities). Such a phenomenon occurs because a part of the Si—H bond or a part of the Si—F bond formed on the surface of the silicon semiconductor substrate by washing with the hydrofluoric acid aqueous solution and the pure water increases hydrogen or fluorine. It is thought to be lost due to thermal desorption and caused by an etching phenomenon occurring on the surface of the silicon semiconductor substrate. For example, when the temperature of a silicon semiconductor substrate is raised to 600 ° C. or more in argon gas, severe irregularities may occur on the surface of the silicon semiconductor substrate. Have been.

The p according to the first or second aspect of the present invention
In the method for manufacturing a channel-type semiconductor device, in the step (A), a humidifying oxidation method is used while maintaining the semiconductor layer at a temperature at which atoms mainly constituting the semiconductor layer do not desorb from the surface of the semiconductor layer. By starting formation of the gate insulating film on the surface of the semiconductor layer, it is possible to avoid such a phenomenon that the surface of the semiconductor layer is roughened (irregular). The temperature at which atoms mainly constituting the semiconductor layer do not desorb from the surface of the semiconductor layer is a temperature at which bonds between atoms terminating the surface of the semiconductor layer and atoms mainly constituting the semiconductor layer are not broken. Is desirable. When the atoms mainly constituting the semiconductor layer are Si, that is, when the semiconductor layer is composed of a silicon semiconductor substrate, a single crystal silicon layer, a polysilicon layer or an amorphous silicon layer, and an SOI layer, the surface of the semiconductor layer The temperature at which atoms mainly constituting the semiconductor layer do not desorb is determined by the S on the surface of the semiconductor layer.
It is preferable that the temperature be a temperature at which the i-H bond is not broken, or a temperature at which the Si-F bond on the surface of the semiconductor layer is not broken. When a silicon semiconductor substrate having a plane orientation of (100) is used as a semiconductor layer, most of hydrogen atoms on the surface of the silicon semiconductor substrate are bonded one by one to two bonds of silicon atoms. It has a -H termination structure. However, a portion where the surface state of the silicon semiconductor substrate is broken (for example, a step forming portion) has a terminal structure in which a hydrogen atom is bonded to only one bond of a silicon atom, or a three-bonded silicon atom. There is a terminal structure in which a hydrogen atom is bonded to each of the hands. Usually, the remaining bonds of silicon atoms are bonded to silicon atoms inside the crystal. In this specification, "S
The expression “i-H bond” includes a terminal structure in which a hydrogen atom is bonded to each of two bonds of a silicon atom,
The terminating structure in which a hydrogen atom is bonded to only one bond of a silicon atom or the terminal structure in which a hydrogen atom is bonded to each of three bonds of a silicon atom is included. The temperature at which the formation of the gate insulating film on the surface of the semiconductor layer is started is more specifically a temperature at which water vapor does not condense on the semiconductor layer, preferably 200 ° C.
From the viewpoint of throughput, it is more preferable that the temperature be 300 ° C. or higher.

In the step (A), the temperature of the semiconductor layer when the formation of the gate insulating film is completed by the humidifying oxidation method is set higher than the temperature of the semiconductor layer when the formation of the gate insulating film is started. Is also good. In this case, the temperature of the semiconductor layer when the formation of the gate insulating film is completed is 600 to 12
The temperature is desirably 00 ° C, preferably 700 to 1000 ° C, and more preferably 750 to 900 ° C, but is not limited to such a value. The temperature may be raised stepwise (stepwise) or continuously.

When the temperature is raised stepwise, the formation of a gate insulating film on the surface of the semiconductor layer by a humidifying oxidation method is started at a temperature at which atoms mainly constituting the semiconductor layer do not desorb from the surface of the semiconductor layer. A first gate insulating film forming step of forming the gate insulating film by holding the semiconductor layer within a temperature range in which atoms mainly constituting the semiconductor layer do not desorb from the surface of the semiconductor layer for a predetermined period; A second gate insulating film forming step of further forming a gate insulating film by a humidifying oxidation method at a temperature higher than a temperature range in which atoms mainly constituting the semiconductor layer do not desorb from the surface of the semiconductor layer until a desired thickness is obtained. It is preferable to include The temperature at which the gate insulating film is formed in the second gate insulating film forming step is preferably 600 to 1200 ° C., more preferably 700 to 1000 ° C., and further preferably 750 to 900 ° C. Note that the upper limit of the semiconductor layer holding temperature range in the first gate insulating film forming step may be 500 ° C., preferably 450 ° C., and more preferably 400 ° C. The final thickness of the gate insulating film after the second gate insulating film forming step may be a predetermined thickness required for the semiconductor device. On the other hand, the thickness of the gate insulating film after the first gate insulating film forming step is preferably as thin as possible. However, the plane orientation of a silicon semiconductor substrate currently used for manufacturing a semiconductor device is almost (100) in most cases, and no matter how smooth the surface of the silicon semiconductor substrate is (10).
0) A step called a step is always formed on the surface of silicon. This step is usually for one layer of silicon atoms, but in some cases, a step for two to three layers may be formed. Accordingly, the thickness of the gate insulating film after the first gate insulating film forming step is (10
0) When a silicon semiconductor substrate is used, the thickness is preferably 1 nm or more, but is not limited thereto.

First gate insulating film forming step and second gate insulating film forming step
A temperature raising step may be included between the step of forming the insulating film. This
In the case of, the atmosphere in the heating process is an inert gas atmosphere.
Or a reduced pressure atmosphere, or
It is desirable to use an oxidizing atmosphere. Where inactive
As gas, nitrogen gas, argon gas, helium gas
Examples can be given. In addition, in the atmosphere in the heating process
Inactive gas or gas containing water vapor contains halogen
An element may be contained. As a result, the first game
Of gate insulating film formed in gate insulating film forming process
Can be further improved. That is, the semiconductor layer is mainly
Formation of the first gate insulating film when the atoms constituting the first layer are Si
Silicon dangling, a possible defect in the process
Bonds (Si.) And SiOH may cause halogenation in the heating process.
Reacts with the silicon element to terminate the silicon dangling bond.
Alternatively, a dehydration reaction occurs, which is a reliability deterioration factor.
These defects are eliminated. In particular, the elimination of these defects
Are the first formed in the first gate insulating film forming step.
Effective for gate insulating film (silicon oxide film)
is there. Chlorine, bromine and fluorine as halogen elements
But chlorine is preferred.
No. Contained in inert gas or gas containing water vapor
Examples of the form of the halogen element include hydrogen chloride (H
Cl), CCl _Four, C_TwoHCl_Three, Cl_Two, HBr, NF_Three
Can be mentioned. Contains inert gas or water vapor
The content of the halogen element in the gas
0.001 to 10% by volume, preferably based on the form
Is 0.005 to 10% by volume, more preferably 0.02 to 10% by volume.
10% by volume. For example, when using hydrogen chloride gas,
Hydrogen chloride gas in inert gas or gas containing steam
The content is desirably 0.02 to 10% by volume.
The atmosphere in the temperature raising step is diluted with an inert gas.
Alternatively, the atmosphere may include water vapor.

The p according to the first or second embodiment of the present invention
In the method for manufacturing a channel-type semiconductor device, a halogen element may be contained in an oxidizing atmosphere containing water vapor during formation of the gate insulating film. Thereby, a gate insulating film having excellent time-zero dielectric breakdown (TZDB) characteristics and temporal dielectric breakdown (TDDB) characteristics can be obtained. In addition, as the halogen element, chlorine, bromine and fluorine can be mentioned, and among them, chlorine is preferable. As the form of the halogen element contained in the gas containing water vapor,
For example, hydrogen chloride (HCl), CCl ₄ , C ₂ HCl ₃ ,
Cl ₂ , HBr and NF ₃ can be mentioned. The content of the halogen element in the gas containing water vapor is 0.001 to 10% by volume, preferably 0.005 to 10% by volume, more preferably 0.02% by volume, based on the form of the molecule or the compound.
-10% by volume. For example, when using hydrogen chloride gas, the content of hydrogen chloride gas in the gas containing water vapor is 0.0
It is desirably 2 to 10% by volume.

In order to further improve the characteristics of the formed gate insulating film, in the method of manufacturing a p-channel type semiconductor device according to the first or second aspect of the present invention, the gate insulating film is formed after forming the gate insulating film. Heat treatment may be performed on the gate insulating film.

In this case, it is desirable that the atmosphere for the heat treatment be an inert gas atmosphere containing a halogen element.
By subjecting the gate insulating film to heat treatment in an inert gas atmosphere containing a halogen element, a gate insulating film having excellent time-zero dielectric breakdown (TZDB) characteristics and temporal dielectric breakdown (TDDB) characteristics can be obtained. Examples of the inert gas in the heat treatment include a nitrogen gas, an argon gas, and a helium gas. In addition, examples of the halogen element include chlorine, bromine, and fluorine.
Among them, chlorine is desirable. Examples of the form of the halogen element contained in the inert gas include hydrogen chloride (HCl), CCl ₄ , C ₂ HCl ₃ , Cl ₂ , HBr,
NF ₃ can be mentioned. The content of the halogen element in the inert gas is based on the form of the molecule or compound,
0.001 to 10% by volume, preferably 0.005 to 10%
%, More preferably 0.02 to 10% by volume.
For example, when using hydrogen chloride gas, the content of hydrogen chloride gas in the inert gas is preferably 0.02 to 10% by volume.

The formation of the gate insulating film and the heat treatment can be performed in the same processing chamber. The heat treatment temperature is 700
~ 1200 ° C, preferably 700-1000 ° C, more preferably 700-950 ° C. In addition, the time of the heat treatment is preferably 1 to 10 minutes when performing the single-wafer processing, and 5 to 60 minutes, preferably 10 to 40 minutes, and more preferably 20 to 30 when performing the batch processing. Minutes.

In the case of performing the heat treatment, it is desirable that the temperature of the atmosphere when the heat treatment is performed on the formed gate insulating film is higher than the temperature when the formation of the gate insulating film is completed. In this case, after the formation of the gate insulating film is completed, the atmosphere in the processing chamber is switched to an inert gas atmosphere, and then the temperature may be increased to an ambient temperature for performing heat treatment, or the atmosphere may include a halogen element. After switching to the inert gas atmosphere, the temperature may be raised to the ambient temperature for performing the heat treatment. Here, examples of the inert gas include a nitrogen gas, an argon gas, and a helium gas. Examples of the halogen element include chlorine, bromine, and fluorine, and among them, chlorine is preferable. Examples of the form of the halogen element contained in the inert gas include hydrogen chloride (HCl), CCl ₄ , C ₂ HCl ₃ , C ₂
l _2, HBr, mention may be made of the NF _3. The content of the halogen element in the inert gas is 0.001 to 10% by volume, preferably 0.1 to 10% by volume, based on the form of the molecule or the compound.
005 to 10% by volume, more preferably 0.02 to 10% by volume. For example, when using hydrogen chloride gas, the content of hydrogen chloride gas in the inert gas is preferably 0.02 to 10% by volume.

Usually, before forming a gate insulating film on the surface of a silicon semiconductor substrate, RCA is used to wash with an NH ₄ OH / H ₂ O ₂ aqueous solution and then with an HCl / H ₂ O ₂ aqueous solution.
After cleaning the surface of the silicon semiconductor substrate to remove fine particles and metal impurities from the surface, the silicon semiconductor substrate is cleaned with a hydrofluoric acid aqueous solution and pure water. However, when the silicon semiconductor substrate is subsequently exposed to the air, the surface of the silicon semiconductor substrate is contaminated, and moisture and organic substances adhere to the surface of the silicon semiconductor substrate, or Si atoms on the surface of the silicon semiconductor substrate become hydroxyl groups ( O
H) (see, for example, the document "Highly-relia"
ble Gate Oxide Formation for Giga-Scale LSIs by us
ing Closed Wet Cleaning System and Wet Oxidation w
ith Ultra-Dry Unloading ", J. Yugami, et al., Inter
national Electron Device MeetingTechnical Digest 9
5, see pp 855-858). In such a case, when the formation of the gate insulating film is started as it is, moisture or an organic substance or, for example, Si-
OH is taken in and may cause deterioration of characteristics of the formed gate insulating film or generation of a defective portion. In addition, a defect part is a silicon dangling bond (Si
A portion of the gate insulating film containing defects such as -H bonds,
Alternatively, a Si—O—Si bond in which the Si—O—Si bond is compressed by stress or the angle of the Si—O—Si bond is different from the angle of the Si—O—Si bond in the thick or bulk silicon oxide film Means a portion of the gate insulating film. Therefore, in order to avoid such a problem, in the method for manufacturing a p-channel semiconductor device according to the first or second aspect of the present invention, the surface of the semiconductor layer is formed before forming the gate insulating film. A cleaning step, without exposing the semiconductor layer after the surface cleaning to the atmosphere (that is, for example, setting the atmosphere from cleaning of the semiconductor layer surface to the start of the gate insulating film forming step to an inert gas atmosphere or a vacuum atmosphere). It is preferable to form a gate insulating film. Thereby, for example, when a silicon semiconductor substrate is used as a semiconductor layer, most of the semiconductor layer is terminated with hydrogen,
A gate insulating film can be formed on the surface of a silicon semiconductor substrate having a surface partly terminated with fluorine, and deterioration of characteristics of the formed gate insulating film or generation of a defective portion can be prevented.

When the plasma oxidation method is employed in forming the gate insulating film, hydrogen gas and oxygen gas are introduced into the processing chamber of the plasma processing apparatus. At this time, the hydrogen gas flows into the processing chamber and flows out of the system. Therefore, it is preferable to introduce oxygen gas before introducing hydrogen gas into the processing chamber in order to prevent a detonation reaction from occurring. However, there is a possibility that an oxide film is formed in the semiconductor layer by introduction of oxygen gas into the treatment chamber. Such an oxide film is a dry oxide film and has inferior characteristics to an oxide film formed by a humidification oxidation method. In order to reliably prevent the formation of such a dry oxide film, for example, before starting the formation of the gate insulating film, a hydrogen gas diluted with an inert gas such as a nitrogen gas is first introduced into the processing chamber, Oxygen gas may be introduced into the treatment chamber. However, in this case, the concentration of the hydrogen gas is set to
Concentration that hydrogen gas reacts with oxygen gas and does not burn,
Specifically, below the detonation range in air (volume% with air
When represented by 18.3% by volume or less, preferably below the combustion range in air (when represented by% by volume with air,
4.0% by volume or less) or below the detonation range in oxygen (15.0% by volume or less when expressed in terms of volume percentage with oxygen), preferably below the combustion range in oxygen (with oxygen). (In terms of volume% of 4.5% by volume or less).

In the present invention, the top and side surfaces of the metal layer are covered with an oxidation-resistant layer, or alternatively, the top and side surfaces of the metal layer are covered with an oxidation-resistant layer and an oxidation-resistant film, respectively. In this state, an oxide film is formed on the side surface of the silicon layer through the oxidizing gas permeable layer remaining on the side surface of the silicon layer, that is, post-oxidation is performed, thereby improving the characteristics and reliability of the semiconductor device. In addition, the oxidation of the metal layer can be prevented. Moreover, unlike conventional technology,
There is no need to perform heat treatment in an H ₂ carrier gas containing 10 ppm to 10% of H ₂ O, and boron atoms, which are commonly used p-type impurities, pass through the gate insulating film from the gate electrode,
A phenomenon that easily reaches the silicon semiconductor substrate and fluctuates the threshold voltage of the p-channel semiconductor device can be reliably prevented.

[0048]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings based on embodiments of the present invention (hereinafter, abbreviated as embodiments).

Embodiment 1 Embodiment 1 relates to a method for manufacturing a semiconductor device and a method for manufacturing a p-channel semiconductor device according to the first aspect of the present invention.

FIG. 1 shows a conceptual diagram of a single-wafer plasma processing apparatus suitable for carrying out the present invention. The plasma processing apparatus includes a processing chamber 10 and a stage 11 on which a semiconductor layer (a silicon semiconductor substrate 20 in the first embodiment) is mounted.
A magnet 13 disposed outside the processing chamber 10, a microwave waveguide 14 attached to the top of the processing chamber 10,
Gas inlets 16A, 16 provided at the top of the processing chamber 10
B, 16C. The processing chamber 10 includes a plasma generation region 10A and a plasma processing region 10B, and the stage 11 is disposed in the plasma processing region 10B. Further, a lamp as heating means 12 for heating silicon semiconductor substrate 20 is housed in stage 11. A magnetron 15 is attached to the microwave waveguide 14, and a 1 G
Hz to 100 GHz microwave (for example, 2.45
GHz microwave) is generated, and the microwave is introduced into the plasma generation region 10 </ b> A of the processing chamber 10 via the microwave waveguide 14. Further, the gas introduction unit 1
Hydrogen gas, oxygen gas, and nitrogen gas are introduced into the processing chamber 10 from each of 6A, 16B, and 16C. In addition, the processing chamber 1 is supplied from a gas introduction unit 17 disposed on the side of the processing chamber 10.
An inert gas (for example, nitrogen gas) is introduced into the chamber. Various gases introduced into the processing chamber 10 are exhausted out of the system from a gas exhaust unit 18 provided in a lower part of the processing chamber 10.
A heater 19 for controlling the temperature inside the processing chamber 10 is provided outside the processing chamber 10 so that the inside of the processing chamber 10 does not form dew.
Are arranged.

In the plasma generation region 10A, water vapor is generated by irradiating oxygen gas and hydrogen gas with microwaves of 1 GHz to 100 GHz (for example, microwaves of 2.45 GHz). Some of the water vapor is in a plasma state. In the plasma processing region 10B, the surface of the semiconductor layer is exposed to such water vapor and hydrogen gas to form a gate insulating film. And an oxide film is formed on the side surface of the silicon layer.

When the gate insulating film is formed on the surface of the semiconductor layer by using the plasma oxidation method, 1 GHz is applied to the hydrogen gas and the oxygen gas in the plasma generation region 10A.
To 100 GHz microwave (for example, 2.45 GHz
(microwave of z) to generate water vapor. In the plasma processing region 10B, the surface of the semiconductor layer is oxidized using the water vapor, or
Oxidize the sides of the silicon layer.

Further, when performing the plasma nitriding treatment, the plasma generation region 10A is exposed to 1
GHz to 100 GHz microwave (for example, 2.4 GHz)
Irradiation with microwaves (5 GHz) generates excited nitrogen molecules, nitrogen molecule ions, nitrogen atoms, or nitrogen atom ions. In addition, the plasma processing region 1
At 0B, the surface of the gate insulating film formed on the surface of the semiconductor layer is nitrided.

In the first embodiment, a silicon semiconductor substrate is used as a semiconductor layer. In the first embodiment, the plasma oxidation method is employed. A method of manufacturing a semiconductor device and a method of manufacturing a p-channel type semiconductor device according to the first embodiment of the present invention using the plasma processing apparatus shown in FIG. This will be described with reference to FIGS.

[Step-100] First, an n-type silicon wafer of 8 inches in diameter doped with phosphorus (prepared by CZ method)
LOC is formed on the silicon semiconductor substrate 20 by a known method.
An element isolation region 21 having an OS structure is formed, and then well ion implantation, channel stop ion implantation, and threshold adjustment ion implantation are performed. Note that the element isolation region may have a trench structure or a combination of a LOCOS structure and a trench structure. Thereafter, fine particles and metal impurities on the surface of the silicon semiconductor substrate 20 are removed by RCA cleaning, and then the surface of the silicon semiconductor substrate 20 is cleaned with a 0.1% aqueous hydrofluoric acid solution and pure water. The surface is exposed (see FIG. 2A). The surface of the silicon semiconductor substrate 20 is mostly terminated with hydrogen, and a very small part is terminated with fluorine.

[Step-110] Next, the silicon semiconductor substrate 20 is carried into the plasma processing apparatus shown in FIG. For example, nitrogen gas) is introduced into the processing chamber 10. Then, the silicon semiconductor substrate 20 is heated to 800 ° C. by the heating means 12.

Then, a gate insulating film 22 is formed on the surface of the silicon semiconductor substrate 20, which is a semiconductor layer. That is, introduction of an inert gas (for example, nitrogen gas) as a diluting gas into the processing chamber 10 is interrupted, and hydrogen gas and oxygen gas are introduced into the processing chamber 10 from the gas introduction unit 16A and the gas introduction unit 16B. . At the same time, microwave power is supplied to the magnetron 15 to generate microwaves of 1 GHz to 100 GHz (for example, 2.45 GHz) generated by the magnetron 15.
Is introduced into the plasma generation region 10 </ b> A of the processing chamber 10 via the microwave waveguide 14. Thus, that is, by irradiating the hydrogen gas and the oxygen gas with electromagnetic waves, the reactions of the above-mentioned formulas (1-1) to (1-4)
And the reactions of the formulas (2) and (3) occur, and steam is generated. The generated steam reaches the plasma processing region 10B located below the processing chamber 10 and is heated by the heating means 12 in the semiconductor layer (specifically, the silicon semiconductor substrate 2).
The surface of 0) is oxidized. Thus, a gate insulating film 22 with a thickness of 2 nm can be formed over the surface of the semiconductor layer (see FIG. 2B). The conditions for forming the gate insulating film 22 are exemplified in Table 1 below.

[Table 1] Microwave power: 1 kW Microwave frequency: 2.45 GHz Oxygen gas flow rate: 10 SLM Hydrogen gas flow rate: 0.2 SLM Substrate temperature: 800 ° C.

[Step-120] Then, on the semiconductor layer,
After sequentially forming the silicon layer 23A and the metal layer 23C,
The metal layer 23C and the silicon layer 23A are patterned to form a laminate in which the silicon layer 23A is exposed on the side surfaces. Alternatively, a gate electrode 23 is formed on the gate insulating film 22 by stacking a silicon layer 23A containing a p-type impurity and a metal layer 23C. Specifically, when the formation of the gate insulating film 22 is completed, the supply of the microwave power to the magnetron 15 and the introduction of the hydrogen gas and the oxygen gas into the processing chamber 10 are stopped, and the inert gas is While introducing the gas into the processing chamber 10, the silicon semiconductor substrate 20 is cooled to room temperature.
0 is unloaded from the plasma processing apparatus. Then, a silicon layer 23A having a thickness of about 100 nm containing a p-type impurity (for example, boron) (a polysilicon layer in the first embodiment)
Is formed on the entire surface by the CVD method. Then, about 5 nm thick
A reaction preventing layer 23B made of WN and a metal layer 23C made of tungsten (W) having a thickness of about 100 nm are sequentially formed by a sputtering method, and then, based on a lithography technique and a dry etching technique, the metal layer 23C 23
B and the silicon layer 23A are patterned. Thus, the gate electrode 23 shown in FIG.
A stacked body in which the silicon layer 23A and the metal layer 23C are stacked and the silicon layer 23A is exposed on the side surface can be obtained.

[Step-130] Next, a p-type impurity (for example, boron or BF ₂ ) is implanted into the semiconductor layer (specifically, the silicon semiconductor substrate 20) by an ion implantation method, and the low-concentration impurity region 24 is formed. Is formed (see FIG. 3A). In some cases, an extension region may be formed instead of the low-concentration impurity region 24. Thereafter, RTA (Rapid THerma) for activating the introduced p-type impurities is used.
l Annealing) processing.

[Step-140] Thereafter, the silicon layer 23 is formed.
An oxidizing gas permeable layer 25 is formed on the silicon semiconductor substrate 20 as a semiconductor layer so as to cover the side surface of A and to project the metal layer 23C. Specifically, an oxidizing gas permeable layer 25 made of silicon oxide (SiO ₂ ) is
The high-density plasma CVD (HDP-
It is formed by a CVD method (see FIG. 3B). Note that the formation method is not limited to the HDP-CVD method. The thickness of the oxidizing gas permeable layer 25 on the silicon semiconductor substrate 20 apart from the gate electrode 23 is determined by the thickness of the silicon on the top surface of the silicon layer 23A constituting the gate electrode 23 (the interface between the silicon layer 23A and the reaction prevention layer 23B). The height is substantially equal to the height from the semiconductor substrate 20. Then, a resist layer 26 is formed so that the oxidizing gas permeable layer 25 above the gate electrode 23 is exposed and the oxidizing gas permeable layer 25 on the silicon semiconductor substrate 20 is covered (see FIG. 3C). 4), after removing the oxidizing gas permeable layer 25 not covered with the resist layer 26 by dry etching, the resist layer 26 is removed (FIG. 4).
(A)). The thickness of the portion of the oxidizing gas permeable layer 25 removed by the dry etching method is determined by the gate electrode 2
The thickness of the oxidizing gas permeable layer 25 on the silicon semiconductor substrate 20 apart from 3 is made substantially equal.

[Table 2] Working gas: SiH ₄ / O ₂ / Ar = 150/250/125 sccm Pressure: 0.6 Pa RF power: Upper 1.3 kW / Lower 3.1 kW Bias power: 3.1 kW Substrate temperature: 350゜ C

[Step-150] Next, the top and side surfaces of the metal layer 23C protruding from the oxidizing gas permeable layer 25 are covered with the oxidation resistant layer 27. Specifically, a parallel plate type CVD
Using the apparatus, an oxidation resistant layer 27 made of silicon nitride (SiN) is formed on the entire surface under the conditions exemplified in Table 3 below (see FIG. 4B).

[Table 3] Gas used: SiH ₄ / NH ₃ / N ₂ = 290/100/4000 sccm Pressure: 565 Pa RF power: 690 W Substrate temperature: 400 ° C.

[Step-160] Thereafter, the oxidizing gas permeable layer 25 on the silicon semiconductor substrate 20 as a semiconductor layer is selectively removed, and the oxidizing gas permeable layer 25 is replaced with the silicon layer 23.
Leave on the side of A. Specifically, a resist layer 28 is formed so as to cover the protrusion of the oxidation-resistant layer 27 above the gate electrode 23 (see FIG. 4C), and the resist layer 28 is used as an etching mask. After etching the oxidation resistant layer 27 and the oxidizing gas permeable layer 25, the resist layer 2
8 is removed (see FIG. 5A). Silicon layer 23A
Is etched such that the oxidizing gas permeable layer 25 having a thickness of about several tens nm is left on the side surface of the substrate.

[Step-170] Next, an oxide film 23D is formed on the side surface of the silicon layer 23A by performing a heat treatment in an oxidizing atmosphere, that is, by performing a post-oxidation treatment (FIG. 5B). )reference). Specifically, the silicon semiconductor substrate 20 is carried into the plasma processing apparatus shown in FIG. 1 from a door (not shown), and is placed on the stage 11, and then the inert gas (for example, nitrogen gas) is processed from the gas introduction unit 17. It is introduced into the room 10. Then, heat treatment is performed under the conditions exemplified in Table 4 below. Note that the oxidizing atmosphere may be an atmosphere containing a dry oxygen gas. Further, the method for generating steam is not limited to the plasma oxidation method. The water vapor passes through the oxidizing gas permeable layer 25, oxidizes the side surface of the silicon layer 23A, and forms an oxide film 23D on the side surface of the silicon layer 23A. Although a silicon oxide film is also formed on the surface of the silicon semiconductor substrate 20, illustration of the silicon oxide film is omitted. Since the top and side surfaces of the metal layer 23C are covered with the oxidation-resistant layer, the metal layer 23C is not oxidized, and therefore it is not necessary to include hydrogen gas in a high temperature post-oxidation atmosphere. , Accelerated diffusion by hydrogen occurs,
The phenomenon that boron atoms pass through the gate insulating film from the gate electrode more easily and reach the silicon semiconductor substrate does not occur.

[Table 4] Microwave power: 10 kW Microwave frequency: 2.45 GHz Oxygen gas flow rate: 10 SLM Hydrogen gas flow rate: 0.2 SLM Substrate temperature: 800 ° C.

[Step-180] Thereafter, the gate electrode 23
The oxidation resistant layer 27 and the oxidizing gas permeable layer 25 on the side of
By etching based on the IE method, a sidewall 29 including the oxidation resistant layer 27 and the oxidizing gas permeable layer 25 is formed (see FIG. 5C). Next, a source / drain region 30 is formed by implanting a p-type impurity (for example, boron or BF ₂ ) into the semiconductor layer (specifically, the silicon semiconductor substrate 20) by an ion implantation method (see FIG. )), An RTA process for activating the introduced p-type impurities is performed. The region of the silicon semiconductor substrate 20 sandwiched between the low-concentration impurity regions 24 corresponds to the channel formation region 31. Thereafter, an interlayer insulating layer 32 is formed on the entire surface by the CVD method, an opening is provided in the interlayer insulating layer 32 above the source / drain region 30, and a wiring material layer is formed on the interlayer insulating layer 32 including the inside of the opening. Is formed by a sputtering method, and the wiring 33 is formed by patterning the wiring material layer, whereby a p-channel semiconductor device whose schematic partial cross-sectional view is shown in FIG. 6B can be obtained. A contact plug made of polysilicon, metal or a metal compound containing impurities is formed in the opening, and then a wiring material layer is formed on the interlayer insulating layer 32 by a sputtering method, and the wiring material layer is patterned. By doing so, the wiring 33 may be formed.

Second Embodiment A second embodiment is a modification of the method for manufacturing a p-channel semiconductor device of the first embodiment. The second embodiment is different from the first embodiment in that plasma nitridation is performed on the gate insulating film 22 after [Step-110]. Except for this point, the second embodiment is the same as the first embodiment.

Specifically, after the formation of the gate insulating film is completed,
Supply of microwave power to magnetron 15, processing room 1
While stopping the introduction of hydrogen gas and oxygen gas to 0, and introducing an inert gas from the gas introduction unit 17 into the processing chamber 10,
The silicon semiconductor substrate 20 is cooled to room temperature. Then
The introduction of the inert gas from the gas introduction unit 17 into the processing chamber 10 is stopped. Thereafter, the processing chamber 1 is moved from the gas inlet 16C.
At 0, nitrogen gas, which is a nitrogen-based gas, is introduced. together,
Microwave power is supplied to the magnetron 15, and the microwave of 1 GHz to 100 GHz (for example, the microwave of 2.45 GHz) generated by the magnetron 15 is supplied to the plasma generation region 10 </ b> A of the processing chamber 10 via the microwave waveguide 14. Introduce. Thus, that is, by irradiating the nitrogen gas with electromagnetic waves,
Excited nitrogen molecules, nitrogen molecule ions, nitrogen atoms or nitrogen atom ions generated in the reaction of (4-4) reach the plasma processing region 10 </ b> B located below the processing chamber 10, and the surface of the gate insulating film 22. Is nitrided. Table 5 shows the conditions of the plasma nitriding treatment. The reason for setting the temperature of the silicon semiconductor substrate to room temperature is to suppress diffusion of nitrogen atoms into the silicon semiconductor substrate in the nitriding treatment.

[Table 5] Microwave power: 1 kW Microwave frequency: 2.45 GHz Nitrogen gas flow rate: 0.4 SLM Pressure: 0.16 Pa Substrate temperature: room temperature (25 ° C.)

After the plasma nitriding, a heat treatment may be performed. Specifically, the introduction of the nitrogen gas into the processing chamber 10 from the gas introduction unit 16C is stopped, and the silicon semiconductor substrate 20 is heated by the heating unit 12 while the inert gas is introduced into the processing chamber 10 from the gas introduction unit 17. To 850 ° C. When the temperature of the silicon semiconductor substrate 20 reaches 850 ° C. and the temperature is stabilized, a heat treatment is performed at a nitrogen gas flow rate of 4 SLM for 5 minutes. By this heat treatment, damage caused on the gate insulating film can be reduced.

Third Embodiment A third embodiment is also a modification of the method for manufacturing a p-channel semiconductor device of the first embodiment. In the first embodiment, the gate insulating film is formed by the plasma oxidation method while the silicon semiconductor substrate 20 is heated to 800 ° C., but in the third embodiment, the two-stage oxidation is performed based on the plasma oxidation method. Do. That is, the formation of the gate insulating film is started at a temperature at which atoms mainly constituting the semiconductor layer do not desorb from the surface of the semiconductor layer. Forming a gate insulating film by holding the semiconductor layer in a temperature range where atoms mainly constituting the semiconductor layer do not desorb from the surface of the semiconductor layer.
Forming a gate insulating film at a temperature higher than a temperature range in which atoms mainly constituting the semiconductor layer do not desorb from the surface of the semiconductor layer until a desired thickness is obtained. From the gate insulating film forming step. still,
Embodiment 3 also uses the plasma processing apparatus shown in FIG.

[Step-300] First, the same step as [Step-100] of the first embodiment is performed.

[Step-310] Next, the silicon semiconductor substrate 20 is carried into the plasma processing apparatus shown in FIG. 1 from a door (not shown), and is placed on the stage 11, and then the inert gas ( For example, nitrogen gas) is introduced into the processing chamber 10. Then, the silicon semiconductor substrate 20 is heated to 300 ° C. by the heating means 12. At this temperature, the Si—H bond on the surface of the semiconductor layer is not broken. Therefore, the surface of the semiconductor layer (the silicon semiconductor substrate 20 in the third embodiment) does not have unevenness (roughness).

[Step-320] Then, while introducing an inert gas (for example, nitrogen gas) as a diluting gas into the processing chamber 10 from the gas introducing section 17, the gas is introduced from the gas introducing sections 16A and 16B to the processing chamber. Hydrogen gas and oxygen gas are introduced into 10. At the same time, microwave power is supplied to the magnetron 15 to generate 1 GH generated by the magnetron 15.
microwave of z to 100 GHz (for example, 2.45 G
(Microwave of 1 Hz) is introduced into the plasma generation region 10A of the processing chamber 10 through the microwave waveguide 14. Thereby, steam is generated. The generated steam is in processing chamber 1
0, reaches the plasma processing region 10B located below,
The surface of the semiconductor layer (specifically, the silicon semiconductor substrate 20) heated by the heating means 12 is oxidized. Thus, a gate insulating film (a silicon oxide film in Embodiment 3) can be formed on the surface of the semiconductor layer. Table 6 below exemplifies conditions for forming the gate insulating film. In this first gate insulating film forming step, a gate insulating film having a thickness of 1 nm is formed.

[Table 6] Microwave power: 1 kW Microwave frequency: 2.45 GHz Oxygen gas flow rate: 10 SLM Hydrogen gas flow rate: 0.2 SLM Inert gas flow rate: 10 SLM Substrate temperature: 300 ° C.

[Step-330] Then, the magnetron 1
The supply of the microwave power to the processing chamber 5 and the introduction of the hydrogen gas and the oxygen gas into the processing chamber 10 are interrupted, and the introduction of the inert gas from the gas introducing section 17 into the processing chamber 10 is continued. The silicon semiconductor substrate 20 at 800 ° C.
Heat up to Since a thin gate insulating film is already formed on the surface of the semiconductor layer, the semiconductor layer (the silicon semiconductor substrate 2 in the third embodiment)
No unevenness (roughness) occurs on the surface of 0). Next, hydrogen gas and oxygen gas are again introduced into the processing chamber 10 from the gas introduction unit 16A and the gas introduction unit 16B. At the same time, the microwave power is again supplied to the magnetron 15, and the frequency of 1 GHz to 100
A microwave of GHz (for example, a microwave of 2.45 GHz) is introduced into the plasma generation region 10A of the processing chamber 10 through the microwave waveguide 14. Thereby, steam is generated. The generated steam reaches the plasma processing region 10B located below the processing chamber 10 and
The surface of the semiconductor layer (specifically, the silicon semiconductor substrate 20) heated by the above is further oxidized. Thus, a gate insulating film having a total thickness of 2 nm is formed on the surface of the semiconductor layer. Table 7 below shows conditions for forming the gate insulating film in the second gate insulating film forming step.

[Table 7] Microwave power: 1 kW Microwave frequency: 2.45 GHz Oxygen gas flow rate: 10 SLM Hydrogen gas flow rate: 0.2 SLM Inert gas flow rate: 10 SLM Substrate temperature: 800 ° C.

[Step-340] After that, by performing [Step-120] to [Step-180] of the first embodiment, or after performing the plasma nitriding treatment described in the second embodiment, [Step-120] of the first embodiment
By performing [Step-180], a p-channel semiconductor device can be obtained.

(Embodiment 4) Embodiment 4 is also a modification of the method for manufacturing a p-channel semiconductor device of Embodiment 1. Embodiment 4 is different from Embodiment 1 in that after a gate insulating film is formed on the surface of a semiconductor layer, a heat treatment is performed on the formed gate insulating film. Hereinafter, a method for manufacturing the p-channel semiconductor device of the fourth embodiment will be described.
In the fourth embodiment, the plasma processing apparatus shown in FIG. 1 is used.

[Step-400] [Step-400] of Embodiment 1
100] to [Step-110], a 2 nm-thick gate insulating film is formed on the surface of the semiconductor layer (the silicon semiconductor substrate 20 in the fourth embodiment).

[Step-410] Then, magnetron 1
The supply of the microwave power to the processing chamber 5 and the introduction of the hydrogen gas and the oxygen gas into the processing chamber 10 are stopped.
As a result, the temperature of the silicon semiconductor substrate 20 is raised to 850 ° C. Next, nitrogen gas containing 0.1% by volume of hydrogen chloride gas was introduced into the processing chamber 10 from the gas introduction unit 17,
Heat treatment for minutes. Thereby, a gate insulating film having excellent time-zero dielectric breakdown (TZDB) characteristics and temporal dielectric breakdown (TDDB) characteristics can be obtained.

[Step-420] Then, the gas introduction unit 17
The introduction of nitrogen gas containing 0.1% by volume of hydrogen chloride gas into the processing chamber 10 is stopped, and an inert gas (for example, nitrogen gas) is introduced into the processing chamber 10 from the gas introduction unit 17. Hereinafter, [Step-120] to [Step-18] of Embodiment 1
0], or by performing [Step-120] to [Step-180] of the first embodiment after the plasma nitridation processing described in the second embodiment. A semiconductor device can be obtained. Further, the heat treatment of Embodiment 4 may be added to the two-step gate insulating film forming step of Embodiment 3.

(Fifth Embodiment) A fifth embodiment is also a modification of the method of manufacturing the p-channel semiconductor device of the first embodiment. The fifth embodiment is different from the first embodiment in that a pyrogenic oxidation method is used for forming a gate insulating film.

FIG. 7 is a conceptual diagram of a vertical type oxide film forming apparatus for forming a silicon oxide film based on the pyrogenic oxidation method. This vertical type oxide film forming apparatus
Oxidizing furnace 50 of double tube structure made of quartz held vertically
(Corresponding to a processing chamber) and the wet gas and / or
A gas introduction unit 52 for introducing gas, a gas exhaust unit 53 for exhausting wet gas and / or gas from the oxidation furnace 50,
A heater 54 for maintaining the inside of the oxidizing furnace 50 at a predetermined atmospheric temperature through a cylindrical heat equalizing tube 56 made of iC, a substrate carrying-in / out part 60, and an inert gas such as a nitrogen gas are introduced into the substrate carrying-in / out part 60. A gas introduction unit 61 for exhausting gas, a gas exhaust unit 62 for exhausting gas from the substrate loading / unloading unit 60, a shutter 55 for separating the oxidation furnace 50 and the substrate loading / unloading unit 60,
An elevator mechanism 63 is provided for carrying the silicon semiconductor substrate 20 into and out of the oxidation furnace 50. A quartz boat 64 for mounting the silicon semiconductor substrate 20 is attached to the elevator mechanism 63. Further, the hydrogen gas supplied to the combustion chamber 70 is replaced with the oxygen gas,
A wet gas is generated by mixing and burning at a high temperature in the furnace. The wet gas is introduced into the oxidation furnace 50 via the pipe 71, the gas flow path 51, and the gas introduction unit 52. The gas flow path 51 is provided in the oxidation furnace 50 having a double pipe structure.
Corresponds to the space between the inner wall and the outer wall.

An outline of a method of forming a gate insulating film based on a pyrogenic oxidation method using the vertical type oxide film forming apparatus shown in FIG. 7 will be described below.

[Step-500] First, the same step as [Step-100] of the first embodiment is performed.

[Step-510] Piping 72, combustion chamber 70,
Nitrogen gas is introduced into the oxidation furnace 50 through a pipe 71, a gas flow path 51, and a gas introduction unit 52, and the inside of the oxidation furnace 50 is set to a nitrogen gas atmosphere. The ambient temperature is maintained at around 700 ° C. In this state, the shutter 55 is kept closed. The substrate loading / unloading section 60 is open to the atmosphere.
Then, the silicon semiconductor substrate 20 is loaded into the substrate loading / unloading section 60, and the silicon semiconductor substrate 20 is placed on the quartz boat 64. Silicon semiconductor substrate 20 to substrate carry-in / out section 60
Is completed, the door (not shown) is closed, a nitrogen gas is introduced into the substrate carrying-in / out section 60 from the gas introduction section 61, and the gas is exhausted from the gas exhausting section 62, and the inside of the substrate carrying-in / out section 60 is set to a nitrogen gas atmosphere.

[Step-520] When the inside of the substrate loading / unloading section 60 has a sufficient nitrogen gas atmosphere, the shutter 55 is opened and the elevator mechanism 63 is operated to operate the quartz boat 64.
Is raised, and the silicon semiconductor substrate 20 is carried into the oxidation furnace 50. When the elevator mechanism 63 reaches the highest position, the base of the quartz boat 64 stops communication between the oxidation furnace 50 and the substrate loading / unloading section 60.

[Step-530] Thereafter, the ambient temperature of the oxidation furnace 50 in a nitrogen gas atmosphere is increased to 800 to 900 ° C. And, through the pipes 72 and 73, the combustion chamber 70
An oxygen gas and a hydrogen gas are supplied into the inside, and the wet gas generated by mixing the hydrogen gas and the oxygen gas at a high temperature in the combustion chamber 70 and burning the mixture is supplied to a pipe 71, a gas flow path 51, and a gas introduction section 52. The gas is introduced into the oxidation furnace 50 through the gas exhaust unit 53 and exhausted from the gas exhaust unit 53. Thus, a gate insulating film is formed on the surface of the silicon semiconductor substrate 20. The temperature in the combustion chamber 70 is maintained at 700 to 900 ° C. by, for example, a heater (not shown). Table 8 below shows conditions in the pyrogenic oxidation method.

[Table 8] Hydrogen gas flow rate: 5 SLM Oxygen gas flow rate: 10 SLM Combustion temperature: 750 ° C

[Step-540] After a gate insulating film having a desired thickness is formed, supply of oxygen gas and hydrogen gas into the combustion chamber 70 is stopped. While introducing the active gas, the ambient temperature of the oxidation furnace 50 was lowered to about 700 ° C., and then the elevator mechanism 63 was operated to lower the quartz boat 64,
The silicon semiconductor substrate 20 is carried out from the substrate carrying-in / out section 60.

[Step-550] After that, by performing [Step-120] to [Step-180] of the first embodiment, or after performing the plasma nitriding treatment described in the second embodiment, [Step-120] of the first embodiment
By performing [Step-180], a p-channel semiconductor device can be obtained. Embodiment 5
The two-step gate insulating film forming process described in the third embodiment may be executed based on the pyrogenic oxidation method, or the heat treatment described in the fourth embodiment may be added. . Further, the oxidizing atmosphere in [Step-170] of the first embodiment may be formed based on a pyrogenic oxidation method. Since the top and side surfaces of the metal layer 23C are covered with the oxidation-resistant layer, the metal layer 23C is not oxidized, and therefore it is not necessary to include hydrogen gas in a high temperature post-oxidation atmosphere. In addition, accelerated diffusion by hydrogen does not occur, and the phenomenon that boron atoms more easily pass through the gate insulating film from the gate electrode and reach the silicon semiconductor substrate does not occur.

(Embodiment 6) Embodiment 6 relates to a method for manufacturing a semiconductor device and a method for manufacturing a p-channel semiconductor device according to the second aspect of the present invention.

Also in the sixth embodiment, a silicon semiconductor substrate was used as a semiconductor layer. Also, in the sixth embodiment, the plasma oxidation method is employed. A method for manufacturing a semiconductor device and a method for manufacturing a p-channel semiconductor device according to the sixth embodiment of the present invention using the plasma processing apparatus shown in FIG. This will be described with reference to FIGS.

[Step-600] First, the same steps as [Step-100] and [Step-110] of the first embodiment are performed.

[Step-610] Then, on the semiconductor layer,
After the silicon layer 23A, the metal layer 23C, and the oxidation-resistant layer 40 are sequentially formed, the oxidation-resistant layer 40, the metal layer 23C, and the silicon layer 23A are patterned to form a laminate in which the silicon layer 23A is exposed on side surfaces. . Alternatively, a silicon layer 23 containing a p-type impurity is formed on the gate insulating film 22.
A, a gate electrode 123 on which the metal layer 23C and the oxidation-resistant layer 40 are stacked is formed. Specifically, when the formation of the gate insulating film 22 is completed, the supply of the microwave power to the magnetron 15 and the introduction of the hydrogen gas and the oxygen gas into the processing chamber 10 are stopped, and the inert gas is While introducing gas into the processing chamber 10, the silicon semiconductor substrate 20
Is cooled to room temperature, and then the silicon semiconductor substrate 20 is carried out of the plasma processing apparatus. Then, a silicon layer 23A (polysilicon layer in the first embodiment) having a thickness of about 100 nm containing a p-type impurity (for example, boron) is formed on the entire surface by the CVD method. Next, a reaction prevention layer 23B made of WN having a thickness of about 5 nm, a metal layer 23C made of tungsten having a thickness of about 100 nm, and an oxidation resistant layer 40 made of silicon nitride (SiN) having a thickness of about 100 nm are sequentially formed. The oxidation resistant layer 40, the metal layer 23C, the reaction prevention layer 23B, and the silicon layer 23A are patterned based on the lithography technique and the dry etching technique. Thus, as shown in FIG.
3, or alternatively, a laminate in which the silicon layer 23A, the metal layer 23C, and the oxidation-resistant layer 40 are laminated and the silicon layer 23A is exposed on the side surface can be obtained.

[Step-620] Next, by performing the same step as [Step-130] of the first embodiment, the low concentration impurity region 24 is formed in the silicon semiconductor substrate 20.
Is formed (see FIG. 8B). In some cases, an extension region may be formed instead of the low-concentration impurity region 24.

[Step-630] Then, the silicon layer 23
A, and the oxidation-resistant layer 40 and the metal layer 2
An oxidizing gas permeable layer 25 is formed on a silicon semiconductor substrate 20 which is a semiconductor layer so that 3C protrudes. Specifically, an oxidizing gas-permeable layer 25 made of silicon oxide (SiO ₂ )
It is formed by a D (HDP-CVD) method (see FIG. 8C). The thickness of the oxidizing gas permeable layer 25 on the silicon semiconductor substrate 20 away from the gate electrode 123 is determined by the thickness of the silicon on the top surface of the silicon layer 23A constituting the gate electrode 123 (the interface between the silicon layer 23A and the reaction prevention layer 23B) The height from the semiconductor substrate 20 is substantially equal. Then, a resist layer 26 is formed so that the oxidizing gas permeable layer 25 above the gate electrode 123 is exposed and the oxidizing gas permeable layer 25 on the silicon semiconductor substrate 20 is covered (see FIG. 9A). After removing the oxidizing gas permeable layer 25 not covered with the resist layer 26 by dry etching, the resist layer 26 is removed (see FIG. 9B). The thickness of the portion of the oxidizing gas permeable layer 25 after being removed by the dry etching method is made substantially equal to the thickness of the oxidizing gas permeable layer 25 on the silicon semiconductor substrate 20 apart from the gate electrode 123.

[Step-640] Next, the side surface of the metal layer 23C protruding from the oxidizing gas permeable layer 25 is
(See FIG. 9C). Specifically, a silicon nitride (SiN) layer is formed on the entire surface under the conditions exemplified in Table 3 using a parallel plate type CVD apparatus, and then the silicon nitride layer is etched back to form an oxidizing gas permeable layer. The side surface of the metal layer 23C protruding from 25 can be covered with an oxidation-resistant film 41 made of silicon nitride (SiN).

[Step-650] Then, the oxidation-resistant film 41 is formed.
Is used as an etching mask, the oxidizing gas permeable layer 25 on the silicon semiconductor substrate 20, which is a semiconductor layer, is selectively removed by dry etching, leaving the oxidizing gas permeable layer 25 on the side surface of the silicon layer 23A. ((A) of FIG. 10)
reference). Etching is performed so that the oxidizing gas permeable layer 25 having a thickness of about several tens nm is left on the side surface of the silicon layer 23A.

[Step-660] Next, in the same manner as in [Step-170] of the first embodiment, the silicon layer 23A is subjected to a heat treatment in an oxidizing atmosphere, that is, by performing a post-oxidation treatment. (See FIG. 10B). Although a silicon oxide film is also formed on the surface of the silicon semiconductor substrate 20, illustration of the silicon oxide film is omitted.

[Step-670] Thereafter, source / drain regions 30 are formed by implanting p-type impurities (for example, boron or BF ₂ ) into the semiconductor layer (specifically, the silicon semiconductor substrate 20) by ion implantation. (See FIG. 11A), RTA for activating the introduced p-type impurities.
Perform processing. The region of the silicon semiconductor substrate 20 sandwiched between the low concentration impurity regions 24 is a channel forming region 31
Is equivalent to Thereafter, an interlayer insulating layer 32 is formed on the entire surface by the CVD method, an opening is provided in the interlayer insulating layer 32 above the source / drain region 30, and a wiring material layer is formed on the interlayer insulating layer 32 including the inside of the opening. Is formed by a sputtering method, and the wiring 33 is formed by patterning the wiring material layer, whereby a p-channel semiconductor device whose schematic partial cross-sectional view is shown in FIG. 11B can be obtained. A contact plug made of polysilicon, metal or a metal compound containing impurities is formed in the opening, and then a wiring material layer is formed on the interlayer insulating layer 32 by a sputtering method, and the wiring material layer is patterned. By doing the wiring 3
3 may be formed.

Various modifications of the first embodiment described in the second to fifth embodiments are applied to the semiconductor device manufacturing method and the p-channel type semiconductor device manufacturing method of the sixth embodiment. be able to.

Although the present invention has been described based on the preferred embodiments, the present invention is not limited to these embodiments. The various conditions and the structure of the plasma processing apparatus described in the embodiment are merely examples, and can be changed as appropriate.

For example, [Step-330] of the third embodiment.
In the above, the silicon semiconductor substrate 20 may be heated to 800 ° C. by the heating means 12 without stopping the supply of the microwave power to the magnetron 15 and the introduction of the hydrogen gas and the oxygen gas into the processing chamber 10. Further, in [Step-410] of the fourth embodiment, the temperature of the silicon semiconductor substrate 20 is increased to 850 ° C. by the heating unit 12 while introducing an inert gas (for example, nitrogen gas) from the gas introduction unit 17 into the processing chamber 10. Temperature, but instead, for example, an inert gas (for example, nitrogen gas) containing 0.1% by volume of hydrogen chloride gas is introduced into the processing chamber 10 from the gas introduction unit 17 while the silicon semiconductor substrate 20 Heating means 12
To 850 ° C. by heating. Furthermore, the first
For example, a hydrogen chloride gas may be contained in the atmosphere in each of the gate insulating film forming step, the temperature raising step, and the second gate insulating film forming step.

In the embodiment, the insulating film is formed exclusively on the surface of the silicon semiconductor substrate.
A p-channel semiconductor device can be formed on an epitaxial silicon layer formed on a substrate, or a polysilicon layer or an amorphous silicon layer formed on an insulating layer formed on a substrate. A p-channel semiconductor device can also be formed.

Alternatively, a p-channel semiconductor device may be formed in the SOI layer. The element isolation region in the SOI semiconductor device can be formed by the following method. (A) Forming a pad oxide film and a silicon nitride film on a semiconductor layer and patterning the silicon nitride film and the pad oxide film to form a mask for forming an element isolation region; (B) forming a trench in the semiconductor layer by patterning the semiconductor layer, and then filling the trench with an insulating material, so-called STI (C) When preparing a substrate based on the above or another method, a trench is formed in a semiconductor substrate in advance, the inside of the trench is filled with an insulating layer, and then an interlayer film (for example, SiO ₂ film, after forming a film) having a laminated structure of SiO ₂ film and polysilicon film, this and to take the semiconductor substrate supporting substrate A substrate bonding method and an STI method were combined, in which a semiconductor substrate was ground and polished from the back surface by grinding and polishing, thereby obtaining a support composed of a support substrate, an insulating layer, and a semiconductor layer composed of a semiconductor substrate. Method (d) Mesa-type element isolation region forming method of forming an element isolation region by exposing the insulating layer by removing a semiconductor layer on the insulating layer

The formation of the gate insulating film and / or the nitriding treatment and post-oxidation of the surface of the gate insulating film can be performed not only in the single-wafer method but also in a batch method in which a plurality of semiconductor layers are simultaneously processed.

In the embodiment, after the surface of the semiconductor layer is cleaned with a 0.1% aqueous solution of hydrofluoric acid and pure water,
The semiconductor layer is formed by a plasma processing apparatus or an oxide film forming apparatus (hereinafter, referred to as a “plasma processing apparatus”).
These devices are collectively referred to as a plasma processing device or the like), but the atmosphere from the surface cleaning of the semiconductor layer to the transfer to the plasma processing device or the like may be an inert gas (eg, nitrogen gas) atmosphere. In addition, such an atmosphere is, for example, an atmosphere of a semiconductor layer surface cleaning apparatus is an inert gas atmosphere, and a semiconductor layer (for example, a silicon semiconductor substrate) is placed in a transport box filled with an inert gas. As shown in the schematic diagram in FIG. 12, a method for carrying in a plasma processing apparatus or the like, a surface cleaning apparatus, a plasma processing apparatus, or the like, using a cluster tool apparatus including a transport path, a loader, and an unloader, This can be achieved by a method in which the plasma processing apparatus and the like are connected by a transport path, and the atmosphere of the surface cleaning apparatus, the transport path, the plasma processing apparatus, and the like is an inert gas atmosphere.

Alternatively, instead of cleaning the surface of the semiconductor layer with a 0.1% hydrofluoric acid aqueous solution and pure water, a gas phase cleaning method using anhydrous hydrogen fluoride gas under the conditions shown in Table 9 is used. May be used to clean the surface of the semiconductor layer.
Note that methanol is added to prevent generation of particles. Alternatively, the surface of the semiconductor layer may be cleaned by a vapor phase cleaning method using hydrogen chloride gas under the conditions exemplified in Table 10. The atmosphere in the surface cleaning apparatus and the atmosphere in the transfer path before starting the surface cleaning of the semiconductor layer or after the surface cleaning is completed may be an inert gas atmosphere, for example, 1.3 × 10 ⁻¹ Pa (10 A vacuum atmosphere of about ^-3 Torr) may be used. When the atmosphere in the transfer path or the like is a vacuum atmosphere, the atmosphere of the plasma processing apparatus or the like when the semiconductor layer is loaded is set to, for example, 1.3 × 10 ⁻¹ Pa (1
A vacuum atmosphere of about 0 ⁻³ Torr) may be provided, and after the loading of the semiconductor layer is completed, the atmosphere of the plasma processing apparatus or the like may be an inert gas (eg, nitrogen gas) atmosphere.

[Table 9] Anhydrous hydrogen fluoride gas: 300 sccm Methanol vapor: 80 sccm Nitrogen gas: 1000 sccm Pressure: 0.3 Pa Temperature: 60 ° C.

[Table 10] Hydrogen chloride gas / nitrogen gas: 1% by volume Temperature: 800 ° C

By employing these methods, it is possible to keep the surface of the semiconductor layer free from contamination or the like before forming the gate insulating film. As a result, moisture or organic substances or For example, it is possible to effectively prevent the characteristics of the formed gate insulating film from being degraded or causing a defective portion from being taken in by, for example, Si-OH.

As described above, in the case where the plasma oxidation method is employed, in forming the gate insulating film, the processing chamber 10 is used.
A hydrogen gas and an oxygen gas are introduced into the processing chamber. At this time, in order to prevent a detonation reaction from occurring due to the hydrogen gas flowing into the processing chamber 10 and flowing out of the system, In order to prevent a dry oxide film from being formed, for example, in [Step-110] of the first embodiment, for example, a flow rate of 10
While introducing an inert gas (for example, nitrogen gas) as a gas for diluting the SLM, the processing chamber 10 is introduced through the gas inlet 16A.
A hydrogen gas at a flow rate of 0.2 SLM is introduced into the processing chamber 10, and then, for example, a flow rate of 1
The introduction of the oxygen gas of 0 SLM may be started, and the introduction of the inert gas for dilution into the processing chamber 10 may be stopped. Then
Microwave power is supplied to the magnetron 15, and the microwave of 2.45 GHz generated by the magnetron 15 is introduced into the plasma generation region 10 </ b> A of the processing chamber 10 via the microwave waveguide 14. By such an operation, the hydrogen gas concentration in the processing chamber 10 before the generation of water vapor becomes a sufficiently low value, and it is possible to reliably prevent the detonation reaction from occurring, and furthermore, to surely form the dry oxide film. Can be prevented.

[0117]

According to the present invention, the top and side surfaces of the metal layer are covered with an oxidation-resistant layer, or alternatively, the top surface of the metal layer is covered with an oxidation-resistant layer and the side surfaces are covered with an oxidation-resistant film. Since the post-oxidation treatment is performed in the covered state, it is possible to prevent the metal layer from being oxidized while improving the characteristics and reliability of the semiconductor device. In addition, unlike conventional technology, H ₂ O
Need not be heat treated in H ₂ carrier gas containing
Since the occurrence of a phenomenon that boron atoms pass from the gate electrode to the gate insulating film can be suppressed, fluctuations in the threshold voltage of the p-channel semiconductor device can be avoided.

When the laminate or the gate electrode is exposed to water vapor and hydrogen gas generated by irradiating oxygen gas and hydrogen gas with electromagnetic waves, the side surface of the silicon layer is oxidized at a lower temperature than the conventional post-oxidation. As a result,
In the subsequent oxidation step, boron atoms, which are p-type impurities, can be effectively suppressed from passing through the gate insulating film from the silicon layer and reaching the semiconductor layer. In addition, if the plasma oxidation method is adopted, it is possible to form the gate insulating film and post-oxidize in one plasma processing apparatus, and one apparatus for forming and post-oxidizing the gate insulating film can be used. And the configuration of the apparatus can be simplified. In addition, when the plasma oxidation method is employed, water vapor can be easily and reliably generated with the oxidation rate suppressed and controlled, and a thin gate insulating film can be formed by the humidification oxidation method. In addition, since the oxide film is formed by an oxidation method using water vapor, an oxide film having excellent time-dependent dielectric breakdown (TDDB) characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 is a conceptual diagram of a plasma processing apparatus suitable for performing a method of the present invention.

FIG. 2 is a schematic partial cross-sectional view of a silicon semiconductor substrate or the like for describing a method of forming an insulating film according to the first embodiment.

FIG. 3 is a schematic partial cross-sectional view of the silicon semiconductor substrate and the like for explaining the method for forming the insulating film of the first embodiment, following FIG. 2;

FIG. 4 is a schematic partial cross-sectional view of a silicon semiconductor substrate and the like for explaining the method of forming the insulating film of the first embodiment, following FIG. 3;

FIG. 5 is a schematic partial cross-sectional view of the silicon semiconductor substrate and the like for explaining the method for forming the insulating film of the first embodiment, following FIG. 4;

FIG. 6 is a schematic partial cross-sectional view of the silicon semiconductor substrate and the like for explaining the method for forming the insulating film of the first embodiment, following FIG. 5;

FIG. 7 is a conceptual diagram of a vertical type oxide film forming apparatus for forming an oxide film based on a pyrogenic oxidation method.

FIG. 8 is a schematic partial cross-sectional view of a silicon semiconductor substrate or the like for describing a method of forming an insulating film according to a sixth embodiment.

FIG. 9 is a schematic partial cross-sectional view of a silicon semiconductor substrate or the like for describing a method of forming an insulating film according to the sixth embodiment, following FIG. 8;

FIG. 10 is a schematic partial cross-sectional view of a silicon semiconductor substrate and the like for illustrating a method of forming an insulating film according to the sixth embodiment, following FIG. 9;

FIG. 11 is a schematic partial cross-sectional view of a silicon semiconductor substrate or the like for describing a method of forming an insulating film according to the sixth embodiment, following FIG. 10;

FIG. 12 is a schematic view of a cluster tool device.

[Explanation of symbols]

10 processing chamber, 10A plasma generation area, 1
0B: Plasma processing area, 11: Stage, 1
2 ... heating means, 13 ... magnet, 14 ... microwave waveguide, 15 ... magnetron, 16A, 16
B, 16C: gas introduction unit, 17: gas introduction unit,
18 ... gas exhaust unit, 19 ... heater, 20 ...
Silicon semiconductor substrate, 21 ... element isolation region, 22
..Gate insulating films, 23, 123 ... gate electrodes, 2
3A: Silicon layer, 23B: Reaction prevention layer, 23
C: Metal layer, 23D: Oxide film, 24: Low concentration impurity region, 25: Oxidizing gas permeable layer, 26:
..Resist layer, 27 ... oxidation resistant layer, 28 ... resist layer, 29 ... side wall, 30 ... source / drain region, 31 ... channel forming region, 32
... interlayer insulating layer, 33 ... wiring, 40 ... oxidation-resistant layer, 41 ... oxidation-resistant film, 50 ... oxidation furnace, 51
... gas flow path, 52 ... gas introduction part, 53 ... gas exhaust part, 54 ... heater, 55 ... shutter,
56 ... heat equalizing tube, 60 ... substrate loading / unloading part, 61 ...
・ Gas introduction part, 62 ・ ・ ・ Gas exhaust part, 63 ・ ・ ・ Elevator mechanism, 64 ・ ・ ・ Quartz boat, 70 ・ ・ ・ Combustion chamber, 71, 72, 73 ・ ・ ・ Piping

Continued on the front page F term (reference) 4M104 AA01 BB01 BB16 BB18 BB29 BB30 BB33 BB40 CC05 DD04 DD08 DD37 DD43 DD65 DD89 EE05 EE09 EE12 EE14 EE17 FF18 GG09 GG10 GG14 HH04 HH08 5F040 DB03 EC01 EC05 EC02 EC02 BF73 BJ01 BJ07 5F110 AA03 AA04 EE04 EE09 EE15 EE33 EE44 EE45 FF02 FF25 NN23 NN28 NN37

Claims (12)

[Claims] (A) a step of sequentially forming a silicon layer and a metal layer on a semiconductor layer, and then patterning the metal layer and the silicon layer to form a stacked body having the silicon layer exposed on side surfaces; B) forming an oxidizing gas permeable layer on the semiconductor layer so as to cover the side surface of the silicon layer and project the metal layer; (D) selectively removing the oxidizing gas permeable layer on the semiconductor layer and leaving the oxidizing gas permeable layer on the side surface of the silicon layer; A) forming an oxide film on the side surface of the silicon layer by performing a heat treatment in an oxidizing atmosphere. 2. The method according to claim 1, wherein the metal layer is made of tungsten, and the stacked body forms a gate electrode. 3. The method according to claim 1, wherein the oxidizing gas permeable layer is made of silicon oxide, and the oxidation resistant layer is made of silicon nitride. (A) forming a silicon layer, a metal layer, and an oxidation-resistant layer on the semiconductor layer in that order, patterning the oxidation-resistant layer, the metal layer, and the silicon layer to expose the silicon layer on the side surfaces; (B) covering the side surface of the silicon layer and forming an oxidizing gas-permeable layer on the semiconductor layer so that the oxidation-resistant layer and the metal layer protrude; (C) a step of covering the side surface of the metal layer protruding from the oxidizing gas permeable layer with an oxidation resistant film; and (iv) selectively removing the oxidizing gas permeable layer on the semiconductor layer to form an oxidizing gas permeable layer. (E) performing a heat treatment in an oxidizing atmosphere to form an oxide film on the side surface of the silicon layer. 5. The method according to claim 4, wherein the metal layer is made of tungsten, and the stacked body forms a gate electrode. 6. The method according to claim 4, wherein the oxidizing gas-permeable layer is made of silicon oxide, and the oxidation-resistant layer and the oxidation-resistant film are made of silicon nitride. 7. A gate electrode comprising: (A) a step of forming a gate insulating film on a surface of a semiconductor layer; and (B) a gate electrode in which a silicon layer containing a p-type impurity and a metal layer are stacked on the gate insulating film. (C) forming an oxidizing gas permeable layer on the semiconductor layer so as to cover the side surface of the silicon layer and project the metal layer; and (D) oxidizing gas permeable layer. Covering the top and side surfaces of the metal layer protruding from the surface with an oxidation-resistant layer; and (E) selectively removing the oxidizing gas permeable layer on the semiconductor layer, and replacing the oxidizing gas permeable layer with the side surfaces of the silicon layer. And (F) forming an oxide film on the side surface of the silicon layer by performing a heat treatment in an oxidizing atmosphere. 8. The method according to claim 7, wherein the metal layer is made of tungsten. 9. The method according to claim 7, wherein the oxidizing gas permeable layer is made of silicon oxide, and the oxidation resistant layer is made of silicon nitride. (A) a step of forming a gate insulating film on the surface of a semiconductor layer; and (B) a silicon layer containing a p-type impurity, a metal layer, and an oxidation-resistant layer laminated on the gate insulating film. (C) forming an oxidizing gas-permeable layer on the semiconductor layer so as to cover the side surface of the silicon layer and project the oxidation-resistant layer and the metal layer. (D) a step of coating the side surface of the metal layer protruding from the oxidizing gas permeable layer with an oxidation resistant film; and (E) selectively removing the oxidizing gas permeable layer on the semiconductor layer, thereby allowing oxidizing gas permeation. A p-channel semiconductor comprising: a step of leaving a layer on the side surface of the silicon layer; and (F) a step of forming an oxide film on the side surface of the silicon layer by performing heat treatment in an oxidizing atmosphere. Device manufacturing method. 11. The method according to claim 10, wherein the metal layer is made of tungsten. 12. The method according to claim 10, wherein the oxidizing gas-permeable layer is made of silicon oxide, and the oxidation-resistant layer and the oxidation-resistant film are made of silicon nitride.