JP2001076839A - Surface mounting type surge absorbing element and manufacture thereof - Google Patents

Surface mounting type surge absorbing element and manufacture thereof

Info

Publication number
JP2001076839A
JP2001076839A JP25297499A JP25297499A JP2001076839A JP 2001076839 A JP2001076839 A JP 2001076839A JP 25297499 A JP25297499 A JP 25297499A JP 25297499 A JP25297499 A JP 25297499A JP 2001076839 A JP2001076839 A JP 2001076839A
Authority
JP
Japan
Prior art keywords
internal electrode
electrode layers
discharge space
layer
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25297499A
Other languages
Japanese (ja)
Inventor
Hideki Matsuzawa
秀樹 松沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokin Corp
Original Assignee
Tokin Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokin Corp filed Critical Tokin Corp
Priority to JP25297499A priority Critical patent/JP2001076839A/en
Publication of JP2001076839A publication Critical patent/JP2001076839A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To reduce capacitance by forming an inner diameter larger than the other inner diameter in a part not contacting with internal electrode layers of a discharge space formed between a pair of internal electrode layers arranged inside an insulating layer composed of an insulating ceramic sintered body. SOLUTION: A part of an insulating layer 2 between internal electrode layers 3 is desirably constituted of a multilayer not less than three layers, an inner diameter 5 of a discharge space 4 of a layer not contacting with the internal electrode layers 3 among the insulating layer 2 is formed larger than an inner diameter 6 of the discharge space 4 of a layer contacting with the internal electrode layers 3, and a layer not contacting with the internal electrode layers 3 is constituted by at least one layer or more so that the discharge space 4 has a projecting shape outside. Even when performing creeping discharge, since a projecting part is hardly sputtered, a short circuit is hardly caused, so that durability to repetitive discharge is improved. Desirably, the insulating layer 2 is formed by a printing method, the internal electrode layers 3 are formed by a printing method, the discharge space 4 is formed by shearing work, and these are manufactured by being integrally sintered after press-fitting.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、通信機器等の電子
回路や電子部品をサージから保護するためのサージ吸収
素子及びその製造方法に関し、特に、プリント基板への
自動実装に有利な表面実装型サージ吸収素子及びその製
造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surge absorbing element for protecting an electronic circuit or an electronic component of a communication device or the like from a surge, and a method of manufacturing the same. The present invention relates to a surge absorbing element and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来、この種のサージ吸収素子として、
電圧非直線特性を有する高抵抗体素子よりなるバリスタ
や放電空間を気密容器内に封入した放電式サージ吸収素
子等が広く利用されている。
2. Description of the Related Art Conventionally, as this type of surge absorbing element,
A varistor made of a high-resistance element having a voltage non-linear characteristic, a discharge type surge absorbing element having a discharge space sealed in an airtight container, and the like are widely used.

【0003】従来のバリスタは、サージ吸収の応答性に
優れるとともに、素子の小型化や表面実装部品に対応し
た構造とすることが容易であるという利点を有する一方
で、静電容量が大きく、信号系回路に使用しにくいとい
う欠点を有する。
A conventional varistor has excellent responsiveness of surge absorption, and has an advantage that it is easy to reduce the size of an element and to adopt a structure corresponding to a surface mount component. It has a drawback that it is difficult to use for system circuits.

【0004】また、従来の放電式サージ吸収素子は、静
電容量が小さいため、信号系回路にも広く利用されてい
る。しかし、その構造は、気密構造としてガラス封入し
てリード線を引き出すものであり、プリント基板への実
装にあたっては、リード線の適切な長さへの切断、曲げ
加工が必要となり、その後にプリント基板の穴にリード
線を挿入し半田付けするものであった。多くの電子部品
が、表面実装型の電子部品へと移り変わってきている中
で、このようなプリント基板への実装方法は、工数のか
かる方法となっていた。
[0004] Further, the conventional discharge-type surge absorbing element is widely used in signal-related circuits because of its small capacitance. However, the structure is that the lead wire is drawn out by encapsulating glass as an airtight structure.When mounting on a printed circuit board, it is necessary to cut and bend the lead wire to an appropriate length, and then A lead wire was inserted into the hole and soldered. While many electronic components have been shifted to surface-mounted electronic components, such a mounting method on a printed circuit board has been a time-consuming method.

【0005】これらを解決する手段として、表面実装型
のサージ吸収素子が提案されているが、マイクロギャッ
プを気密に保つために真空排気しキャップを封着する、
キャップとマイクロギャップが短絡しないようにマイク
ロギャップに絶縁被膜を形成する等の工数がかかり、生
産性が上がらないという問題があった。
As a means for solving these problems, a surface mount type surge absorbing element has been proposed. However, in order to keep the micro gap airtight, vacuum evacuation and sealing of a cap are required.
The man-hours required to form an insulating film on the microgap so as not to short-circuit the cap and the microgap are required, and there is a problem that productivity is not improved.

【0006】[0006]

【発明が解決しようとする課題】本発明は、かかる課題
を解決すべくなされたものであり、静電容量が小さく、
しかも製造が容易な表面実装型サージ吸収素子及びその
製造方法を提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in order to solve such a problem, and has a small capacitance.
Moreover, it is an object of the present invention to provide a surface mount type surge absorbing element which is easy to manufacture and a method of manufacturing the same.

【0007】[0007]

【課題を解決するための手段】本発明は、一対の外部電
極を有する絶縁性セラミック焼結体からなる絶縁層の内
部に、前記外部電極と導通した一対の内部電極層を有
し、該内部電極層間に放電空間を有する表面実装型サー
ジ吸収素子において、前記内部電極層と接していない前
記放電空間の一部の内径が他の内径より大きい表面実装
型サージ吸収素子である。
According to the present invention, there is provided an insulating layer made of an insulating ceramic sintered body having a pair of external electrodes, wherein a pair of internal electrode layers electrically connected to the external electrodes are provided inside the insulating layer. A surface-mounted surge absorbing element having a discharge space between electrode layers, wherein the inner diameter of a part of the discharge space not in contact with the internal electrode layer is larger than other inner diameters.

【0008】また、本発明は、前記内部電極層間の絶縁
層が3層以上のシートにより形成する上記の表面実装型
サージ吸収素子の製造方法である。
Further, the present invention is the above-mentioned method for manufacturing a surface mount type surge absorbing element, wherein the insulating layer between the internal electrode layers is formed of three or more sheets.

【0009】また、本発明は、印刷法またはグリーンシ
ート法により前記絶縁層となるシートを形成し、印刷法
により前記内部電極層となるシートを形成し、該シート
に前記放電空間となる孔をせん断加工によって形成し、
各々のシートを圧着後、一体焼結する上記の表面実装型
サージ吸収素子の製造方法である。
Further, the present invention provides a method for forming a sheet to be the insulating layer by a printing method or a green sheet method, forming a sheet to be the internal electrode layer by a printing method, and forming a hole to be the discharge space in the sheet. Formed by shearing,
This is a method for manufacturing the above surface mount type surge absorbing element, in which each sheet is pressed and then integrally sintered.

【0010】[0010]

【発明の実施の形態】次に、本発明の表面実装型サージ
吸収素子の実施の形態について、図面を参照して説明す
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the surface mount type surge absorbing element of the present invention will be described with reference to the drawings.

【0011】本発明における表面実装型サージ吸収素子
は、図1に示すように、一対の外部電極1を有する絶縁
性セラミック焼結体からなる絶縁層2の内部に、外部電
極1と導通した一対の内部電極層3を有し、この内部電
極層3間に放電空間4を有するものである。
As shown in FIG. 1, the surface mount type surge absorbing element according to the present invention includes a pair of external electrodes 1 electrically connected to an insulating layer 2 made of an insulating ceramic sintered body having a pair of external electrodes 1. , And a discharge space 4 between the internal electrode layers 3.

【0012】かかる構成により、内部電極層3間に過度
の電圧が印加されると、放電空間4内の雰囲気が絶縁破
壊を起こし、放電を生じることにより、サージ電圧を吸
収させることができる。
With this configuration, when an excessive voltage is applied between the internal electrode layers 3, the atmosphere in the discharge space 4 causes dielectric breakdown, and a discharge is generated, so that a surge voltage can be absorbed.

【0013】また、この内部電極層3間の絶縁層部分を
3層以上の多層で構成し、絶縁層のうち、内部電極層3
に接していない層の放電空間4の内径5を、内部電極層
3に接している層の放電空間4の内径6よりも大きく
し、内部電極層3に接していない層を少なくとも1層以
上構成することにより、放電空間4は外側に凸の形状を
有するものとなる。
Further, the insulating layer portion between the internal electrode layers 3 is composed of three or more layers, and among the insulating layers, the internal electrode layer 3
The inner diameter 5 of the discharge space 4 of the layer not in contact with the inner electrode layer 3 is made larger than the inner diameter 6 of the discharge space 4 of the layer in contact with the internal electrode layer 3, and at least one layer not in contact with the internal electrode layer 3 is formed. By doing so, the discharge space 4 has an outwardly convex shape.

【0014】絶縁層の放電空間4の内径5,6が同じで
ある場合、絶縁層の表面に沿って沿面放電しやすく、電
極材料が絶縁層の表面にスパッタされることにより短絡
が生じることがあるが、本発明の構造では、2つの内部
電極層3間の絶縁層の一部が外側に凸の形状を有してお
り、沿面放電した場合においても、凸になった部分はス
パッタされにくいため短絡がおきにくく、繰り返し放電
に対する耐久性が改善される。
When the inner diameters 5 and 6 of the discharge space 4 of the insulating layer are the same, creeping discharge easily occurs along the surface of the insulating layer, and a short circuit may occur due to the electrode material being sputtered on the surface of the insulating layer. However, in the structure of the present invention, a part of the insulating layer between the two internal electrode layers 3 has a shape that is convex outward, and even when creeping discharge occurs, the convex part is not easily sputtered. Therefore, a short circuit does not easily occur, and durability against repeated discharge is improved.

【0015】また、放電開始電圧は、内部電極層間のギ
ャップ長により調整することが可能である。また、焼結
の際、放電ガス置換し、ガラス封入することにより繰り
返し放電の耐久性に優れた素子を得ることが可能であ
る。
Further, the discharge starting voltage can be adjusted by the gap length between the internal electrode layers. Further, at the time of sintering, by replacing the discharge gas and sealing the glass, it is possible to obtain an element having excellent repeated discharge durability.

【0016】本発明による表面実装型サージ吸収素子の
静電容量は、電極の対抗部分の面積によって決まるの
で、用途に応じて静電容量を小さくすることが可能であ
る。
Since the capacitance of the surface mount type surge absorbing element according to the present invention is determined by the area of the opposing portion of the electrode, it is possible to reduce the capacitance according to the application.

【0017】このような表面実装型サージ吸収素子は、
絶縁性セラミック層が、印刷法またはグリーンシート法
により形成、内部電極層が、印刷法により形成、放電空
間となる孔がせん断加工によって形成し、各々のシート
を圧着後、一体焼結することにより製造しており、従来
からある量産性の高い方法を用いることが可能である。
また、外形寸法、電極面積、及び間隔、積層数は、所望
の電気特性に合わせて適時選択できる。
Such a surface mount type surge absorbing element is
An insulating ceramic layer is formed by a printing method or a green sheet method, an internal electrode layer is formed by a printing method, a hole serving as a discharge space is formed by shearing, and each sheet is pressed and then integrally sintered. Since it is manufactured, it is possible to use a conventional method with high mass productivity.
The external dimensions, electrode area, spacing, and number of layers can be selected as appropriate according to desired electrical characteristics.

【0018】絶縁性セラミック層としては、アルミナ、
ムライト、ステアタイト、フォルステアタイト、コーデ
ィエライト、ガラス、チタニア、ジルコニア等の固有体
積抵抗率の高いセラミック材料を単独あるいは組み合わ
せて使用することができ、目的に応じて選択することが
できる。
As the insulating ceramic layer, alumina,
Ceramic materials having a high specific volume resistivity, such as mullite, steatite, forsteatite, cordierite, glass, titania, and zirconia, can be used alone or in combination, and can be selected according to the purpose.

【0019】また、内部電極層には、銅、銀、アルミニ
ウム、ニッケル等の低抵抗金属、炭素、ステンレス、コ
バール等の合金材料等、導電性に優れた材料を使用する
ことができる。また、SnO、Nb、Mo
、WO、TiC、SiC、ZrC、WC、Hf
C、VC、TiN、TaN、VN、ZrN、NbN等の
酸化物、炭化物、及び窒化物等の導電性セラミック材料
等も使用することができる。これらの導電性セラミック
材料を使用すると、気体放電時の溶融や酸化による電極
の劣化を抑制できる。これらの電極材料は、金属系、セ
ラミック系をそれぞれ単独で使用してもよいが、それぞ
れを組み合わせて使用することもできる。
For the internal electrode layer, a material having excellent conductivity such as a low-resistance metal such as copper, silver, aluminum, and nickel, and an alloy material such as carbon, stainless steel, and Kovar can be used. In addition, SnO 2 , Nb 2 O 5 , Mo
O 3 , WO 3 , TiC, SiC, ZrC, WC, Hf
Conductive ceramic materials such as oxides, carbides, and nitrides such as C, VC, TiN, TaN, VN, ZrN, and NbN can also be used. When these conductive ceramic materials are used, deterioration of the electrodes due to melting or oxidation during gas discharge can be suppressed. These electrode materials may be used alone or in combination of a metal material and a ceramic material, but may be used in combination.

【0020】[0020]

【実施例】次に、本発明の表面実装型サージ吸収素子の
実施例について、図面を参照して説明する。
Next, an embodiment of the surface mount type surge absorbing element of the present invention will be described with reference to the drawings.

【0021】まず、平均粒径約3μmのステアタイト粉
末とホウ珪酸ガラス粉末を表1に示す比率で、バイン
ダ、溶剤と混合し、ビーズミルを用いて絶縁層用ペース
トを作製した。
First, a steatite powder having an average particle size of about 3 μm and a borosilicate glass powder were mixed at a ratio shown in Table 1 with a binder and a solvent, and a paste for an insulating layer was prepared using a bead mill.

【0022】[0022]

【表1】 [Table 1]

【0023】また、平均粒径約0.3μmの70重量部
銀−30重量部パラジウム合金粉末を表2に示す比率で
バインダ、溶剤と混合し、ビーズミルを用いて内部電極
層用ペーストを作製した。
Also, 70 parts by weight of silver-30 parts by weight of palladium alloy powder having an average particle size of about 0.3 μm were mixed with a binder and a solvent in the ratio shown in Table 2, and a paste for an internal electrode layer was prepared using a bead mill. .

【0024】[0024]

【表2】 [Table 2]

【0025】これらを図2に示すようにスクリーン印刷
し、打ち抜き(せん断)加工で放電空間となる孔を設け
た。なお、放電空間の内径6は500μm、放電空間の
内径5は700μmとした。これらのシートを重ねて、
110℃で熱圧着した。これを大気中、1000℃で、
5時間一体焼結した。最後に、外部電極としてガラス含
有銀ペーストを塗布し、600℃で30分焼結し、表面
実装可能なサージ吸収素子を得た。
These were screen-printed as shown in FIG. 2 and punched (sheared) to form holes serving as discharge spaces. The inner diameter 6 of the discharge space was 500 μm, and the inner diameter 5 of the discharge space was 700 μm. Overlay these sheets,
Thermocompression bonding was performed at 110 ° C. At 1000 ° C in air,
It was sintered for 5 hours. Finally, a glass-containing silver paste was applied as an external electrode, and sintered at 600 ° C. for 30 minutes to obtain a surface-mountable surge absorbing element.

【0026】これらのサージ吸収素子に対して500p
F−500Ω−10kVの静電気を繰り返し2000回
与え、放電開始電圧及びそのばらつきを調べた。また、
繰り返し放電において放電開始電圧のばらつきが基準の
放電開始電圧の±30%以上になるところをサイクル寿
命とした。その結果を表3に示す。
For these surge absorbing elements, 500p
F-500Ω-10 kV static electricity was repeatedly applied 2000 times, and the discharge starting voltage and its variation were examined. Also,
The cycle life was defined as the point at which the variation of the discharge start voltage in repeated discharge became ± 30% or more of the reference discharge start voltage. Table 3 shows the results.

【0027】[0027]

【表3】 [Table 3]

【0028】表3において、いずれの素子も繰り返し放
電2000回において放電開始電圧のばらつきは±22
%以内であった。また、絶縁抵抗は1010Ωを越え、
静電容量は0.7pF以下であった。
In Table 3, the variation in the firing voltage of all the elements was ± 22 after 2000 repeated discharges.
%. Also, the insulation resistance exceeds 10 10 Ω,
The capacitance was 0.7 pF or less.

【0029】以上の結果より、内部電極層間のギャップ
長を制御することにより、所望の放電開始電圧を有し、
静電容量の低いサージ吸収素子を得ることが可能となっ
た。
From the above results, by controlling the gap length between the internal electrode layers, a desired discharge starting voltage can be obtained,
It has become possible to obtain a surge absorbing element having a low capacitance.

【0030】また、従来使用されているサージ吸収素子
と本発明品を比較して、表4に示した。
Table 4 shows a comparison between the conventionally used surge absorbing element and the product of the present invention.

【0031】[0031]

【表4】 [Table 4]

【0032】表4より、本発明によるサージ吸収素子
は、従来の放電型サージ吸収素子と同レベルの低い静電
容量であり、しかも、表面実装が容易な構造を有すると
いう特徴を備えたものであることがわかる。
From Table 4, it can be seen that the surge absorbing element according to the present invention has a feature that it has the same low capacitance as that of the conventional discharge type surge absorbing element and has a structure that can be easily mounted on the surface. You can see that there is.

【0033】なお、本発明品は、上記実施例に限定され
るものではなく、絶縁性材料、電極材料として他の絶縁
性セラミック材料や導電性材料を使用できることは当業
者であれば容易に類推できる。同様に、ペーストの作製
方法として他の方法を適用することや印刷積層厚さ、内
部電極層の厚さ、各部寸法等の積層体の作製にかかわる
条件、また、焼結条件等は、本発明の実施例以外の条件
でもよいことは当業者であれば容易に類推できる。
It should be noted that the present invention is not limited to the above embodiment, and those skilled in the art can easily estimate that other insulating ceramic materials or conductive materials can be used as the insulating material and the electrode material. it can. Similarly, the conditions relating to the production of the laminate, such as the application of other methods as the production method of the paste, the thickness of the printed laminate, the thickness of the internal electrode layer, the dimensions of each part, and the sintering conditions, etc. It can be easily inferred by those skilled in the art that the conditions other than the embodiment may be used.

【0034】[0034]

【発明の効果】以上説明したように、本発明によれば、
静電容量が小さく、しかも製造が容易な表面実装型サー
ジ吸収素子及びその製造方法を提供することができた。
As described above, according to the present invention,
A surface mount type surge absorbing element having a small capacitance and easy to manufacture, and a method for manufacturing the same can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態の表面実装型サージ吸収素
子の構造を示す断面図。図1(a)は、断面図、図1
(b)は、図1(a)のA−A断面図。図1(c)は、
図1(a)のB−B断面図、図1(d)は、図1(a)
のC−C断面図。
FIG. 1 is a sectional view showing the structure of a surface mount type surge absorbing element according to an embodiment of the present invention. FIG. 1A is a sectional view, and FIG.
(B) is an AA cross-sectional view of FIG. 1 (a). FIG. 1 (c)
FIG. 1A is a cross-sectional view taken along the line BB, and FIG.
CC sectional view of FIG.

【図2】本発明の表面実装型サージ吸収素子の製造方法
を説明する図。
FIG. 2 is a diagram illustrating a method for manufacturing a surface-mount type surge absorbing element according to the present invention.

【符号の説明】[Explanation of symbols]

1 外部電極 2 絶縁層 3 内部電極層 4 放電空間 5,6 放電空間の内径 7 基板 Reference Signs List 1 external electrode 2 insulating layer 3 internal electrode layer 4 discharge space 5, 6 inner diameter of discharge space 7 substrate

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 一対の外部電極を有する絶縁性セラミッ
ク焼結体からなる絶縁層の内部に、前記外部電極と導通
した一対の内部電極層を有し、該内部電極層間に放電空
間を有する表面実装型サージ吸収素子において、前記内
部電極層と接していない前記放電空間の一部の内径が他
の内径より大きいことを特徴とする表面実装型サージ吸
収素子。
1. A surface having a pair of internal electrode layers electrically connected to said external electrodes inside an insulating layer made of an insulating ceramic sintered body having a pair of external electrodes, and having a discharge space between said internal electrode layers. A surface-mounted surge absorbing element, wherein an inner diameter of a part of the discharge space not in contact with the internal electrode layer is larger than another inner diameter.
【請求項2】 前記内部電極層間の絶縁層は3層以上の
シートにより形成することを特徴とする請求項1記載の
表面実装型サージ吸収素子の製造方法。
2. The method according to claim 1, wherein the insulating layer between the internal electrode layers is formed of three or more sheets.
【請求項3】 印刷法またはグリーンシート法により前
記絶縁層となるシートを形成し、印刷法により前記内部
電極層となるシートを形成し、該シートに前記放電空間
となる孔をせん断加工によって形成し、各々のシートを
圧着後、一体焼結することを特徴とする請求項1または
2記載の表面実装型サージ吸収素子の製造方法。
3. A sheet to be the insulating layer is formed by a printing method or a green sheet method, a sheet to be the internal electrode layer is formed by a printing method, and a hole to be the discharge space is formed in the sheet by a shearing process. 3. The method for manufacturing a surface-mounted surge absorbing element according to claim 1, wherein each of the sheets is pressure-bonded and then integrally sintered.
JP25297499A 1999-09-07 1999-09-07 Surface mounting type surge absorbing element and manufacture thereof Pending JP2001076839A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25297499A JP2001076839A (en) 1999-09-07 1999-09-07 Surface mounting type surge absorbing element and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25297499A JP2001076839A (en) 1999-09-07 1999-09-07 Surface mounting type surge absorbing element and manufacture thereof

Publications (1)

Publication Number Publication Date
JP2001076839A true JP2001076839A (en) 2001-03-23

Family

ID=17244753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25297499A Pending JP2001076839A (en) 1999-09-07 1999-09-07 Surface mounting type surge absorbing element and manufacture thereof

Country Status (1)

Country Link
JP (1) JP2001076839A (en)

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