JP2001044092A - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法

Info

Publication number
JP2001044092A
JP2001044092A JP11210507A JP21050799A JP2001044092A JP 2001044092 A JP2001044092 A JP 2001044092A JP 11210507 A JP11210507 A JP 11210507A JP 21050799 A JP21050799 A JP 21050799A JP 2001044092 A JP2001044092 A JP 2001044092A
Authority
JP
Japan
Prior art keywords
photomask
integrated circuit
circuit device
manufacturing
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11210507A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001044092A5 (https=
Inventor
Norio Hasegawa
昇雄 長谷川
Shoji Hotta
尚二 堀田
Hiroshi Fukuda
宏 福田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11210507A priority Critical patent/JP2001044092A/ja
Publication of JP2001044092A publication Critical patent/JP2001044092A/ja
Publication of JP2001044092A5 publication Critical patent/JP2001044092A5/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
JP11210507A 1999-07-26 1999-07-26 半導体集積回路装置の製造方法 Pending JP2001044092A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11210507A JP2001044092A (ja) 1999-07-26 1999-07-26 半導体集積回路装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11210507A JP2001044092A (ja) 1999-07-26 1999-07-26 半導体集積回路装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007084416A Division JP2007184640A (ja) 2007-03-28 2007-03-28 半導体集積回路装置の製造方法

Publications (2)

Publication Number Publication Date
JP2001044092A true JP2001044092A (ja) 2001-02-16
JP2001044092A5 JP2001044092A5 (https=) 2004-10-14

Family

ID=16590523

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11210507A Pending JP2001044092A (ja) 1999-07-26 1999-07-26 半導体集積回路装置の製造方法

Country Status (1)

Country Link
JP (1) JP2001044092A (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004077155A1 (ja) * 2003-02-27 2004-09-10 Fujitsu Limited フォトマスク及び半導体装置の製造方法
JP2009294308A (ja) * 2008-06-03 2009-12-17 Nec Electronics Corp パターン検証方法、パターン検証装置、プログラム、及び半導体装置の製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004077155A1 (ja) * 2003-02-27 2004-09-10 Fujitsu Limited フォトマスク及び半導体装置の製造方法
US7790335B2 (en) 2003-02-27 2010-09-07 Fujitsu Semiconductor Limited Photomask and manufacturing method of semiconductor device
JP2009294308A (ja) * 2008-06-03 2009-12-17 Nec Electronics Corp パターン検証方法、パターン検証装置、プログラム、及び半導体装置の製造方法

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