JP2001044092A5 - - Google Patents

Download PDF

Info

Publication number
JP2001044092A5
JP2001044092A5 JP1999210507A JP21050799A JP2001044092A5 JP 2001044092 A5 JP2001044092 A5 JP 2001044092A5 JP 1999210507 A JP1999210507 A JP 1999210507A JP 21050799 A JP21050799 A JP 21050799A JP 2001044092 A5 JP2001044092 A5 JP 2001044092A5
Authority
JP
Japan
Prior art keywords
light
wiring
gate electrode
region
resist pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1999210507A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001044092A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP11210507A priority Critical patent/JP2001044092A/ja
Priority claimed from JP11210507A external-priority patent/JP2001044092A/ja
Publication of JP2001044092A publication Critical patent/JP2001044092A/ja
Publication of JP2001044092A5 publication Critical patent/JP2001044092A5/ja
Pending legal-status Critical Current

Links

JP11210507A 1999-07-26 1999-07-26 半導体集積回路装置の製造方法 Pending JP2001044092A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11210507A JP2001044092A (ja) 1999-07-26 1999-07-26 半導体集積回路装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11210507A JP2001044092A (ja) 1999-07-26 1999-07-26 半導体集積回路装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007084416A Division JP2007184640A (ja) 2007-03-28 2007-03-28 半導体集積回路装置の製造方法

Publications (2)

Publication Number Publication Date
JP2001044092A JP2001044092A (ja) 2001-02-16
JP2001044092A5 true JP2001044092A5 (https=) 2004-10-14

Family

ID=16590523

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11210507A Pending JP2001044092A (ja) 1999-07-26 1999-07-26 半導体集積回路装置の製造方法

Country Status (1)

Country Link
JP (1) JP2001044092A (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4641799B2 (ja) * 2003-02-27 2011-03-02 富士通セミコンダクター株式会社 半導体装置の製造方法
JP5341399B2 (ja) * 2008-06-03 2013-11-13 ルネサスエレクトロニクス株式会社 パターン検証方法、パターン検証装置、プログラム、及び半導体装置の製造方法

Similar Documents

Publication Publication Date Title
JP2002107911A5 (https=)
WO2003019290A3 (en) Patterning an integrated circuit using a reflective mask
JP2002122976A5 (https=)
JP2009086384A5 (https=)
KR19980025511A (ko) 스티칭 노광 공정에 사용되는 마스크
JP2001044092A5 (https=)
EP1526406A4 (en) PHOTO MASK
JP2001203139A5 (https=)
JP2001110719A5 (https=)
US6238825B1 (en) Mask with alternating scattering bars
US6466373B1 (en) Trimming mask with semitransparent phase-shifting regions
US6635388B1 (en) Contact hole fabrication with the aid of mutually crossing sudden phase shift edges of a single phase shift mask
JP2008311502A (ja) パターン形成方法
JPH11135746A5 (https=)
ATE353450T1 (de) Photolithographie mit mehrstufigem substrat
KR970063431A (ko) 하프톤 위상 시프트 마스크를 사용한 반도체 디바이스의 제조 방법
JP3462650B2 (ja) レジスト露光方法及び半導体集積回路装置の製造方法
KR970076093A (ko) 포토 마스크의 정합 마크 배치 및 이를 이용한 노광 방법
KR960019486A (ko) 반도체소자의 콘택 마스크 제조방법
KR100340865B1 (ko) 반도체 소자의 콘택 형성용 마스크 및 그 제조방법
US20060257795A1 (en) Method for forming composite pattern including different types of patterns
KR100955187B1 (ko) 반도체소자의 퓨즈 형성방법
KR20070052913A (ko) 케이알에프 광원에서의 80나노미터 라인 형성 방법
KR920003493A (ko) 다수의 반도체 칩으로 구성되는 반도체집적회로장치 및 그 반도체 칩 사이의 배선의 형성방법
US20020110765A1 (en) Photolithography process for producing gates and conductive lines