JP2001007271A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the reliability in mounting of a semiconductor device as well as that in moisture-resistance. SOLUTION: A semiconductor chip 2 where an electrode is formed on the front surface among front and rear surfaces, a resin sealing body 5 for sealing the semiconductor chip 2, a first lead which is bonded and fixed to the front surface of the semiconductor chip 2 while electrically connected to an electrode on the front surface, and a second lead which is jointed to the first lead while used as an external terminal, are provided. The first lead is formed of such conductive material as oxidizing speed is slower than the second lead (Fe-Ni group metal material, for example), while the second lead is formed of such conductive material as is softer than the first lead (Cu group metal material, for example).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having leads extending inside and outside a resin sealing body and electrically connected to electrodes of a semiconductor chip. It is about effective technology.

[0002]

2. Description of the Related Art DRAM (DynamicRandumAccess
Memory), SRAM (StaticRandumAccessMem
ory) has a large capacity
The planar size tends to increase with the development. There
Semiconductors that seal these semiconductor chips with resin sealing bodies
For body devices, the die pad (tab)
Can also be applied to large semiconductor chips.
LOC (LeadOnChip) is adopted. LOC
The structure refers to the front and back surfaces of the semiconductor chip (one
Circuit type that is the surface (one main surface) of the surface and other main surfaces)
This is a structure in which leads are arranged on a surface. like this
By adopting a simple LOC structure, the flatness of the semiconductor chip
Even if the surface size is increased, the
Resin sealing area can be secured.
An increase in the plane size of the body can be suppressed.

A semiconductor device employing the LOC structure mainly includes a semiconductor chip having a plurality of electrodes (bonding pads) formed on a circuit forming surface, a resin sealing body for sealing the semiconductor chip, and a plurality of leads. And a configuration having: Each of the plurality of leads extends over the inside and outside of the resin sealing body, and has an internal lead portion located inside the resin sealing body and an external lead portion located outside the resin sealing body. It has become. The internal leads are bonded and fixed to the circuit forming surface of the semiconductor chip via an insulating resin film,
Further, it is electrically connected to an electrode on the circuit forming surface via a conductive wire. The external lead portion is used as an external terminal that is electrically and mechanically joined to a connection terminal (a part of a wiring) of the mounting substrate when the semiconductor device is mounted on the mounting substrate, and is, for example, a J-type or a gull-wing type. It is bent into a surface mount type lead shape.

A semiconductor device employing the LOC structure is disclosed in, for example, Japanese Patent Application Laid-Open No. 2-246125 (1).
(Published October 1, 990).

[0005]

Incidentally, in a semiconductor device using an external lead portion of the lead as an external terminal, a stress generated due to thermal expansion when the semiconductor device is soldered and mounted on a mounting board, or a stress after mounting, The stress generated due to the warpage of the mounting substrate can be reduced by the elastic deformation of the external lead portion. The amount of elastic deformation of the external lead is
Since the distance from the protruding portion (root portion) of the external lead portion protruding from the resin sealing body to the mounting substrate (hereinafter, referred to as a lead height) depends on the lead height, it is desirable to make the lead height as high as possible.

On the other hand, electronic devices have become smaller and lighter, and semiconductor devices incorporated in these electronic devices have been required to be thinner. In order to reduce the thickness of the semiconductor device, the lead height must be reduced. When the lead height is reduced, the amount of elastic deformation of the external lead decreases,
It is difficult to relieve the stress caused by thermal expansion when soldering the semiconductor device to the mounting board or the stress caused by the warpage of the mounted board after mounting due to the elastic deformation of the external leads. Since the problem that the mounting portion of the external lead portion soldered to the connection terminal of the substrate is peeled easily occurs, the reliability of the mounting of the semiconductor device is reduced.

Therefore, by manufacturing a semiconductor device using a lead frame made of a copper (Cu) -based metal material that is softer than an iron (Fe) -nickel (Ni) -based metal material, the external leads are elastically deformed. Therefore, even when the semiconductor device is thinned, it is possible to suppress the occurrence of a problem that the mounting portion of the external lead portion soldered to the connection terminal of the mounting board is peeled off. Further, since the Cu-based lead frame is superior in electrical conductivity and thermal conductivity as compared with the Fe-Ni-based lead frame, a semiconductor device excellent in high-speed operation and heat dissipation can be manufactured.

However, in the case of a semiconductor device employing the LOC structure, the following problems occur when manufactured using a Cu-based lead frame.

In the LOC structure, a semiconductor chip is attached to a lead frame (chip bonding) by thermocompression bonding. The thermocompression bonding is performed in a state where a bonding tool for pressing the heat stage on which the semiconductor chip is mounted and the leads of the lead frame are heated to, for example, about 400 ° C. On the other hand, the Cu-based lead frame has a faster oxidation rate when heated than the Fe-Ni-based lead frame. In particular, when the heating temperature is 300 ° C. or higher, the oxidation reaction is accelerated. Therefore, when the semiconductor chip is attached to the lead frame by thermocompression bonding, an oxide film that deteriorates the adhesiveness of the resin sealing body to the resin is formed on the surface of the internal lead portion of the lead. When the adhesiveness between the internal lead portion of the lead and the resin of the resin sealing body is deteriorated, a moisture path is easily formed at the interface between them, so that the reliability of the semiconductor device with respect to moisture resistance is reduced.

It is an object of the present invention to provide a technique capable of improving the reliability of mounting and the reliability of moisture resistance in a semiconductor device.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0012]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

(1) A semiconductor chip having an electrode formed on one of its front and back surfaces, a resin sealing member for sealing the semiconductor chip, and a resin sealing member extending over the inside and outside of the resin sealing member. A semiconductor device having a lead that is adhesively fixed to a surface of a semiconductor chip and electrically connected to an electrode on the surface, wherein the lead is a first lead that is adhesively fixed to a surface of the semiconductor chip. A second lead joined to the first lead and used as an external terminal, wherein the first lead is formed of a conductive material having a lower oxidation rate than the second lead. , Made of a conductive material softer than the first lead.

(2) In the semiconductor device described in the means (1), the second lead is joined to the first lead outside the resin sealing body.

(3) In the semiconductor device described in the means (1), the second lead is joined to the first lead inside the resin sealing body.

(4) In the semiconductor device according to the means (1), the second lead is formed by a first portion joined to the first lead outside the resin sealing body and a first portion connected to the first portion. A second bend toward the mounting surface side of the resin sealing body;
And a third portion that is bent from the second portion in the planar direction of the resin sealing body.

(5) In the semiconductor device described in the means (1), the second lead extends inside and outside the resin sealing body, and the first lead extends inside the resin sealing body.
A first portion joined to the lead, a second portion bent from the first portion to the mounting surface side of the resin sealing body, and a third portion bent from the second portion in a planar direction of the resin sealing body.
And a portion.

(6) In the semiconductor device described in the means (1), the first lead is provided on the semiconductor chip through an adhesive layer made of a thermosetting resin or an adhesive layer having a thermosetting resin layer. It is adhesively fixed to the surface.

(7) In the semiconductor device according to the means (1), the first lead is electrically connected to an electrode of the semiconductor chip via a conductive wire.

(8) In the semiconductor device according to the means (1), the first lead is formed of an iron-nickel metal material, and the second lead is formed of a copper metal material.

(9) A semiconductor chip having electrodes formed on the surface of the front and back surfaces, a resin sealing body for sealing the semiconductor chip, and a semiconductor chip bonded and fixed to the surface of the semiconductor chip. A first lead electrically connected to an electrode; and a second lead joined to the first lead and used as an external terminal. The first lead is connected to the second lead.
A method for manufacturing a semiconductor device, wherein the second lead is formed of a conductive material having a lower oxidation rate than the lead, and the second lead is formed of a conductive material softer than the first lead. After the step of bonding and fixing the first lead by thermocompression bonding, a step of joining the second lead to the first lead is provided.

[0022]

DETAILED DESCRIPTION OF THE INVENTION Hereinafter, the configuration of the present invention, a two-way lead array structure TSOP (T hin S mall O ut
-line P ackage) type will be described with embodiments in which the present invention is applied to a semiconductor device.

In the drawings for describing the embodiments, those having the same functions are denoted by the same reference numerals, and their repeated description will be omitted.

(Embodiment 1) FIG. 1 shows Embodiment 1 of the present invention.
FIG. 2 is a schematic cross-sectional view of the semiconductor device shown in FIG. 1, and FIG. 3 is a schematic cross-sectional view in which a part of FIG. 2 is enlarged.

As shown in FIGS. 1 and 2, the semiconductor device 1A according to the present embodiment mainly has a semiconductor chip 2, a plurality of leads 3, a resin sealing body 5, and the like.

The semiconductor chip 2 is sealed with a resin sealing body 5. The planar shape of the semiconductor chip 2 is formed in a square shape, and in this embodiment, is formed in a rectangular shape. The semiconductor chip 2 has, for example, a 64-Mbit DRAM
(D ynamic R andum A ccess M emory) consists of a storage circuit is built.

The semiconductor chip 2 is mainly formed of a semiconductor substrate, a multilayer wiring layer in which an insulating layer and a wiring layer are stacked in a plurality of stages on one main surface of the semiconductor substrate, and is formed so as to cover the multilayer wiring layer. The surface protection film (final protection film) is provided. The semiconductor substrate is formed of, for example, single crystal silicon, the insulating layer is formed of, for example, a silicon oxide film, and the wiring layer is formed of, for example, a metal film such as an aluminum (Al) film or an aluminum alloy film. The surface protective film is formed of, for example, a polyimide resin that can improve the α-ray resistance of the memory and can improve the adhesiveness to the resin of the resin sealing body 5.
In such a semiconductor chip 2, 3 × 10 to ⁶ [1
/ ° C].

The central portion of the circuit forming surface 2X which is the front surface (one main surface) of the front and back surfaces (one main surface and the other main surface facing each other) of the semiconductor chip 2 is arranged along the long side direction. A plurality of electrodes (bonding pads) BP are formed. Each of the plurality of electrodes BP is formed on the uppermost wiring layer of the multilayer wiring layers of the semiconductor chip 2. The uppermost wiring layer is covered with a surface protection film formed thereon, and a bonding opening exposing the surface of the electrode BP is formed in the surface protection film.

The planar shape of the resin sealing body 5 is formed in a square shape, and in this embodiment is formed in a rectangular shape. A plurality of leads 3 are arranged on each of the two long sides facing each other of the resin sealing body 5 along the long sides. Each of the plurality of leads 3 extends inside and outside the resin sealing body 5.

Of the plurality of leads 3, most of the leads 3 are configured to have the leads 11 and the leads 21 joined to the leads 11. The lead 11 extends inside and outside the resin sealing body 5, and has an internal lead portion located inside the resin sealing body 5 and an external lead portion located outside the resin sealing body 5. ing. The internal lead portion of the lead 11 is bonded and fixed to the circuit forming surface 2 </ b> X of the semiconductor chip 2 via an adhesive layer 14.
Are electrically connected to the electrodes BP via conductive wires 4. That is, in the semiconductor device 1A of the present embodiment, the L in which the leads 3 are arranged on the circuit forming surface 2X of the semiconductor chip 2
It is composed of OC (L ead O n C hip ) structure.

The lead 21 is electrically and mechanically joined to an external lead portion of the lead 11 outside the resin sealing body 5. The lead 21 is used as an external terminal, and is formed by, for example, bending into a gull wing type which is one of the surface mount type lead shapes. The connection between the lead 11 and the lead 21 is not limited to this, but is performed by, for example, welding.

As the wire 4, for example, a gold (Au) wire is used. As a method of connecting the wires, for example, a bonding method using ultrasonic vibration in combination with thermocompression bonding is used.
As the adhesive layer 4, for example, an insulating resin film in which a polyimide-based thermosetting resin layer is provided on both surfaces (front and back surfaces) of a polyimide-based resin base material is used.

The resin sealing body 5 is formed of, for example, an epoxy resin to which a phenol-based curing agent, silicone rubber, a filler and the like are added for the purpose of reducing stress. Silicon-rubber has an effect of reducing the elastic modulus and the thermal expansion coefficient of an epoxy resin. The filler is formed of, for example, spherical silicon oxide particles, and similarly has an effect of reducing the coefficient of thermal expansion. Such a resin sealing body 5 has a coefficient of thermal expansion of about 13 × 10 ⁶ [1 / ° C.].

The resin sealing body 5 is formed by a transfer molding method suitable for mass production. The transfer molding method uses a molding die having a pot, a runner, an inflow gate, a cavity, and the like, and injects a resin from the pot into the cavity through the runner and the inflow gate to seal the resin. It is a method of forming a body.

Lead 21 molded into a gull wing mold
As shown in FIG. 3, a first portion 21A joined to the lead 11 outside the resin sealing body 5 and a mounting surface of the resin sealing body 5 (the semiconductor device 1A is mounted) from the first portion 21A. The second portion 21B is bent toward the side (sometimes facing the mounting substrate) 5Y, and the third portion 21C is bent from the second portion 21B in the plane direction of the resin sealing body 5. When the semiconductor device 1A is mounted on the mounting board by soldering, the third portion 21C is joined to the connection terminals (part of the wiring) of the mounting board by soldering.

External Lead of Lead 11 and Lead 21
The third portion 21A is vertically stacked (in the thickness direction of the resin sealing body 5), and in this embodiment, the third portion 21A of the lead 21 is located on the mounting surface 5Y side of the resin sealing body 5. The layers are stacked in a state (a state positioned below the external lead portion of the lead 11).

Reference numeral 13 shown in FIG. 2 is a bus bar lead. The busbar lead 13 is disposed between the tip of one end of the lead 3 and the electrode BP of the semiconductor chip 2,
The electrodes extend along the direction in which the electrodes BP are arranged. The bus bar lead 13 is integrated with the lead 3 to which a power supply potential (for example, 5 [V]) or a reference potential (for example, 0 [V]) is applied among the plurality of leads 3.

The semiconductor device 1A thus configured is
It is manufactured by an assembly process using two lead frames.

Next, two lead frames used for manufacturing the semiconductor device 1A will be described. FIG. 4 is a schematic plan view of the first lead frame, and FIG. 5 is a schematic plan view of the second lead frame. Although the actual lead frame has a multiple structure so that a plurality of semiconductor devices can be manufactured, FIGS. 4 and 5 show one region where one semiconductor device is manufactured, in order to make the drawings easy to see. Is shown.

As shown in FIG. 4, a first lead frame LF1 has a plurality of leads 11, four bus bar leads 13,
The configuration is such that two adhesive layers 14 made of a resin film, two suspension leads 15, a plurality of T-shaped leads 16, and the like are arranged.

A plurality of leads 11 and T-shaped leads 16
Is divided into two lead groups. Respective leads 11 and T-shaped leads 16 of one lead group are arranged along the extending direction of one of the two long-side frame portions of the frame body 10 facing each other. . The respective leads 11 and T-shaped leads 16 of the other lead group are arranged along the extending direction of the other long side frame of the two long side frames facing each other of the frame 10. . The respective leads 11 and T-shaped leads 16 of the one and the other lead groups are connected to each other by a tie bar 12 at their leading ends led out of the resin sealing body, and further connected to and supported by the frame body 10. I have. That is, the lead frame LF1 has a two-way lead arrangement structure in which a plurality of leads 11 and T-shaped leads 16 are arranged in two rows in the vertical direction in FIG.

Each of the plurality of leads 11 is bonded and fixed to the circuit forming surface 1X of the semiconductor chip 2 via the bonding layer 14 in the process of assembling the semiconductor device 1A.
It is electrically connected to the electrode BP of the semiconductor chip 2 via the wire 4. The leads 11 are bonded and fixed by thermocompression bonding.

The tie bar 12 will be described in detail later.
When forming the resin sealing body 5 based on the transfer molding method, it is used as a dam bar for preventing the molten resin from leaking out of the cavity of the molding die.

Of the four bus bar leads 13, the two bus bar leads 13 are the first stage of the plurality of leads 11 arranged along the extending direction of one long side frame portion of the frame 10. Connected to the leads 11 located at the middle and final stages,
These leads 11 are integrated. Of the four bus bar leads 13, the other two bus bar leads 13
Are connected to the first, middle, and last leads 11 of the plurality of leads 11 arranged along the extending direction of the other long side frame portion of the frame body 10, and these leads 11
It is integrated with.

Each of the two adhesive layers 14 made of a resin film extends so as to straddle a plurality of leads 11,
These leads 11 are bonded and fixed to the back surface opposite to the wire bonding surface.

Each of the two suspension leads 15 is
Are connected to and supported by the two short side frame portions facing each other. In the assembly process of the semiconductor device 1A, each of the two suspension leads 15 is connected to the lead frame LF1.
This is for supporting the resin sealing body 5 on the frame body 10.

As shown in FIG. 5, the second lead frame LF2 has a configuration in which a plurality of leads 21 and the like are arranged in a region surrounded by a frame 20 having a rectangular plane.

Each of the plurality of leads 21 is divided into two lead groups. Each lead 2 in one lead group
Numerals 1 are arranged along the extending direction of one of the long side frames of the two long side frames facing each other of the frame body 20.
The respective leads 21 of the other lead group are arranged along the extending direction of the other long side frame portion of the two long side frame portions of the frame body 20 facing each other. Each of the leads 21 of the one and the other lead groups is connected to each other at one end by a tie bar 22 and further connected to and supported by the frame 20. Further, each of the leads 21 of the one and the other lead groups has the other end thereof connected to and supported by the frame 20. That is, the lead frame LF2 has a two-way lead arrangement structure in which a plurality of leads 21 are arranged in two rows in the vertical direction in FIG.

Each of the leads 21 is connected to the semiconductor device 1
In the assembling process of A, it is joined to the corresponding lead 11 and T-shaped lead 16 of the lead frame LF1.

The lead frame LF1 is mainly formed by etching or pressing a metal plate to form a predetermined lead pattern, thereafter, bending the lead 11, and then applying a resin film to the back surface of the lead 11. It is formed by adhering an adhesive layer 14 formed. On the other hand, the lead frame LF2 is mainly formed by etching or pressing a metal plate to form a predetermined lead pattern.

The lead frame LF1 is made of, for example, iron (F
e)-formed of a nickel (Ni) -based metal material (for example, a Ni content of 42 or 50 [%]). On the other hand, the lead frame LF2 is formed of, for example, a copper (Cu) -based metal material (for example, an alloy material containing Cu as a main component). F
The e-Ni-based metal material has a lower oxidation rate than the Cu-based metal material, and the Cu-based metal material is softer than the Fe-Ni-based metal material. That is, the lead 11 thermocompression-bonded to the circuit forming surface 2X of the semiconductor chip 2 is formed of a conductive material having a lower oxidation rate than the lead 21 used as an external terminal. It is formed of a conductive material that is softer than the leads 11 that are thermocompression-bonded to the circuit forming surface 2X.

Fe—Ni (eg, Ni content 42
[%])-Based metal material has a thermal expansion coefficient of about 5 × 10 to ⁶ [1 / ° C.] and a longitudinal elastic coefficient of about 147.1 [GPa]. A metal material of Cu (for example, an alloy material containing Cu as a main component) has a thermal expansion coefficient of about 17 × 10 to ⁶ [1 / ° C.],
It has a longitudinal elastic modulus of about 27 [GPa].

In the lead frame LF2,
No suspension lead is provided for supporting the resin sealing body in the assembly process of the semiconductor device 1A.

Next, the manufacture of the semiconductor device 1A will be described with reference to FIGS.

FIG. 6 is a flowchart for explaining the manufacture of a semiconductor device, FIG. 7 is a schematic sectional view for explaining a chip bonding step, and FIG. 8 is a schematic view for explaining a wire bonding step. FIG.
FIG. 9 is a schematic sectional view for explaining a resin sealing step, and FIG. 10 is a schematic sectional view for explaining a lead bonding step.

First, the semiconductor chip 2 is mounted on the lead frame LF1 (A). As shown in FIG. 7, the semiconductor chip 2 is mounted on the heat stage 41, and then the leads 11 are pressure-bonded to the circuit forming surface 2X of the semiconductor chip 2 via the bonding layer 14 by the bonding tool 42. It is done by doing. Lead 11
The pressure bonding is performed, for example, by heating the heat stage 41 and the bonding tool 40 to about 400 ° C.
This is performed by applying a pressure of about [Kg]. That is, the attachment of the semiconductor chip 2 is performed by thermocompression bonding.

In this step, the lead 11 is made of Fe-N
i-based metal material (eg, Ni content 42 or 50 [%])
It is formed with. This Fe—Ni-based metal material has a lower oxidation rate at room temperature and during heating than the Cu-based metal material conventionally used as a lead frame material, and is excellent in oxidation resistance. Therefore, even if the lead 11 is heated during thermocompression bonding, an oxide film that deteriorates the adhesiveness of the resin sealing body 5 to the resin is not formed on the surface of the lead 11.

Next, the electrode BP of the semiconductor chip 2 and the lead 11 are electrically connected by the conductive wire 4 <B>.
As the wire 4, for example, a gold (Au) wire is used.
As a method for connecting the wires 4, for example, a ball bonding (nail head bonding) method that uses ultrasonic vibration in combination with thermocompression bonding is used. The connection of the wires 4 by the ball bonding method is performed while the semiconductor chip 2 and the leads 11 are mounted on the heat stage 42 and the heat stage 42 is heated to, for example, about 150 to 300 ° C., as shown in FIG. Will be At this time, the lead 11 is heated by the heat stage 42.
Is formed of a Fe—Ni-based metal material, an oxide film that deteriorates the adhesiveness of the resin sealing body 5 to the resin is not formed on the surface of the lead 11.

Next, as shown in FIG.
Upper mold 50A and lower mold 50B of molding die 50 of the molding apparatus
And the lead frame LF1 is positioned. At this time, the inside of the cavity 51 formed by the upper mold 50A and the lower mold 50B contains the semiconductor chip 2, the wires 4, the internal leads of the leads 11, the bus bar leads 13, the suspension leads 15, and the T-shaped leads 16. A lead portion and the like are arranged.

Next, a fluid resin is injected under pressure from the pot of the molding die 50 into the cavity 51 through the runner and the inflow gate to form the resin sealing body 5 (C). At this time, the semiconductor chip 2, the wires 4, the internal lead portions of the leads 11, the bus bar leads 13, the suspension leads 15, and the internal lead portions of the T-shaped leads 16 are sealed by the resin sealing body 5. As the resin, an epoxy-based thermosetting resin to which a phenol-based curing agent, silicone rubber, filler, and the like are added is used.

In this step, since no oxide film is formed on the surface of the lead 11 so as to deteriorate the adhesiveness of the resin sealing body 5 to the resin, the internal lead portion of the lead 11 and the resin sealing body 5 No water path is formed at the interface with the resin.

Next, from the molding die 50, the lead frame L
F1 is taken out, and thereafter, as shown in FIG. 10, the lead frame LF1 and the lead frame LF2 are overlapped, and then the leads 11 and T of the lead frame LF1 are placed.
The D-shaped leads 16 and the leads 21 of the lead frame LF2 corresponding to these leads are electrically and mechanically joined <D>. The superposition of the lead frames LF1 and LF2 is performed in a state where the lead frame LF2 is located on the mounting surface 5Y side of the resin sealing body 5. Lead joining is performed by, for example, laser welding suitable for micromachining. Joining by laser welding is performed at a position away from the resin sealing body 5. Specifically, this is performed by irradiating the tip S of the lead 11 with laser light from above. Thus, the lead 3 having the lead 11 and the lead 21 joined to the lead 11 is formed.

By the way, in laser welding, a laser beam is applied to a joint portion of a lead and the joint portion of the lead is melted and joined, so that the melted material scatters around due to the irradiation power of the laser beam. When the scattered object comes to the circuit forming surface of the semiconductor chip, the scattered object is in a high temperature state, so that the surface protection film of the semiconductor chip is thermally damaged, and the wiring under the surface protection film is disconnected or is adjacent to the surface protection film. Problems such as short-circuiting between wirings occur. In order to prevent such a problem from occurring, it is effective to perform lead bonding after forming the resin sealing body 5 as in the present embodiment.
The reason is that, since the circuit forming surface 2X of the semiconductor chip 2 is covered with the resin of the resin sealing body 5, the scattered matter generated at the time of welding does not fly to the circuit forming surface 2X of the semiconductor chip 2.

After the wire bonding step <B> for electrically connecting the electrodes BP of the semiconductor chip 2 and the leads 11 with the wires 4, the resin sealing step <C for forming the resin sealing body 5 is performed. If the lead joining step <D> for joining the lead 11 and the lead 21 is performed before <>, the disadvantage that the wire 4 is deformed in the lead joining step <D> is likely to occur, but in this embodiment, Since the lead bonding step <D> is performed after the resin sealing step <C>, it is possible to substantially eliminate the occurrence of a problem that the wire 4 is deformed in the lead bonding step <D>.

Next, two tie bars (12,
22) is simultaneously cut with a cutting die <E>, and then, in order to ensure solder wettability during mounting and improve corrosion resistance,
The external lead portion of the lead 11 and the lead 21 are plated, and the surfaces thereof are, for example, lead (Pb) -tin (S
n) Form a conductive film (plating film) made of a material having the composition <F>. The conductive film is formed by an electrolytic plating method which has high controllability of the film thickness and is suitable for miniaturized leads.

Next, the lead 21 is cut from the frame body 20 of the lead frame LF2, and thereafter, the lead 21 is bent into a gull-wing type lead shape which is one of the surface mount type lead shapes <G>. In this step, the frame 20 of the lead frame LF2 is removed.

Next, the suspension leads 15 are cut from the frame 10 of the lead frame LF1 <H>. As a result, FIG.
The semiconductor device 1A shown in FIGS.

The semiconductor device 1A thus configured is
As shown in FIG. 11 (a schematic cross-sectional view of a state where the semiconductor device is mounted on the mounting substrate), the semiconductor device is mounted on the mounting substrate 30. The third portion 21C of the lead 21 is connected to the connection terminal (part of the wiring) 30A of the mounting board 30 by a solder material (for example, a solder material having a Pb-Sn composition).
31 electrically and mechanically joined together. The mounting of the semiconductor device 1A is not limited to this. For example, a solder paste layer is formed on the connection terminals 30A of the mounting board by a screen printing method, and then the lead is formed on the connection terminals 30A via the solder paste layer. The third portion 21C of 21 is disposed, and then the mounting substrate 30 is transferred to an infrared reflow furnace, and then the solder paste layer is melted and hardened. Thereby, the semiconductor device 1A is mounted on the mounting board 30.

In the mounting process of this semiconductor device 1A,
The lead 21 is formed of a Cu-based metal material (for example, an alloy material containing Cu as a main component). This Cu-based metal material is
F which has been conventionally used as a lead frame material
e-Ni based metal material (for example, Ni content 42 or 50)
[%]) And has a smaller longitudinal elastic modulus and is softer. Therefore, the lead 21 used as an external terminal is easily elastically deformed. Therefore, even if the lead height is reduced due to the thinning of the semiconductor device 1A, the semiconductor device 1A is mounted on the mounting substrate 30.
Can be alleviated due to thermal expansion at the time of soldering and mounting, and the occurrence of such a problem that the third portion 21C of the lead 21 soldered to the connection terminal 30A of the mounting board 30 peels off is suppressed. be able to.

Further, the stress generated due to the warpage of the mounting board 30 after mounting can be reduced, and the third portion 21C of the lead 21 soldered to the connection terminal 30A of the mounting board 30 peels off. Generation can be suppressed.

In particular, since the mounting substrate incorporated in a small electronic device such as a mobile phone, a portable information processing terminal device, or a portable personal computer has a small thickness and is easily warped, the stress due to the warping of the mounting substrate is reduced by the elasticity of the lead. It is important to relax by deformation.

As described above, according to the present embodiment, the following effects can be obtained.

(1) In the semiconductor device 1A, the lead 3
Has a lead 11 bonded and fixed to the circuit forming surface 2X of the semiconductor chip 2 via an adhesive layer 14, and a lead 21 bonded to the lead 11 and used as an external terminal. The lead 11 is formed of a Fe-Ni-based metal material (for example, a Ni content of 42 or 50 [%]) whose oxidation rate is lower than that of a Cu-based metal material (for example, an alloy material containing Cu as a main component). . The lead 21 is made of Fe
-Ni-based metal material (for example, Ni content 42 or 50)
[%]), And is made of a Cu-based metal material (for example, an alloy material mainly containing Cu).

With such a configuration, when the lead 11 is bonded and fixed to the circuit forming surface 2X of the semiconductor chip 2 by thermocompression bonding, even if the lead 11 is heated, the lead 11 is not adhered to the resin. An oxide film that deteriorates the adhesiveness is not formed on the surface of the lead 11. Therefore, lead 1
The moisture path formed at the interface between the resin 1 and the resin of the resin sealing body 5 can be suppressed.

On the other hand, since the leads 21 are easily elastically deformed, even if the height of the leads is reduced due to the thinning of the semiconductor device 1A, the leads 21 are not affected by thermal expansion when the semiconductor device 1A is mounted on the mounting board 30 by soldering. The stress generated due to the warpage of the mounting substrate 30 during mounting and the stress generated due to the warpage of the mounting substrate 30 can be reduced by the elastic deformation of the lead 21, and the mounting of the lead 21 soldered to the connection terminal 30 </ b> A of the mounting substrate 30 It is possible to suppress the occurrence of a problem that the portion 21C is peeled off.

As a result, the reliability for mounting the semiconductor device 1A and the reliability for moisture resistance can be improved.

Further, since the reliability of the mounting of the semiconductor device 1A and the reliability of the humidity resistance can be improved, the thickness of the semiconductor device 1A can be reduced.

(2) In manufacturing the semiconductor device 1A, the joining of the lead 11 and the lead 21 by laser welding is performed after the resin sealing body 5 is formed.

Thus, when the lead 11 and the lead 21 are joined by laser welding, since the circuit forming surface 2X of the semiconductor chip 2 is covered with the resin of the resin sealing body 5, the scattered matter generated during welding is formed. The (hot melt) does not fly to the circuit forming surface 2X of the semiconductor chip 2. As a result, the scattered objects fly to the circuit forming surface 2X of the semiconductor chip 2 to thermally damage the surface protection film, thereby breaking the wiring under the surface protection film or shorting adjacent wirings. Therefore, the yield of the semiconductor device 1A can be improved.

(3) In the manufacture of the semiconductor device 1A, the bonding between the lead 11 and the lead 21 is performed after the resin sealing body 5 is formed.

As a result, it is possible to substantially eliminate the problem that the wire 4 is deformed in the lead bonding step <D>, and it is possible to improve the yield of the semiconductor device 1A.

In this embodiment, as the lead frame material, a Cu-based metal material (for example, an alloy material containing Cu as a main component) and an Fe—Ni-based metal material (for example, a Ni content of 42 or 50%) are used. ) Has been described,
Other materials may be used for the lead frame. However, a conductive material having a lower oxidation rate than the lead frame having the lead 21 is used in the lead frame having the lead 11, and a conductive material softer than the lead frame having the lead 11 is used in the lead frame having the lead 21. There is a need.

In the present embodiment, an example has been described in which the lead 11 and the lead 21 are joined by laser welding. However, the lead 11 and the lead 21 may be joined by other joining means. As joining means, for example,
Examples include solder immersion or solder plating by solder plating.

In the present embodiment, an example was described in which an insulating resin film having a thermosetting resin layer provided on both surfaces (front and back surfaces) was used as the adhesive layer 14, An insulating resin film made of a plastic resin may be used.

The adhesive layer 14 may be formed by applying an adhesive made of, for example, a thermosetting resin to the circuit forming surface 2X of the semiconductor chip 2 or the chip fixing surface of the lead 11.

Incidentally, the chip bonding step <A>
If the lead bonding step <D> is performed before the above, an oxide film is formed on the surface of the lead 21 in the chip bonding step <A>, but the lead 21 of the present embodiment is disposed outside the resin sealing body 5. Therefore, even if an oxide film is formed on the surface of the lead 21, the adhesiveness of the resin sealing body 5 to the resin is not adversely affected. Therefore, the lead bonding step <D> may be performed before the chip bonding step <A>. Also in this case, it is possible to substantially eliminate the occurrence of a problem that the wire 4 is deformed in the lead bonding step <D>. However, it is necessary to take measures to prevent flying matter generated during welding from flying to the circuit forming surface 2X of the semiconductor chip 2.

Further, since the leads 21 of this embodiment are arranged outside the resin sealing body 5, the lead bonding step <A> after the chip bonding step <A> and before the wire bonding step <B>. D>, the resin sealing body 5
Does not adversely affect the adhesiveness with the resin. Also in this case, in the lead bonding step <D>, the wire 4
It is possible to substantially eliminate the occurrence of inconveniences such as the deformation of the. However, it is necessary to take measures to prevent flying matter generated during welding from flying to the circuit forming surface 2X of the semiconductor chip 2.

Further, since the leads 21 of this embodiment are arranged outside the resin sealing body 5, the lead bonding step is performed after the wire bonding step <B> and before the resin sealing step <C>. Performing <D> does not adversely affect the adhesion of the resin sealing body 5 to the resin. However, in this case,
In the lead joining step <D>, a problem such as deformation of the wire 4 is likely to occur, so it is necessary to take measures to prevent the wire from being deformed. In addition, it is necessary to take measures to prevent flying matter generated during welding from flying to the circuit forming surface 2X of the semiconductor chip 2.

(Embodiment 2) FIG. 12 is a schematic sectional view of a semiconductor device according to Embodiment 2 of the present invention.

As shown in FIG. 12, the semiconductor device 1B of the present embodiment has basically the same configuration as that of the first embodiment, but differs in the following configuration.

That is, each of the lead 11 and the lead 21
The third part 2 of the lead 21 on the external lead part of the lead 11
1A are stacked (the external lead portion of the lead 11 is positioned on the mounting surface 5Y side of the resin sealing body 5). By adopting such a configuration, the distance from the third portion 21A of the lead 21 to the mounting board becomes longer than in the first embodiment, so that the amount of elastic deformation of the lead 21 increases. As a result, in the semiconductor device 1B, the reliability for mounting can be further improved.

(Embodiment 3) FIG. 13 is a schematic sectional view of a semiconductor device according to Embodiment 3 of the present invention.

As shown in FIG. 13, the semiconductor device 1C of the present embodiment has basically the same configuration as that of the above-described first embodiment, but differs in the following configuration.

That is, each of the lead 11 and the lead 21
It is joined inside the resin sealing body 5. Lead 1
1 is located inside the resin sealing body 5, and the lead 21 extends inside and outside the resin sealing body 5.

The lead 21 is formed into a gull wing type, which is one of the surface mount type lead shapes. In the present embodiment, the lead 21 formed into a gull wing type is used.
As shown in FIG. 14, the first portion 21A extends inside and outside the resin sealing body 5 and is joined to the lead 21 inside the resin sealing body 5, and the first portion 21A Second portion 21B bent toward mounting surface 5A side of sealing body 5
And a third portion 21C that is bent from the second portion 21B in the planar direction of the resin sealing body 5.

The semiconductor device 1C thus configured is
The lead frame LF3 shown in FIG. 15 (schematic plan view) and the lead frame LF4 shown in FIG. 16 (schematic plan view)
It is manufactured by an assembling process. Although an actual lead frame has a multiple structure so that a plurality of semiconductor devices can be manufactured, FIGS. 15 and 16 show one region where one semiconductor device is manufactured, in order to make the drawings easy to see. Is shown.

As shown in FIG. 15, the lead frame LF3 has basically the same configuration as the lead frame LF1 used in the first embodiment described above, and differs in the following configuration.

That is, the lead 11 is separated from the tie bar 12 and is adhered and fixed to the adhesive layer 14 made of a resin film. The tie bar 12 extends from one short side frame of the frame 10 to the other short side frame, and is connected to and supported by the frame 10.

As shown in FIG. 16, the lead frame LF4 has basically the same configuration as that of the lead frame LF2 used in the first embodiment, and the following configuration is different.

That is, the lead 21 extends so as to cross the tie bar 22, and has one end projecting toward the resin sealing side (center region side) from the tie bar 22.

Next, the manufacture of the semiconductor device 1C will be described with reference to FIGS. FIG. 17 is a schematic cross-sectional view for explaining a chip bonding step, and FIG. 18 is a schematic cross-sectional view for explaining a lead bonding step.

First, the semiconductor chip 2 is mounted on the lead frame LF3. The mounting of the semiconductor chip 2 is shown in FIG.
As shown in FIG. 7, the bonding is performed by bonding and fixing the leads 11 to the circuit forming surface 2X of the semiconductor chip 2 via an adhesive layer 14 by thermocompression bonding.

In this step, the lead 11 is made of Fe-N
i-based metal material (eg, Ni content 42 or 50 [%])
Therefore, even when the lead 11 is heated during thermocompression bonding, an oxide film that deteriorates the adhesiveness of the resin sealing body 5 to the resin is not formed on the surface of the lead 11.

Next, as shown in FIG. 18, the lead frame LF3 and the lead frame LF4 are overlapped, and then the lead 11 of the lead frame LF3 and the lead 21 of the lead frame LF4 corresponding to the lead 11 are electrically connected. Mechanically and mechanically. Lead frame LF3
And LF4 are overlapped with lead frame LF3 placed on lead frame LF2. Lead joining is performed by laser welding. Joining by laser welding is performed by irradiating a laser beam to the tip S of the lead 11 from below. By this step, the lead 11 and the lead 2
The lead 3 having the lead 21 bonded to the lead 1 is formed.

In this step, since the lead bonding step is performed before the wire bonding step, it is possible to substantially eliminate the problem that the wire 4 is deformed in the lead bonding step.

In this step, since the lead bonding step is performed after the chip bonding step, an oxide film is formed on the surface of the lead 21 so as to deteriorate the adhesiveness of the resin sealing body 5 to the resin. Never. The lead 21 of the present embodiment is partially (internal lead portion) formed of the resin sealing body 5.
When an oxide film is formed on the surface of the lead 21, the adhesiveness between the internal lead portion of the lead 21 and the resin of the resin sealing body 5 is deteriorated. Therefore, it is desirable that the lead bonding step be performed after the chip bonding step and before the wire bonding step.

Next, the electrodes BP of the semiconductor chip 2 and the leads 11 are electrically connected by the conductive wires 4. As a method for connecting the wires 4, for example, a ball bonding method using ultrasonic vibration in combination with thermocompression bonding is used. At this time, the lead 11 is heated by the heat stage. However, since the lead 11 is formed of a Fe—Ni-based metal material, an oxide film that deteriorates the adhesiveness of the resin sealing body 5 to the resin is formed. It is not formed on the surface of the lead 11.

Next, the lead frames LF3 and LF4 are positioned between the upper mold and the lower mold of the molding die of the transfer molding apparatus. At this time, inside the cavity formed by the upper die and the lower die, the semiconductor chip 2, the wires 4, the leads 11, the bus bar leads 13, the suspension leads 15, the internal leads of the leads 21, and the like are arranged.

Next, a fluid resin is injected into the cavity from the pot of the molding die through the runner and the inflow gate under pressure to form the resin sealing body 5. At this time, the semiconductor chip 2, the wires 4, the leads 11, the bus bar leads 13, the suspension leads 15, and the internal lead portions of the leads 21 are sealed by the resin sealing body 5.

In this step, since no oxide film is formed on the surfaces of the leads 11 and 21 so as to deteriorate the adhesiveness of the resin sealing body 5 to the resin,
In addition, a water path is not formed at the interface between the internal lead portion of the lead 21 and the resin of the resin sealing body 5.

Thereafter, by performing the same manufacturing steps as in the first embodiment, the semiconductor device 1C shown in FIG. 13 is almost completed.

As described above, also in the semiconductor device 1C having the lead 3 in which each of the lead 11 and the lead 21 is joined inside the resin sealing body 5, the reliability for mounting and the reliability are improved as in the first embodiment. It is possible to improve the reliability against moisture resistance.

Further, since the lead bonding step is performed after the chip bonding step and before the wire bonding step, it is possible to substantially eliminate the occurrence of defects such as deformation of the wire 4 in the lead bonding step. Can be.

(Embodiment 4) FIG. 19 is a schematic sectional view of a semiconductor device according to Embodiment 4 of the present invention.

As shown in FIG. 19, the semiconductor device 1D of the present embodiment has basically the same configuration as that of the above-described first embodiment, but differs in the following configuration.

That is, in the semiconductor device 1D, two semiconductor chips 2 are vertically stacked, and the two semiconductor chips 2
Is sealed with one resin sealing body 5. The two semiconductor chips 2 are stacked with their back surfaces facing each other.

Among the plurality of leads 3 extending over the inside and outside of the resin sealing body 5, the majority of the leads 3
A, lead 51B and these leads (51A, 51A)
B) is configured to have a lead 21 bonded thereto. Each of the leads 51 </ b> A and 51 </ b> B extends inside and outside the resin sealing body 5, and has an internal lead part located inside the resin sealing body 5 and an external lead part located outside the resin sealing body 5. It has the structure which has. The internal lead portion of the lead 51A is adhered and fixed to the circuit forming surface 2X of the one semiconductor chip 2 via the adhesive layer 14, and is further electrically connected to the electrode BP of the one semiconductor chip 2 via the conductive wire 4. It is connected to the. The internal lead portion of the lead 51B is bonded and fixed to the circuit forming surface 2X of the other semiconductor chip 2 via the bonding layer 14, and furthermore, the electrode BP of the other semiconductor chip 2
Are electrically connected to each other through a conductive wire 4.

The leads 21 are electrically and mechanically connected to the respective external lead portions of the leads 51A and 51B outside the resin sealing body 5. Leads 51A, 51
Each of B and 21 is joined with the one end portion (first portion 21A) of the lead 21 disposed between the external lead portion of the lead 51A and the external lead portion of the lead 51B.

The semiconductor device 1D thus configured is
The lead frame LF5 shown in FIG. 20 (a schematic plan view)
It is manufactured by an assembling process using the lead frame LF6 shown in FIG. 21 (schematic plan view) and the lead frame LF2 shown in FIG. Although the actual lead frame has a multiple structure so that a plurality of semiconductor devices can be manufactured, FIGS. 20 and 21 show one region where one semiconductor device is manufactured, in order to make the drawings easy to see. Is shown.

As shown in FIG. 20, the lead frame LF5 has basically the same structure as the lead frame LF1 used in the first embodiment, and the number of the adhesive layers 14 attached to the leads 51A is Are different.

As shown in FIG. 21, the lead frame LF6 has basically the same configuration as the lead frame LF5, and the arrangement pattern of the leads 51B is slightly different.

Next, the manufacture of the semiconductor device 1D will be described with reference to FIGS. FIG. 22 is a schematic cross-sectional view for explaining a chip bonding step, FIG. 23 is a schematic cross-sectional view for explaining a wire bonding step, and FIG. 24 is a schematic cross-section for explaining a lead bonding step. FIG.

First, lead frames LF5, LF6 and LF2 are prepared.

Next, one semiconductor chip 2 is attached to the lead frame LF5, and the other semiconductor chip 2 is attached to the lead frame LF6. As shown in FIG. 22A, the semiconductor chip 2 is attached to the circuit forming surface 2X of the semiconductor chip 2 with the leads 51A interposed therebetween via the adhesive layer 14.
By thermocompression bonding. As shown in FIG. 22B, the other semiconductor chip 2 is attached by bonding and fixing the leads 51B to the circuit forming surface 2X of the semiconductor chip 2 via the adhesive layer 14 by thermocompression.

In this step, the leads 51A and 51A
Since B is formed of an Fe—Ni-based metal material (for example, Ni content 42 or 50 [%]), even if the leads 51A and 51B are heated at the time of thermocompression bonding, the resin B and the resin of the resin sealing body 5 are not bonded. An oxide film that deteriorates the adhesiveness is not formed on the surfaces of the leads 51A and 51B.

Next, as shown in FIGS. 23A and 23B, the electrodes BP of one semiconductor chip 2 and the leads 51A are electrically connected by conductive wires 4, and the other semiconductor chip 2 Of the conductive wire 4 with the electrode BP and the lead 51B.
To make an electrical connection. As a method for connecting the wires 4, for example, a ball bonding method using ultrasonic vibration in combination with thermocompression bonding is used. At this time, the leads 51A and 51B are heated by the heat stage 42, but since the leads 51A and 51B are formed of a Fe—Ni-based metal material, the adhesiveness of the resin sealing body 5 to the resin is deteriorated. Such an oxide film is not formed on the surfaces of the leads 51A and 51B.

Next, as shown in FIG. 24, the lead frames LF5, LF6 and LF2 are overlapped, and then the leads 51A and 51B are electrically and mechanically joined to the leads 21 corresponding to these leads. I do. The superposition of the lead frames LF5, LF6 and LF2 is performed such that the lead frame LF2 is located at the center. Lead joining is performed by laser welding. The joining by laser welding is performed by irradiating a laser beam to the tip portion S from above the lead 51A, and further, by applying a laser beam from above the lead 51B.
Is irradiated with laser light. By this step, the lead 5
1A, lead 51B and these leads (51A, 51A).
The lead 3 having the lead 21 bonded to B) is formed.

Next, lead frames LF5 and LF5 are placed between the upper and lower molds of the molding die of the transfer molding apparatus.
Position F6 and LF2. At this time, inside the cavity formed by the upper mold and the lower mold, the two semiconductor chips 2, the wires 4, the internal leads of the leads 51A,
The internal lead portion of the lead 51B, the bus bar lead 13, the suspension lead 15, and the like are arranged.

Next, a fluid resin is injected under pressure from the pot of the molding die through the runner and the inflow gate into the cavity to form the resin sealing body 5. At this time, the resin chip 5 seals the semiconductor chip 2, the wires 4, the internal leads of the leads 51A, the internal leads of the leads 51B, the bus bar leads 13, the suspension leads 15, and the like.

In this step, the leads 51A and 51A
Since no oxide film is formed on the surface of B to deteriorate the adhesiveness of the resin sealing body 5 to the resin, the lead 51A
No moisture path is formed at the interface between the resin and the resin of the resin sealing body 5.

Thereafter, by performing the same manufacturing steps as in the first embodiment, the semiconductor device 1D shown in FIG. 19 is almost completed.

As described above, in the semiconductor device 1D in which the two semiconductor chips 2 are stacked and the two semiconductor chips 2 are sealed with the single resin sealing body 5, the semiconductor device 1D according to the first embodiment is also used.
Similarly to the above, the reliability for mounting and the reliability for moisture resistance can be improved.

Since the lead 21 of the present embodiment is disposed outside the resin sealing body 5, even if an oxide film is formed on the surface of the lead 21, the adhesion of the resin of the resin sealing body 5 to the resin is improved. There is no adverse effect. Therefore, the lead bonding step may be performed after the chip bonding step and before the wire bonding step. Also in this case, it is possible to substantially eliminate the occurrence of a problem that the wire 4 is deformed in the lead bonding step.

Further, since the leads 21 of the present embodiment are located outside the resin sealing body 5, a lead bonding step may be performed after the resin sealing step. Also in this case, it is possible to substantially eliminate the occurrence of a problem that the wire 4 is deformed in the lead bonding step. In addition, the scattered matter at the time of laser welding comes to the circuit forming surface 2X of the semiconductor chip 2, and the surface protective film is thermally damaged, and the wiring under the surface protective film is disconnected, or adjacent wirings are short-circuited. Such a problem can be prevented. However, it is necessary to position the lead frame LF2 in the upper stage or the lower stage.

(Embodiment 5) FIG. 25 is a schematic sectional view of a semiconductor device according to Embodiment 5 of the present invention.

As shown in FIG. 25, the semiconductor device 1E of this embodiment has basically the same configuration as that of the above-described embodiment, but differs in the following configuration.

That is, the semiconductor device 1E includes the die pad 17
The semiconductor chip 2 is mounted on the chip mounting surface of A via an adhesive layer.

The lead 3 extending over the inside and outside of the resin sealing body 5 has a structure having a lead 11 and a lead 21 joined to the lead 11. The lead 11 extends inside and outside the resin sealing body 5 and has a configuration having an internal lead portion located inside the resin sealing body 5 and an external lead portion located outside the resin sealing body 5. Has become. Lead 1
The internal lead portion 1 is electrically connected to the electrode BP of the semiconductor chip 2 via a conductive wire 4. The lead 21 is electrically and mechanically joined to an external lead portion of the lead 11 outside the resin sealing body 5. The bonding between the lead 11 and the lead 21 is performed in a state where the lead 21 is arranged on the mounting surface 5Y side of the resin sealing body 5.

The semiconductor device 1E thus configured is
It is manufactured by an assembling process using a lead frame LF7 shown in FIG. 26 (a schematic plan view) and a lead frame LF2 shown in FIG.

As shown in FIG. 26, the lead frame LF7 includes a plurality of leads 11 in a region surrounded by the frame 10.
And a support 17 and the like. Support 1
7 has a configuration having a die pad 17A and a suspension lead 17B integrated with the die pad 17A. The die pad 17A is connected to and supported by the frame body 10 via the suspension leads 17B.

Next, the manufacture of the semiconductor device 1E will be described with reference to FIGS. FIG. 27 is a schematic sectional view for explaining a bonding step, and FIG. 28 is a schematic sectional view for explaining a lead bonding step.

First, lead frames LF7 and LF2 are prepared.

Next, the semiconductor chip 2 is adhered and fixed to the die pad 16A of the lead frame LF7 via an adhesive layer. In this step, when a thermosetting resin is used as the adhesive layer, it is necessary to cure in a temperature atmosphere of about 150 to 300 [° C.]. At this time, the lead 11 and the support (die pad 17A, suspension lead 17B) 17 are heated to the curing temperature.
-Ni-based metal material (for example, Ni content 42 or 50)
[%]), Even if the leads 11 and the support 17 are heated during curing, an oxide film that deteriorates the adhesiveness of the resin sealing body 5 to the resin is formed. It will not be formed on the surface of.

Next, the electrodes BP of the semiconductor chip 2 and the leads 11 are electrically connected by the conductive wires 4. As a method for connecting the wires 4, for example, a ball bonding (nail head bonding) method that uses ultrasonic vibration in combination with thermocompression bonding is used. At this time, as shown in FIG. 27, the lead 11 and the support 17 are heated by the heat stage 42. However, since the lead 11 and the support 17 are formed of an Fe—Ni-based metal material, An oxide film that deteriorates the adhesiveness of the body 5 to the resin is not formed on the surface of the lead 11.

Next, as shown in FIG. 28, the lead frame LF7 and the lead frame LF2 are overlapped, and thereafter, the lead 11 and the lead 2 corresponding to the lead 11 are placed.
1 and 2 are electrically and mechanically joined by laser welding.
By this step, the lead 3 having the lead 11 and the lead 21 bonded to the lead 11 is formed.

Thereafter, by performing the same manufacturing steps as in the first embodiment, the semiconductor device 1E shown in FIG. 25 is almost completed.

As described above, in the semiconductor device 1E having the support 17 for supporting the semiconductor chip 2, the reliability for mounting and the reliability for moisture resistance can be improved as in the first embodiment.

Since the lead 21 of this embodiment is disposed outside the resin sealing body 5, even if an oxide film is formed on the surface of the lead 21, the adhesion of the resin sealing body 5 to the resin is not improved. There is no adverse effect. Therefore, the lead bonding step may be performed before the chip bonding step. Also in this case, it is possible to substantially eliminate the occurrence of a problem that the wire 4 is deformed in the lead bonding step.

In addition, since the leads 21 of the present embodiment are arranged outside the resin sealing body 5, the lead bonding step may be performed after the chip bonding step and before the wire bonding step. Also in this case, it is possible to substantially eliminate the occurrence of a problem that the wire 4 is deformed in the lead bonding step.

Further, since the leads 21 of the present embodiment are arranged outside the resin sealing body 5, a lead bonding step may be performed after the resin sealing step. In this case, it is possible to substantially eliminate the occurrence of a problem that the wire 4 is deformed in the lead bonding step. In addition, the flying object comes to the circuit forming surface 2X of the semiconductor chip 2 so that the surface protection film is thermally damaged, the wiring under the surface protection film is disconnected,
It is possible to prevent such a problem that adjacent wirings are short-circuited.

Also, in the semiconductor device 1E of the present embodiment, as shown in FIG.
In a state where the third portion 21A of the lead 21 is stacked on the external lead portion 1 (the external lead portion of the lead 11 is positioned on the mounting surface 5Y side of the resin sealing body 5), the lead 11,
Each of the leads 21 may be joined.

As described above, the invention made by the present inventors is described below.
Although specifically described based on the embodiment, the present invention
It is needless to say that the present invention is not limited to the above-described embodiment, but can be variously modified without departing from the scope of the invention.

For example, the present invention can be applied to a QFP type semiconductor device 1F having a four-way lead arrangement structure shown in FIG.

Further, the present invention can be applied to a semiconductor device manufactured by omitting a die pad and attaching a semiconductor chip to a support composed of suspension leads.

[0155]

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

According to the present invention, it is possible to improve the reliability for mounting a semiconductor device and the reliability for moisture resistance.

According to the present invention, it is possible to manufacture a semiconductor device having high reliability in mounting and high reliability in moisture resistance at a high yield.

[Brief description of the drawings]

FIG. 1 is a schematic plan view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a schematic sectional view of the semiconductor device shown in FIG.

FIG. 3 is a schematic cross-sectional view in which a part of FIG. 1 is enlarged.

FIG. 4 shows a first example used for manufacturing the semiconductor device shown in FIG.
FIG. 3 is a schematic plan view of the lead frame of FIG.

FIG. 5 shows a second example used for manufacturing the semiconductor device shown in FIG.
FIG. 3 is a schematic plan view of the lead frame of FIG.

FIG. 6 is a flowchart for explaining the manufacture of the semiconductor device shown in FIG. 1;

FIG. 7 is a schematic cross-sectional view for explaining a chip bonding step in manufacturing the semiconductor device shown in FIG. 1;

FIG. 8 is a schematic cross-sectional view for explaining a wire bonding step in manufacturing the semiconductor device shown in FIG.

FIG. 9 is a schematic cross-sectional view for explaining a resin sealing step in manufacturing the semiconductor device shown in FIG.

FIG. 10 is a schematic cross-sectional view for explaining a lead bonding step in manufacturing the semiconductor device shown in FIG. 1;

11 is a schematic cross-sectional view showing a state where the semiconductor device shown in FIG. 1 is mounted on a mounting board.

FIG. 12 is a schematic sectional view of a semiconductor device which is Embodiment 2 of the present invention.

FIG. 13 is a schematic sectional view of a semiconductor device according to a third embodiment of the present invention.

FIG. 14 is a schematic sectional view enlarging a part of FIG.

15 is a schematic plan view of a first lead frame used for manufacturing the semiconductor device shown in FIG.

FIG. 16 is a schematic plan view of a second lead frame used for manufacturing the semiconductor device shown in FIG.

17 is a schematic cross-sectional view for explaining a chip bonding step in manufacturing the semiconductor device shown in FIG.

18 is a schematic cross-sectional view for explaining a lead bonding step in manufacturing the semiconductor device shown in FIG.

FIG. 19 is a schematic sectional view of a semiconductor device according to a fourth embodiment of the present invention.

20 is a schematic plan view of a first lead frame used for manufacturing the semiconductor device shown in FIG.

21 is a schematic plan view of a second lead frame used for manufacturing the semiconductor device shown in FIG.

FIG. 22 is a schematic cross-sectional view for explaining a chip bonding step in manufacturing the semiconductor device shown in FIG.

23 is a schematic cross-sectional view for explaining a wire bonding step in manufacturing the semiconductor device shown in FIG.

24 is a schematic cross-sectional view for explaining a lead bonding step in manufacturing the semiconductor device shown in FIG.

FIG. 25 is a schematic sectional view of a semiconductor device according to a fifth embodiment of the present invention.

26 is a schematic plan view of a lead frame used for manufacturing the semiconductor device shown in FIG.

FIG. 27 is a schematic cross-sectional view for explaining a wire bonding step in the manufacture of the semiconductor device shown in FIG. 25.

FIG. 28 is a schematic cross-sectional view for explaining a lead bonding step in manufacturing the semiconductor device shown in FIG. 25;

FIG. 29 is a schematic cross-sectional view of a semiconductor device showing a modification of Embodiment 5 of the present invention.

FIG. 30 is a plan view showing an example of another semiconductor device to which the present invention can be applied.

[Explanation of symbols]

1A, 1B, 1C, 1D, 1E, 1F, 1G: semiconductor device, 2, 2A, 2B: semiconductor chip, 3, 11, 21,
51A, 51B: Lead, 4: Wire, 5: Resin sealing body, LF1, LF2, LF3, LF4, LF5, LF
6, LF7: lead frame, 10, 20, frame, 1
2, 22: tie bar, 13: bus bar lead, 14: adhesive layer, 15: suspension lead, 16: T-shaped lead, 17 ...
Support, 17A: Tab, 17B: Suspended lead, 30: Mounting board, 30A: Connection terminal, 31: Solder material, 40: Bonding tool, 41, 42: Heat stage, 50:
Molding mold, 50A: upper mold, 50B: lower mold, 51: cavity.

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Michiaki Sugiyama 5-22-1, Josuihonmachi, Kodaira-shi, Tokyo Inside Hitachi Super-LSI Systems Co., Ltd. (72) Inventor Masachika Masuda Tokyo 5-20-1, Josuihonmachi, Kodaira-shi F-term in Hitachi Semiconductor Group 4M109 AA01 BA01 CA21 DA10 EC01 FA01 5F067 AA04 BA06 BC11 BE10

Claims (19)

[Claims] 1. A semiconductor chip having an electrode formed on one of its front and rear surfaces, a resin sealing body for sealing the semiconductor chip, and an electrode fixed on the surface of the semiconductor chip while being bonded and fixed to the surface of the semiconductor chip. A first lead electrically connected to the first lead, and a second lead joined to the first lead and used as an external terminal, wherein the first lead has a lower oxidation rate than the second lead. The second lead is formed of a conductive material,
A semiconductor device formed of a conductive material softer than a lead. 2. The semiconductor device according to claim 1, wherein said second lead is joined to said first lead outside said resin sealing body. 3. The semiconductor device according to claim 1, wherein the second lead is joined to the first lead inside the resin sealing body. 4. The semiconductor device according to claim 1, wherein said second lead is a first portion joined to said first lead outside said resin sealing body, and said resin sealing is performed from said first portion. A semiconductor device comprising: a second portion bent toward a mounting surface of a stationary body; and a third portion bent from the second portion in a planar direction of the resin sealing body. 5. The semiconductor device according to claim 1, wherein the second lead extends inside and outside the resin sealing body and is joined to the first lead inside the resin sealing body. A first portion, a second portion bent from the first portion to the mounting surface side of the resin sealing body, and a third portion bent from the second portion in the planar direction of the resin sealing body. A semiconductor device, comprising: 6. The semiconductor device according to claim 1, wherein the first lead is bonded and fixed to a surface of the semiconductor chip via an adhesive layer made of a thermosetting resin or an adhesive layer having a thermosetting resin layer. A semiconductor device characterized by being performed. 7. The semiconductor device according to claim 1, wherein the first lead is electrically connected to an electrode of the semiconductor chip via a conductive wire. 8. The semiconductor device according to claim 1, wherein the first lead is formed of an iron-nickel metal material, and the second lead is formed of a copper metal material. Characteristic semiconductor device. 9. A semiconductor chip having an electrode formed on one of its front and back surfaces, a resin sealing member for sealing the semiconductor chip, and the semiconductor chip extending inside and outside the resin sealing member. A first lead bonded and fixed to the surface of the chip and electrically connected to an electrode on the surface, and a second lead bonded to the first lead outside the resin sealing body and used as an external terminal. Wherein the first lead is formed of a conductive material having a lower oxidation rate than the second lead, and the second lead is formed of a conductive material softer than the first lead. A method of manufacturing a semiconductor device, comprising: after forming the resin sealing body, joining each of the first lead and the second lead. 10. A semiconductor chip having an electrode formed on one of its front and back surfaces, a resin sealing member for sealing the semiconductor chip, and the semiconductor chip extending inside and outside the resin sealing member. A first lead bonded and fixed to the surface of the chip and electrically connected to an electrode on the surface, and a second lead bonded to the first lead outside the resin sealing body and used as an external terminal. Wherein the first lead is formed of a conductive material having a lower oxidation rate than the second lead, and the second lead is formed of a conductive material softer than the first lead. A method of manufacturing a semiconductor device, comprising joining each of the first lead and the second lead before bonding and fixing the first lead to the surface of the semiconductor chip by thermocompression bonding. 11. A semiconductor chip having electrodes formed on one of its front and back surfaces, a resin sealing member for sealing the semiconductor chip, and a front surface of the semiconductor chip located inside the resin sealing member. A first lead that is adhered and fixed to the first electrode and is electrically connected to an electrode on the surface thereof; and a first lead extending inside and outside the resin sealing body, and the first lead inside the resin sealing body.
A second lead joined to the lead and used as an external terminal, wherein the first lead is formed of a conductive material having a lower oxidation rate than the second lead; A semiconductor device formed of a soft conductive material, wherein the first lead is bonded and fixed to the surface of the semiconductor chip by thermocompression bonding, and then the first lead and the second lead are joined. A method of manufacturing a semiconductor device. 12. The method for manufacturing a semiconductor device according to claim 9, wherein the first lead is made of an iron-nickel-based metal material, and the second lead is made of a copper-based metal. A method for manufacturing a semiconductor device, comprising: a metal material. 13. A first semiconductor chip and a second semiconductor chip each having an electrode formed on one of its front and back surfaces, and
A resin sealing body for sealing the semiconductor chip and the second semiconductor chip, a first lead that is adhered and fixed to a surface of the first semiconductor chip, and is electrically connected to an electrode on the surface; The semiconductor device includes a second lead that is adhered and fixed to the surface of the semiconductor chip and is electrically connected to an electrode on the surface, and a third lead that is joined to the first and second leads and used as an external terminal. The first lead and the second lead are formed of a conductive material having an oxidation rate lower than that of the third lead, and the third lead is formed of a conductive material softer than the first lead and the second lead. A semiconductor device characterized by being formed. 14. The semiconductor device according to claim 13, wherein the first lead and the second lead are formed of an iron-nickel metal material, and the third lead is formed of a copper metal material. A semiconductor device characterized by the above-mentioned. 15. A first semiconductor chip and a second semiconductor chip each having an electrode formed on one of front and back surfaces thereof, and
A resin sealing body for sealing the semiconductor chip and the second semiconductor chip, a first lead that is adhered and fixed to a surface of the first semiconductor chip, and is electrically connected to an electrode on the surface; The semiconductor device includes a second lead that is adhered and fixed to the surface of the semiconductor chip and is electrically connected to an electrode on the surface, and a third lead that is joined to the first and second leads and used as an external terminal. The first lead and the second lead are formed of a conductive material having an oxidation rate lower than that of the third lead, and the third lead is formed of a conductive material softer than the first lead and the second lead. A method of manufacturing a semiconductor device to be formed, wherein the first lead is adhered and fixed to the surface of the first semiconductor chip by thermocompression, and the second lead is thermocompressed to the surface of the second semiconductor chip. Glued and fixed And then bonding the third lead to each of the first lead and the second lead. 16. A first semiconductor chip and a second semiconductor chip each having an electrode formed on one of its front and back surfaces, and
A resin sealing body for sealing the semiconductor chip and the second semiconductor chip, a first lead that is adhered and fixed to a surface of the first semiconductor chip, and is electrically connected to an electrode on the surface; The semiconductor device includes a second lead that is adhered and fixed to the surface of the semiconductor chip and is electrically connected to an electrode on the surface, and a third lead that is joined to the first and second leads and used as an external terminal. The first lead and the second lead are formed of a conductive material having an oxidation rate lower than that of the third lead, and the third lead is formed of a conductive material softer than the first lead and the second lead. A method of manufacturing a semiconductor device to be formed, wherein the first lead is adhered and fixed to the surface of the first semiconductor chip by thermocompression, and the second lead is thermocompressed to the surface of the second semiconductor chip. Adhesively fixed And electrically connecting the electrode of the first semiconductor chip and the first lead with a conductive wire, and electrically connecting the electrode of the second semiconductor chip and the second lead with a conductive wire. After the step of connecting the first semiconductor chip, the second semiconductor chip, the first lead, the second lead, and the wire with the resin sealing body, respectively. Bonding the third lead to the semiconductor device. 17. The method according to claim 15, wherein the first lead and the second lead are made of an iron-nickel alloy material, and the third lead is a copper material. A method for manufacturing a semiconductor device, comprising: 18. A semiconductor chip having electrodes formed on one of its front and back surfaces, a support for supporting the semiconductor chip, a resin seal for sealing the semiconductor chip and the support, and a resin seal for sealing the semiconductor chip and the support. A first lead extending over the inside and outside of the stopper and electrically connected to an electrode of the semiconductor chip, and joined to the first lead outside the resin sealing body;
A second lead used as an external terminal, wherein the support and the first lead are formed of a conductive material having a lower oxidation rate than the second lead, and the second lead is the support and the first lead. A semiconductor device formed of a softer conductive material. 19. The semiconductor device according to claim 18, wherein the support and the first lead are formed of an iron-nickel metal material, and the second lead is formed of a copper metal material. A semiconductor device characterized by the above-mentioned.