JP2000298532A5 - - Google Patents
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- Publication number
- JP2000298532A5 JP2000298532A5 JP1999107542A JP10754299A JP2000298532A5 JP 2000298532 A5 JP2000298532 A5 JP 2000298532A5 JP 1999107542 A JP1999107542 A JP 1999107542A JP 10754299 A JP10754299 A JP 10754299A JP 2000298532 A5 JP2000298532 A5 JP 2000298532A5
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- transmission signal
- signal
- delay
- timing control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005540 biological transmission Effects 0.000 claims 37
- 230000001360 synchronised effect Effects 0.000 claims 5
- 238000003491 array Methods 0.000 claims 2
- 238000006243 chemical reaction Methods 0.000 claims 2
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10754299A JP3786540B2 (ja) | 1999-04-15 | 1999-04-15 | タイミング制御回路装置 |
| US09/388,438 US6300807B1 (en) | 1998-09-04 | 1999-09-02 | Timing-control circuit device and clock distribution system |
| US09/935,717 US6489824B2 (en) | 1998-09-04 | 2001-08-24 | Timing-control circuit device and clock distribution system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10754299A JP3786540B2 (ja) | 1999-04-15 | 1999-04-15 | タイミング制御回路装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000298532A JP2000298532A (ja) | 2000-10-24 |
| JP2000298532A5 true JP2000298532A5 (enExample) | 2004-09-30 |
| JP3786540B2 JP3786540B2 (ja) | 2006-06-14 |
Family
ID=14461840
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10754299A Expired - Fee Related JP3786540B2 (ja) | 1998-09-04 | 1999-04-15 | タイミング制御回路装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3786540B2 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3575430B2 (ja) | 2001-02-01 | 2004-10-13 | 日本電気株式会社 | 2段階可変長遅延回路 |
| US6958634B2 (en) * | 2003-12-24 | 2005-10-25 | Intel Corporation | Programmable direct interpolating delay locked loop |
| JP4141988B2 (ja) | 2004-06-29 | 2008-08-27 | セイコーエプソン株式会社 | 電気光学装置の駆動回路、駆動方法、電気光学装置および電子機器 |
| JP6501403B2 (ja) * | 2014-02-07 | 2019-04-17 | 国立大学法人静岡大学 | イメージセンサ |
-
1999
- 1999-04-15 JP JP10754299A patent/JP3786540B2/ja not_active Expired - Fee Related
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