JP2000258803A - Active matrix substrate, electro-optical device, and manufacture of active matrix substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to easily and exactly inspect film quality of an MIS transistor. SOLUTION: On an active matrix substrate, a film quality inspection region 80 of 1 mm square is formed in the part where a pixel part, a scanning line driving circuit, a data line driving circuit and signal wiring 72, etc., are not formed. On this film quality inspection region 80, a semiconductor film 1c (silicon film) for film quality inspection is formed which is in the same layer as high density source-drain regions of a thin film transistor 50 and in which the same impurities are introduced with the same concentration, and since this semiconductor film 1c for film quality inspection is exposed from an opening 8c of interlayer insulation films 4, 71, 72, the film quality can be analyzed immediately.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an active matrix substrate on which transistors are formed, an electro-optical device using the active matrix substrate, and a method for manufacturing an active matrix substrate. More specifically, the present invention relates to a technique for forming a film quality inspection region for performing a film quality inspection of a film forming a transistor.

[0002]

2. Description of the Related Art A typical active matrix substrate having a transistor and signal wiring formed on a substrate is an active matrix substrate used for a liquid crystal display device (electro-optical device). Among the active matrix substrates, those with a built-in drive circuit have a plurality of pixels arranged in a matrix corresponding to intersections of a plurality of scanning lines and a plurality of data lines arranged on an insulating substrate. Each pixel has a pixel switching thin film transistor (hereinafter referred to as a TFT) connected to a scanning line and a data line.
That. ) And a pixel electrode are formed. A data line driving circuit for supplying an image signal to each of the plurality of data lines and a scanning line driving circuit for supplying a scanning signal to each of the plurality of scanning lines are formed in a region outside the pixel portion on the insulating substrate. ing. These drive circuits include a plurality of TFs.
It is formed by T.

Among these TFTs, for example, a pixel switching TFT 50 includes, as shown in FIGS. 5A and 5B, a gate electrode 3a formed simultaneously with a scanning line,
The source regions 1f and 1d where the source electrode 6a as a part of the data line 30 is electrically connected through the first contact hole 4a of the first interlayer insulating film 4, and aluminum formed simultaneously with the data line 30 A drain region 1 to which a drain electrode 6d composed of a film or the like is electrically connected via a second contact hole 4d of the first interlayer insulating film 4
g, 1e. A second interlayer insulating film 7 is formed on the upper layer side of the first interlayer insulating film 4, and a third contact hole 8a formed in the second interlayer insulating film 7 is formed.
, The pixel electrode 9a is electrically connected to the drain electrode 6d. Such a structure is basically the same for the TFT formed in the drive circuit.

Here, an active matrix substrate is formed by forming a TFT 50 and the like using a semiconductor process.
Various tests are performed. Various analyzes are performed on those determined to be defective in this inspection, and the results are fed back. For example, the impurity concentration of the source / drain region, the crystallinity of the channel region 1a, and the like are analyzed. Traditionally, when conducting such an analysis,
Raster is performed on the TFT 50 for pixel switching or driving circuit from the front side, and the second interlayer insulating film 7, the first interlayer insulating film 4, the gate electrode 3a, and the gate insulating film 2 are removed in this order. Exposing the channel region 1a or the source / drain region,
Elementary analysis by (secondary ion mass spectrometry) and analysis by X-ray are performed.

[0005]

However, when analyzing the source / drain region and the channel region 1a,
In the conventional method of removing the second interlayer insulating film 7, the first interlayer insulating film 4, the gate electrode 3a, and the gate insulating film 2, there is a problem that a considerable time is required for the removal. . That is, although the thickness of the portion to be inspected is, for example, about 500 Å to 1000 Å, the interlayer insulating film having a thickness of 1 μm is removed before the film quality inspection is performed.
It is necessary to remove the 000 Å gate electrode 3a. Further, even if rastering is performed for such a long time, the channel region 1a of the TFT 50 and the like are at most as small as about 100 μm square, so that there is a problem that highly accurate investigation cannot be performed.

[0006] In view of the above problems, an object of the present invention is to provide:
An object of the present invention is to provide an active matrix substrate capable of easily and accurately inspecting a film quality of a transistor such as a TFT, and an electro-optical device using the same.

Another object of the present invention is to form a film quality inspection region having the same history as a channel region and a gate insulating film of a transistor without increasing the number of processes, thereby efficiently performing a more accurate film quality inspection. It is an object of the present invention to provide a method for manufacturing an active matrix substrate that can be used.

[0008]

According to the present invention, there is provided an active matrix substrate having a transistor and a signal line formed on a substrate, wherein the transistor and the signal line are formed on the substrate. A semiconductor film for film quality inspection of the same layer as the semiconductor film used for the transistor is formed in at least one of the regions where the transistor is not provided. Note that the transistor in the present invention is a MIS (Metal Insu)
(Semiconductor) transistor, but the gate electrode is not limited to metal.
Also includes those using conductive silicon or the like. In particular, the semiconductor film for film quality inspection is formed such that the semiconductor film for film quality inspection is exposed from an opening of the inspection region side interlayer insulation film in the same layer as the interlayer insulation film formed above the transistor.

In the present invention, since a film quality inspection region including a semiconductor film for film quality inspection which is the same layer as the semiconductor film used for the transistor is formed, analysis of the film quality inspection region makes it possible to determine the source / drain region of the transistor and the like. Film quality inspection such as elemental analysis or crystallinity analysis of the semiconductor film forming the channel region can be performed. Here, since the film quality inspection region is exposed from the opening of the interlayer insulating film on the inspection region side in the same layer as the interlayer insulating film, the inspection can be started immediately, and unlike the case where the inspection is performed on the transistor side,
There is no need to remove the interlayer insulating film or the gate electrode. Therefore, the film quality inspection can be performed quickly and easily. In addition, even if it is formed in a large film quality inspection area, it does not affect the transistor characteristics of the transistor. Therefore, by forming a large film quality inspection area, various analyzes can be performed with high accuracy.

In the present invention, for example, the semiconductor film for film quality inspection has the same layer as the source / drain region of the transistor, and the same impurity as the source / drain region is introduced at the same concentration.

In order to manufacture an active matrix substrate having such a structure, for example, a semiconductor film and a gate insulating film used for the transistor are formed in this order, and at the same time, the film quality inspection region is formed in a region to be the film quality inspection region. After forming the semiconductor film and the inspection region side gate insulating film in this order, the following steps are performed. Forming a conductive film for forming a gate electrode of the transistor, patterning the conductive film to form the gate electrode, and simultaneously removing the conductive film from the film quality inspection region; A step of selectively introducing impurities into the semiconductor film through a film to form source / drain regions of the transistor and simultaneously introducing impurities into the film quality inspection semiconductor film via the inspection region side gate insulating film. Forming the interlayer insulating film on the surface side of the gate electrode and simultaneously forming the inspection region side interlayer insulating film on the surface side of the inspection region side gate insulating film on the inspection region side; At the same time as forming a contact hole for the MIS transistor in the film, in the film quality inspection region, the inspection region side interlayer insulating film and the Forming the opening in 査領 frequency side gate insulating film performing the step of exposing the film quality inspection for a semiconductor film.

According to such a manufacturing method, the semiconductor film for film quality inspection follows substantially the same history as the source / drain regions of the transistor. Therefore, even when the semiconductor film for film quality inspection is to be inspected, The film quality of the source / drain region of the transistor can be inspected with higher accuracy. Further, since the film quality inspection region can be formed using the process of manufacturing the transistor as it is, the number of processes does not increase.

In the present invention, the source / drain region of the transistor may have a low concentration source / drain region and a high concentration source / drain region. In this case, the film quality inspection semiconductor film is in the same layer as one of the low-concentration source / drain region and the high-concentration source / drain region, and
The source / drain region may be formed as a region in which the same impurity is introduced at the same concentration.

In manufacturing the active matrix substrate having such a structure, for example, a semiconductor film and a gate insulating film used for the transistor are formed in this order, and at the same time, the film quality inspection region is formed in a region to be the film quality inspection region. After forming the semiconductor film and the inspection region side gate insulating film in this order, the following steps are performed. That is,
Forming a conductive film for forming a gate electrode of the transistor, patterning the conductive film to form the gate electrode, and simultaneously removing the conductive film from the film quality inspection region; A high-concentration impurity and a low-concentration impurity are selectively introduced into the semiconductor film to form the low-concentration source / drain region and the high-concentration source / drain region of the transistor; Introducing one of the low-concentration impurity and the high-concentration impurity into the film-quality inspection semiconductor film through a film; and forming the interlayer insulating film on the surface side of the gate electrode and performing the inspection simultaneously. Forming the inspection region-side interlayer insulating film on the surface side of the inspection region-side gate insulating film on the region side; In the film quality inspection area at the same time as forming the contact hole for the transistors performing the step of exposing the film quality inspection for a semiconductor film to form the opening in the examination region side interlayer insulating film and the examination region side gate insulating film.

In the present invention, when the source / drain region of the transistor has a low-concentration source / drain region and a high-concentration source / drain region, the semiconductor film for film quality inspection may include the low-concentration source / drain region. A first film quality inspection semiconductor film in the same layer as the drain region and in which the same impurity as the low-concentration source / drain region is introduced at the same concentration, and in the same layer as the high-concentration source / drain region; It is preferable that the semiconductor device further includes a second film quality inspection semiconductor film into which the same impurity as the high concentration source / drain region is introduced at the same concentration. With this configuration, even when the source / drain region of the transistor has a low-concentration source / drain region and a high-concentration source / drain region, each region can be inspected.

In manufacturing the active matrix substrate having such a structure, for example, a semiconductor film and a gate insulating film used for the transistor are formed in this order, and at the same time, the film quality inspection region is formed in the region to be the film quality inspection region. After forming the semiconductor film and the inspection region side gate insulating film in this order, the following steps are performed. That is,
Forming a conductive film for forming a gate electrode of the transistor, patterning the conductive film to form the gate electrode, and simultaneously removing the conductive film from the film quality inspection region; A high-concentration impurity and a low-concentration impurity are selectively introduced into the semiconductor film to form the low-concentration source / drain region and the high-concentration source / drain region of the transistor; The low-concentration impurities and the high-concentration impurities are selectively introduced also into the film-quality inspection semiconductor film via a film to form the first film-quality inspection semiconductor film and the second film-quality inspection semiconductor film. Forming, and forming the interlayer insulating film on the surface side of the gate electrode, and simultaneously forming the surface of the inspection region side gate insulating film on the inspection region side Forming a contact hole for the transistor in the inter-layer insulating film, and forming the contact hole for the transistor in the inter-layer insulating film at the same time as forming the test region-side inter-layer insulating film and the test region-side gate insulating film in the film quality inspection region. Forming an opening to expose the semiconductor film for film quality inspection.

According to such a manufacturing method, the first film quality inspection semiconductor film and the second film quality inspection semiconductor film are substantially the same as the low-concentration source / drain region and the high-concentration source / drain region of the transistor, respectively. Therefore, even when the semiconductor film for film quality inspection is to be inspected, the film quality of the source / drain regions of the transistor can be inspected with higher accuracy. In addition, since the film quality inspection region can be formed using the process of manufacturing the transistor as it is, the number of processes does not increase.

In the present invention, when the film quality inspection semiconductor film is used for inspection of the source / drain region of the transistor, the film quality inspection region is formed to have a larger area than the source / drain region of the transistor. Is preferred.

In the present invention, the semiconductor film for film quality inspection may be formed for inspection of a channel region of the transistor. That is, the semiconductor film for film quality inspection,
The transistor may be formed in the same layer as the channel region of the transistor and as a low-concentration region in which the same intrinsic semiconductor film as the channel region or the same impurity is channel-doped with the same concentration.

In this case, it is preferable that the film quality inspection region is formed to have a larger area than the channel region of the transistor.

In manufacturing the active matrix substrate having such a structure, for example, a semiconductor film and a gate insulating film used for the transistor are formed in this order, and at the same time, the film quality inspection region is formed in the region to be the film quality inspection region. After forming the semiconductor film and the inspection region side gate insulating film in this order, the following steps are performed. That is,
Forming a conductive film for forming a gate electrode of the transistor, patterning the conductive film to form the gate electrode, and simultaneously removing the conductive film from the film quality inspection region; Forming a source / drain region of the transistor by selectively introducing impurities into the semiconductor film through the gate insulating film while covering the film with the mask; and contacting the interlayer insulating film with the transistor. Forming a hole in the inspection region side interlayer insulating film and the inspection region side gate insulating film in the film quality inspection region and exposing the film quality inspection semiconductor film at the same time as forming the hole.

According to such a manufacturing method, the film quality inspection semiconductor film follows substantially the same history as the channel region of the transistor. Therefore, even when the film quality inspection semiconductor film is to be inspected, the film quality is higher. The film quality of the channel region of the transistor can be inspected with high accuracy. In addition, since the film quality inspection region can be formed using the process of manufacturing the transistor as it is, the number of processes does not increase.

In any of the above embodiments, the film quality inspection region preferably has an area of, for example, 1 mm ² or more. As described above, when the film quality inspection region is formed to have a considerably large area as compared with the channel region of the transistor, for example, an area of about 1 mm ² or more, elemental inspection by SIMS can be performed with high accuracy. At the same time, the crystallinity of the semiconductor film (channel region) for film quality inspection can be inspected by using Raman scattering analysis or the like. Therefore, when a transistor such as a thin film transistor is formed from a polycrystalline semiconductor film obtained by performing a crystallization process on an amorphous semiconductor film, an effective inspection can be performed.

In the present invention, if the transistor is a thin film transistor, a pixel switching thin film transistor connected to a scanning line and a data line and a pixel electrode connected to the thin film transistor are formed in a matrix on the substrate. A pixel portion, a scanning line driving circuit and a data line driving circuit for outputting signals to the scanning line and the data line, and a plurality of signal wirings for supplying signals to the driving circuit. An active matrix substrate for an electro-optical device can be formed. That is, an electro-optical device such as a liquid crystal display device can be configured by sandwiching an electro-optical material such as a liquid crystal between the active matrix substrate (active matrix substrate) and a counter substrate on which a counter electrode is formed. it can. In such a case, the film quality inspection region is formed on at least one of the pixel portion, the scanning line driving circuit, the data line driving circuit, and the region where the signal wiring is not formed on the substrate. Will be.

[0025]

Embodiments of the present invention will be described with reference to the drawings.

Embodiment 1 (Overall Configuration of Electro-Optical Device) FIG. 1 is a plan view of an electro-optical device according to the present embodiment as viewed from a counter substrate side. FIG.
FIG. 2 is a cross-sectional view of the electro-optical device taken along the line HH ′ in FIG.

As shown in FIGS. 1 and 2, an electro-optical device 300 used for a projection type display device or the like has a pixel electrode 9 on a surface of an insulating substrate 10 such as quartz glass or heat-resistant glass.
An active matrix substrate 200 (active matrix substrate) in which a is formed in a matrix, an opposing substrate 100 in which an opposing electrode 32 is formed on the surface of an insulating substrate 41 also made of quartz glass or heat-resistant glass, and between these substrates And a liquid crystal 39 sealed and sandwiched as an electro-optical material. Active matrix substrate 2
The counter substrate 100 and the counter substrate 100 are bonded together via a predetermined gap (cell gap) by a gap material-containing sealing material 59 formed along the outer peripheral edge of the counter substrate 100. Further, between the active matrix substrate 200 and the opposing substrate 100, a liquid crystal sealing region 40 is defined by a sealing material 59 containing a gap material, and a liquid crystal 39 is sealed in the liquid crystal sealing region 40.

The counter substrate 100 is smaller than the active matrix substrate 200,
The peripheral portion of 0 is bonded so as to protrude from the outer peripheral edge of the counter substrate 100. Therefore, the drive circuits (the scan line drive circuit 70 and the data line drive circuit 60) and the input / output terminals 45 of the active matrix substrate 200 are exposed from the counter substrate 100. Here, since the sealing material 59 is partially interrupted, the liquid crystal injection port 241 is formed by the interrupted portion. Therefore, after bonding the opposing substrate 100 and the active matrix substrate 200,
If the inner region of the sealing material 59 is set in a reduced pressure state, the liquid crystal 39 can be injected under reduced pressure from the liquid crystal injection port 241. The active matrix substrate 200 has an image display area 11 inside the area where the sealant 59 is formed.
A light-shielding film 55 for cutting off is formed. The opposing substrate 100 includes an active matrix substrate 2
A light-shielding film 57 is formed in a region corresponding to the boundary region of each pixel electrode 9a.

A polarizing plate (not shown) or the like is provided on the light-incident side or light-exit side of the opposing substrate 100 and the active matrix substrate 200 according to the normally white mode / normally black mode. It is arranged in the direction of.

In the electro-optical device 300 thus configured, the active matrix substrate 200 includes a data line (not shown) and a pixel switching TFT.
The orientation state of the liquid crystal 39 is controlled for each pixel between the pixel electrode 9a and the counter electrode 32 by an image signal applied to the pixel electrode 9a via a (described later), and a predetermined image corresponding to the image signal is formed. indicate. Therefore, in the active matrix substrate 200, it is necessary to supply an image signal to the pixel electrode 9a via the data line and the TFT 50 and to apply a predetermined potential to the counter electrode 32. Therefore, in the electro-optical device 300, a portion of the surface of the active matrix substrate 200, which faces each corner of the counter substrate 100, is formed of an aluminum film or the like for vertical conduction with the help of a process of forming a data line or the like. A first electrode 47 is formed. On the other hand, at each corner of the opposing substrate 100, a second electrode 48 for vertical conduction made of an ITO (Indium Tin Oxide) film or the like is formed with the help of the forming process of the opposing electrode 4.
Further, the first electrode 47 and the second electrode 48 for vertical conduction are formed of a conductive material 5 in which conductive particles such as silver powder and gold-plated fiber are mixed with an epoxy resin-based adhesive component.
6 electrically conducts. Therefore, in the electro-optical device 300, the active matrix substrate 200 can be connected to the active matrix substrate 200 only by connecting the flexible wiring substrate 99 to the active matrix substrate 200 without connecting the flexible wiring substrate or the like to each of the active matrix substrate 200 and the counter substrate 100. A predetermined signal can be input to both 200 and counter substrate 100.

(Overall Configuration of Active Matrix Substrate)
FIG. 3 is a block diagram schematically showing the configuration of the active matrix substrate used in the electro-optical device 300.

As shown in FIG. 3, in the active matrix substrate 200 with a built-in drive circuit of the present embodiment, the insulating substrate 1
On pixel 0, pixel electrodes 9a connected to a plurality of scanning lines 20 and a plurality of data lines 30 which cross each other are arranged in a matrix. The scanning line 20 is formed of a tantalum film, an aluminum film, an aluminum alloy film, or the like.
Reference numeral 0 denotes an aluminum film, an aluminum alloy film, or the like, each of which is a single layer or stacked. The area where these pixel electrodes 9a are formed is the image display area 11.

Image display area 11 on insulating substrate 10
A data line driving circuit 60 that supplies an image signal to each of the plurality of data lines 30 is formed in an outer region (peripheral portion) of the data line. A scanning line driving circuit 70 that supplies a scanning signal for pixel selection to each scanning line 20 is formed at each of both ends of the scanning line 20. These drive circuits are configured using drive circuit TFTs formed at the same time as pixel switching TFTs.

The data line drive circuit 60 includes an X-side shift register circuit and a TFT as an analog switch that operates based on a signal output from the X-side shift register circuit.
, And six image signal lines 67 corresponding to each image signal developed in six phases. In this example, the data line driving circuit 60
The X-side shift register circuit has four phases, and a start signal, a clock signal, and its inverted clock signal are supplied from the outside via the input / output terminal 45 to the X-side shift register circuit. The data line driving circuit 60 is driven. Accordingly, in the sample hold circuit 66, each TFT operates based on the signal output from the X-side shift register circuit, and the image signal line 6
It is possible to take in an image signal supplied via the data line 30 at a predetermined timing and supply the image signal to each pixel electrode 9a.

On the other hand, a start signal, a clock signal, and its inverted clock signal are externally supplied to the scanning line driving circuit 70 via terminals, and the scanning line driving circuit 70 is driven by these signals.

Active matrix substrate 200 of this embodiment
In the side portion of the insulating substrate 10, the side portion on the side of the data line drive circuit 60 has a constant power supply, a modulated image signal (image signal), a metal film such as an aluminum film to which various drive signals are input, and a metal. A large number of input / output terminals 45 made of a conductive film such as a silicide film or an ITO film are formed, and from these input / output terminals 45, an aluminum film for driving the scanning line driving circuit 60 and the data line driving circuit 70, etc. Signal wirings 73 and 7 made of a low-resistance metal film
4 are routed respectively.

(Structures of Pixels and TFTs) FIG.
3 is an equivalent circuit diagram of a pixel of the active matrix substrate shown in FIG. FIGS. 5A and 5B respectively show a pixel switching TFT formed in the pixel of FIG.
FIG. 5 is a cross-sectional view taken along line CC ′ of a film quality inspection region described later with reference to FIG.

As shown in FIG. 4, a pixel switching TFT 50 connected to the scanning line 20 and the data line 30 is formed on the pixel electrode 9a. In addition, a capacitance line 75 may be formed toward each pixel electrode 9a, and an additional capacitance (holding capacitance) may be formed in each pixel electrode 9a using the capacitance line 75.

As shown in FIGS. 5A and 5B, the TFT 50 has a gate electrode 3a formed simultaneously with the scanning line 20.
And the source electrode 6a as a part of the data line 30
A high-concentration source region 1d electrically connected through a first contact hole 4a of the interlayer insulating film 4 to the data line 3;
0 and a high-concentration drain region 1e electrically connected via a second contact hole 4d of the first interlayer insulating film 4 to a drain electrode 6d formed of an aluminum film or the like formed at the same time. . Also, the first interlayer insulating film 4
A second interlayer insulating film 7 is formed on the upper layer side, and a pixel electrode 9a is connected to a drain electrode 6d through a third contact hole 8a formed in the second interlayer insulating film 7.
Is electrically connected to In this embodiment, TF
T50 has an LDD structure, and has a low-concentration source region 1f and a low-concentration drain region 1g in a portion facing the end of the gate electrode 3a.

In this embodiment, the second interlayer insulating film 7 is
An insulating film 71 formed by firing a coating film of perhydropolysilazane or a composition containing the same, and an insulating film 72 formed of a silicon oxide film having a thickness of about 500 Å to about 15,000 Å formed by a CVD method or the like. It has a structure. Here, perhydropolysilazane is a kind of inorganic polysilazane, and is a coating type coating material that is converted into a silicon oxide film by firing in the air. For example, Tonen Co. polysilazane, - (SiH ₂ NH) - is an inorganic polymer to the unit, is soluble in an organic solvent such as xylene. Therefore, a solution of the inorganic polymer in an organic solvent (for example, 2
0% xylene solution) as a coating solution by spin coating (for example, 2000 lrpm, 20 seconds),
When it is fired at 450 ° C. in the air, it reacts with moisture and oxygen, and a dense amorphous silicon oxide film equal to or more than a silicon oxide film formed by a CVD method can be obtained. Therefore, the insulating film 71 (silicon oxide film) formed by this method can be used as an interlayer insulating film, and also flattens irregularities caused by the drain electrode 6d. Therefore, it is possible to prevent the alignment state of the liquid crystal from being disturbed due to the unevenness.

(Film Quality Inspection Area) The active matrix substrate 200 thus formed is subjected to an electrical inspection after forming each component using a semiconductor process. In addition, various analyzes are performed on those determined to be defective in this inspection process, and the results are fed back. For example, the impurity distribution in the source / drain region of the TFT 50 is inspected, and the result is fed back.

In order to perform such an inspection, as shown in FIGS. 1 and 3, the active matrix substrate 200 of this embodiment includes a pixel portion 11, a scanning line driving circuit 70, a data line driving circuit 60, a signal line In a corner portion where no 73, 74, etc. are formed (lower right portion in FIGS. 1 and 3), a rectangular film quality inspection area 8 having a side of about 1 mm each.
0 is formed.

FIG. 6A shows the film quality inspection area 80.
As shown in (B), the same layer as the semiconductor film 1h constituting the channel region 1a and the source / drain region of the TFT 50 and the high concentration source / drain regions (the high concentration source region 1d and the high concentration drain region 1e). A film quality inspection semiconductor film 1c (silicon film) in which the same impurities as described above are introduced at the same concentration is formed. In the film quality inspection region 80, the film quality inspection semiconductor film 1c has an opening penetrating the inspection region side gate insulating film 2c in the same layer as the gate insulating film 2 and the inspection region side interlayer insulating films 4, 71, 72. Part 8
It is exposed from c. Here, the film quality inspection semiconductor film 1c
Are formed to have a considerably larger area than the source / drain regions (high-concentration source region 1d and high-concentration drain region 1e) of TFT 50. The film quality inspection semiconductor film 1c is formed in a region including the formation region of the opening 8c, and is slightly larger than the opening area of the opening 8c.

As described above, the active matrix substrate 200 of this embodiment has the high concentration source region 1d of the TFT 50.
And a high-concentration drain region 1e in the same layer, and a film quality inspection region 80 including a film quality inspection semiconductor film 1c in which the same impurity is introduced at the same concentration is formed. If elemental analysis is performed on the semiconductor film 1c, a film quality inspection such as an impurity concentration distribution of the high concentration source region 1d and the high concentration drain region 1e of the TFT 50 can be performed. Moreover, the film quality inspection area 80
Are the inspection region side gate insulating film 2c and the interlayer insulating film 4,
Since it is exposed from the opening 8c penetrating through the holes 71, 72, the inspection can be started immediately, and unlike the case of the inspection on the TFT 50 side, the interlayer insulating films 4, 71, 72,
There is no need to remove the gate electrode 3a and the gate insulating film 2. Therefore, the film quality inspection can be performed quickly and easily. Further, if the film quality inspection region 80 is formed to be large, it does not affect the transistor characteristics and the like of the TFT 50. Therefore, the large film quality inspection area 8
By forming 0, elemental analysis in the depth direction can be performed with high accuracy while rasterizing a part (not shown) of the film quality inspection region 80 in the analysis by SIMS. Moreover, the film quality inspection area 80
Has a considerably large area as compared with the high-concentration source region 1d and the high-concentration drain region of the TFT 50, for example, an area of about 1 mm ^2. Semiconductor film 1c for film quality inspection using Raman scattering analysis (semiconductor film 1h)
Can also be tested for crystallinity. Therefore, it is effective to inspect the TFT 50 formed from the polycrystalline semiconductor film 1h obtained by performing the crystallization process on the amorphous semiconductor film.

Further, in the present embodiment, the film quality inspection area 8
As shown in FIG. 1, 0 is formed in the active matrix substrate 200 at a position protruding from the counter substrate 100. Therefore, the active matrix substrate 2
00, the active matrix substrate 200
And the opposing substrate 100 are adhered to each other to
Can be performed in the film quality inspection area 80 even after the lighting inspection and the like are performed.

(Method for Manufacturing Active Matrix Substrate 200) A method for manufacturing the active matrix substrate 200 while forming such a film quality inspection region 80 is described in FIG.
This will be described with reference to FIG. Each of these drawings is a process sectional view showing a method for manufacturing the active matrix substrate 200 of this embodiment. In each of these drawings, the left portion is a cross section of a pixel TFT portion, and the right portion is FIG.
(Cross section of film quality inspection area 80) taken along line CC 'of FIG.
Is shown.

First, as shown in FIG. 6 (A), an underlayer protective film (formed directly or on the surface of a transparent insulating substrate 10 made of a glass substrate, for example, non-alkaline glass or quartz) or formed on the surface of the insulating substrate 10. (Not shown)), a thickness of about 200 Å to about 2000 Å, preferably about 1 Å, by a low pressure CVD method or the like.
After a semiconductor film 1 made of a polysilicon film having a thickness of 2,000 angstroms is formed, as shown in FIG. 6B, it is patterned by using a photolithography technique, and an island-shaped semiconductor film 1h (active Layer). Further, an island-shaped film quality inspection semiconductor film 1c is formed in the film quality inspection region 80.

In forming such a semiconductor film 1, an amorphous silicon film is deposited by a low-temperature process and then crystallized by a method such as laser annealing to obtain a polysilicon film.

Next, as shown in FIG. 6C, a thickness of about 500 Å to about 1 Å is formed on the entire surface of the insulating substrate 10 at a temperature of about 400 ° C. by a CVD method or the like.
A 500 angstrom silicon oxide film is formed.
As a result, the gate insulating film 2 is formed on the surface of the island-shaped semiconductor film 1h in the pixel TFT portion, and the inspection region side gate insulating film 2c is formed on the surface of the island-shaped film-quality inspection semiconductor film 1c in the film quality inspection region 80. Is done.

Next, as shown in FIG. 6D, after a tantalum film 3 (conductive film) for forming a gate electrode and the like is formed on the entire surface of the insulating substrate 10, the tantalum film 3 is formed by photolithography. Then, as shown in FIG. 6E, a gate electrode 3a is formed on the pixel TFT portion side. Further, the tantalum film 3 is completely removed from the film quality inspection region 80.

Next, as shown in FIG.
On the side of the T portion and the N-channel TFT portion of the drive circuit, about 0.1 × 10 ¹³ / cm
^By implanting low concentration impurity ions (phosphorous ions) at a dose of ² to about 10 × 10 ¹³ / cm ² , the pixel TFT
On the side of the portion, a low-concentration source region 1f and a low-concentration drain region 1g are formed in self-alignment with the gate electrode 3a. Here, since it is located immediately below the gate electrode 3a, the portion where the impurity ions are not introduced becomes the channel region 1a. At this time, a low-concentration impurity is introduced into the film-quality inspection region 80, as in the low-concentration source region 1f and the low-concentration drain region 1g.

Next, as shown in FIG.
In the portion T, a resist mask RM1 wider than the gate electrode 3a is formed, and a high concentration of impurity ions (phosphorous ions) is added from about 0.1 × 10 ¹⁵ / cm ² to about 10 × 10 ¹⁵ / c.
By implanting with a dose of m ² , a high concentration source region 1d and a high concentration drain region 1e are formed. Also at this time, in the film quality inspection region 80, high concentration impurities are introduced as in the case of the high concentration source region 1d and the high concentration drain region 1e.

Instead of these impurity introduction steps, high-concentration impurities (phosphorous ions) are implanted in a state where a resist mask RM1 wider than the gate electrode 3a is formed without implanting low-concentration impurities. A source region and a drain region may be formed. It is needless to say that a high-concentration impurity (phosphorus ion) may be implanted on the gate electrode 3a to form the self-aligned source and drain regions.

Although not shown, in order to form a P-channel TFT portion of the peripheral drive circuit, the pixel portion, the film quality inspection region 80 and the N-channel TFT portion are covered and protected with a resist, and the gate electrode is masked. As about 0.1 ×
By implanting boron ions at a dose of 10 ¹⁵ / cm ² to about 10 × 10 ¹⁵ / cm ² , P-channel source / drain regions are formed in a self-aligned manner. As in the case of forming the N-channel TFT portion, about 0.1 × 10 ¹³ / cm ² to about 10 × 10 ¹³ / cm ^{2 using} the gate electrode as a mask.
After introducing a low-concentration impurity (boron ion) at a dose of ² cm ² to form a low-concentration region in the polysilicon film,
A mask having a width wider than that of the gate electrode is formed, and a high-concentration impurity (boron ion) is implanted at a dose of about 0.1 × 10 ¹⁵ / cm ² to about 10 × 10 ¹⁵ / cm ^{2 to form} an LDD structure (light A source region and a drain region having a Lee-doped drain structure may be formed. Instead of implanting low-concentration impurities, high-concentration impurities (phosphorous ions) may be implanted in a state where a mask wider than the gate electrode is formed, to form a source region and a drain region having an offset structure. Through these ion implantation steps, it is possible to implement CMOS, and it is possible to integrate the peripheral drive circuit into the same substrate.

Next, as shown in FIG. 7B, C is formed on the surface side of the gate electrode 3a and the inspection region side gate insulating film 2c.
For example, a first interlayer insulating film 4 made of a silicon oxide film or an NSG film (silicate glass film containing no boron or phosphorus) under a temperature condition of about 400 ° C. by a VD method or the like.
Is formed to a thickness of about 3000 to 15,000 angstroms.

Next, using photolithography technology,
A resist mask RM2 for forming a contact hole and an opening in the first interlayer insulating film 4 is formed.

Next, as shown in FIG.
On the side of the T portion, the source region 1 of the first interlayer insulating film 4 is formed.
The contact holes 4a, 4d and the opening 4c are formed in a portion of the first interlayer insulating film 4 corresponding to the film quality inspection semiconductor film 1c in a portion corresponding to the drain region 1e and the film quality inspection region 80. Are formed respectively. As a result, in the film quality inspection region 80, the film quality inspection semiconductor film 1c
Is exposed. Then, the resist mask RM2
Is removed.

Next, as shown in FIG. 7D, an aluminum film 6 for forming a source electrode or the like is formed on the surface side of the first interlayer insulating film 4 by a sputtering method or the like.

Next, using photolithography technology,
A resist mask RM3 for patterning the aluminum film 6 is formed.

Next, as shown in FIG. 7E, the aluminum film 6 is patterned, and in the pixel TFT portion, as a part of the data line 30, the high-concentration source region 1d is formed via the first contact hole 4a. A source electrode 6a made of an aluminum film electrically connected to the high-concentration drain region 1;
e and a drain electrode 6d electrically connected through the second contact hole 4d. On the other hand, in the film quality inspection region 80, the aluminum film 6 is completely removed,
The semiconductor film for film quality inspection 1c is exposed. Then, the resist mask RM3 is removed.

Next, as shown in FIG. 8A, the source electrode 6a, the drain electrode 6d and the semiconductor film 1 for film quality inspection are formed.
On the surface side of c, an insulating film 71 is formed by firing a coating film of perhydropolysilazane or a composition containing the same. Further, a CV using TEOS is formed on the surface of the insulating film 71.
Method D forms an insulating film 72 made of a silicon oxide film having a thickness of about 500 Å to about 15,000 Å under a temperature condition of, for example, about 400 ° C.
These insulating films 71 and 72 form the second interlayer insulating film 7.
Is formed.

Next, using photolithography technology,
A resist mask RM4 for forming a contact hole and an opening in the second interlayer insulating film 7 is formed.

Next, as shown in FIG. 8B, the contact holes 71 are formed in the portions corresponding to the drain electrodes 6 d with respect to the insulating films 71 and 72 forming the second interlayer insulating film 7.
A third contact hole 8a consisting of a and 72a is formed. At this time, in the film quality inspection region 80, the openings 71 are formed with respect to the insulating films 71 and 72 constituting the second interlayer insulating film 7.
c, 72c are formed, and an opening 8c exposing the film quality inspection semiconductor film 1c is formed. Then, the resist mask R
Remove M4.

Next, as shown in FIG. 8C, an ITO film 9 (thickness of about 400 Å to about 2000 Å) for forming a drain electrode is formed on the surface side of the second interlayer insulating film 7. Indium Tin Oxi
de) is formed by a sputtering method or the like.

Next, using photolithography technology,
Resist mask R for patterning ITO film 9
M5 is formed.

Then, using the resist mask RM5,
The ITO film 9 is patterned. As a result, FIG.
As shown in (A) and (B), the pixel TFT portion has the third
The pixel electrode 9a electrically connected to the drain electrode 6d via the contact hole 8a is formed. In the film quality inspection region 80, the ITO film 9 is completely removed, and the film quality inspection semiconductor film 6c is exposed from the opening 8c.

Therefore, thereafter, the film quality inspection of the film quality inspection semiconductor film 1c can be performed immediately through the opening 8c. Moreover, the film quality inspection semiconductor film 1c is formed of the TFT 50
High concentration source region 1d and high concentration drain region 1e
Therefore, even when the semiconductor film for film quality inspection 1h is to be inspected, a higher accuracy can be obtained.
The film quality of the high concentration source region 1d and the high concentration drain region 1e of the TFT 50 can be inspected. Furthermore, since the film quality inspection region 80 can be formed using the process of manufacturing the TFT 50 as it is, the number of processes does not increase.

[Second Embodiment] In the first embodiment,
After introducing a low concentration impurity into the film quality inspection semiconductor film 1c in the step shown in FIG. 6F, a high concentration impurity is introduced into the film quality inspection semiconductor film 1c in the step shown in FIG. The semiconductor film 1c for film quality inspection was a region into which the same impurity as the high-concentration source region 1d and the high-concentration drain region 1e was introduced at the same concentration.

In this embodiment, after a low-concentration impurity is introduced into the film quality inspection semiconductor film 1c in the step shown in FIG. 6F, in the step shown in FIG. 7A, as shown in FIG. If the film quality inspection region 80 is also covered with the resist mask RM1, the film quality inspection semiconductor film 1c may be a region in which the same impurity as the low concentration source region 1f and the low concentration drain region 1g is introduced at the same concentration. it can. Therefore, in this inspection region 80, the semiconductor film 1c for film quality inspection
Is analyzed, a film quality inspection can be performed on the low-concentration source region 1f and the low-concentration drain region 1g of the TFT 50. In addition, the film quality inspection semiconductor film 1c is a TFT
Since the same history as that of the low-concentration source region 1f and the low-concentration drain region 1g of 50 is traced, even when the film quality inspection semiconductor film 1c is to be inspected, the low-concentration source region of the TFT 50 can be obtained with higher accuracy. The film quality of 1f and the low concentration drain region can be inspected. Furthermore, in this case,
Since the film quality inspection region 80 can be formed using the process of manufacturing the TFT 50 as it is, the number of processes does not increase.

[Third Embodiment] In the first embodiment, after introducing a low-concentration impurity into the film quality inspection semiconductor film 1c in the step shown in FIG. 6F, the step shown in FIG. By introducing high-concentration impurities into the entire semiconductor film 1c for film quality inspection, the entire semiconductor film 1c for film quality inspection is made into a region in which the same impurity as the high-concentration source region 1d and the high-concentration drain region 1e is introduced at the same concentration. FIG. 6 (F)
After a low concentration impurity is introduced into the film quality inspection semiconductor film 1c in the step shown in FIG. 7A, in the step shown in FIG.
As shown in FIG. 10A, if only a part of the film quality inspection region 80 is covered with the resist mask RM1, as shown in FIG. 10B, the low-density source region 1f is formed in the film quality inspection semiconductor film 1c. And a first film quality inspection semiconductor film 1 into which the same impurity as that of the low concentration drain region 1g is introduced at the same concentration.
c ′ and the second film quality inspection semiconductor film 1c ″ into which the same impurity as the high-concentration source region 1d and the high-concentration drain region 1e is introduced at the same concentration can be formed. By analyzing the first film quality inspection semiconductor film 1c 'and the second film quality inspection semiconductor film 1c "respectively, the film quality inspection for the high concentration source region 1d and the high concentration drain region 1e of the TFT 50 and the low concentration source A film quality inspection can be performed on the region 1f and the low-concentration drain region 1g. In addition, the film quality inspection semiconductor film 1c (the first film quality inspection semiconductor film 1c ′ and the second film quality inspection semiconductor film 1c ″) is formed of the TFT 5
Since the histories follow substantially the same history as the low-concentration source / drain region and the high-concentration source / drain region of 0, even when the film quality inspection semiconductor film 1c is to be inspected, the TFT 50 can be formed with higher accuracy. The quality of the source / drain regions can be inspected. Furthermore, in this case, the TFT
The film quality inspection area 8 using the process of manufacturing 50 as it is
Since 0 can be formed, the number of steps does not increase.

[Fourth Embodiment] In the first to third embodiments, an impurity is introduced into the film quality inspection semiconductor film 1c so that the film quality inspection semiconductor film 1c is used for inspection of the source / drain region of the TFT 50. However, in both the step shown in FIG. 6F and the step shown in FIG. 7A, if the film quality inspection region 80 is covered with the resist mask RM1 as shown in FIG. As shown, the film quality inspection semiconductor film 1c is an intrinsic region into which impurities are not introduced. Therefore, by analyzing the film quality inspection semiconductor film 1c in the inspection region 80, the film quality inspection for the channel region 1a of the TFT 50 can be performed. Also in this case, since the film quality inspection region 80 can be formed by using the process of manufacturing the TFT 50 as it is, the number of processes does not increase.

When manufacturing the TFT 50, FIG.
In the steps shown in FIGS. 6A to 6C, an extremely low concentration impurity may be channel-doped in some cases. In this case, the film quality inspection semiconductor film 1c is formed as a region in which the same impurity as that of the channel region 1c is channel-doped at the same concentration.

[Fifth Embodiment] In each of the first to fourth embodiments, an example is described in which the film quality inspection region 80 is formed in one place for one active matrix substrate 200. As shown in FIG. 12, two or more film quality inspection regions 80 'and 80 "may be formed. In this case, any of the film quality inspection semiconductor films 1c in the film quality inspection regions 80' and 80" may be formed. The same impurity may be introduced at the same concentration. For example, of the plurality of film quality inspection regions 1c, the film quality inspection semiconductor film 1c in a certain film quality inspection region 80 '
Without introducing impurities into the channel region 1a of the TFT 50.
The impurity is introduced into the film quality inspection semiconductor film 1c in the other film quality inspection region 80 ″ by introducing impurities into the TFT 50.
May be used for inspecting the film quality of the source / drain regions.

[Other Embodiments] In the above embodiment, the present invention is applied to an active matrix substrate used for assembling an electro-optical device. The present invention may be applied to a test board for confirming the condition.

Further, the present invention is not limited to the above-described embodiment, and can be implemented in variously modified forms within the scope of the present invention. For example, the present invention can be applied not only to the above-described various liquid crystal display devices but also to electroluminescence and plasm display devices. Furthermore, the present invention relates to SOI (Silicon On Insulato).
r) Substrate or SOS (Silicon On Sapph)
ire) It is also applicable when a substrate is used.

[0076]

As described above, according to the present invention, since the film quality inspection region including the same semiconductor film for film quality inspection as the semiconductor film used for the transistor is formed, the film quality inspection region can be analyzed. In addition, a film quality inspection such as an elemental analysis or a crystallinity analysis of a semiconductor film forming a source / drain region or a channel region of a transistor can be performed. Here, since the film quality inspection region is exposed from the opening of the interlayer insulating film on the inspection region side in the same layer as the interlayer insulating film, the inspection can be started immediately, and unlike the case where the inspection is performed on the transistor side, There is no need to remove the interlayer insulating film or the gate electrode. Therefore, the film quality inspection can be performed quickly and easily. In addition, even if it is formed in a large film quality inspection area, it does not affect the transistor characteristics of the transistor. Therefore, by forming a large film quality inspection area, various analyzes can be performed with high accuracy.

[Brief description of the drawings]

FIG. 1 is a plan view of an electro-optical device according to Embodiment 1 of the present invention as viewed from a counter substrate side.

FIG. 2 is a cross-sectional view of the electro-optical device taken along line HH ′ in FIG.

FIG. 3 is a block diagram of an active matrix substrate used in the electro-optical device shown in FIG.

4 is an equivalent circuit diagram of a pixel of the active matrix substrate shown in FIG.

FIGS. 5A and 5B respectively show a pixel TF formed on an active matrix substrate of the electro-optical device shown in FIG.
FIG. 2 is a cross-sectional view taken along a line CC ′ of a portion T and a film quality inspection region in FIG. 1, and a cross-sectional view showing a part of them in an enlarged manner.

6 is a process sectional view illustrating the method of manufacturing the active matrix substrate illustrated in FIG.

7 is a process cross-sectional view of each process performed after the process illustrated in FIG. 6;

8 is a process cross-sectional view of each process performed after the process illustrated in FIG. 7;

FIG. 9 is a cross-sectional view of a high-concentration impurity step when forming a film quality inspection region for inspection of a low-concentration source / drain region of a TFT in the active matrix substrate according to the second embodiment of the present invention.

FIGS. 10A and 10B are diagrams respectively showing a TF for an active matrix substrate according to a third embodiment of the present invention;
T low concentration source / drain region and high concentration source / drain
FIG. 4A is a cross-sectional view of a high-concentration impurity process when forming a film quality inspection region for inspection for both drain regions, and a cross-sectional view of a film quality inspection region formed by using this process.

FIG. 11 is a cross-sectional view showing a configuration of a film quality inspection region for a TFT channel region in an active matrix substrate according to a fourth embodiment of the present invention.

FIG. 12 is a cross-sectional view showing a configuration of a film quality inspection region formed at a plurality of locations on an active matrix substrate according to a fifth embodiment of the present invention.

[Explanation of symbols]

 1a Channel region 1c, 1c ', 1c "Film quality inspection semiconductor film 2 Gate insulation film 2c Inspection region side gate insulation film 3a Gate electrode 4 First interlayer insulation film 4a First contact hole 4d Second contact hole 5b 8b Cutting hole 6d Drain electrode 7 Second interlayer insulating film 8a Third contact hole 8c Opening 9a Pixel electrode 11 Image display area 20 Scan line 30 Data line 50 TFT 60 Data line drive circuit 70 Scan line drive circuit 71 Polysilazane 72 Insulating film formed by CVD method 72, 73 Signal wiring 80, 80 ', 80 "Film quality inspection area 200 Active matrix substrate 200 Counter substrate 300 Electro-optical device

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01L 29/78 624 F Term (Reference) 2H092 GA29 HA06 HA28 JA24 JA34 JA37 JA41 JA46 JB22 JB31 KA04 KA10 KB25 MA07 MA13 MA27 MA30 MA37 NA27 NA30 PA01 PA06 4M106 AA10 AA12 AA20 AB15 AB17 BA04 CA27 CB19 DH11 DH12 5C094 AA42 AA43 BA03 BA43 CA19 DA13 DB04 EA04 FB02 FB14 FB15 GB10 JA08 5F110 AA18 AA24 BB02 H03 FF04 GG04 DD02 HM14 HM15 HM18 NN03 NN04 NN22 NN23 NN35 NN36 NN40 PP03 QQ08 QQ11 QQ19

Claims (15)

[Claims] 1. An active matrix substrate having a transistor and a signal wiring formed on a substrate, wherein at least one region of the substrate on which the transistor and the signal wiring are not formed, a semiconductor used for the transistor. An active matrix substrate comprising a semiconductor film for film quality inspection of the same layer as the film. 2. The film quality inspection semiconductor film according to claim 1, wherein the film quality inspection semiconductor film is formed through an opening of an inspection region side interlayer insulation film in the same layer as an interlayer insulation film formed above the transistor. An active matrix substrate. 3. The semiconductor film according to claim 1, wherein the film quality inspection semiconductor film has the same layer as the source / drain region of the transistor and the same impurity as the source / drain region introduced at the same concentration. An active matrix substrate, characterized in that: 4. The transistor according to claim 1, wherein the source / drain region of the transistor has a low-concentration source / drain region and a high-concentration source / drain region. An active matrix substrate having the same layer as the source / drain region of one of the drain region and the high-concentration source / drain region and having the same impurity introduced as the source / drain region at the same concentration; . 5. The semiconductor device according to claim 1, wherein the source / drain region of the transistor has a low-concentration source / drain region and a high-concentration source / drain region. A first film quality inspection semiconductor film in the same layer as the drain region and in which the same impurity as the low-concentration source / drain region is introduced at the same concentration, and in the same layer as the high-concentration source / drain region; An active matrix substrate comprising a second film quality inspection semiconductor film into which the same impurity as the high-concentration source / drain region is introduced at the same concentration. 6. The method according to claim 2, wherein
The film quality inspection region in which the film quality inspection semiconductor film is formed,
An active matrix substrate having an area larger than a source / drain region of the transistor. 7. The semiconductor film according to claim 1, wherein the semiconductor film for film quality inspection is in the same layer as a channel region of the transistor, and has the same intrinsic semiconductor film or the same impurity as the channel region. An active matrix substrate, wherein the active matrix substrate is a low-concentration region. 8. The active matrix substrate according to claim 7, wherein the film quality inspection region has a larger area than a channel region of the transistor. 9. The method according to claim 1, wherein
The active matrix substrate, wherein the film quality inspection area has an area of 1 mm ² or more. 10. The thin film transistor according to claim 1, wherein the transistor is a thin film transistor, a pixel switching thin film transistor connected to a scanning line and a data line, and a pixel electrode connected to the thin film transistor on the substrate. Are formed in a matrix, a scan line drive circuit and a data line drive circuit that output signals to the scan lines and the data lines, and a plurality of signal wirings that supply signals to the drive circuit. , The film quality inspection area, the pixel portion on the substrate,
An active matrix substrate, wherein the active matrix substrate is formed in at least one of regions where the scanning line driving circuit, the data line driving circuit, and the signal wiring are not formed. 11. An electro-optical device, wherein an electro-optical material is sandwiched between the active matrix substrate defined in claim 10 and a counter substrate. 12. The method for manufacturing an active matrix substrate according to claim 3, wherein a semiconductor film and a gate insulating film used for the transistor are formed in this order, and at the same time, the film quality inspection region is formed in the film quality inspection region. Forming a semiconductor film and an inspection region side gate insulating film in this order; forming a conductive film for forming a gate electrode of the transistor; and patterning the conductive film to form the gate electrode; Removing a conductive film from a region side; selectively introducing impurities into the semiconductor film through the gate insulating film to form source / drain regions of the transistor; Introducing an impurity also into the semiconductor film for film quality inspection, and forming the interlayer on the surface side of the gate electrode. Forming an insulating film on the surface of the inspection region side gate insulating film on the inspection region side at the same time as forming the insulating film, and forming a contact hole for the transistor in the interlayer insulating film; Forming an opening in the inspection region side interlayer insulating film and the inspection region side gate insulating film in the film quality inspection region to expose the film quality inspection semiconductor film. Substrate manufacturing method. 13. The method for manufacturing an active matrix substrate according to claim 4, wherein a semiconductor film and a gate insulating film used for the transistor are formed in this order, and at the same time, a film quality inspection region is formed in the film quality inspection region. Forming a semiconductor film and an inspection region side gate insulating film in this order; forming a conductive film for forming a gate electrode of the transistor; and patterning the conductive film to form the gate electrode; Removing a conductive film from a region side; selectively introducing high-concentration impurities and low-concentration impurities into the semiconductor film through the gate insulating film to form the low-concentration source / drain regions of the transistor and At the same time as forming a high-concentration source / drain region, the film quality is Introducing one of the low-concentration impurity and the high-concentration impurity into the test semiconductor film; and forming the interlayer insulating film on the surface side of the gate electrode and simultaneously performing the test on the test region side. Forming the inspection region-side interlayer insulation film on the surface side of the region-side gate insulation film; and forming a contact hole for the transistor in the interlayer insulation film at the same time as forming the inspection region-side interlayer insulation film in the film quality inspection region. Forming the opening in the inspection region side gate insulating film to expose the semiconductor film for film quality inspection. 14. The method for manufacturing an active matrix substrate according to claim 5, wherein a semiconductor film and a gate insulating film used for the transistor are formed in this order, and at the same time, the film quality inspection region is formed in the region to be the film quality inspection region. Forming a semiconductor film and an inspection region side gate insulating film in this order; forming a conductive film for forming a gate electrode of the transistor; and patterning the conductive film to form the gate electrode; Removing a conductive film from a region side; selectively introducing high-concentration impurities and low-concentration impurities into the semiconductor film through the gate insulating film to form the low-concentration source / drain regions of the transistor and At the same time as forming a high-concentration source / drain region, the film quality is Forming the first film quality inspection semiconductor film and the second film quality inspection semiconductor film by selectively introducing the low-concentration impurities and the high-concentration impurities also into the inspection semiconductor film; Forming the interlayer insulating film on the surface side of the gate electrode and simultaneously forming the inspection region side interlayer insulating film on the surface side of the inspection region side gate insulating film on the inspection region side; Forming a contact hole for the transistor and simultaneously forming the opening in the inspection region side interlayer insulating film and the inspection region side gate insulating film in the film quality inspection region to expose the film quality inspection semiconductor film. A method for manufacturing an active matrix substrate, comprising: 15. The method for manufacturing an active matrix substrate according to claim 7, wherein a semiconductor film and a gate insulating film used for the transistor are formed in this order, and at the same time, a film quality inspection region is formed in the film quality inspection region. Forming a semiconductor film and an inspection region side gate insulating film in this order; forming a conductive film for forming a gate electrode of the transistor; and patterning the conductive film to form the gate electrode; Removing a conductive film from a region side; and selectively introducing impurities into the semiconductor film via the gate insulating film while covering the film quality inspection semiconductor film with a mask. Forming a region, and forming a contact hole for the transistor in the interlayer insulating film. Sometimes forming the opening in the inspection region side interlayer insulating film and the inspection region side gate insulating film in the film quality inspection region to expose the film quality inspection semiconductor film. A method for manufacturing a matrix substrate.