JP2000236692A - Fan - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a fan of simple construction capable of high responsiveness overcurrent protection. SOLUTION: Power, supplied from an AC power source 204 to a power supply controller 300, is supplied to a motor 203 by the operation of a semiconductor switch inside the supply controller 300, and blades 201 are rotated. If an overcurrent flows in the motor 203 from the interference with a foreign matter X in the blades 201, etc., the supply controller 300 generates a reference voltage having a voltage characteristics equivalent to that of the inter-terminal voltage of the semiconductor switch which is connected to a motor load by a reference voltage generating means formed inside. A detecting means and a control means also formed inside the supply controller 300 detect the difference between a reference voltage and the inter-terminal voltage of the semiconductor switch, control the semiconductor switch according to the difference, and safely protect the motor 203.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fan driven and rotated by a motor, and more particularly to a motor driven by a motor. In case of overload, rare short such as incomplete short with a certain short resistance, or abnormal current such as complete short,
The present invention relates to a technique for providing an electric fan capable of overcurrent protection with high responsiveness with a simple configuration.

[0002]

2. Description of the Related Art In a conventional electric fan, as shown in FIG.
However, a configuration is adopted in which it is connected to an AC power supply 204 via a main switch 202. When the main switch 202 is closed, power is supplied from the AC power supply 204 to the motor 203, and the wings 201 rotate to generate wind in synchronization with the rotation of the motor 203.

In an actual electric fan, as shown in FIG.
A metal cover 205 is attached so as to cover the wing 201. Also, by detecting the opening and closing operation of the main switch 202,
A control circuit 207 for opening and closing the relay 206 is provided. The cover 205 serves to prevent human hands and the like from touching the wings 201, but also serves to electrically secure the safety. That is, when a human hand touches the cover 205, the resistance of the cover 205 to which the human body resistance is added is determined by the control circuit 2.
07, the relay 206 is forcibly turned off. Thus, safety when using the electric fan is achieved.

In a conventional electric fan, a power supply control device having a semiconductor switch, for example, as shown in FIG.
The circuit shown in FIG.

In FIG. 1, a power supply control device for a fan according to the prior art uses an output voltage VB of a power supply 101 to a load 102.
In this configuration, a shunt resistor RS and a drain D-source S of a thermal FET QF are connected in series to a path supplied to the motor 203 (corresponding to the motor 203 in FIGS. 13 and 14). Further, a driver 901 that detects the current flowing through the shunt resistor RS and controls the driving of the thermal FET QF by a hardware circuit, and an A / A that controls the drive signal of the thermal FET QF on / off based on the current value monitored by the driver 901 D converter 902 and microcomputer (CPU) 9
03.

Thermal FET Q as a semiconductor switch
F is a thermal FET with a built-in temperature sensor (not shown)
When the temperature of the QF rises to a temperature equal to or higher than a specified value, an overheat cutoff function is provided for forcibly turning off the thermal FET QF by a built-in gate cutoff circuit. In the drawing, RG is a built-in resistor, and ZD1 is a Zener diode that bypasses an overvoltage applied to the gate G while maintaining the voltage between the gate G and the source S at 12 [V].

Further, the power supply control device for the electric fan of the prior art also has a protection function against an overcurrent between the drain D and the source S of the load 102 or the thermal FET QF. That is, the driver 901 includes the differential amplifiers 911 and 913 as a current monitoring circuit, the differential amplifier 912 as a current limiting circuit, and the charge pump circuit 915
And the internal resistance R based on the on / off control signal from the microcomputer 903 and the overcurrent determination result from the current limiting circuit.
A drive circuit 914 that drives the gate G of the thermal FET QF via G is provided.

When an overcurrent is detected through the differential amplifier 912 based on the voltage drop of the shunt resistor RS and the current exceeds the determination value (upper limit), the drive circuit 914 turns off the thermal FET QF. When the current drops below the judgment value (lower limit), the thermal FET
The QF is turned on.

On the other hand, the microcomputer 903 constantly monitors the current via a current monitor circuit (differential amplifiers 911 and 913), and if an abnormal current exceeding a normal value flows,
By turning off the drive signal of the thermal FET QF, the thermal FET QF is turned off. The microcomputer 9
If the temperature of the thermal FET QF exceeds the specified value before the drive signal of the off control is output from 03, the thermal FET QF is turned off by the overheat cutoff function.

[0010]

However, in the conventional fan, a dedicated control circuit must be separately provided in order to indirectly detect the human body resistance as shown in FIG. There was a concern that the configuration would be complicated and that it would lead to an increase in cost.

The power supply control device employed in the conventional electric fan has a configuration requiring a shunt resistor RS connected in series to a power supply path in order to detect current, as shown in FIG. However, there is a problem that the heat loss of the shunt resistor cannot be ignored due to the increase in the load current accompanying the reduction in the on-resistance of the thermal FET QF in recent years.

The overheat cutoff function and the overcurrent limiting circuit described above function when a nearly complete short circuit occurs in the load 102 or wiring and a large current flows, but the incomplete circuit having a certain degree of short circuit resistance It does not function when a rare short-circuit such as a short-circuit occurs and a small short-circuit current flows, and the microcomputer 903 must detect an abnormal current via a current monitor circuit and control the thermal FET QF to be turned off. In some cases, the responsiveness of microcomputer control to abnormal current is poor.

The shunt resistor RS and the A / D converter 9
02, the microcomputer 903 and the like are required, so that a large mounting space is required, and there is also a problem that these relatively expensive components increase the device cost.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional problems and circumstances, and eliminates the need for a shunt resistor connected in series to a power supply path to detect current, thereby suppressing heat loss and reducing the motor loss. Simplifies a fan that can provide highly responsive overcurrent protection in the event of an overload, a rare short circuit such as an incomplete short circuit with some short-circuit resistance, or an abnormal current in the case of a complete short circuit. It is to provide in a simple configuration.

[0015]

According to a first aspect of the present invention, there is provided an electric fan in which driving power supplied from a power supply to a motor load is controlled by a semiconductor switch that performs a switching operation according to a control signal. A reference voltage generating means for generating a reference voltage having a voltage characteristic equivalent to a voltage characteristic of a voltage between terminals of the semiconductor switch in a state where the motor load is connected to the semiconductor switch; It is characterized by comprising detecting means for detecting a difference from the reference voltage, and control means for controlling on / off of the semiconductor switch according to the difference between the detected inter-terminal voltage and the reference voltage.

Further, the electric fan according to claim 2 of the present invention comprises:
2. The electric fan according to claim 1, wherein the reference voltage generation unit is connected in parallel to the semiconductor switch and the motor load, and connects a second semiconductor switch and a second load that are switching-controlled in accordance with the control signal, in series. 2. And a circuit for generating a voltage between terminals of the second semiconductor switch as the reference voltage.

Further, the electric fan according to claim 3 of the present invention comprises:
3. The electric fan according to claim 2, wherein a current capacity of the second semiconductor switch is smaller than a current capacity of the semiconductor switch, and a resistance value ratio between the motor load and the second load is a current of the semiconductor switch and the second semiconductor switch. It is characterized by being equivalent to the capacity ratio.

Further, the electric fan according to claim 4 of the present invention comprises:
4. The electric fan according to claim 2, wherein the second load includes a plurality of resistors, and a resistance value of the second load is variably set by selectively connecting the plurality of resistors. 5. And

Further, the electric fan according to claim 5 of the present invention comprises:
The electric fan according to any one of claims 1 to 4, further comprising overheat protection means for turning off and protecting the semiconductor switch when the semiconductor switch is overheated.

In the electric fan according to the first to fifth aspects of the present invention, when the power supply from the power supply to the motor load is controlled by the semiconductor switch, the predetermined motor load is connected to the semiconductor switch by the reference voltage generating means. A reference voltage having a voltage characteristic equivalent to the voltage characteristic of the voltage between the terminals of the semiconductor switch in the state in which the voltage is applied, and detecting the difference between the voltage between the terminals of the semiconductor switch and the reference voltage by the detection means; The semiconductor switch is turned on / off in accordance with the difference between the applied terminal voltage and the reference voltage.

In particular, in the electric fan according to the second aspect, the reference voltage generating means is configured by connecting a circuit in which the second semiconductor switch and the second load are connected in series to the semiconductor switch and the motor load in parallel. It is desirable to generate a voltage between terminals of the semiconductor switch as a reference voltage.

According to the electric fan of the third aspect, the current capacity of the second semiconductor switch is set to be smaller than the current capacity of the semiconductor switch, and the resistance ratio between the motor load and the second load is set to be smaller. And the current capacity ratio of the second semiconductor switch. Here, the current capacity ratio of the semiconductor switch and the second semiconductor switch can be determined by, for example, the emitter area ratio when the semiconductor switch and the second semiconductor switch are formed by bipolar transistors, and by the FET. When they are formed, they may be realized by the ratio of the number of transistors formed by connecting the switches in parallel. At this time, the resistance value of the second load is determined as the resistance value of the load × (current capacity of semiconductor switch / current capacity of second semiconductor switch). By setting such a circuit rule, the circuit configuration of the reference voltage generating means having the second semiconductor switch and the second load can be reduced in size, the mounting space can be reduced, and the cost of the fan can be reduced.

According to the electric fan of the present invention, the second load includes a plurality of resistors, and the plurality of the resistors are selectively connected to variably set the resistance value of the second load. . A set value of the reference voltage generating means for determining the degree of deviation of the terminal voltage of the semiconductor switch (that is, the power supply path) from the normal state, in other words, a reference for performing overcurrent determination due to overload or the like. Can be performed by changing the resistance value of the second load. For example, when the second load is formed on a chip, a plurality of resistors are provided inside the chip to package the chip, or
By selectively connecting when mounting the bare chip, the set value (reference) of the reference voltage generation means can be set to a target specification. This makes it possible to cover a plurality of motor specifications with one type of chip even when the power supply control device constituting the electric fan is integrated. In addition, the variable setting of the resistance makes it possible to reliably distinguish between a complete short circuit and an overload (incomplete short circuit) in accordance with the rating and performance of the motor load, and it is possible to accurately protect them.

According to the electric fan of the present invention, when the semiconductor switch is provided with overheat protection means for controlling the semiconductor switch to be turned off and protected when the semiconductor switch is overheated, an overcurrent and a certain short-circuit resistance are prevented. When an incomplete short circuit occurs, the control means repeats on / off control of the semiconductor switch to greatly fluctuate the current, and the heat generation of the semiconductor switch causes the overheat protection means to quickly shut off the semiconductor switch. Can be. Above all,
High-speed response to abnormal current caused by incomplete short circuit (rare short) that could only be done by program processing of a microcomputer or the like without using external control such as a microcomputer. Can be realized.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of a fan according to the present invention will be described with reference to [common configuration], [first embodiment], [second embodiment], [third embodiment]. , [Fourth Embodiment], [Fifth Embodiment], and [Modifications] will be described in detail with reference to FIGS. Here, FIG.
FIG. 1 is a circuit configuration diagram of a power supply control device constituting a fan according to a first embodiment of the present invention. FIG. 2 is a detailed circuit configuration diagram of a semiconductor switch (thermal FET) used in the embodiment, and FIGS. FIG. 5 is an explanatory diagram for explaining the principle used by the power supply control device and the power supply control method constituting the electric fan according to the embodiment. FIG. 6 is a diagram showing the power supply control constituting the electric fan according to the embodiment at the time of short-circuit failure and normal operation. FIG. 7 is a waveform diagram illustrating the current and voltage of a semiconductor switch in the device, FIG. 7 is a circuit configuration diagram of a power supply control device constituting a fan according to a second embodiment of the present invention, and FIG. 8 is a third embodiment of the present invention. 9 is a circuit configuration diagram of a power supply control device constituting the electric fan of FIG.
FIG. 10 is a circuit configuration diagram of a power supply control device configuring a fan according to a fourth embodiment of the present invention; FIG. 10 is a circuit configuration diagram of a power supply control device configuring a fan according to a fifth embodiment of the present invention;
FIG. 11 is a circuit diagram illustrating a configuration of a second load (resistance) in a power supply control device included in a fan according to a modification. FIG. 12 is a schematic configuration of a fan common to the first to fifth embodiments.

[Common Configuration] In the first to fifth embodiments described below, a common configuration is shown in FIG.
The circuit configuration shown in FIG.

Here, the AC power supply 204 is a commercial AC power supply. The power supply control device 300 is a circuit for supplying continuous pulse power to the motor 203, as described in detail below. A wing 201 is attached to the motor 203 and is driven to rotate by the motor 203.
As shown in the figure, when the foreign matter X interferes with the wing 201 (or dust is clogged around the motor shaft) and the motor 203 is overloaded, the power supply device 300
3 serves to stop the current supply to the power supply 3. Note that the resistor Rr is actually provided inside the power supply device 300 and is a resistor for setting the threshold value of the motor current for the device to determine that the motor 203 is overloaded.

In addition, the electric fans of the first to fifth embodiments are capable of protecting against overload caused by foreign substances interfering with the wings and the motor shaft, as well as overload caused by short-circuiting of the motor windings. Even protects.

[First Embodiment] A power supply control device 300 constituting a fan according to a first embodiment of the present invention will be described with reference to FIG. 1. Power supply control constituting a fan according to the present embodiment will be described. The device 300 includes an output voltage VB of the power supply 101 (generated by rectifying and smoothing the AC power supply 204).
Is supplied to the load 102 (corresponding to the motor 203 in FIG. 12) through a thermal FET QA as a semiconductor switch.
Are connected in series. Here, the thermal FET QA has an NMOS of DMOS structure.
Although a type is used, a PMOS type can also be realized.

In the same figure, for the part for controlling the drive of the thermal FET QA, the FET QB and the resistors R1 to R1 are connected.
R10, Zener diode ZD1, diode D1,
The configuration includes a comparator CMP1, a drive circuit 111, and a switch SW1. Although “R” and subsequent numbers are used for the resistors as reference symbols, the following description uses them as reference symbols and also indicates the resistance values of the resistors. A portion 110a surrounded by a dotted line in FIG. 1 indicates a chip portion to be analog-integrated.

The load 102 is a fan motor as described above, and functions when a user or the like turns on the switch SW1. The drive circuit 111 includes a source transistor Q5 whose collector is connected to the potential VP and a sink transistor Q6 whose emitter is connected to the ground potential (GND) connected in series, and is switched by turning on / off the switch SW1. Based on the signal, the source transistor Q5 and the sink transistor Q6 are turned on / off to output a signal for driving and controlling the thermal FET QA. In the figure, VB is the output voltage of the power supply 101, for example, 12 [V]. VP is an output voltage of the charge pump, for example, VB + 10 [V].

Thermal FET Q as a semiconductor switch
More specifically, A has a configuration as shown in FIG. In FIG. 2, the thermal FET QA has a built-in resistor R
G, a temperature sensor 121, a latch circuit 122, and an overheat cutoff FET QS. Note that ZD1 is a gate G-
This is a Zener diode that bypasses an overvoltage applied to the gate G while maintaining the voltage between the sources S at 12 [V].

That is, the thermal F used in this embodiment is
In the ETQA, when the temperature sensor 121 detects that the temperature of the thermal FET QA has risen to a temperature equal to or higher than a prescribed value, detection information to that effect is held in the latch circuit 122, and the overheat cutoff FET QS as a gate cutoff circuit is turned on. An overheat shutoff function is provided for forcibly turning off the thermal FET QA by operating.

The temperature sensor 121 is composed of four diodes connected in cascade.
It is arranged and formed near a T (thermal) FET. As the temperature of the main FET rises, the resistance value of each diode of the temperature sensor 121 decreases. Therefore, when the gate potential of the FET Q51 falls to a potential that is set to the “L” level, F
The ETQ 51 transitions from the on state to the off state. As a result, the gate potential of the FET Q54 becomes the thermal FET QA
Is pulled up to the potential of the gate control terminal (G) of
The TQ 54 changes from the off state to the on state, and “1” is latched in the latch circuit 122. At this time, the output of the latch circuit 122 becomes “H” level, and the overheat cutoff FET QS transitions from the off state to the on state, so that the potential level of the true gate (TG) of the main FET becomes “L” level. As a result, the main FET transitions from the on-state to the off-state, and the overheat is cut off.

In the power supply control device 300 constituting the electric fan of the present embodiment, the overload on the load 102 (motor) or the drain D of the motor or the thermal FET QA
An overcurrent due to a short-circuit fault occurring between the sources S,
Alternatively, a protection function against abnormal current due to an incomplete short circuit is provided. Hereinafter, a configuration for realizing this protection function will be described with reference to FIG.

First, the reference voltage generating means described in the claims comprises an FET (second semiconductor switch) QB and a resistor (second load) Rr. The drain and gate of the FET QB are connected to the drain (D) and the true gate (TG) of the thermal FET QA, respectively.
The source (SB) of the TQB is connected to one terminal of the resistor Rr, and the other terminal of the resistor Rr is connected to the ground potential (GND). Thus, the FET QB and the thermal F
By sharing the drain (D) and the gate (TG) of the ETQA, integration on the same chip (110a) can be facilitated.

The FET QB and the thermal FET Q
A uses the one formed on the same chip (110a) in the same process to remove (reduce) the effects of temperature drift and lot-to-lot variation. Further, the current capacity of the FET QB is equal to that of the thermal FET QA.
Each FET is smaller than the current capacity of
Are configured such that (the number of transistors of the FET QB: 1) <(the number of transistors of the thermal FET QA: 1000).

Further, the resistance value of the resistor Rr is, as described later, the resistance value of the winding of the load 102 (motor) × (FET QB
(The number of transistors: 1 / the number of transistors of the thermal FET QA: 1000).
By setting the resistor Rr, the same drain-source voltage VDS as when a normal operation load current flows through the thermal FET QA can be generated in the FET QB. In addition, by the above-described circuit definition, the configuration of the reference voltage generating means composed of the FET QB and the resistor Rr can be made as small as possible, and the mounting space can be reduced to reduce the cost of the electric fan.

The variable resistor RV is connected in series to the load 102 between the source SA resistors R1 and R2 of the thermal FET QA and the voltage dividing point. By changing the resistance value of the variable resistor RV, the resistance value of the second load is equivalently variably set. That is, by setting the variable resistor RV outside the chip 110a and adjusting the variable resistor RV, it is possible to set the set value (reference) of the reference voltage generating means to the target specification. As a result, even when analog integration is performed, 1
A plurality of specifications can be covered by the type of chip 110a.

The comparator CMP1 forms a part of the detecting means described in the claims. The "+" input terminal of the comparator CMP1 is connected to the drain D of the thermal FET QA.
A voltage obtained by dividing the voltage VDS between the source S by the resistor R1, the resistor R2, and the parallel resistor (R2‖RV) of the variable resistor RV is supplied through the resistor R5. The source voltage VS of the FET QB is supplied to the “−” input terminal of the comparator CMP1. That is, the output is valid ("H" level) when the potentials supplied to the "+" and "-" input terminals substantially match, and invalid ("L" level) when they do not match. As described later, the comparator CMP1 has a certain hysteresis.

Next, based on the circuit configuration described above,
A power supply control method in the electric fan of the present embodiment will be described. Before giving a specific description of the operation, a principle used by a power supply control device 300 and a power supply control method of the power supply control device 300 constituting the electric fan of the present embodiment will be described with reference to FIGS. 3, 4, and 5. Here, FIG. 3 is an explanatory diagram of a falling characteristic of a drain-source voltage at the time of transition from an off state to an on state, FIG. 4 is a conceptual circuit diagram, and FIG. FIG. 4 is an explanatory diagram illustrating characteristics with respect to voltage. Note that the circuit constants used here are merely examples for explaining the principle, and when applied to an actual fan, they are appropriately set according to the performance.

Thermal FET QA as a semiconductor switch
Is used, a power supply path from the power supply 101 to the load 102 is conceptually represented as a circuit as shown in FIG. The load 102 includes a wiring inductance L0 and a wiring resistance R0 of the power supply path. The route or load 1
When a short-circuit failure occurs in 02, R0 also includes a short-circuit resistance.

The drain-source voltage VDS of the thermal FET QA forming a part of such a power supply path is as shown in FIG. 3 as a falling voltage characteristic when the thermal FET QA transitions from an off state to an on state. . That is, in the case of a short circuit, in the case of a reference load (normal operation), the load 1
02 is a falling voltage characteristic when the resistance is 1 [KΩ]. As described above, the fall characteristic changes according to the state of the power supply path and the load, that is, the time constant based on the wiring inductance and the wiring resistance and the short-circuit resistance of the path.

As a method of detecting an overcurrent utilizing such a change in the characteristic of the drain-source voltage VDS, in addition to the method described below, a comparison with a predetermined threshold value is performed at a predetermined timing. A method of detecting overcurrent is conceivable.However, components such as a capacitor and a plurality of resistors are required in order to constitute a means for defining a predetermined timing and a means for comparing with a predetermined threshold, and it is detected that these components vary. There is a problem that an error occurs. In addition, since a capacitor is required, and the capacitor cannot be mounted in a chip, external parts are required, which causes an increase in apparatus cost.

In FIG. 3, the thermal FET QA operates in a pinch-off region during a period from when the thermal FET QA is turned on to when the drain-source voltage VDS is saturated.

The load (motor) 102 has a resistance of 1
The change in the drain-source voltage VDS at [KΩ] can be considered as follows. That is, firstly, for example, the "HAF2001" manufactured by Hitachi is added to the thermal FET QA.
Is used, since the drain current ID = 12 [mA], the gate-source voltage VTGS is substantially maintained at the threshold voltage 1.6 [V]. Second, the driving circuit 111
, The gate-to-source voltage VTGS rises, and the drain-to-source voltage VDS decreases.
Since the capacitance value CGD between the gate and the drain is increased, the electric charge reaching the gate-source voltage VTGS is absorbed. In other words, the drain-source voltage VDS drops at such a rate that the charge reaching the gate-source voltage VTGS generates a capacitance that does not cause a potential rise. As a result, the gate-source voltage V
TGS is maintained at about 1.6 [V].

In addition, the following interpretation can be made regarding the change in the drain-source voltage VDS when the load resistance = 1 [KΩ]. In other words, at each lapse of time after the thermal FET QA transitions to the ON state, the drive circuit 111 absorbs the charge transmitted to the gate (G), and keeps the true gate (TG) voltage VTGS constant. Drain-
It shows the value of the source-to-source voltage VDS. Therefore, if the drain-source voltage VDS is above the curve when the load resistance = 1 [KG] in FIG. 3 after a certain elapsed time, the gate-source voltage VTGS becomes higher than 1.6 [V]. Means that. Note that the drain-source voltage VDS does not fall below the curve when the load resistance = 1 [KΩ] in FIG.

Further, assuming that the distance from the curve when the load resistance in FIG. 3 is 1 [KΩ] is ΔVDSGAP, ΔVDSGAP × CG
If the charge for D is subtracted from the gate-source voltage VTGS, it means that the gate-source voltage VTGS becomes 1.6 [V]. In other words, the gate-source voltage VTGS is increased from 1.6 [V] by this charge. This can be expressed by the following equation.

VTGS-1.6 = ΔVDSGAP × CGD / (CGS × CGD) That is, ΔVDSGAP is (gate-source voltage VTGS-1.
6 [V].

Further, as shown in the characteristics of FIG. 5, there is a nearly one-to-one relationship between the gate-source voltage VTGS and the drain current ID. Here, the characteristics in FIG. 5 are those of "HAF2001" manufactured by Hitachi, and VGS in the figure corresponds to the gate-source voltage VTGS here. Therefore, it can be said that ΔVDSGAP represents the drain current ID based on the correspondence shown in the characteristics of FIG. In FIG. 5, the resolution around the drain current ID = 10 [A] is about 80 [mV / A]. That is, 1
The drain current ID of [A] corresponds to the gate-source voltage VTGS of 80 [mV], and the change of the drain current ID of ± 5 [A] is ± 0.4 [V]. Changes in VTGS correspond. This resolution corresponds to the resolution equivalent to shunt resistance RS = 80 [mΩ] in the conventional example.

When the drain current ID is zero, the curve of the drain-source voltage VDS is determined only by the gate charging circuit and the Miller capacitance. However, when the drain current ID flows, the inductance Lc of the circuit and the entire circuit are reduced. It will be affected by the resistance Rc. When the drain current ID increases like a complete short path (dead short),
The rising gradient of the drain current ID is the inductance Lc.
And the resistance Rc, the rising slope of the drain current ID does not reach a constant value.
The curve of the source-to-source voltage VTGS also converges.

The characteristic shown in FIG. 5 has a temperature singularity. In the case of “HAF2001” manufactured by Hitachi, drain current ID = 15 [A], gate-source voltage VTGS =
It is around 3.3 to 3.4 [V]. The normal normal load current is about 15 [A] or less, and therefore comes below the singular point. In this lower region, the same drain current ID
On the other hand, the gate-source voltage VTGS
Becomes smaller. Therefore, malfunction can be reduced even under high temperature conditions, which is advantageous.

If the circuit for charging the gate is different,
The curve of the drain-source voltage VDS changes for the same load current. Therefore, the gate charging current must always maintain the same condition. If the gate charging current is reduced, the curve of the drain-source voltage VDS shifts upward. If this property is used to increase the drain-source voltage VDS for the same drain current ID, overheat interruption by the overheat protection function can be promoted. The overheat cutoff promotion circuit (overheat cutoff promotion circuit) described below utilizes this.

Next, the operation of the power supply control device 300 constituting the electric fan of the present embodiment will be described based on the above considerations. First, the thermal EFT QA and the reference voltage generating means (FET QB, resistor Rr) will be described. When the thermal FET QA and the FET QB are operating in the pinch-off region, a current mirror (Current mirror)
A circuit is configured, and the drain current IDGA = 1000 × the drain current IDGS.

Therefore, when IDQA = 5 [A] flows as the drain current of the thermal FET QA and IDQB = 5 [mA] flows as the drain current of the FET QB, the drain-source voltage VDS of each of the thermal FET QA and the FET QB respectively. And the gate-source voltage VTGS match. That is, VDSA = VDSB, VTGSA = V
TGSB. Here, VDSA = VDSB is the drain-source voltage of the thermal FET QA and FET QB, respectively, and VTGSA = VTGSB is the thermal FET Q
A, gate-source voltage of FET QB.

Therefore, when the FET QB is completely turned on, the power supply voltage VB is substantially applied to both ends of the resistor Rr. Therefore, the load of the FET QB equivalent to the 5 [A] load connected to the thermal FET QA is applied. As the resistance R
The resistance value of r is Rr = 12 [V] / 5 [mA] -1.4.
[KΩ].

As described above, here, the thermal FET Q
A is based on the value (curve) of the drain-source voltage VDS when a load current of 5 [A] flows through A.
By configuring the reference voltage generation means using an FET QB having a smaller transistor number ratio (= current capacity ratio) than the ETQA, the required function can be realized with a smaller chip area and a smaller chip occupation area. It is.
Further, as described above, the FET QB and the thermal FET Q
By configuring on the same chip in the same process as A, the influence of lot-to-lot variation and temperature drift can be eliminated, and detection accuracy can be greatly improved.

Next, the operation in the pinch-off region will be described. When the thermal FET QA transitions to the ON state, the drain current IDQA rises toward the final load current value determined by the circuit resistance. Also, thermal F
The gate-source voltage VTGSA of ETQA takes a value determined by the drain current IDQA, and the drain-source voltage VTGSA
This starts up while the brake is applied by the Miller effect of the capacitor capacitance CGD due to the decrease in DSA. Further, the gate-source voltage VTGSB of the FET QB is the drain current IDQB = 5 [mA] (the drain current IDQA =
5 [A]), the gate-source voltage VTGSB
= VTGSA, but after that, the drain current I
Since DQB = 5 [mA] is constant (constant in the pinch-off region), the gate-source voltage VTGSB is also constant, and in the case of "HAF2001" manufactured by Hitachi, it is about 2.7.
[V] Becomes constant.

Since the gate-source voltage VTGSA of the thermal FET QA increases as the drain current IDQA increases, the gate-source voltage VTGSB
<VTGSA. VDSA = VTGSB + VTGD, VDS
Since there is a relation of B = VTSGB + VTGD, VDSA-VDSB
= VTGSA-VTGSB. Here, the gate-source voltage difference VTGSA-VTGSB is equal to the drain current IDQA-5.
[A], the difference VDS between the drain-source voltage
By detecting A-VDSB, the drain current IDQA-
5 [A] can be obtained.

The drain-source voltage VDS of the FET QB
B is directly input to the comparator CMP1 and the thermal F
The value obtained by dividing the drain-source voltage VDSA of the ETQA by R1 and the resistor R2 (here, the variable resistor RV is not taken into consideration) is input to the comparator CMP1. That is, VDSA × R1 / (R1 + R2) (1) is input to the comparator CMP1. Immediately after the thermal FEGQA transitions to the ON state, the FET Q
B is the drain-source voltage VDSB> (1),
(1) increases as the drain current IDQA of the thermal FET QA increases, and eventually becomes larger than the drain-source voltage VDSB of the FET QB. At this time, the output of the comparator CMP1 changes from "H" level to "L" level. And the thermal FET QA is turned off.

In the comparator CMP1, a hysteresis is formed by the diode D1 and the resistor R5.
When the thermal FET QA transitions to the off state, the gate potential is grounded by the sink transistor Q6 of the drive circuit 111, and the cathode side potential of the diode D1 becomes VDDSB.
−0.7 [V] (forward voltage of Zener diode ZD1), so that resistance R1 → resistance R5 → diode D
The current flows in the path of 1 and the “+” of the comparator CMP1
The potential of the input terminal is lower than when the drive circuit 111 is ON-controlled. Therefore, the difference between the drain-source voltage V DSA −V DSB that is smaller than that when the state transits to the off state.
Until then, the thermal FET QA maintains the off state, and then transitions to the on state. It should be noted that there are various methods for attaching the hysteresis characteristic, but this is one example.

The voltage VDSA between the drain and the source when the thermal FET QA transitions to the off state is set to the threshold value VDSAth
Then, the following equation is established.

[0063]

VDSAth−VDSA = R2 / R1 × VDSB (at 5 [mA]) (2) The overcurrent determination value is determined by the equation (2). To change the overcurrent determination value, a variable resistor RV connected in parallel to the resistor R2 grounded outside the chip 110a is adjusted. With this adjustment, the overcurrent determination value can be shifted downward.

Next, the operation in the ohmic region will be described. When wiring is normal, thermal FET QA
Transitions to the ON state, the thermal FET QA continuously maintains the ON state, so that the gate-source voltages VTGSA and VTGSB reach nearly 10 [V], and both the thermal FETs QA and FETQB operate in the ohmic region. .

In this region, the drain-source voltage VDS
And the drain current ID no longer has a one-to-one relationship.
In the case of "HAF2001" manufactured by Hitachi, when the on-resistance is the drain-source voltage VDS = 10 [V], RDS (ON)
= 30 [mΩ], so that

[0066]

VDSB = 5 [A] × 30 [mΩ] = 0.15 [V] VDSA = IDQA × 30 [mΩ] VDSA−VDSB = 30 [mΩ] × (IDQA-5 [A]) 3) Also, when the drain current IDQA increases due to an overload on the motor, a short circuit of the wiring, or the like, the value of Expression (3) increases, and when the overcurrent determination value is exceeded, the thermal FET QA is turned off. Thereafter, the state shifts to the state of the pinch-off region, and the thermal FET QA repeats the transition to the ON state and the OFF state, eventually leading to overheat interruption. If the wiring is restored to normal before the overheating is interrupted (an example of an intermittent short-circuit failure), the thermal FET QA continuously keeps on and returns to the operation in the ohmic region.

FIG. 6 illustrates a waveform diagram of current and voltage of the thermal FET QA in the power supply control device 300 constituting the electric fan of the present embodiment. Here, FIG.
6A shows the drain current ID (A), and FIG. 6B shows the drain-source voltage VDS. In FIG. 6A, in the case of a complete short circuit (dead short circuit), in the case of normal operation,
Is the case of overload or incomplete short circuit.

When a complete short circuit (dead short circuit) has occurred (in the figure), when the thermal FET QA transitions from the off state to the on state, the drain current ID suddenly flows. Subsequently, the thermal FET QA is overheated, and the thermal FET QA is overheated and shut off by the overheat shutoff protection function, that is, the transition of the overheat shutoff FET QS to the ON state.

When the motor of the electric fan is overloaded, or when an incomplete short circuit having a certain short-circuit resistance occurs (in the figure), the thermal FET QA is turned on / off as described above. By repeating the control, the drain current ID is largely fluctuated, and the thermal FET QA is periodically heated so that the thermal FET QA has an overheat protection function, that is, the thermal FET QA is turned on to accelerate the thermal FET QA. ing.

As described above, the electric fan of the present embodiment does not require the conventional shunt resistor connected in series to the power supply path for detecting the current, and does not use the shunt resistor to connect the motor to the motor. It is possible to detect the overcurrent due to overload with high accuracy, suppress the heat loss of the entire fan, and not only the motor overload condition but also the incomplete short circuit with some short circuit resistance In the case where a rare short circuit occurs or an abnormal current at the time of a complete short circuit can be continuously detected by a hardware circuit.

In the case of an overload or an incomplete short circuit, the on / off control of the thermal FET QA is repeatedly performed to greatly vary the current, and the periodic heating of the semiconductor switch causes the thermal FET QA to shut off (off) due to the overheat protection function. Control) can be accelerated. Furthermore, since the on / off control of the semiconductor switch can be performed only by a hardware circuit without using a microcomputer, the mounting space of the electric fan can be reduced, and the device cost can be greatly reduced.

Further, as in the present embodiment, although a change in the characteristics of the drain-source voltage VDS is used, the threshold value is compared with a predetermined threshold value at a predetermined timing to compare with another method of detecting an overcurrent. Therefore, components such as a capacitor and a plurality of resistors are not required, so that a detection error due to variations in the components can be further reduced. Further, since an external capacitor for the chip 110a is not required, a mounting space and a device cost are further reduced. be able to.

Further, by adjusting the variable resistor RV, it is possible to reliably detect the separation between a complete short circuit and an overload (including an incomplete short circuit) according to the type of the motor as the load 102. Therefore, protection against short-circuit failure can be accurately performed.

Further, since the setting of the resistance value can be performed by a selection method, it becomes easy to set the threshold value of the overcurrent according to the rating and performance of the motor.

[Second Embodiment] Next, a power supply control device and a power supply control method thereof constituting a fan according to a second embodiment will be described with reference to FIG. The configuration of the power supply control device for the electric fan of the present embodiment is different from the configuration of the first embodiment shown in FIG. 1 in that resistors R3, R4, R6,
R9, FETs Q1, Q2 and Zener diode ZD
2 is added. Note that a portion 110b surrounded by a dotted line in FIG. 7 indicates a chip portion on which analog integration is performed.

That is, the Zener diode ZD2 is connected to the gate of the FET Q1 whose gate and source are connected by the resistor R9.
The true gate TG of the thermal FET QA is connected via the resistor R6, the drain of the FET Q1 is connected to VB + 5 [V] via the resistor R4, and the source of the FET Q1 is connected to the source SA of the thermal FET QA. Also,
A circuit in which the resistor R3 and the drain of the FET Q2 are connected is connected in parallel with the resistor R1, and the voltage division of the drain-source voltage VDS of the thermal FET QA is changed by ON / OFF control of the FET Q2. .

Next, the operation of the power supply control device constituting the electric fan of this embodiment will be described. First, the operation in the pinch-off region will be described. As in the first embodiment, the drain-source voltage VDSB of the FET QB is directly input to the comparator CMP1, and the thermal FET QA
Of the drain-source voltage VDSA, the value obtained by dividing the parallel resistance (R1‖R3) of the resistors R1 and R3 and the resistor R2 (here, the variable resistor RV is not taken into account) is input to the comparator CMP1. .

That is, the value of the following equation is input to the comparator CMP1.

[0079]

VDSA × (R1‖R3) / ((R1‖R3) + R2) ‥‥‥ (1 ′) Immediately after the thermal FET QA transitions to the ON state, FE
Although the drain-source voltage VDSB of TQB> (1 '), (1') increases as the drain current IDQA of the thermal FET QA increases, and eventually becomes larger than the drain-source voltage VDSB of the FET QB. At this time, the output of the comparator CMP1 changes from the "H" level to the "L" level, and the thermal FET QA is turned off.

The drain-source voltage VDSA when the thermal FET QA transitions to the off state is set to the threshold value VDSAt
Assuming h, the following equation holds.

[0081]

VDSAth−VDSA = R2 / (R1‖R3) × VDSB (2 ′) The overcurrent determination value is determined by the equation (2 ′). In addition,
To change the overcurrent determination value, as in the first embodiment, a variable resistor RV connected in parallel to the resistor R2 grounded outside the chip 110a is adjusted. With this adjustment, the overcurrent determination value can be shifted downward.

The operation in the ohmic region, the operation described with reference to FIG. 6, and the like are the same as in the first embodiment, and will not be described.

Next, the overcurrent determination value will be considered. Here, the same value is used as the overcurrent determination value in both the pinch-off region and the ohmic region.

First, △ (VDSA) in the pinch-off region
−VDSB) / △ ID is obtained. The following equation is obtained from the characteristic curve of HAF2001.

[0085]

ΔVTGSA / ΔIDQA = 80 [mV / A] (4) ΔVTGSA = △ (VDSA−VDSB) × CTGD / (CTGS + CTGD) = △ (VDSA−VDSB) × 1200 pF / (1800 pF + 1200 pF) = △ (VDSA-VDSB) × 0.4 (5) From equations (4) and (5),

Δ (VDSA−VDSB) / ΔID = 200 [mV / A] (6)

Further, Δ (VDSA) in the ohmic region
−VDSB) / △ ID is given by equation (3).

７ (VDSA−VDSB) / △ ID = 30 [mV / A] (7)

Comparing equations (6) and (7), the current sensitivity is more sensitive in the pinch-off region than in the ohmic region,
Even if the overcurrent determination value is appropriate in the ohmic region, it may be too low in the pinch-off region and may be caught too much. As a countermeasure, there is a method of changing the overcurrent determination value between the pinch-off region and the ohmic region. A circuit added in the present embodiment to the configuration of the first embodiment is this countermeasure circuit.

The determination as to the pinch-off region or the ohmic region is made based on the magnitude of the gate-source voltage VTGSA. The gate-source voltage VTGSA in the pinch-off region increases as the drain current ID increases, but does not exceed 5 [V] even in the case of a complete short circuit (dead short circuit).
Therefore, if the gate-source voltage VTGSA> 5 [V], it can be determined that the transistor is in the ohmic region.

Immediately after the thermal FET QA transitions to the ON state, the FET Q1 is OFF and the FET Q2 is ON. A voltage higher than the power supply voltage VB, for example, VB + 5 [V] is required to cause the FET Q2 to transition to the ON state.

If the Zener breakdown voltage of Zener diode ZD2 is set to 5 [V] -1.6 [V] (threshold voltage of FET Q1), gate-source voltage VTGSA> 5
When the voltage becomes [V], the FET Q1 transitions to the ON state,
Since Q2 transitions to the OFF state, the resistor R3 that is in parallel with the resistor R2 is removed in a circuit.

Since the compression ratio of the drain-source voltage VDSA becomes small, the difference VDSA-VDSB between the drain-source voltage determined as an overcurrent becomes smaller. Thus, in the ohmic region, the overcurrent is determined with a smaller current value than before the countermeasure.

However, there is a possibility that there is no practical problem even if the countermeasure by the additional circuit in this embodiment is not performed. That is, when the final load current value is small in the pinch-off region, the voltage completely rises in the pinch-off region. That is, when the final load current value reaches the final load current value in the pinch-off region, when the final load current value is large, the current value is still rising in the pinch-off region, and the current value in the pinch-off region is even in the case of a complete short circuit (dead short). Up to 4
It is limited to 0 [A].

That is, as the final load current value increases, the current rise characteristic with a certain gradient falls off, and the difference between the drain-source voltage VDSA becomes smaller as the final load current value increases. Due to this phenomenon, even if the current sensitivity in the pinch-off region is large, the difference VDSA-VDSB between the drain and the source does not increase, and the additional circuit as in this embodiment depends on the selection of the current value in the reference voltage generation circuit. With the configuration of the first embodiment, practical overcurrent detection protection can be realized without using the countermeasure according to the first embodiment.

The power supply control device and the power supply control method constituting the electric fan according to the present embodiment can provide the same effects as those described in detail in the first embodiment.

Here, finally, the concept of overcurrent control will be summarized. The basic concept is as follows. First, when the wiring is normal, when the thermal FET QA transitions to the ON state, the thermal FET QA enters the ohmic region. As long as the wiring is normal, the thermal FET QA stays in the ohmic region and the thermal FET QA continues to maintain the ON state. Next, an abnormality occurs in the wiring, the current increases, and the difference between the drain-source voltage VDSA-V
When DSB exceeds the overcurrent determination value, the thermal FET QA transitions to the off state and enters a pinch-off region. As long as the wiring abnormality continues, the thermal FET QA repeats the transition between the ON state and the OFF state, stays in the pinch-off region, and finally reaches the overheat cutoff.

In order to realize the above basic concept and optimize the control, the overcurrent judgment value must satisfy the following two conditions. First, in the normal current range, the thermal F
That is, never turn off the ETQA. Secondly, after the overcurrent is determined in the ohmic region, the thermal FET QA continuously repeats the transition to the on / off state in the pinch-off region unless the wiring abnormality is improved. This is necessary to stabilize the cycle of the on / off control. Stabilizing the cycle of the on / off control leads to stability of the control, and the timer is set using the cycle of the on / off control (see the fifth embodiment described later). Stabilization is needed.

In order to satisfy the first and second conditions, the overcurrent judgment value in the ohmic region is set to the current value of “normal current maximum value + α” (corresponding VDSA−VDSB), and the pinch-off region It is necessary to set the overcurrent determination value to “normal current maximum value + β”. At this time, α> β.
That is, α-β is an offset amount necessary for staying in the pinch-off region.

[Third Embodiment] Next, a power supply control device and a power supply control method constituting a fan according to a third embodiment will be described with reference to FIG. Second
The difference from the circuit configuration (FIG. 7) in the power supply control device constituting the electric fan of the embodiment is that the gate of the FET QB is not connected to the true gate TG of the thermal FET QA,
R41 is added as a gate resistance of the TQB, and the resistance R4
1 is connected to the gate G of the thermal FET QA. Otherwise, the circuit configuration is the same as that of the second embodiment. A portion 110c surrounded by a dotted line in FIG. 8 indicates a chip portion where analog integration is performed.

The resistance value of the resistor R41 is R41 = 1.
000 × R7. For example, R7 = 1
If 0 [KΩ], R41 = 10 [MΩ]. Since the resistance value becomes extremely high, the ratio of the number of transistors in consideration of cost and productivity is set to about 1: 100 and R41
= 1 [MΩ].

The operation of the power supply control device constituting the electric fan of this embodiment is equivalent to that of the second embodiment, and has the same effect as that of the first embodiment.

[Fourth Embodiment] Next, a power supply control device and a power supply control method constituting a fan according to a fourth embodiment will be described with reference to FIG. The power supply control device constituting the electric fan according to the present embodiment is different from the circuit configuration (FIG. 1) in the power supply control device constituting the electric fan according to the first embodiment in FIG.
And an overheat accelerating circuit 106. Note that a portion 110d surrounded by a dotted line in FIG. 9 indicates a chip portion to be analog-integrated.

[0102] When the power of the electric fan is turned on,
An inrush current several times to several tens times the steady state flows. The period during which the inrush current flows varies depending on the type and capacity (size) of the load 102, and is approximately 3 [msec] to 20 [ms].
ec]. During the period when the rush current flows, the first,
When the overcurrent control as described in the second or third embodiment is performed, it takes time for the load 102 to reach a steady state, and the load itself has a poor response such as a delay in lighting of the light. May be. In the present embodiment, such a problem is solved by adding the inrush current mask circuit 105 to the configuration of FIG.

In the first, second, or third embodiment, when an overcurrent due to a complete short circuit is detected,
Immediately, protection by overheating cutoff functions and thermal FET Q
A can be overheated (off control), but when the motor is overloaded or the winding is incompletely short-circuited, the on / off control of the thermal FET QA is repeatedly performed,
Since the overheat cut-off is made to function by the periodic heat generation action of the thermal FET QA, the time until the overheat cut-off may be relatively long. In the present embodiment, the overheat cutoff promotion circuit (overheat cutoff promotion means) 106 accelerates the cutoff of the thermal FET QA even in the case of overload or incomplete short circuit.

Referring to FIG. 9, inrush current mask circuit 105
Are FETs Q11 and Q12, diode Dll, resistor R
11 to R13 and a capacitor C11.

Next, the operation of the inrush current mask circuit 105 will be described. When the thermal FET QA transitions to the ON state, the gate-source voltage VGSA changes to the diode D1.
1 and the gate of the FET Q12 via the resistor R12, and the gate-source voltage VGSA is also supplied to the gate of the FET Q11 via the diode D11 and the resistor R11.

The gate of the FET Q12 is connected to the capacitor C11.
, The capacitor C11 is not charged immediately after the thermal FET QA transitions to the ON state, so that the gate potential of the FET Q12 does not rise sufficiently and the FET Q12 cannot transition to the ON state. The FET Q11 is on while the FET Q12 is off, and the comparator CMP
The voltage dividing point supplied to the + terminal of 1 is coupled to the source SA of the thermal FET QA. Therefore, the comparator CM
The output of P1 is kept at the "H" level, so that even if a large rush current flows, the thermal FET QA does not transition to the off state.

As time passes, the capacitor C11 is charged via the resistor R12, and finally the FET Q1
2 transitions to the ON state. Accordingly, the FET Q11 transitions to the off state, the mask state ends, and the overcurrent detection control functions.

Note that the resistor R13 is a discharge resistor for resetting the capacitor C11 after the thermal FET QA has turned off. It is desirable to set R12 ＲR13 so as not to affect the mask time. In addition, since the mask time is determined by the time constant of R12 × C11, the adjustment of the mask time can be performed by arbitrarily changing the capacitance value of the external capacitor C11 when one chip is formed.

Next, the overheat cutoff promotion circuit 106
Q21, diode D21, resistors R21 to R23, and capacitor C21.

Next, the operation of the overheat cutoff promotion circuit 106 will be described in detail. Enter the overcurrent control and set the thermal FET QA
The capacitor C21 is connected to the resistor R21 and the reverse current blocking diode D each time the gate potential of
The battery is charged via the power supply 21. Since the gate potential of the FET Q21 is initially lower than the threshold value, the FET Q21 is in an OFF state.
Q21 transitions to the ON state.

A terminal TG (thermal F) is connected via a resistor R21.
A current flows from the true gate of the ETQA to the ground potential (GND), and the amount of charge stored in the terminal TG decreases. Therefore, even for the same drain current ID, the voltage VDSA between the drain and the source is increased, and the power consumption of the thermal FET QA is increased, so that the overheat cutoff is accelerated. In addition,
The smaller the resistance R21, the earlier the overheat cutoff. Further, the resistor R23 is a discharge resistor of the capacitor C21, and R22Ｒ
It is desirable to set R23.

[Fifth Embodiment] Next, a power supply control device and a power supply control method constituting a fan according to a fifth embodiment will be described with reference to FIG. The power supply control device that constitutes the electric fan of the present embodiment has the first configuration.
This is a configuration in which an on / off frequency integration circuit 107 is added to the circuit configuration (FIG. 1) of the power supply control device that constitutes the electric fan of the embodiment. Note that a portion 110e surrounded by a dotted line in FIG. 10 indicates a chip portion to be analog-integrated.

In the first, second, or third embodiment, when the motor is overloaded or the winding is incompletely short-circuited, the on / off control of the thermal FET QA is repeatedly performed, and the cycle of the thermal FET QA is repeated. In the present embodiment, the problem that the time until the overheat is cut off is relatively long because the overheat cut-off is made to function by a typical heat generation action is solved as follows. That is, by adding an on / off number integration circuit (number-of-times control means) 107 for turning off the thermal FET QA when the number of on / off controls of the thermal FET QA reaches a predetermined number, the cutoff of the thermal FET QA is accelerated.

In FIG. 10, the on / off frequency integration circuit 107 includes an FET Q31, diodes D31 and D32,
It comprises resistors R31 to R33 and a capacitor C31.

Next, the operation of the on / off times integration circuit 107 will be described. Enter the overcurrent control and set the thermal FE
Each time the gate potential of TQA periodically goes to "H" level, capacitor C31 is charged via resistor R31 and backflow preventing diode D31. Since the gate potential of the FET Q31 is initially lower than the threshold value, the FET Q31 is in the off state. However, when the gate potential increases with the charging of the capacitor C31, the FET Q31 transitions to the on state. At this time, the anode side of the temperature sensor 121 (four diodes) is pulled down.
The ETQS transitions to the ON state, and cuts off (OFF control) the thermal FET QA.

Note that the cutoff time by the number of times is about 1 [se
c] is desirable. In addition, the on / off frequency integration circuit 1
07 in order to operate stably.
It is necessary to stabilize the cycle of the ETQA on / off control. In the present embodiment, the drain-source voltage VDS of the thermal FET QA with respect to a change in load current
Since the change of A is larger in the pinch-off region than in the ohmic region, the thermal FET QA transitions to the off state in the pinch-off region during the on / off control. Therefore, the cycle of the on / off control of the thermal FET QA becomes stable.

[Modification] Next, a power supply control device constituting the electric fan of the first embodiment and a modification of the power supply control method will be described with reference to FIG. In the above description of each embodiment, the reference voltage generation means is fixed (in the above description, fixed to a load of 5 [A]),
The change of the load (resistance Rr) was dealt with by changing the overcurrent determination value. That is, the resistance R
A chip is created by setting l, R2 and R3, and the load 102
Is smaller, a variable resistor RV is added outside the chip in parallel with the resistor R2 to reduce the overcurrent determination value.

This method has the following problems. First, as the overcurrent determination value increases, the control accuracy decreases. Second, it is necessary to change the overcurrent determination value between the pinch-off region and the ohmic region. In this case, the overcurrent determination value in the pinch-off region needs to be set strictly in accordance with the rising gradient of the drain current ID. However, the rising gradient of the drain current ID changes when the wiring inductance and the wiring resistance change. Difficult to set.

As a countermeasure against this, it is effective to set the reference voltage generating means in accordance with the load 102. That is, first, the reference voltage generating means corresponding to the maximum current value of the load 102 is set. Next, the drain-source voltage VDS (that is, the drain-source voltage of the FET QB) in the reference voltage generation means.
The source-to-source voltage VDSB is applied to the load drive transistor (that is, the drain-source voltage VDS of the thermal FET QA).
If A) exceeds even a little, it is judged as an overcurrent value.

In this method, it is not necessary to change the overcurrent determination value between the pinch-off region and the ohmic region. Since it is sufficient to judge whether the voltage exceeds the drain-source voltage VDS of the reference voltage generation means or not, the detection accuracy is determined by the comparator CMP1.
Is determined only by the resolution of

In addition, the effects of temperature drift, variation between IC lots, wiring inductance and wiring resistance can be eliminated, and fluctuations in power supply voltage are not affected as long as the comparator CMP1 operates normally. Therefore, in the electric fan, a power supply control device with few (almost no) error elements and a power supply control method thereof can be realized.

The setting of the reference voltage generating means may be changed by additionally connecting an external variable resistor RV in parallel with the resistor Rr, or by changing the resistor Rr in the chip.

As shown in FIG. 11, several types of resistors Rr1 to Rr4 are arranged in parallel inside a chip, and when a chip is packaged or mounted on a bare chip, a switch SW2 is selected from among the resistors Rrl to Rr4. , It is possible to set the set value (reference) of the reference voltage generation means to the target specification. As a result, even when the power supply control device is integrated, a plurality of specifications can be covered by one type of chip. In addition, the variable setting of the resistance makes it possible to determine the overload state according to the rating and performance of the motor, and to detect the complete short circuit or the incomplete short circuit reliably and accurately.

In the circuit configuration of the power supply control device constituting the electric fan according to the first, second, third, fourth and fifth embodiments and the modified examples described above, the switching elements, that is, the thermal FETs QA and FETQB , Transistors Q5, Q6, FET QS and FET Q for overheating cutoff
Although n-channel type is used as 11 to Q54,
The circuit configuration of the power supply control device constituting the electric fan according to the present invention is not limited to this, and a P-channel type may be used. However, a circuit change due to the inversion of the gate potential for performing on / off control of each switching element to the “L” / “H” level is required.

[0125]

As described above, according to the electric fan of the present invention, when the power supply from the power supply to the motor load is controlled by the semiconductor switch, the reference voltage generating means applies the predetermined motor load to the semiconductor switch. A reference voltage having a voltage characteristic equivalent to the voltage characteristic of the terminal voltage of the semiconductor switch in a state where the terminal is connected is detected, the difference between the terminal voltage of the semiconductor switch and the reference voltage is detected by the detection unit, and the control unit The semiconductor switch is controlled to be turned on / off according to the difference between the detected inter-terminal voltage and the reference voltage, and the reference voltage generating means is a semiconductor circuit in which the second semiconductor switch and the second load are connected in series. The switch and the motor load are connected in parallel, and the second
A part of the power supply path is generated by generating a voltage between the terminals of the semiconductor switch as a reference voltage and detecting a difference between the voltage between the terminals of the semiconductor switch and the reference voltage (normal state) generated by the reference voltage generating means. Since it is determined that the voltage between the terminals of the semiconductor switch (that is, the current in the power supply path) deviates from the normal state,
The conventional shunt resistor is unnecessary, so that the heat loss of the electric fan is suppressed, the responsiveness is high, and safe overcurrent protection is possible. Also, not only overload, but also overcurrent due to complete short-circuit and abnormal current in case of rare short-circuit such as incomplete short-circuit with some short-circuit resistance are continuously processed by hardware circuit or microcomputer processing. Since a microcomputer can be detected, particularly when the on / off control of the semiconductor switch is configured by a hardware circuit, a microcomputer is not required, so that the mounting space can be reduced and the cost of the fan can be significantly reduced.

Further, according to the electric fan of the present invention, the second
The current capacity of the semiconductor switch is set to be smaller than the current capacity of the semiconductor switch.
Since the resistance ratio of the load is set to be equivalent to the current capacity ratio of the semiconductor switch and the second semiconductor switch, the circuit configuration of the reference voltage generating means having the second semiconductor switch and the second load is reduced in size. The mounting space can be reduced, and the cost of the fan can be reduced.

Further, according to the electric fan of the present invention, the second
By providing the load with a plurality of resistors and selectively connecting the plurality of resistors, the resistance value of the second load is equivalently variably set, and the set value (reference) of the reference voltage generating means is set. Since the target specifications are set, multiple types can be covered by one type of chip, and overload judgment and complete short-circuit or incomplete short-circuit can be reliably determined according to the motor load rating and performance. , And protection against short-circuit failure can be accurately performed.

Further, according to the electric fan of the present invention, when the semiconductor switch is overheated, the semiconductor switch is provided with overheat protection means for controlling by turning off the semiconductor switch to protect the semiconductor switch. Is generated, the ON / OFF control of the semiconductor switch is repeatedly performed by the control means to greatly fluctuate the current, and the overheat protection means can quickly shut off the semiconductor switch by the periodic heat generation action of the semiconductor switch. High-speed response to an abnormal current when an overcurrent or incomplete short circuit occurs can be realized.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of a power supply control device included in a fan according to a first embodiment of the present invention.

FIG. 2 is a detailed circuit configuration diagram of a semiconductor switch (thermal FET) used in the embodiment.

FIG. 3 is an explanatory diagram (part 1) illustrating a principle used by a power supply control device included in the electric fan according to the embodiment, and illustrates a fall characteristic of a drain-to-sos voltage at a transition from an off state to an on state. FIG.

FIG. 4 is an explanatory diagram (part 2) for explaining the principle used by the power supply control device constituting the electric fan of the embodiment, and is a conceptual circuit diagram.

FIG. 5 is an explanatory diagram (part 3) for explaining the principle used by the power supply control device constituting the electric fan of the embodiment, and is an explanatory diagram for explaining the characteristics of the drain current and the gate-source voltage of the thermal FET. It is.

FIG. 6 is a waveform diagram exemplifying a current (a) and a voltage (b) of a semiconductor switch in the power supply control device constituting the electric fan of the embodiment at the time of a short-circuit fault and at the time of normal operation.

FIG. 7 is a circuit configuration diagram of a power supply control device constituting a fan according to a second embodiment of the present invention.

FIG. 8 is a circuit configuration diagram of a power supply control device constituting a fan according to a third embodiment of the present invention.

FIG. 9 is a circuit configuration diagram of a power supply control device constituting a fan according to a fourth embodiment of the present invention.

FIG. 10 is a circuit configuration diagram of a power supply control device constituting a fan according to a fifth embodiment of the present invention.

FIG. 11 is a circuit diagram illustrating a configuration of a second load (resistance) in a power supply control device included in a fan according to a modified example.

FIG. 12 is a diagram showing a configuration common to the electric fans of the first to fifth embodiments according to the present invention.

FIG. 13 is a configuration diagram of a conventional fan.

FIG. 14 is a configuration diagram of another conventional fan.

FIG. 15 is a circuit configuration diagram of a power supply control device provided with a semiconductor switch, which is employed in a conventional electric fan.

[Explanation of symbols]

 Reference Signs List 101 power supply 102 load 105 inrush current masking circuit (prohibiting means) 106 overheating cutoff promotion circuit (overheating cutoff promotion means) 107 on / off frequency integration circuit (same number control means) 110a to 110e chip constituent parts 111 drive circuit (control means) QA , QF Thermal FET (semiconductor switch) RG Internal resistance QB FET (second semiconductor switch) Rr, Rrl to Rr4 Resistance (second load) Q5, Q6 Transistors Qll to Q54 FET CMPl Comparator (detection means) Rl to R55 Expansion RV Variable resistors ZDl, ZD2 Zener diodes Dl to D51 Diodes Cll to C31 Capacitors 121 Temperature sensors 122 Latch circuits QS Overheat cutoff FETs SWl, SW2 Switches VB Power supply voltage VP Charge pump output voltage 201 Blades 203 M Motor 204 AC power supply 300 Power supply controller

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 3H021 AA01 AA09 BA12 BA20 BA22 BA23 CA04 CA07 DA02 EA08 5H530 AA01 BB05 CC27 CD30 CD33 CF01 CF15 DD14 DD15 DD19 EF01 5H570 AA09 BB09 CC05 FF05 GG02 HA08 JJ01 MM03 MM03 MM03

Claims (5)

[Claims] 1. An electric fan in which drive power supplied from a power supply to a motor load is controlled by a semiconductor switch that performs a switching operation according to a control signal, wherein the semiconductor in a state where the motor load is connected to the semiconductor switch. Reference voltage generating means for generating a reference voltage having a voltage characteristic equivalent to the voltage characteristic of the voltage between the terminals of the switch; detecting means for detecting a difference between the terminal voltage of the semiconductor switch and the reference voltage; Control means for controlling on / off of the semiconductor switch according to a difference between a terminal voltage and a reference voltage. 2. The semiconductor device according to claim 1, wherein the reference voltage generation unit includes a circuit connected in parallel to the semiconductor switch and the motor load, the second semiconductor switch being switching-controlled in accordance with the control signal, and a second load being connected in series. The electric fan according to claim 1, wherein a voltage between terminals of the second semiconductor switch is generated as the reference voltage. 3. A current capacity of the second semiconductor switch is smaller than a current capacity of the semiconductor switch, and a resistance value ratio between the motor load and the second load is equal to a current capacity ratio of the semiconductor switch and the second semiconductor switch. 3. The electric fan according to claim 2, wherein the electric fan is equivalent. 4. The device according to claim 2, wherein the second load includes a plurality of resistors, and a resistance value of the second load is variably set by selectively connecting the plurality of resistors. Item 3. The electric fan according to Item 3. 5. The electric fan according to claim 1, further comprising overheat protection means for turning off and protecting the semiconductor switch when the semiconductor switch is overheated.