JP2000298522A - Power supply controller and power supply control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To cancel a rush current while shortening a period for stopping the operation of a protective function for abnormal current in a semiconductor element with built-in temperature sensor as much as possible. SOLUTION: A timer circuit 1 counts up time required from turning off a switch SW1 up to turning on the switch SW1 again and supplies the timer information to a mask signal generation circuit 2. The level of a rush current is changed in accordance with time from the OFF operation of the switch SW1 up to the ON operation of the switch SW1. Therefore the circuit 2 changes the duty ratio (pulse width) of a mask signal and supplies the changed duty ratio to the '-' input terminal of a comparator CMP1. Consequently the rush current can be canceled while shortening the operation stop period of the protective function for the abnormal current in the semiconductor element AQ with built-in temperature sensor as much as possible.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply control device and a power supply control method for controlling power supply from a battery mounted on a vehicle to each load.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 14, for example, a power supply control device equipped with a temperature sensor built-in FET QF (HAF2001 manufactured by Hitachi) is known. This power supply control device selectively controls the power supply from a battery provided in an automobile to each load.
The shunt resistor RS and the drain D-source S of the FET QF with a built-in temperature sensor are connected in series to a path for supplying the output voltage VB to the load 102 such as a headlight or a drive motor for a power window. Also, a driver 901 that detects the current flowing through the shunt resistor RS and controls the driving of the temperature sensor built-in FET QF by a hardware circuit, and turns on / off the drive signal of the temperature sensor built-in FET QF based on the current value monitored by the driver 901. An A / D converter 902 to be controlled and a microcomputer (microcomputer = CPU) 903 are provided.

[0003] The FET QF with a built-in temperature sensor has a temperature sensor (not shown).
When F rises to a temperature equal to or higher than a specified value, an overheat shutoff function is provided for forcibly turning off the temperature sensor built-in FET QF by a built-in gate shutoff circuit. In addition, RG in FIG. 14 is an internal resistance, and ZD1 is a Zener diode that keeps the voltage between the gate G and the source S at, for example, 12 V by bypassing when an overvoltage is applied to the gate G.

Further, the power supply control device includes a load 10
2 or a protection function against an overcurrent between the drain D and the source S of the FET QF with a built-in temperature sensor.
That is, the driver 901 includes a differential amplifier 911, 913 as a current monitor circuit, a differential amplifier 912 as a current limiting circuit, a charge pump circuit 915, an on / off control signal from the microcomputer 903, and a current limiting circuit. And a drive circuit 914 for driving the gate G of the temperature sensor built-in FET QF via the internal resistance RG based on the overcurrent determination result.

If an overcurrent is detected via the differential amplifier 912 based on the voltage drop of the shunt resistor RS and the current exceeds the determination value (upper limit), the drive circuit 914 turns off the temperature sensor built-in FET QF. Then, when the current drops below the determination value (lower limit), the temperature sensor built-in FET QF is turned on.

On the other hand, the microcomputer 903 constantly monitors the current via a current monitor circuit (differential amplifiers 911 and 913), and if an abnormal current exceeding a normal value flows,
By turning off the drive signal of the temperature sensor built-in FET QF, the temperature sensor built-in FET QF is turned off. If the temperature of the FET QF with a built-in temperature sensor exceeds a specified value before the drive signal of the off control is output from the microcomputer 903, the FE with built-in temperature sensor is operated by the overheat cutoff function.
TQF turns off.

[0007]

However, the conventional power supply control device requires a shunt resistor RS connected in series to a power supply path for current detection. There is a problem that the thermal resistance of the shunt resistor RS cannot be ignored due to an increase in the load current accompanying the reduction in the on-resistance of the FET QF.

The overheat cutoff function and the overcurrent limiting circuit function when a substantially complete short circuit occurs in the load 102 or the wiring and a large current flows, but the incomplete circuit having a certain degree of short circuit resistance. When a small short-circuit current flows due to the occurrence of a rare short-circuit such as a short-circuit, it does not function, and the microcomputer 903 detects an abnormal current via a current monitor circuit to turn off the temperature sensor built-in FET QF. There is also a problem that the response by the microcomputer control to such an abnormal current is poor.

Further, the shunt resistor RS and the A / D converter 9
02, the microcomputer 903 and the like are required, so that a large mounting space is required, and there is also a problem that the device cost is increased by these relatively expensive components.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and eliminates the need for a shunt resistor connected in series to a power supply path for current detection, thereby suppressing heat loss of the device and reducing a certain short-circuit resistance. It is an object of the present invention to provide a power supply control device and a power supply control method which enable high-speed response to an abnormal current when a rare short circuit such as an incomplete short circuit occurs, and which are easy to integrate and inexpensive.

[0011]

A power supply control device according to the present invention, as means for solving the above-mentioned problems, performs switching control in response to a control signal supplied to a control signal input terminal and supplies power from a power supply to a load. A semiconductor switch for controlling supply, reference voltage generating means for generating a reference voltage having a voltage characteristic equivalent to a voltage characteristic of a voltage between terminals of the semiconductor switch when a predetermined load is connected to the semiconductor switch, and the semiconductor Detecting means for detecting a difference between the terminal voltage of the switch and the reference voltage; turning on / off the semiconductor switch in accordance with the detected difference between the terminal voltage and the reference voltage;
Control means for performing off control. Further, together with each of these means, a timer means for measuring the time taken from the time when the power supply to the load is stopped to the time when the power supply to the load is next started, and outputting timing information, and And a rush current canceling means for canceling the rush current to the load by turning off the semiconductor switch for a time corresponding to the timing information from the timer means from the power supply start instruction.

[0012] Such a power supply control device, when switching the power supply from the power supply to the load by the semiconductor switch, the terminal of the semiconductor switch in a state where a predetermined load is connected to the semiconductor switch by the reference voltage generating means. A reference voltage having a voltage characteristic equivalent to the voltage characteristic of the inter-voltage is generated, and a difference between the inter-terminal voltage of the semiconductor switch and the reference voltage is detected by a detection unit. Then, the control means controls on / off of the semiconductor switch according to the difference between the detected inter-terminal voltage and the reference voltage, so that the inter-terminal voltage of the semiconductor switch forming part of the power supply path (ie, power Then, the degree to which the current of the supply path deviates from the normal state is determined.

As a result, the heat loss of the device is suppressed by eliminating the conventionally required shunt resistor, and not only an overcurrent caused by a complete short circuit but also a rare short circuit such as an incomplete short circuit having a certain short circuit resistance occurs. Can be continuously detected by a hardware circuit or a microcomputer or other program processing. In particular, when the on / off control of the semiconductor switch is configured by a hardware circuit, a microcomputer is not required, so that the mounting space can be reduced and the device cost can be significantly reduced.

Here, in order to cancel the inrush current to the load, it is conceivable to turn off the semiconductor switch for a certain period of time after the power supply start instruction to the load is issued. ), The protection function against the abnormal current does not work while the semiconductor switch is being turned off. Therefore, a certain amount of time during which the semiconductor switch is turned off is not preferable because a large value of current continues to flow to the load.

On the other hand, the level of the rush current changes according to the time from when the power supply to the load is stopped to when the power supply to the load is instructed to start.

Therefore, in the power supply control device, the inrush current canceling means is controlled by the timer means.
The semiconductor switch is controlled to be off for a period of time from when power supply to the load is stopped to when power supply to the load is started next time.

Thus, the semiconductor switch can be turned off in accordance with the level of the inrush current which changes with the time taken from when the power supply to the load is stopped to when the power supply to the load is next started. Of the semiconductor switch,
The inrush current can be canceled while the operation stop time of the protection function against abnormal current is minimized.

Next, the power supply control method according to the present invention comprises:
A power supply control method for the power supply control device described above,
A reference voltage generating step of generating a reference voltage having a voltage characteristic equivalent to a voltage characteristic of a voltage between terminals of the semiconductor switch in a state where a predetermined load is connected to the semiconductor switch to solve the above-described problem; A voltage detecting step of detecting a difference between a terminal voltage of the switch and the reference voltage; and a control step of controlling on / off of the semiconductor switch in accordance with the detected difference between the terminal voltage and the reference voltage. Further, together with each of these steps, a step of measuring the time taken from when power supply to the load is stopped to when power supply to the load is started next, and from a power supply start instruction to the load, Turning off the semiconductor switch for the time measured in the step to cancel the inrush current to the load.

According to such a power supply control method, when switching a power supply from a power supply to a load by a semiconductor switch, a voltage characteristic of a voltage between terminals of the semiconductor switch in a state where a predetermined load is connected to the semiconductor switch. A reference voltage having a voltage characteristic equivalent to that of the semiconductor switch is generated, and a difference between the voltage between the terminals of the semiconductor switch and the reference voltage is detected by the detecting means. The on / off control of the semiconductor switch according to the difference between the detected inter-terminal voltage and the reference voltage causes the inter-terminal voltage of the semiconductor switch forming part of the power supply path (that is, the power supply path of the semiconductor switch). Current) deviates from the normal state.

As a result, the heat loss of the device is suppressed by eliminating the need for the shunt resistor, which has been required conventionally, and a rare short circuit such as an incomplete short circuit having a certain short circuit resistance as well as an overcurrent due to a complete short circuit occurs. Can be continuously detected by a hardware circuit or a microcomputer or other program processing. In particular, when the on / off control of the semiconductor switch is configured by a hardware circuit, a microcomputer is not required, so that the mounting space can be reduced and the device cost can be significantly reduced.

Here, in order to cancel the rush current to the load, it is conceivable to turn off the semiconductor switch for a certain period of time after the power supply start instruction to the load is issued. ), The protection function against the abnormal current does not work while the semiconductor switch is being turned off. Therefore, a certain amount of time during which the semiconductor switch is turned off is not preferable because a large value of current continues to flow to the load.

On the other hand, the level of the rush current changes according to the time from when the power supply to the load is stopped to when the next power supply start instruction to the load is issued.

For this reason, the power supply control method measures the time taken from the time when the power supply to the load is stopped to the time when the power supply to the load is next started. The semiconductor switch is turned off.

Thus, the semiconductor switch can be turned off in accordance with the level of the rush current which changes in the time taken from the time when the power supply to the load is stopped to the time when the power supply to the load is started next time. Of the semiconductor switch,
The inrush current can be canceled while the operation stop time of the protection function against abnormal current is minimized.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a power supply control device and a power supply control method according to the present invention will be described below in detail with reference to the drawings.

[First Embodiment] [Configuration of First Embodiment] First, the present invention relates to a power supply control for selectively supplying power from a battery to each load such as a lamp in an automobile, for example. Applicable to the device. As shown in FIG. 1, the power supply control device has a configuration in which a semiconductor element with a built-in temperature sensor QA as a semiconductor switch is connected in series to a path for supplying an output voltage VB of a power supply 101 to a load 102. For example, an NMO having a DMOS structure
The S type is used. It should be noted that a PMOS type can also be realized. A portion 110a surrounded by a dotted line in FIG. 1 indicates a chip portion to be analog-integrated.

The part for controlling the driving of the semiconductor element QA with a built-in temperature sensor includes a reference FET QB and a resistor R.
1, R2, R5, R8, R10, RG, Rr, RV, a Zener diode ZD1, a diode D1, a comparator CMP1, a drive circuit 111, and a switch SW1. In addition, "R" and subsequent numbers and letters are used for the resistors as reference symbols.

The load 102 is, for example, a headlight, a drive motor for a power window, or the like.
It functions by turning on W1.

In the drive circuit 111, the collector side has the potential V
A source transistor Q5 connected to P and a sink transistor Q6 whose emitter side is connected to the ground potential (GND) are provided in series.

Each transistor Q of the driving circuit 111
5 and Q6, the output voltage VB (for example, 1) of the power supply 101 when the switch SW1 is turned on / off.
2V) is supplied as a switching signal via a resistor R10. Each of the transistors Q5 and Q6 is turned on / off by this switching signal, and when only the source transistor Q5 is turned on, the output voltage VP (eg, +10 V) of the charge pump is supplied to the semiconductor element QA with a built-in temperature sensor. It has become.

More specifically, as shown in FIG. 2, the semiconductor element QA with a built-in temperature sensor as a semiconductor switch applies an output voltage VB of a power supply 101 to a load 102 via a resistor RE and a drain D0 and a source S0 of a main FET. By connecting, the drain D-source S of the semiconductor element QA with a built-in temperature sensor is connected in series to the path for supplying the output voltage VB of the power supply 101 to the load 102.

The semiconductor element QA with a built-in temperature sensor
Has an internal resistance RG whose one end is connected in series to the gate TG of the main FET (the true gate TG of the semiconductor element QA with a built-in temperature sensor). The other end of the internal resistor RG is
It is connected to the gate G of the semiconductor element QA with a built-in temperature sensor.

The semiconductor element QA with a built-in temperature sensor
Is equipped with a temperature sensor 121, a latch circuit 122, and a Zener diode ZD1 that keeps the voltage between the gate G and the source S at 12 V, for example, by bypassing when an overvoltage is applied to the gate G, together with the overheating cutoff FET QS. I have.

A plurality of (for example, four) temperature sensors 121 are provided.
The cathode of the first diode is connected to the load 102, and the anode of the last diode is connected to one end of the resistor R52.

A backflow preventing diode D5 is connected between the other end of the resistor R52 and the cathode of the first diode.
1 is inserted and connected. Further, a connection point between one end of the resistor R52 and the anode of the last diode is connected to the FET Q for the temperature detection switch of the temperature sensor 121.
51 gates are connected.

The drain of the FET Q51 is connected to a voltage dividing resistor R.
The voltage dividing resistor R53 is connected to the gate G of the temperature sensor built-in semiconductor element QA via
The other end of the resistor R52 is connected to the connection midpoint between the resistor R52 and the resistor R51.

The latch circuit 122 includes FETs Q52 and Q53 constituting a current mirror circuit, and a latch control FET Q54.

Specifically, this current mirror circuit
The drain of the FET Q52 is connected to the source of the FET Q53, and the source of the FET Q52 is connected to the drain of the FET Q53.
Each source of the TQ 53 is connected to the load 102, respectively.

The drains of the FETs Q52 and Q53 are connected to the connection point between the voltage dividing resistors R53 and R51 via the resistors R54 and R55, respectively.

The gate of the FET Q54 for latch control is connected to the drain of the FET Q51 for the temperature detecting switch, the drain is connected between the drain of the FET Q52 and the source of the FET Q53, and the source is a load. 102.

Such a semiconductor element QA with a built-in temperature sensor
When the temperature sensor 121 detects that the temperature of the semiconductor element with a built-in temperature sensor QA has risen to a temperature equal to or higher than a specified value, the detection information to that effect is held in the latch circuit 122,
When the overheat cutoff FET QS as a gate cutoff circuit is turned on, the semiconductor element QA with a built-in temperature sensor is turned on.
Is provided with an overheat cutoff function for forcibly turning off the power.

That is, the semiconductor element QA with a built-in temperature sensor
When the temperature of the FET Q51 increases, the resistance of each diode of the temperature sensor 121 decreases as the temperature rises.
Is lowered to a potential at which the gate potential of the pixel becomes "L" level.
This causes the FET Q51 to transition from the on state to the off state.

When the FET Q51 transitions to the off state, F
The gate potential of the ETQ54 is the semiconductor element Q with a built-in temperature sensor.
A is pulled up to the potential of the gate control terminal (G) of A,
The ETQ 54 changes from the off state to the on state, and “1” is latched in the latch circuit 122.

At this time, the output of the latch circuit 122 becomes "H" level and the overheat cutoff FET QS transitions from the off state to the on state, so that the potential level of the true gate (TG) of the semiconductor element QA with a built-in temperature sensor is changed. Becomes "L" level, the semiconductor element with built-in temperature sensor QA transitions from the on state to the off state, and is overheated.

Next, the power supply control device is connected to the load 10
2 or a protection function against an abnormal current due to a short-circuit fault occurring between the drain D and the source S of the semiconductor element QA with a built-in temperature sensor or an incomplete short-circuit fault. The protection function against the abnormal current includes an FET (second semiconductor switch) QB for generating a reference voltage and a resistor (second load) Rr as shown in FIG.

The drain and gate of the reference FET QB are connected to the drain (D) and the true gate (TG) of the semiconductor element QA with a built-in temperature sensor, respectively, and the source (SB) of the reference FET QB is connected to one terminal of the resistor Rr. The other terminal of the resistor Rr is connected to the ground potential (GN
D).

As described above, by sharing the drain (D) and the gate (TG) of the reference FET QB and the semiconductor element QA with a built-in temperature sensor, the same chip (11
0a) can be easily integrated.

The reference FET QB and the semiconductor element QA with a built-in temperature sensor are formed on the same chip (110a) by the same process. The current detection method according to the present embodiment uses a comparator CM
Since the detection is performed by detecting the difference between the source voltage VSA of the semiconductor element with a built-in temperature sensor QA and the reference voltage by P1, the reference FET QB and the semiconductor element with a built-in temperature sensor QA are formed on the same chip, so that in-phase current detection is performed. It is possible to eliminate (reduce) the influence of error factors, that is, the effects of power supply voltage, temperature drift, and variation between lots. Further, since the resistor Rr is provided outside the chip 110a, it is possible to reduce the influence of the temperature change of the chip 110a on the reference voltage, thereby enabling highly accurate current detection.

Also, the number of transistors connected in parallel constituting each FET is set so that the current capacity of the reference FET QB is smaller than the current capacity of the semiconductor element QA with a built-in temperature sensor (the number of transistors of the reference FET QB: 1) < (The number of transistors of the semiconductor element QA with a built-in temperature sensor: 1000).

Further, the resistance value of the resistor Rr is, as described later, the resistance value of the load 102 × (the semiconductor element Q with a built-in temperature sensor).
Number of A transistors: 1000 / Reference FET
(The number of QB transistors: 1). With the setting of the resistor Rr, when a load current (5 [A]) flows through the semiconductor element QA with a built-in temperature sensor and a current of 5 mA flows through the resistor Rr, the same drain as that of the semiconductor element with a built-in temperature sensor QA is formed. The source-to-source voltage VDS can be generated in the reference FET QB.

Further, with the circuit configuration as described above, the configuration of the reference voltage generating means composed of the reference FET QB and the resistor Rr can be made as small as possible, and the mounting space can be reduced to reduce the device cost. Can be.

The variable resistor RV is installed outside the chip,
It is connected in parallel with the resistor R2. The load 102 is connected in series between the source S of the semiconductor element QA with a built-in temperature sensor and the voltage dividing point of the resistors R1 and R2. By changing the resistance value of the variable resistor RV, the resistance value of the resistor R2 is equivalently variably set.

That is, the resistances R1, R2 and RV are equal to the drain-source voltage V of the semiconductor element QA with a built-in temperature sensor.
DSA is divided by a voltage dividing ratio based on the resistance value ratio and supplied to the comparator CMP1.
The resistance is adjusted by adjusting the resistance value.

Thus, the threshold value of the drain-source voltage VDS for switching the output of the comparator CMP1 from "H" level to "L" level with respect to the fixed set value (reference) of the reference voltage generating means can be changed. It is possible to use one kind of chip 110 even in the case of analog integration.
a can cover a plurality of specifications.

The voltage VDS between the drain D and source S of the semiconductor element QA with a built-in temperature sensor is connected to the "+" input terminal of the comparator CMP1 by the resistors R1 and R2 and the variable resistor RV.
The voltage divided by the parallel resistance (R2‖RV) of the resistor R5
Is supplied via In addition, the comparator CMP1
Is supplied with the drain-source voltage VDDS of the reference FET QB.

That is, when the potential supplied to the “+” input terminal is higher than the potential supplied to the “−” input terminal, the output becomes valid (“H” level) and supplied to the “−” input terminal. When the potential supplied to the “+” input terminal is lower than the potential, the output becomes invalid (“L” level). In addition,
As described later, the comparator CMP1 has a certain hysteresis.

Next, in order to prevent an inrush current applied to the load 102 when the switch SW1 is turned on, as shown in FIG.
And a mask signal generation circuit 2 are provided.

The timer circuit 1 is connected to the switch SW1, detects the ON / OFF state of the switch SW1, starts timing when the switch SW1 is turned off, and turns off the switch SW1. Timing information indicating the time required from when the switch SW1 is turned on to when the switch SW1 is turned on is supplied to the mask signal generation circuit 2.

The mask signal generation circuit 2 detects the time required from the time when the switch SW1 is turned off to the time when the switch SW1 is next turned on, based on the timing information supplied from the timer circuit 1. When the switch SW1 is turned on again, the duty ratio (pulse width) of the pulse (mask signal) for masking the inrush current is varied in accordance with the elapsed time, and is changed by the comparator C.
By supplying the signal to the “−” input terminal of MP1, the rush current can be masked according to the case.

[Operation of First Embodiment] Next, the operation of the power supply control device of the first embodiment having such a configuration will be described.

[Explanation of Operation Principle] First, before describing the specific operation, the principle used by the power supply control device will be described with reference to FIGS. 3, 4 and 5. FIG.
FIG. 4 is a diagram for explaining the fall characteristics of the voltage between the drain D and the source S at the time of transition from the off state to the on state;
Is a conceptual circuit diagram, and FIG. 5 is a semiconductor element QA with a built-in temperature sensor.
FIG. 4 is a diagram for explaining characteristics of a drain current and a voltage between a gate G and a source S of FIG.

When the semiconductor element QA with a built-in temperature sensor is used as the semiconductor switch, the power supply 101
Is conceptually represented as a circuit as shown in FIG. The load 102 includes a wiring inductance L0 and a wiring resistance R0 of the power supply path. When a short-circuit fault occurs in the path or the load 102, R0
Includes the short-circuit resistance.

Here, the short-circuit resistance is about 40 [mΩ] or less in the case of the above-described complete short-circuit (dead short-circuit), assuming that the load 102 is a headlight in the vehicle to which the present embodiment is applied. In the case of an incomplete short circuit, it is about 40 to 500 [mΩ].

The drain-source voltage V of the semiconductor element QA with a built-in temperature sensor which forms a part of such a power supply path
DS indicates “falling voltage characteristic at short circuit”, “falling voltage characteristic at reference load (during normal operation)”, and “load” when semiconductor element QA with a built-in temperature sensor transitions from an off state to an on state. FIG. 3 shows the falling voltage characteristics when the resistor 102 is 1 [KΩ]. As can be seen from FIG. 3, the fall characteristics change according to the state of the power supply path and the load, that is, the time constant based on the wiring inductance and the wiring resistance and the short-circuit resistance of the path.

Here, as a method for detecting an overcurrent using such a change in the characteristic of the drain-source voltage VDS, a comparison with a predetermined threshold is performed at a predetermined timing in addition to the method described below. However, this method requires components such as a capacitor and a plurality of resistors to constitute a means for defining a predetermined timing and a means for comparing with a predetermined threshold. There is a problem that a variation causes a detection error.
In addition, a capacitor is required, and since the capacitor cannot be mounted in a chip, external components are required.
There was also a problem that the cost of the apparatus was high.

In FIG. 3, the semiconductor element QA with a built-in temperature sensor transits to the ON state and the voltage VDS
Is saturated until the semiconductor element Q with a built-in temperature sensor
A operates in a pinch-off region.

The change in the drain-source voltage VDS when the resistance of the load 102 is 1 [KΩ] can be considered as follows. In other words, first, for example, when the "HAF2001" manufactured by Hitachi is used for the semiconductor element QA with a built-in temperature sensor, when the power supply voltage is 12 [V], the drain current ID = 12 [mA], so the gate-source voltage V
TGS is substantially maintained at a threshold voltage of 1.6 [V].

Secondly, the charging of the gate (G) by the drive circuit 111 is continued, so that the gate-source voltage VTGS rises and the drain-source voltage VDS decreases if this state continues. Then, since the capacitance CGD charge between the gate and the drain is discharged, the charge reaching the gate-source voltage VTGS is absorbed.

That is, the drain-source voltage VDS
Will drop at such a rate that the charge that has reached the gate-source voltage VTGS does not cause an increase in potential from the gate-drain capacitor CGD. As a result, the gate-source voltage VTGS becomes about 1.
It is maintained at 6 [V].

Then, as the gate-drain voltage VTGD decreases, the drain-source voltage VDS also decreases. At this time, there are two factors for absorbing the electric charge, the first is discharge of the gate-drain capacitance CGD (mirror capacitance) due to the decrease of the gate-drain voltage VTGD, and the second is the depletion layer in the n region. This is an increase in the capacitance of the gate-drain capacitance CGD due to the decrease.

The following interpretation can be made regarding the change in the drain-source voltage VDS when the load resistance = 1 [KΩ]. That is, at each lapse of time after the semiconductor element with a built-in temperature sensor QA transitions to the ON state, the charged charge sent to the gate (G) by the drive circuit 111 is absorbed, and the voltage VTGS of the true gate (TG) is kept constant. It shows the value of the drain-source voltage VDS to be kept.

Therefore, if the drain-source voltage VDS is higher than the curve when the load resistance = 1 [KG] in FIG. 3 after a certain elapsed time, the gate-source voltage VTGS becomes 1.
It means higher than 6 [V]. In addition,
The drain-source voltage VDS is the load resistance shown in FIG.
Ω] does not fall below the curve.

Further, assuming that the distance from the curve at the same elapsed time when the load resistance in FIG. 3 is 1 [KΩ] is ΔVDSGAP, if the charge of ΔVDSGAP × CGD is subtracted from the gate-source voltage VTGS, the gate becomes -Source voltage VT
GS means 1.6 [V]. In other words,
The gate-source voltage VTGS means that the potential has increased from 1.6 [V] by this charge. This can be expressed by the following equation.

VTGS−1.6 = ΔVDSGAP × 2CGD / (CGS × 2CGD) That is, ΔVDSGAP is the gate-source voltage VTGS−
It is proportional to 1.6 [V].

FIG. 5 is a diagram showing the “HAF200” manufactured by Hitachi.
1 ”gate-source voltage VTGS and drain current ID
As can be seen from FIG. 5, the relationship between the gate-source voltage VTGS and the drain current ID has a one-to-one relationship close to a proportional relationship.
Therefore, it can be said that ΔVDSGAP represents the drain current ID based on the correspondence as shown in FIG.

In FIG. 5, drain current ID = 1
The resolution around 0 [A] is about 60 [mV / A]. That is, the change of the drain current ID of 1 [A] is 60 [m].
V], the gate-source voltage VTGS of ± 5
± 0.3 with respect to the change in drain current ID of [A]
The change of the gate-source voltage VTGS of [V] corresponds. This resolution is equal to the shunt resistance RS =
This corresponds to a resolution equivalent to 60 [mΩ].

When the drain current ID is zero, the curve of the drain-source voltage VDS is determined only by the gate charging circuit and the Miller capacitance. However, when the drain current ID flows, the inductance Lc of the circuit and the entire circuit are reduced. It will be affected by the resistance Rc.

Although the curve of the drain-source voltage VDS rises as the drain current ID increases,
Drain current ID like complete short path (dead short)
Increases, the rising slope of the drain current ID falls to a constant value determined by the charging speed of the gate charging circuit, and therefore, the curve of the gate-source voltage VTGS also falls.

The rising gradient of the drain current ID determined by the rising of the curve of the gate-source voltage VTGS when the gate-drain voltage VTGD changes zero is the ultimate gradient.

Next, referring to the conceptual circuit diagram shown in FIG. 4 again, the operation of the semiconductor element QA with a built-in temperature sensor when the drive circuit 111 performs the off control (drain-source voltage VDS and drain current ID) The power relationship will be described in detail.

Source transistor Q5 of drive circuit 111
Transitions to the off state and the sink transistor Q6 transitions to the on state, the electric charge accumulated in the true gate (TG) is discharged through the resistors RG and R8 and the sink transistor Q6.

At this time, while the semiconductor element with a built-in temperature sensor QA is in the ohmic region, the gate charge is discharged and the drain current ID is reduced even if the gate-source voltage VTGS decreases.
Is hardly affected. Also, the drain-source voltage VDS hardly changes.

When the semiconductor element QA with a built-in temperature sensor enters the pinch-off region, the discharge of the gate charge lowers the gate-source voltage VTGS to reduce the drain current ID, but the drain current ID is determined by an external circuit. Since the operation is to be continued under the condition, the drain-source voltage VDS increases and the gate-drain capacitance CGD is charged, thereby canceling the amount of charge discharged from the gate and eliminating the influence on the drain current ID. do.

Note that such a cover operation continues in a range where the drain-source voltage VDS can be changed. This phenomenon is caused by the magnitude relationship between the force for changing the drain current ID and the force for changing the drain-source voltage VDS, and the drain-source voltage VDS is smaller than the force for changing the drain current ID. This is because the changing force is overwhelmingly weak.

In the process of increasing the drain current ID, the driving circuit 1
Similarly, the drain current ID is covered by the change in the drain-source voltage VDS while the drain-source voltage VDS can be changed (increased) even if the switch 11 performs the off control. Continues to increase. When the drain-source voltage VDS cannot be increased, the drain current ID decreases according to the potential (gate-source voltage VTGS) determined only by the discharge of the gate charge. That is, even when the drive circuit 111 performs the off control, the drain current ID is not so affected until the change of the drain-source voltage VDS is completed. The above mechanism is the source of the ON / OFF operation of the semiconductor element QA with a built-in temperature sensor.

Finally, if the circuits for charging the gates are different, the drain-source voltage VDS for the same load current
The curve changes. Therefore, the gate charging current must always maintain the same condition. If the gate charging current is reduced, the curve of the drain-source voltage VDS shifts upward. If this property is used to increase the drain-source voltage VDS for the same drain current ID, overheat interruption by the overheat protection function can be promoted. The overheat cutoff promotion circuit (overheat cutoff promotion circuit) described below utilizes this.

[Description of Specific Operation] Next, a specific operation of the power supply control device will be described based on the above operation principle. First, the EFTQA with a built-in temperature sensor and the reference voltage generating means (reference FET QB, resistor Rr) will be described.

First, the temperature sensor built-in semiconductor element QA and the reference voltage generating means (reference FET QB, resistor R
1) will be described.

The temperature sensor built-in FET QA and the reference FET QB are a 1000: 1 current mirror (Curren).
t mirror) circuit, and when the source potentials of both are equal, the drain current IDQA = 1000 × the drain current I
DQB.

For this reason, the temperature sensor built-in semiconductor element QA
= 5 [A] as the drain current of IDT and 5 mA of IDQB as the drain current of the reference FET QB, the drain-source voltage VDS of the semiconductor element QA with built-in temperature sensor and the reference FET QB respectively. The gate-source voltage VTGS matches. That is, VDSA = VDSB, VTGSA = VTGSB
Becomes

VDSA and VDSB are the drain-source voltages of the semiconductor element QA with built-in temperature sensor and the reference FET QB, respectively, and VTGSA and VTGSB are the semiconductor element QA with built-in temperature sensor and the reference FET QB, respectively.
The gate-source voltage of B.

Therefore, when the reference FET QB is completely turned on, the power supply voltage VB is substantially applied to both ends of the resistor Rr. Therefore, the 5 [A] load connected to the semiconductor element QA with a built-in temperature sensor is used. As a load on the reference FET QB equivalent to
It is determined as 12 [V] / 5 [mA] -1.4 [KΩ].

As described above, the value (curve) of the drain-source voltage VDS when a load current of 5 [A] flows through the semiconductor element QA with a built-in temperature sensor is used as a reference here.
By configuring the reference voltage generation means using a reference FET QB having a small transistor number ratio (= current capacity ratio) with respect to the semiconductor element QA with a built-in temperature sensor, the reference voltage generation means can be further reduced in size and the chip occupied area can be reduced. The required function can be realized.

Further, as described above, the reference FE
By configuring the TQB and the semiconductor element with a built-in temperature sensor QA in the same process and on the same chip, it is possible to eliminate the effects of lot-to-lot variation and temperature drift, thereby greatly improving detection accuracy.

Next, the operation in the pinch-off region will be described. When the semiconductor element with built-in temperature sensor QA transitions from the off state to the on state, the drain current IDQA rises toward the final load current value determined by the circuit resistance.

The gate-source voltage VTGSA of the semiconductor element QA with a built-in temperature sensor takes a value determined by the drain current IDQA, and the brake is appropriately applied by the mirror effect of the capacitor CGD due to the decrease in the drain-source voltage VDSA. Get up while being asked.

Further, the gate-source voltage VTGSB of the reference FET QB is determined by the fact that the reference FET QB operates as a source follower with a resistance Rr = 1.4 [KΩ] as a load.

Further, since the gate-source voltage VTGSA of the semiconductor element QA with a built-in temperature sensor increases as the drain current IDQA increases, the gate-source voltage becomes
VTGSB <VTGSA. VDSA = VTGSA + VTGD
, VDSB = VTGSB + VTGD, VDSA-V
DSB = VTGSA-VTGSB.

Here, the gate-source voltage difference VTGSA
Since -VTGSB represents the drain current IDQA-IDQB, a difference between IDQA and the current IDQB flowing through the reference voltage generating means can be obtained by detecting VTGSA-VTGSB. The current IDQB flowing through the reference voltage generating means is VDS
As B becomes smaller (VDSA also becomes smaller at this time), it approaches 5 [mA] corresponding to IDQA = 5 [A].

The drain-source voltage VDSB of the reference FET QB is directly supplied to the "-" input terminal of the comparator CMP1, and the drain-source voltage VDSA of the semiconductor device QA with a built-in temperature sensor is determined by the resistances R1 and R2.
Is supplied to the "+" input terminal of the comparator CMP1. Here, the variable resistor RV is not taken into consideration.

That is, "+" of the comparator CMP1
A voltage having a value of VDSA × R1 / (R1 + R2) (1) is supplied to the input terminal.

Immediately after the temperature sensor built-in FEGQA transitions to the ON state, the drain-source voltage VDSB of the reference FET QB is larger than the voltage supplied to the “+” input terminal of the comparator CMP1 (V
DSB> (1)), as the drain current IDQA of the semiconductor element QA with a built-in temperature sensor increases, the comparator CMP
The voltage value supplied to the "+" input terminal of No. 1 increases, and eventually becomes larger than the drain-source voltage VDSB of the reference FET QB. At this time, the comparator CMP1
Changes from the “H” level to the “L” level, and the drive circuit 111 turns off, thereby causing the semiconductor element with built-in temperature sensor QA to transition to the off state. In the comparator CMP1, a hysteresis is formed by the diode D1 and the resistor R5.

When the temperature sensor built-in semiconductor element QA transitions to the off state, the sink transistor Q of the drive circuit 111
6, the gate potential is grounded, and the potential difference between the cathode side of the diode D1 and the drain D of the semiconductor element with a built-in temperature sensor QA becomes VDSA + 0.7 [V] (forward voltage of the Zener diode ZD1). A current flows through a path of R1 → resistance R5 → diode D1, and the potential of the “+” input terminal of the comparator CMP1 is
1 is lower than when ON control is performed.

Therefore, the semiconductor element with a built-in temperature sensor QA maintains the off state until the difference between the drain-source voltage V DSA and V DSB which is smaller than that when the state transits to the off state, and then transits to the on state. Note that there are various methods for giving the hysteresis characteristic, but this is one example.

When the voltage VDSA between the drain and the source when the semiconductor element QA with a built-in temperature sensor transitions to the off state is defined as a threshold value VDSAth, the following equation is established.

VDSAth−VDSB = R2 / R1 × VDSB (at 5 [mA]) (2) The overcurrent determination value is determined by the equation (2). The adjustment of the overcurrent determination value is performed by connecting the variable resistor RV connected in parallel to the resistor R2 and grounded outside the chip 110a.
It is done by adjusting. By reducing the resistance value of the variable resistor RV, the overcurrent determination value can be shifted downward.

Next, the operation in the ohmic region will be described. When the semiconductor element with built-in temperature sensor QA transitions to the ON state in a state where the wiring is normal, the semiconductor element with built-in temperature sensor QA continuously maintains the ON state, so that the gate-source voltages VTGSA and VTGSB become 10%.
[V], the semiconductor element QA with built-in temperature sensor and the reference FET QB operate in the ohmic region.

In this ohmic region, the relationship between the gate-source voltage VGS and the drain current ID is one-to-one.
The relationship is gone. In the case of “HAF2001” manufactured by Hitachi, the on-resistance is determined by the gate-source voltage VGS = 10
At [V], RDS (ON) = 30 [mΩ],
The following equation is obtained.

VDSB = 5 [A] × 30 [mΩ] = 0.15 [V] VDSA = IDQA × 30 [mΩ] VDSA−VDSB = 30 [mΩ] × (IDQA-5 [A]) (3) In addition, when the drain current IDQA increases due to a short circuit of the wiring or the like, the value of the equation (3) increases. When the drain current IDQA exceeds the overcurrent determination value, the semiconductor element QA with a built-in temperature sensor is turned off.
Thereafter, the state shifts to the pinch-off region, and the semiconductor element with a built-in temperature sensor QA repeats the transition to the ON state and the OFF state, finally leading to overheating interruption.

If the wiring returns to normal before the overheating is interrupted (an example of an intermittent short-circuit failure), the semiconductor element QA with a built-in temperature sensor continuously maintains the ON state, and the ohmic region is closed. Return to operation.

FIG. 6 exemplifies a waveform diagram of current and voltage of the semiconductor element QA with a built-in temperature sensor in the power supply control device. Here, FIG. 6A shows the drain current ID.
6A shows a drain-source voltage VDS, and FIG. 6B shows a complete short circuit (dead short circuit).
, Indicates a normal operation, and indicates an overload (including a short-circuit resistance between a source and a load).

If a complete short circuit (dead short circuit) has occurred (in the figure), the semiconductor element QA with a built-in temperature sensor
Transitions from the off state to the on state, the drain current ID suddenly flows.
Of the temperature sensor built-in semiconductor element QA
Is overheated, and the semiconductor element QA with a built-in temperature sensor is overheated by the overheat protection function, that is, the transition of the overheat protection FET QS to the ON state.

When an incomplete short circuit having a certain short-circuit resistance has occurred (in the figure), the on / off control of the temperature sensor built-in semiconductor element QA is repeated as described above, and the drain current ID is reduced. The temperature is largely changed, and the overheating protection function is performed by the periodic heat generation function of the temperature sensor built-in semiconductor element QA, that is, the overheating cutoff of the temperature sensor built-in semiconductor element QA is accelerated by the transition of the overheat cutoff FET QS to the ON state.

As described above, the power supply control device according to the first embodiment can perform high-accuracy overcurrent detection without using a shunt resistor connected in series to a power supply path to perform current detection. Therefore, it is possible to suppress the heat loss of the whole device and to detect not only the overcurrent due to the complete short circuit but also the abnormal current when the rare short circuit such as the incomplete short circuit with a certain short resistance occurs. It can be detected continuously by the wear circuit.

In the case of an incomplete short circuit, the on / off control of the semiconductor element with built-in temperature sensor QA is repeatedly performed to greatly fluctuate the current. QA shutoff (off control) can be accelerated.

Furthermore, since the on / off control of the semiconductor switch can be performed by using only a hardware circuit without using a microcomputer, the mounting space of the power supply control device can be reduced, and the device cost can be greatly reduced. be able to.

Although the change in the characteristics of the drain-source voltage VDS is used, the current is compared with a predetermined threshold value at a predetermined timing, and compared with another method of detecting an overcurrent, a capacitor and a plurality of resistors are used. Since components are not required, detection errors due to variations in the components can be further reduced, and since an external capacitor for the chip 110a is not required, mounting space and device cost can be further reduced.

Further, by adjusting the variable resistor RV, it is possible to reliably detect whether a short circuit or an incomplete short circuit in accordance with the type of the load 102 (head lamp, drive motor, etc.) is performed, and the protection against short circuit failure can be accurately detected. Can do well.

[Operation to Prevent Inrush Current] Next, the switch S
When the W1 is turned on, an inrush current may momentarily flow into the load 102 such as a lamp, and the load 102 may be damaged. In order to prevent the load 102 from being damaged by such an inrush current, an ON operation of the switch SW1 is detected by the mask signal generating circuit 2, and as shown in FIG. A mask signal (tmask) is formed, and this is
MP1 is supplied to the "-" input terminal of the comparator CM.
By controlling the gate voltage of the semiconductor element with built-in temperature sensor QA to low level via P1 and the drive circuit 111, the semiconductor element with built-in temperature sensor QA is turned off, and FIG.
It is conceivable to cancel the inrush current as shown in FIG.

However, the above-mentioned complete short circuit (dead short circuit)
Is generated, the temperature sensor built-in semiconductor element Q
While A is being controlled to be off, the above-described protection function against abnormal current does not work. For this reason, while the mask signal is being supplied to the comparator CMP1, a large current continues to flow through the load 102, which is not preferable. Therefore, the supply time of the mask signal to the comparator CMP1 (duty ratio of the mask signal: pulse width) needs to be the minimum necessary.

For this reason, in the power supply control device, the switch SW1 is turned off after the switch SW1 is turned off.
According to the time until is turned on
The supply time of the mask signal supplied to P1 is controlled to minimize the inrush current cancel time (= operation stop time of the protection function against abnormal current).

[Variable Operation of Mask Signal] That is, the level of the rush current is determined by the time from when the switch SW1 is turned off to when the switch SW1 is turned on next time.
It changes as shown by a solid line and a dotted line in FIG. Therefore, in the power supply control device, the timer circuit 1 shown in FIG. 1 detects the on / off state of the switch SW1, and starts timing when the switch SW1 is turned off. Then, the time taken from the time when the switch SW1 is turned off to the time when the switch SW1 is turned on next time is measured, and the time measurement information is supplied to the mask signal generation circuit 2.

The mask signal generation circuit 2 includes a driving circuit 111
Detects the on / off state of the switch SW1 based on the gate voltage (or the switch signal from the switch SW1) supplied to the semiconductor element QA with a built-in temperature sensor, and sets the timer circuit 1 at the timing when the switch SW1 is turned on. Captures timing information supplied by Then, based on the timing information, a mask signal whose duty ratio (pulse width) is adjusted is formed as shown in FIG. 13B, and this is supplied to the "-" input terminal of the comparator CMP1.

As a result, the rush current is canceled by the mask signal whose duty ratio has been adjusted in accordance with the level of the rush current that changes from the time when the switch SW1 is turned off to the time when the switch SW1 is next turned on. can do. Therefore, the operation stop time of the protection function against the abnormal current of the semiconductor element with a built-in temperature sensor QA can be minimized by the mask signal. Therefore, the protection function against the abnormal current of the semiconductor element QA with built-in temperature sensor can be immediately restored after canceling the inrush current, and even if a dead short circuit occurs, a large value Can be minimized and the load 102 can be protected.

[Second Embodiment] Next, a second embodiment of the present invention will be described.
The power supply control device according to the embodiment will be described. The power supply control device of the second embodiment is as shown in FIG. 7, and is different from the configuration of the first embodiment described with reference to FIG. 1 in that resistors R3, R4, R6, R9, FET
It has a configuration in which Q1, Q2 and a Zener diode ZD2 are added. Note that a portion 11 surrounded by a dotted line in FIG.
0b indicates a chip portion for analog integration.

That is, the gate of the FET Q1 whose gate and source are connected by the resistor R9 is connected to the Zener diode Z.
Semiconductor element Q with a built-in temperature sensor via D2 and resistor R6
A, and the drain of the FET Q1 is connected to VB + 5 [V] via the resistor R4,
Is the source SA of the semiconductor element QA with a built-in temperature sensor.
Connected to Also, a circuit in which the resistor R3 and the drain of the FET Q2 are connected in parallel with the resistor R1 is connected, and the voltage division of the drain-source voltage VDS of the semiconductor element QA with a built-in temperature sensor is changed by ON / OFF control of the FET Q2. It is configured as follows.

Next, the operation of the power supply control device according to the second embodiment will be described. First, the operation in the pinch-off region will be described. As in the first embodiment,
Drain-source voltage VDS of reference FET QB
B is directly input to the comparator CMP1, and the voltage VDSA between the drain and the source of the semiconductor element QA with a built-in temperature sensor is a value obtained by dividing the parallel resistance (R1‖R3) of the resistors R1 and R3 and the resistor R2 (here, the variable resistor RV). Not taken into account) is input to the comparator CMP1. That is, the value of the following equation is input to the comparator CMP1.

VDSA × (R1‖R3) / ((R1‖R3) + R2) ‥‥‥ (1 ′) Immediately after the semiconductor element with built-in temperature sensor QA transitions to the ON state, the voltage VDSB between the drain and source of the reference FET QB is obtained. > (1 ′), but in an overload state, (1 ′) increases as the drain current IDQA of the semiconductor element QA with a built-in temperature sensor increases, and finally the reference F
The voltage becomes higher than the drain-source voltage VDSB of the ETQB. At this time, the output of the comparator CMP1 changes from the "H" level to the "L" level, and the semiconductor element QA with a built-in temperature sensor is turned off. If the drain-source voltage VDSA when the semiconductor element QA with a built-in temperature sensor transitions to the off state is a threshold VDSAth, the following equation is established.

VDSAth−VDSB = R2 / (R1‖R3) × VDSB (2 ′) The overcurrent determination value is determined by the equation (2 ′). In addition,
To change the overcurrent determination value, as in the first embodiment, a variable resistor RV connected in parallel to the resistor R2 grounded outside the chip 110a is adjusted. By reducing the resistance value of the variable resistor RV, the overcurrent determination value can be shifted downward.

The operation in the ohmic region, the operation described with reference to FIG. 6, and the like are the same as in the first embodiment, and will not be described.

Next, the overcurrent determination value will be described. Here, the same value is used for the overcurrent determination value in both the pinch-off region and the ohmic region.

First, △ (VDSA) in the pinch-off region
−VDSB) / △ ID is obtained. The following equation is obtained from the characteristic curve of HAF2001.

ΔVTGSA / ΔIDQA = 60 [mV / A] (4) ΔVTGSA = △ (VDSA−VDSB) × 2CGD / (CGS + 2CGD) = △ (VDSA−VDSB) × 2 × 1200 pF / (1800 pF + 2) × 1200 pF) = △ (VDSA−VDSB) × 0.57 (5) From equations (4) and (5), Δ (VDSA−VDSB) / △ ID = 105 [mV / A] (6) Becomes

Further, Δ (VDSA) in the ohmic region
−VDSB) / ΔID is given by Δ (VDSA−VDSB) / ΔID = 30 [mV / A] (7) from the equation (3).

Comparing equations (6) and (7), the current sensitivity is more sensitive in the pinch-off region than in the ohmic region,
Even if the overcurrent determination value is appropriate in the ohmic region, it may be too low in the pinch-off region and may be caught too much. As a countermeasure, there is a method of changing the overcurrent determination value between the pinch-off region and the ohmic region. The circuit added in the second embodiment to the configuration of the first embodiment is this countermeasure circuit.

The determination of the pinch-off region or the ohmic region is made based on the magnitude of the gate-source voltage VTGSA. The gate-source voltage VTGSA in the pinch-off region increases as the drain current ID increases, but does not exceed 5 [V] even in the case of a complete short circuit (dead short circuit).
Therefore, if the gate-source voltage VTGSA> 5 [V], it can be determined that the transistor is in the ohmic region.

Immediately after the semiconductor element with built-in temperature sensor QA transitions to the ON state, the FET Q1 is in the OFF state and the FET Q1 is in the OFF state.
2 is on. In order to make the FET Q2 transition to the ON state, a voltage higher than the power supply voltage VB, for example, VB + 5
[V] is required.

If the Zener breakdown voltage of Zener diode ZD2 is set to 5 [V] -1.6 [V] (threshold voltage of FET Q1), gate-source voltage VTGSA> 5
When the voltage becomes [V], the FET Q1 transitions to the ON state,
Since Q2 transitions to the OFF state, the resistor R3 that is in parallel with the resistor R2 is removed in a circuit.

Since the compression ratio of the drain-source voltage VDSA becomes smaller, the difference VDSA-VDSB between the drain-source voltage determined as an overcurrent becomes smaller. Thus, in the ohmic region, the overcurrent is determined with a smaller current value than before the countermeasure.

However, there is a possibility that there is no practical problem even if no countermeasures are taken by the additional circuit in the second embodiment. That is, when the final load current value is small in the pinch-off region, the voltage completely rises in the pinch-off region. When the final load current value reaches the final load current value in the pinch-off region, when the final load current value is large, the current is still rising in the pinch-off region, and the current value in the pinch-off region is up to 40 even in the case of a complete short circuit (dead short circuit). It is restricted to the [A] position.

That is, as the final load current value increases, the current rise characteristic with a certain gradient falls off, and the difference between the drain-source voltage VDSA becomes smaller as the difference between the final load current values increases. Because of this phenomenon,
Even if the current sensitivity in the pinch-off region is large, the difference VDSA-VDSB of the drain-source voltage does not become large, and the countermeasure by the additional circuit as in the present embodiment is not required depending on the selection of the current value in the reference voltage generation circuit. However, with the configuration of the first embodiment, a power supply control device that performs practical overcurrent detection protection can be realized.

Here, the concept of the overcurrent control will be summarized, and the basic concept is as follows. First,
When the wiring is normal, the semiconductor element with built-in temperature sensor QA transitions to the on state, and enters the ohmic region. As long as the wiring is normal, the semiconductor element with built-in temperature sensor QA stays in the ohmic region and keeps the on state.

Next, when an abnormality occurs in the wiring and the current increases and the difference VDSA-VDSB between the drain and source exceeds the overcurrent determination value, the semiconductor element QA with a built-in temperature sensor transitions to the off state, and pinch off. Enter the area. As long as the wiring abnormality continues, the semiconductor element with built-in temperature sensor QA repeats the transition between the ON state and the OFF state, stays in the pinch-off region, and finally leads to overheat interruption.

In order to realize the above basic concept and to optimize the control, the overcurrent judgment value must satisfy the following two conditions. First, the temperature sensor built-in semiconductor element QA is never turned off in the normal current range. Second, after the overcurrent is determined in the ohmic region,
Unless the wiring abnormality is improved, the semiconductor element with a built-in temperature sensor QA continuously repeats the transition to the ON state / OFF state in the pinch-off region. This is necessary to stabilize the cycle of the on / off control.

Stabilizing the cycle of the on / off control leads to stability of the control, and the timer is set using the cycle of the on / off control (see the fifth embodiment described later). However, it is necessary to stabilize the period.

In order to satisfy the first and second conditions, the overcurrent judgment value in the ohmic region is set to the current value of “normal current maximum value + α” (corresponding VDSA−VDSB), and the pinch-off region It is necessary to set the overcurrent determination value to “normal current maximum value + β”. At this time, α> β.
That is, α-β is an offset amount necessary for staying in the pinch-off region.

The power supply control device according to the second embodiment can obtain the same effects as those described in detail in the first embodiment.

[Third Embodiment] Next, a third embodiment of the present invention will be described.
The power supply control device according to the embodiment will be described. The power supply control device according to the third embodiment is configured as shown in FIG. 8, and is different from the power supply control device according to the second embodiment described with reference to FIG.
The gate of QB is not connected to the true gate TG of the semiconductor device with built-in temperature sensor QA, but R41 is added as a gate resistor of the reference FET QB, and the other end of the resistor R41 is connected to the gate G of the semiconductor device with built-in temperature sensor QA. ing.
Otherwise, the circuit configuration is the same as that of the second embodiment.
A portion 110c surrounded by a dotted line in FIG. 8 indicates a chip portion where analog integration is performed.

The resistance value of the resistor R41 is R41 = 1.
000 × R7. For example, R7 = 1
If 0 [KΩ], R41 = 10 [MΩ]. Since the resistance value becomes extremely high, the ratio of the number of transistors in consideration of cost and productivity is set to about 1: 100 and R41
= 1 [MΩ].

The operation of the power supply control device of this embodiment is equivalent to that of the second embodiment, and has the same effect as that of the first embodiment.

[Fourth Embodiment] Next, a fourth embodiment of the present invention will be described.
The power supply control device according to the embodiment will be described. The power supply control device according to the fourth embodiment is configured as shown in FIG. 9, and has a configuration in which an overheat promotion circuit 106 is added to the power supply control device according to the first embodiment. I have. Note that a portion 110d surrounded by a dotted line in FIG. 9 indicates a chip portion to be analog-integrated.

In the power supply control devices of the above-described first to third embodiments, when an overcurrent due to a complete short circuit is detected, protection by overheat cutoff immediately functions and the semiconductor element QA with a built-in temperature sensor is activated. Can be overheated (off-controlled), but in the case of an incomplete short circuit, the on / off control of the semiconductor element with built-in temperature sensor QA is repeated to periodically generate heat from the semiconductor element with built-in temperature sensor QA. Since the overheat cutoff is made to function by the action, it is conceivable that the time until the overheat cutoff becomes relatively long. Therefore, the fourth
In the power supply control device of this embodiment, the overheat cutoff promotion circuit (overheat cutoff promotion means) 106 accelerates the cutoff of the semiconductor element QA with a built-in temperature sensor even in the case of an incomplete short circuit.

That is, the overheat cutoff promotion circuit 106
ETQ21, a diode D21, resistors R21 to R23, and a capacitor C21. During overcurrent control, the capacitor C2 is periodically switched to the "H" level when the gate potential of the semiconductor element QA with a built-in temperature sensor periodically becomes "H" level.
1 is charged via the resistor R21 and the backflow preventing diode D21. Since the gate potential of the FET Q21 is initially lower than the threshold value, the FET Q21 is in the off state. However, when the gate potential increases with the charging of the capacitor C21, the FET Q21 transitions to the on state.

The terminal TG (the true gate of the semiconductor element QA with a built-in temperature sensor) is connected to the ground potential (GN) through the resistor R21.
A current flows through D), and the amount of charge stored in the terminal TG decreases. For this reason, even for the same drain current ID, the voltage VDSA between the drain and the source becomes large, the power consumption of the semiconductor element QA with a built-in temperature sensor increases, and the overheat cutoff is accelerated. Note that the smaller the resistance R21, the earlier the overheat cutoff. Further, the resistor R23 is a discharge resistor of the capacitor C21, and it is desirable that the resistor R23 be set so that R22≪R23.

The power supply control device according to the fourth embodiment has an overheat cutoff promotion circuit (overheat cutoff promotion means) 10.
6, the interruption of the semiconductor element with built-in temperature sensor QA can be accelerated even in the case of an incomplete short circuit, and the same effect as that of the power supply control device of the first embodiment can be obtained.

[Fifth Embodiment] Next, a fifth embodiment of the present invention will be described.
The power supply control device according to the embodiment will be described. The power supply control device according to the fifth embodiment has a configuration as shown in FIG. 10, in which an on / off times integration circuit 107 is added to the power supply control device according to the first embodiment. It has become. In addition, the part 1 enclosed by the dotted line in FIG.
Reference numeral 10e denotes a chip portion for analog integration.

In the power supply control devices according to the first to third embodiments, in the case of an incomplete short circuit, the on / off control of the semiconductor element with built-in temperature sensor QA is repeatedly performed to control the semiconductor element with built-in temperature sensor QA. The overheating cut-off is made to function by a periodic heating action. For this reason, there is a possibility that the time until the overheating is cut off may be relatively long. However, the power supply control device of the fifth embodiment solves this problem as follows.

That is, in the power supply control device of the fifth embodiment, when the number of times of on / off control of the semiconductor element with built-in temperature sensor QA reaches a predetermined number, the semiconductor element with built-in temperature sensor QA is forcibly activated. An on / off number integration circuit 107 for performing off control is added, and the on / off number integration circuit 107 is adapted to speed up the cutoff of the semiconductor element QA with a built-in temperature sensor.

The on / off frequency integration circuit 107 includes an FET
Q31, diodes D31 and D32, resistors R31 to R3
3 and a capacitor C31. When the gate potential of the semiconductor element with built-in temperature sensor QA periodically becomes "H" level, the capacitor C3
1 is charged via the resistor R31 and the backflow preventing diode D31.

Since the gate potential of the FET Q31 is initially lower than the threshold value, the FET Q31 is in the off state. However, when the gate potential rises with the charging of the capacitor C31, the FET Q31 transitions to the on state. At this time, since the anode side of the temperature sensor 121 (four diodes) is pulled down, the same condition as the high temperature state is reached, the overheat cutoff FET QS transitions to the on state, and the temperature sensor built-in semiconductor element QA is cut off (off control). ). In addition, the cutoff time based on the number of times is about 1 [sec.
] Degree is desirable.

In order to stably operate the on / off frequency integrating circuit 107, it is necessary to further stabilize the cycle of the on / off control of the semiconductor element QA with a built-in temperature sensor. In the present embodiment, the drain of the semiconductor element QA with a built-in temperature
Since the change in the source-to-source voltage VDSA is larger in the pinch-off region than in the ohmic region, while the semiconductor element QA with the built-in temperature sensor is on / off controlled, the state transits to the off state in the pinch-off region (passes through the pinch-off region). Does not transition to the off state in the ohmic region.) Therefore, the cycle of the on / off control of the semiconductor element QA with a built-in temperature sensor becomes stable.

[Modification] Next, a modification of the power supply control device of each of the above embodiments will be described with reference to FIG. In each of the above-described embodiments, the reference voltage generation means is fixed (for example, fixed to a load of 5 A), and the change of the second load (resistance Rr) is changed by changing the overcurrent determination value. .

That is, the resistance R
1, R2, and R5 are set to create a chip, and the load 102
Is smaller, a variable resistor RV is added outside the chip in parallel with the resistor R2 to reduce the overcurrent determination value.

This method has the following problems. First, as the overcurrent determination value increases, the control accuracy decreases. Second, it is necessary to change the overcurrent determination value between the pinch-off region and the ohmic region. In this case, the overcurrent determination value in the pinch-off region needs to be strictly set in accordance with the rising gradient of the drain current ID. However, the rising gradient of the drain current ID changes when the wiring inductance and the wiring resistance change. It is difficult to set the drain current ID along the rising gradient.

As a countermeasure against this, it is effective to set the reference voltage generating means in accordance with the load 102. That is, first, the reference voltage generator is set to the maximum current value of the load 102.

Next, the drain-source voltage VDS (drain-source voltage VDSB of the reference FET QB) in the reference voltage generation means is reduced by the load driving transistor (drain-source voltage VDSA of the semiconductor element QA with built-in temperature sensor). However, if it exceeds, it is determined as an overcurrent value.

In this method, it is not necessary to change the overcurrent determination value between the pinch-off region and the ohmic region. The detection accuracy can be determined based on whether or not the voltage VDS between the drain and the source of the reference voltage generation means has been exceeded.
Is determined only by the resolution of

Further, the effects of temperature drift, variation between IC lots, wiring inductance and wiring resistance can be eliminated, and fluctuations in power supply voltage are not affected as long as the comparator CMP1 operates normally. Therefore, a power supply control device and a power supply control method with few (almost no) error elements can be realized.

The following is conceivable if the setting change methods of the reference voltage generating means are listed together.

(A) An external variable resistor RV is connected in parallel with the resistor Rr.
Additional connection.

(B) By installing the resistor Rr outside the chip,
Select and set according to the specifications.

(C) The resistance value of the resistor Rr inside the chip is changed.

For example, as shown in FIG. 11, several types of resistors Rr1 to Rr4 are arranged in parallel inside a chip.
When the chip is packaged or mounted on the bare chip, the switch SW2 is selected from among the resistors Rrl to Rr4.
, The set value (reference) of the reference voltage generation means can be set to the target specification.

As a result, even when the power supply control device is integrated, a plurality of specifications can be covered by one type of chip. Further, by variably setting the resistors Rr1 to Rr4, it is possible to reliably detect whether a complete short circuit or an incomplete short circuit in accordance with the type of the load (head lamp, drive motor, or the like) is performed, and protection against short circuit failure is accurately performed. It can be carried out.

Note that the semiconductor element QA with a built-in temperature sensor, the reference FET QB, the transistors Q5 and Q6, the overheat cutoff FETs QS and the FETs which are switching elements.
Although an n-channel type is used as Q11 to Q54, a P-channel type may be used. However, a circuit change due to the inversion of the gate potential for performing on / off control of each switching element to the “L” / “H” level is required.

Finally, in the description of each of the above embodiments,
For example, the present invention is applied to a power supply control device that selectively controls supply of power from a battery to a load such as a lamp in an automobile. However, the present invention is not limited to this. It is needless to say that any form can be applied as long as it is a device that controls switching.

[0177]

The power supply control device and the power supply control method according to the present invention eliminate the need for a shunt resistor, which has been conventionally required, to suppress the heat loss of the device. An abnormal current when a rare short circuit such as an incomplete short circuit having a resistance occurs can be continuously detected by a hardware circuit or a program processing of a microcomputer or the like. In particular, when the on / off control of the semiconductor switch is configured by a hardware circuit, a microcomputer is not required, so that the mounting space can be reduced and the device cost can be significantly reduced.

Further, the semiconductor switch can be turned off in accordance with the level of the rush current which changes with the time required from the time when the power supply to the load is stopped to the time when the power supply to the load is started next time. The inrush current can be canceled while the operation stop time of the protection function for the abnormal current of the semiconductor switch is minimized. Therefore,
Even when a dead short has occurred, the time during which a large current flows through the load can be minimized, and the load can be protected.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a power supply control device according to a first embodiment of the present invention.

FIG. 2 is a detailed circuit diagram of a semiconductor element (semiconductor switch) with a built-in temperature sensor provided in the power supply control device of the first embodiment.

FIG. 3 is a graph for explaining a falling characteristic of a voltage between a drain and a source when a semiconductor element with a built-in temperature sensor provided in the power supply control device according to the first embodiment transitions from an off state to an on state. FIG.

FIG. 4 is a conceptual circuit diagram of the power supply control device according to the first embodiment.

FIG. 5 is a diagram for explaining characteristics of a drain current and a gate-source voltage of a semiconductor element with a built-in temperature sensor provided in the power supply control device of the first embodiment.

FIG. 6 is a diagram exemplifying a current waveform and a voltage waveform at the time of a short-circuit failure and at the time of normal operation of the semiconductor element with a built-in temperature sensor provided in the power supply control device of the first embodiment.

FIG. 7 is a circuit diagram of a power supply control device according to a second embodiment of the present invention.

FIG. 8 is a circuit diagram of a power supply control device according to a third embodiment of the present invention.

FIG. 9 is a circuit diagram of a power supply control device according to a fourth embodiment of the present invention.

FIG. 10 is a circuit diagram of a power supply control device according to a fifth embodiment to which the present invention is applied.

FIG. 11 is a circuit diagram of a circuit for setting a set value (reference) of a reference voltage generation means provided in a power supply control device according to a modified example of each of the embodiments to a target specification.

FIG. 12 is a diagram for describing a problem that occurs when an inrush current applied to a load is simply masked.

FIG. 13 illustrates a mask signal formed by changing a duty ratio as necessary to cancel an inrush current by a mask signal generation circuit provided in the power supply control device of each of the embodiments. FIG.

FIG. 14 is a circuit configuration diagram of a power supply control device provided with a conventional semiconductor switch.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Timer circuit 2 Mask signal generation circuit 101 Power supply 102 Load 111 Drive circuit 105 Inrush current mask circuit (prohibiting means) 106 Overheat cutoff promotion circuit (Overheat cutoff promotion means) 107 On / off frequency integration circuit (Number control means) QA Temperature sensor Built-in semiconductor element RG Internal resistance Q1 to Q6 Transistor R1 to R33 Resistance ZD1, ZD2 Zener diode D1 to D32 Diode C1 to C31 Capacitor 121 Temperature sensor 122 Latch circuit QS Overheat cutoff FET Q11 to Q54 FET

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H05B 37/02 H05B 37/02 K

Claims (20)

[Claims] 1. A semiconductor switch which is switching-controlled in accordance with a control signal supplied to a control signal input terminal to control power supply from a power supply to a load, and wherein the semiconductor switch is in a state where a predetermined load is connected to the semiconductor switch. Reference voltage generation means for generating a reference voltage having a voltage characteristic equivalent to the voltage characteristic of the terminal voltage of the semiconductor switch; detection means for detecting a difference between the terminal voltage of the semiconductor switch and the reference voltage; Control means for controlling on / off of the semiconductor switch in accordance with a difference between the intermediate voltage and the reference voltage; and a power supply to the load after the power supply to the load is stopped. Timer means for measuring time and outputting time information; and from the power supply start instruction to the load, the semiconductor switch for a time corresponding to the time information from the timer means. By off control switch, the power supply control device characterized by having an inrush current cancellation means for canceling the inrush current to the load. 2. The semiconductor device according to claim 1, wherein said reference voltage generating means is connected in parallel to said semiconductor switch and said load.
The power supply control device according to claim 1, further comprising a circuit in which a load is connected in series, wherein a voltage between terminals of the second semiconductor switch is generated as the reference voltage. 3. A voltage characteristic of a reference voltage of the reference voltage generating means is equivalent to a voltage characteristic in a state where a target current which is a maximum current in a normal operation range flows through the semiconductor switch and the load. The power supply control device according to claim 1 or 2, wherein 4. A semiconductor device according to claim 2, wherein said semiconductor switch and said second semiconductor switch have equivalent characteristics with respect to a transient voltage characteristic of a terminal voltage when transitioning from an off state to an on state. The power supply control device according to claim 3. 5. A current capacity of the second semiconductor switch is smaller than a current capacity of the semiconductor switch, and a resistance value ratio between the load and the second load is equivalent to a current capacity ratio of the semiconductor switch and the second semiconductor switch. The power supply control device according to claim 2, wherein: 6. The device according to claim 2, wherein the second load includes a plurality of resistors, and a resistance value of the second load is variably set by selectively connecting the plurality of resistors. The power supply control device according to claim 3, 4, or 5. 7. A variable resistor connected in series to the load or in parallel to the second load, wherein a resistance value of the second load is variably set by the variable resistor. The power supply control device according to claim 2, claim 3, claim 4, claim 5, or claim 6. 8. The control means controls off of the semiconductor switch when a difference between the detected inter-terminal voltage and the reference voltage exceeds a first threshold value, and controls the off-state of the detected inter-terminal voltage and the reference voltage. The semiconductor switch is turned on when the difference is smaller than a second threshold value, wherein the semiconductor switch is turned on. A power supply control device as described in the above. 9. The semiconductor device according to claim 1, further comprising overheat protection means for turning off the semiconductor switch and protecting the semiconductor switch when the semiconductor switch is overheated. The power supply control device according to claim 5, claim 6, claim 7, or claim 8. 10. The semiconductor device according to claim 1, wherein said semiconductor switch, said reference voltage generation means, said detection means, said control means or said overheat protection means are formed on the same chip. Claim 3, Claim 4, Claim 5,
The power supply control device according to claim 6, claim 7, claim 8, or claim 9. 11. The control device according to claim 1, wherein a cycle of on / off control of said semiconductor switch by said control means is used as a control clock.
Claim 4, Claim 5, Claim 6, Claim 7, Claim 8,
The power supply control device according to claim 9. 12. The overheat protection promoting means for speeding up the off control by the overheat protection means at the time of on / off control of the semiconductor switch by the control means. A power supply control device according to claim 1. 13. The semiconductor device according to claim 1, further comprising a number control means for integrating the number of on / off controls of said semiconductor switch by said control means, and for controlling said semiconductor switch to be turned off when said number of controls reaches a predetermined number. Claim 1, Claim 2, Claim 3, Claim 4, Claim 5, Claim 5, Claim 6, Claim 7, Claim 8, Claim 9, Claim 10, Claim 11, or Claim 12. Power supply control device. 14. A power supply control method for a power supply control device, comprising: a semiconductor switch that is switched and controlled in accordance with a control signal supplied to a control signal input terminal and controls power supply from a power supply to a load. A reference voltage generating step of generating a reference voltage having a voltage characteristic equivalent to a voltage characteristic of a voltage between terminals of the semiconductor switch in a state where a predetermined load is connected to the semiconductor switch; A voltage detection step of detecting a difference, a control step of controlling on / off of the semiconductor switch according to a difference between the detected inter-terminal voltage and a reference voltage, and a step of stopping power supply to the load. Measuring the time taken until the power supply to the load is started, and the step from the power supply start instruction to the load. Measured time minute the By-off control of the semiconductor switch, the power supply control method characterized by a step of canceling the inrush current to the load by. 15. A voltage characteristic of the reference voltage in the reference voltage generating step is equivalent to a voltage characteristic in a state where a target current that is a maximum current in a normal operation range flows through the semiconductor switch and the load. The power supply control method according to claim 14, wherein: 16. The off-control step of controlling the semiconductor switch to turn off when a difference between the detected inter-terminal voltage and the reference voltage exceeds a first threshold value; The power supply control method according to claim 14, further comprising: an on-control step of turning on the semiconductor switch when a difference from a reference voltage is lower than a second threshold value. 17. The semiconductor device according to claim 14, further comprising an overheat protection step of controlling the semiconductor switch to be turned off and protected when the semiconductor switch is overheated.
Or a power supply control method according to claim 16. 18. A semiconductor device according to claim 15, further comprising a prohibition step of prohibiting on / off control of said semiconductor switch by said control step for a certain period after said semiconductor switch is turned on. , Claim 1
The power supply control method according to claim 6 or 17. 19. The power supply control method according to claim 17, wherein at the time of on / off control of the semiconductor switch by the control step, off control by the overheat protection step is accelerated. 20. The method according to claim 20, further comprising the step of: integrating the number of on / off controls of the semiconductor switch in the control step, and controlling the semiconductor switch to be off when the number of controls reaches a predetermined number. Claim 1
4, Claim 15, Claim 16, Claim 17, Claim 18
Alternatively, the power supply control method according to claim 19.