JP2000236245A - Unit and method for power supply control - Google Patents

Abstract

PROBLEM TO BE SOLVED: To actualize a unit and method for power supply control which facilitate integration and are made inexpensive by eliminating the need for a shunt resistance and thus suppressing the heat loss of the unit, and securely detecting the wire break of a lamp from 1st lighting, even when the wire break occurs and outputting constant blinking cycles. SOLUTION: A thermal FETQA is brought under switching control according to the control signal supplied to a gate terminal to control power supply from a power source 101 to the lamp 102, and an FETQB is brought under switching control according to the control signal supplied to the gate terminal to control power supply to series resistances Rr1 and Rr2 having the impedance so set that a current approximating a rush current flows from a power source 102. Furthermore, a comparator CMP2 decides whether or not the lamp 102 has a wire break by detecting the difference voltage between the terminal voltage across the thermal FETQA and the terminal voltage across the FETQB.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply control device and a power supply, comprising a semiconductor switch for controlling power supply from a power supply to a load by switching control in accordance with a control signal, and detecting whether or not the load is disconnected. It relates to a control method.

[0002]

2. Description of the Related Art As a conventional power supply control device provided with a semiconductor switch, for example, there is one as shown in FIG. The power supply control device of this conventional example is a device that selectively supplies power from a battery to each load in an automobile and controls power supply to the load.

In FIG. 1, a power supply control device according to the prior art includes a shunt resistor RS and a drain D of a thermal FET QF in a path for supplying an output voltage VB of a power supply 101 to a load 102 such as a headlight or a drive motor for a power window. -A configuration in which the sources S are connected in series. Also,
A driver 901 that detects the current flowing through the shunt resistor RS and controls the drive of the thermal FET QF by a hardware circuit, and an A / D converter that controls the drive signal of the thermal FET QF on / off based on the current value monitored by the driver 901. Device 902 and microcomputer (CPU) 903
And

Thermal FET Q as a semiconductor switch
F is a thermal FET with a built-in temperature sensor (not shown)
When the temperature of the QF rises to a temperature equal to or higher than a specified value, an overheat cutoff function is provided for forcibly turning off the thermal FET QF by a built-in gate cutoff circuit. In the drawing, RG is a built-in resistor, and ZD1 is a Zener diode that bypasses an overvoltage applied to the gate G while maintaining the voltage between the gate G and the source S at 12 [V].

In the conventional power supply control device,
It also has a protection function against an overcurrent between the drain D and the source S of the load 102 or the thermal FET QF. That is, the driver 901 receives the differential amplifiers 911 and 913 as a current monitoring circuit, the differential amplifier 912 as a current limiting circuit, the charge pump circuit 915, and the ON / OFF control signal from the microcomputer 903 and the current limiting circuit. Drive circuit 9 for driving gate G of thermal FET QF via internal resistance RG based on the overcurrent determination result
14 is provided.

When an overcurrent is detected via the differential amplifier 912 based on the voltage drop of the shunt resistor RS and the current exceeds the determination value (upper limit), the drive circuit 914 turns off the thermal FET QF. When the current drops below the judgment value (lower limit), the thermal FET
The QF is turned on.

On the other hand, the microcomputer 903 constantly monitors the current via a current monitor circuit (differential amplifiers 911 and 913), and if an abnormal current exceeding a normal value flows,
By turning off the drive signal of the thermal FET QF, the thermal FET QF is turned off. The microcomputer 9
If the temperature of the thermal FET QF exceeds the specified value before the drive signal of the off control is output from 03, the thermal FET QF is turned off by the overheat cutoff function.

Another power supply control device provided with a conventional semiconductor switch is, for example, as shown in FIG. This power supply control device supplies power from a battery to each lamp as a load in an automobile, and controls power supply to each lamp.

The power supply control device includes a power supply 10
The drain D-source S of the field effect transistor (FET) QB and the shunt resistor RS are connected in series to a path for supplying the output voltage of No. 1 to each lamp 102a, 102b, 102c such as a headlight or a stop lamp. .

The power supply control device includes a microcomputer (hereinafter referred to as a microcomputer) 51 which outputs a blink signal having a constant blink cycle for blinking the lamp 102a and the like by turning on / off the FET QB. A drive circuit 53 for driving the FET QB based on a control signal from the microcomputer 51, and a comparator for detecting the voltage between the terminals of the shunt resistor RS and comparing the detected voltage between the terminals with a threshold value to determine whether or not the lamp is disconnected. CO
MP10.

In the above configuration, for example, the lamp 10
When 2c is disconnected, the current flowing through the shunt resistor RS decreases, and the voltage across the shunt resistor RS decreases.
Therefore, if the voltage across the shunt resistor RS falls below the threshold value, the comparator COMP10 determines that one of the lamps has a disconnection.

[0012]

However, FIG.
The conventional power supply control device shown in FIG. 1 requires a shunt resistor RS connected in series to a power supply path in order to perform current detection.
There is a problem that the heat loss of the shunt resistor cannot be ignored due to the increase in the load current accompanying the reduction of the ON resistance of the QF.

The overheat cutoff function and the overcurrent limiting circuit described above function when a nearly complete short circuit occurs in the load 102 or wiring and a large current flows, but the incomplete circuit having a certain degree of short circuit resistance It does not function when a rare short-circuit such as a short-circuit occurs and a small short-circuit current flows, and the microcomputer 903 must detect an abnormal current via a current monitor circuit and control the thermal FET QF to be turned off. In some cases, the responsiveness of microcomputer control to abnormal current is poor.

The shunt resistor RS and the A / D converter 9
02, the microcomputer 903 and the like are required, so that a large mounting space is required, and there is also a problem that these relatively expensive components increase the device cost.

Further, in another conventional power supply control device shown in FIG. 14, a shunt resistor RS connected in series to a power supply path for detecting current is provided. There is a problem that heat loss cannot be ignored.

When the lamp is turned on, a relatively large rush current flows. When the rush current is reduced to a steady current value, the comparator COM is turned off.
P10 is the voltage across the shunt resistor RS, had been determined that there is disconnection of the lamp, as shown in the timing chart of FIG. 15, a lamp lights up first rush current constant during disconnection from particularly large time t ₁ Time t ₂ at which current becomes
In some cases, the time until the time becomes as long as 350 ms, for example. The rush current after the second lighting of the lamp is 2
This is a fixed time of 00 ms.

In the case of the first lighting of the lamp, a blinking cycle at the time of disconnection (200 ms from time t ₁ to time t ₁₁ )
The judgment of disconnection of the lamp cannot be made in time. For this reason, the flashing signal is output at the non-disconnection cycle (for example, 85 times / minute) during the first lighting of the lamp, and the flashing signal is output at the disconnection cycle after the second lighting of the lamp. For this reason, in the detection of disconnection of the lamp, it is desired to surely detect the disconnection of the lamp from the first lighting of the lamp and to set the blinking cycle to a short cycle at the time of disconnection (the cycle after the second lighting of the lamp). Was.

An object of the present invention is to solve the above-mentioned conventional problems and circumstances, and eliminates the need for a shunt resistor connected in series to a power supply path for current detection, thereby suppressing heat loss of the device. Provided are a power supply control device and a power supply control method which are easy to integrate and inexpensive, and which can reliably detect the lamp disconnection from the first lighting of the lamp and output a constant blinking cycle even when the lamp disconnection occurs. It is in.

[0019]

In order to solve the above-mentioned object, a power supply control device according to a first aspect of the present invention is configured such that a switching control is performed in response to a control signal supplied to a first control signal input terminal, and the power supply is controlled by a power supply. A first semiconductor switch for controlling power supply to a load, a second semiconductor switch for switching-controlled in response to the control signal supplied to a second control signal input terminal and controlling power supply from the power supply to a reference load; Detecting means for detecting a voltage difference between the voltage between the terminals of the first semiconductor switch and the voltage between the terminals of the second semiconductor switch; and determining the presence or absence of disconnection of the load based on the voltage difference detected by the detecting means. And determining means for performing the determination.

According to the first aspect of the present invention, the detecting means is the first type.
No shunt resistor is required because the difference between the voltage between the terminals of the semiconductor switch and the voltage between the terminals of the second semiconductor switch is detected, and the determination means determines the presence or absence of a load disconnection based on the difference voltage detected by the detection means. As a result, it is possible to suppress the heat loss of the device and to reliably detect the disconnection of the lamp even when the disconnection of the lamp occurs.

According to a second aspect of the present invention, the reference load has an impedance set such that a current similar to an inrush current flowing through the first semiconductor switch flows when the first semiconductor switch transitions from OFF to ON. It is characterized by being done.

According to the second aspect of the present invention, the impedance of the reference load is set such that a current similar to an inrush current flowing through the first semiconductor switch flows when the first semiconductor switch makes a transition from OFF to ON. Has been
The load disconnection can be reliably detected before the rush current becomes a steady current from the first lighting, and the blinking cycle from the first lighting can be the same as the second and subsequent lighting cycles, and the detection accuracy of the disconnection can be improved. improves.

The invention according to claim 3 is characterized in that the first semiconductor switch, the second semiconductor switch, the detecting means, and the determining means are formed on a same chip.

According to the third aspect of the present invention, since the first semiconductor switch, the second semiconductor switch, the detection means, and the determination means are formed on the same chip, an inexpensive and small circuit can be formed. .

According to a fourth aspect of the present invention, there is provided an overheat protection means for turning off the first semiconductor switch to protect the first semiconductor switch when the first semiconductor switch is overheated.

According to the fourth aspect of the present invention, the overheat protection means controls the first semiconductor switch to be turned off and protected when the first semiconductor switch is overheated. it can.

According to a fifth aspect of the present invention, the reference load includes a plurality of resistors, and a resistance value of the reference load is variably set by selective connection of the plurality of resistors.

According to the fifth aspect of the present invention, the reference load includes a plurality of resistors, and the resistance value of the reference load is variably set by selectively connecting the plurality of resistors. Can be set to the target specification.

According to a sixth aspect of the present invention, when the determining means determines that the load is disconnected, the determining means changes the cycle of the control signal.

According to the sixth aspect of the present invention, when the determining means determines that the load is disconnected, the cycle of the control signal is changed. It is easy to see that the wire is broken.

According to a seventh aspect of the present invention, there is provided the power supply control method, wherein the switching is controlled in accordance with a control signal supplied to the first control signal input terminal to control the power supply from the power supply to the load. Detection for detecting a difference voltage between a voltage and a voltage between terminals of a second semiconductor switch which is switched and controlled in accordance with the control signal supplied to a second control signal input terminal and controls power supply from the power supply to a reference load; And a judging step of judging whether or not the load is disconnected based on the difference voltage detected in the detecting step.

In the power supply control method according to the present invention,
The reference load has an impedance set so that a current similar to an inrush current flowing through the first semiconductor switch flows when the first semiconductor switch transitions from off to on.

In the power supply control method according to the ninth aspect,
When the first semiconductor switch is overheated, there is provided an overheat protection step of turning off the first semiconductor switch to protect the first semiconductor switch.

According to a tenth aspect of the present invention, in the power supply control method, the reference load includes a plurality of resistors, and a resistance value of the reference load is variably set by selective connection of the plurality of resistors. Features.

In a power supply control method according to an eleventh aspect of the present invention, the determining step changes the cycle of the control signal when it is determined that the load is disconnected.

[0036]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a power supply control device and a power supply control method according to the present invention will be described.
[First Embodiment], [Second Embodiment], [Third Embodiment], [Fourth Embodiment], [Fifth Embodiment],
[Modifications] will be described in detail with reference to FIGS. In the following description, a power supply control device and a power supply control method are applied to a device that selectively supplies power from a battery to each load such as a lamp in an automobile and controls power supply to the load. However, the present invention is not limited to such a form, and any form may be used as long as a power supply control device and a power supply control method that perform switching control of power supply from a power supply to a load. However, it is applicable.

FIG. 1 is a circuit configuration diagram of a power supply control device according to a first embodiment of the present invention, FIG. 2 is a detailed circuit configuration diagram of a semiconductor switch (thermal FET) used in the embodiment, and FIG. FIGS. 4, 5 and 6 show lamp current waveforms when the lamp is disconnected in the power supply control device of the embodiment.
FIG. 7 is an explanatory diagram for explaining the principle used by the power supply control device and the power supply control method according to the embodiment. FIG. FIG. 8 is a circuit configuration diagram of the power supply control device according to the second embodiment of the present invention, FIG. 9 is a circuit configuration diagram of the power supply control device of the third embodiment of the present invention, and FIG. FIG. 11 is a circuit configuration diagram of a power supply control device according to a fourth embodiment of the present invention, FIG. 11 is a circuit configuration diagram of a power supply control device according to a fifth embodiment of the present invention, and FIG. FIG. 3 is a circuit diagram illustrating a configuration of two loads (resistors).

[First Embodiment] A power supply control device according to a first embodiment of the present invention will be described with reference to FIG. 1. Is connected in series to a drain D-source S of a thermal FET QA as a semiconductor switch in a path for supplying the load to the load 102. Here, thermal FE
Although the TQA uses the NMOS type of the DMOS structure, it can also be realized by the PMOS type.

In the same figure, for the part for controlling the drive of the thermal FET QA, the FET QB and the resistors R1 to R1 are connected.
R10, Zener diode ZD1, diode D1,
The configuration includes a comparator CMP1, a drive circuit 111, and a switch SW1. Although “R” and subsequent numbers are used for the resistors as reference symbols, the following description uses them as reference symbols and also indicates the resistance values of the resistors. A switching circuit 110a with a current oscillation type cutoff function, which is a portion surrounded by a dotted line in FIG. 1, indicates a chip portion on which analog integration is performed.

The loads 102a to 102c are, for example, lamps such as a head lamp and a back lamp, and function when a user or the like turns on the switch SW1. The drive circuit 111 has a source transistor Q5 whose collector side is connected to the potential VP, and a ground potential (GND) at the emitter side.
And a source transistor Q5 and a sink transistor Q6 on / off controlled based on a switching signal by switching on / off of a switch SW1 to form a thermal FET.
A signal for driving and controlling the QA is output. In the figure, VB is the output voltage of the power supply 101, for example, 12 [V].

Thermal FET Q as a semiconductor switch
More specifically, A has a configuration as shown in FIG. In FIG. 2, the thermal FET QA has a built-in resistor R
G, a temperature sensor 121, a latch circuit 122, and an overheat cutoff FET QS. Note that ZD1 is a gate G-
This is a Zener diode that bypasses an overvoltage applied to the gate G while maintaining the voltage between the sources S at 12 [V].

That is, the thermal F used in this embodiment is
In the ETQA, when the temperature sensor 121 detects that the temperature of the thermal FET QA has risen to a temperature equal to or higher than a prescribed value, detection information to that effect is held in the latch circuit 122, and the overheat cutoff FET QS as a gate cutoff circuit is turned on. An overheat shutoff function is provided for forcibly turning off the thermal FET QA by operating.

The temperature sensor 121 has four diodes connected in cascade, and the temperature sensor 121 is disposed near the thermal FET QA for mounting. Thermal F
Since the resistance value of each diode of the temperature sensor 121 decreases as the temperature of the ETQA increases, when the gate potential of the FET Q51 drops to a potential that is set to the “L” level,
The FET Q51 transitions from the on state to the off state. As a result, the gate potential of the FET Q54 becomes
A is pulled up to the potential of the gate control terminal (G) of A,
The ETQ 54 changes from the off state to the on state, and “1” is latched in the latch circuit 122. At this time, the output of the latch circuit 122 becomes “H” level, and the overheat cutoff FET QS transitions from the off state to the on state, so that the potential level of the true gate (TG) of the thermal FET QA becomes “L” level. As a result, the thermal FET QA transitions from the on-state to the off-state, and is overheated.

In the power supply control device according to the present embodiment, the load 102 or the drain D of the thermal FET QA is
An overcurrent due to a short-circuit fault occurring between the sources S,
Alternatively, it has a function of protecting against abnormal current due to an incomplete short-circuit failure or a function of detecting disconnection of a lamp. Hereinafter, a configuration for realizing the protection function and the disconnection detection function will be described with reference to FIG.

First, the reference voltage generating means is an FET (second
(Semiconductor switch) QB, a resistor Rr1, a resistor Rr2, and a capacitor C1. The drain and gate of the FET QB are connected to the drain (D) and the true gate (TG) of the thermal FET QA, respectively.
The source (SB) of the TQB is a resistor Rr1 connected in series.
And a resistor Rr2 connected to the ground potential (GND). A capacitor C1 is connected in parallel to the resistor Rr2. In order to reliably detect the disconnection of the lamp from the first lighting of the lamp 102a or the like, the resistance Rr1 and the resistance Rr
The series resistance value of 2 is set to an impedance such that a current similar to the lamp inrush current flows.

As described above, the FET QB and the thermal F
By sharing the drain (D) and the gate (TG) of the ETQA, it is possible to easily integrate the ETQA into the switching circuit (110a) having the current oscillation type interruption function, which is the same chip.

Further, the FET QB and the thermal FET Q
A uses the same process and the same chip formed on the switching circuit (110a) with the current oscillation type interrupting function, which is the same chip, so as to eliminate (reduce) the effects of temperature drift and lot-to-lot variation. I have. Also, the number of transistors connected in parallel constituting each FET is set such that (the number of transistors of the FET QB: 1) <(the number of transistors of the thermal FET QA: 1000) so that the current capacity of the FET QB is smaller than the current capacity of the thermal FET QA. ).

Further, in order to detect an overcurrent, a resistor R
r (the series combined resistance of the resistors Rr1 and Rr2) is the resistance of the load 102 × (FETQ
B: 1 transistor / thermal FET QA: 1000 transistors). By setting the resistor Rr, the same drain-source voltage VDS as when a normal operation load current (5 [mA]) flows through the thermal FET QA can be generated in the FET QB. Further, according to the circuit rules as described above, F
The configuration of the reference voltage generating means composed of the ETQB and the resistor Rr can be made as small as possible, and the mounting space can be reduced to reduce the device cost.

The variable resistor RV is connected in series with the load 102 between the source SA resistors R1 and R2 of the thermal FET QA and the voltage dividing point. By changing the resistance value of the variable resistor RV, the resistance value of the second load is equivalently variably set. That is, a variable resistor RV is installed outside the current oscillation cutoff element 110a, and the set value (reference) of the reference voltage generator can be set to a target specification by adjusting the variable resistor RV. As a result, even in the case of analog integration, it is possible to cover a plurality of specifications with one type of current oscillation cutoff element 110a.

As described above, the resistance of the resistor Rr is set to an impedance such that a current similar to the lamp inrush current flows, or the resistance of the resistor Rr is set to the load 1
02 resistance × (the number of FET QB transistors: 1 /
Whether the value is set to be equal to the value of the thermal FET QA (the number of transistors of the thermal FET QA: 1000) is appropriately set depending on the purpose.

Comparator CMP1 and Comparator C
A voltage obtained by dividing the voltage VDS between the drain D and the source S of the thermal FET QA by the resistors R1, R2 and the parallel resistor (R2‖RV) of the variable resistor RV (R2‖RV) is applied to the “+” input terminal of MP2 via the resistor R5. Supplied. The source voltage VS of the FET QB is supplied to the “−” input terminal of the comparator CMP1. That is, when the potentials supplied to both the “+” and “−” input terminals substantially match, the output becomes valid (“H” level),
Invalid (“L” level) when they do not match. The comparator CMP1 performs an overcurrent determination, and the comparator C
The MP2 determines whether or not the lamp is disconnected. As described later, the comparator CMP1 has a certain hysteresis. The microcomputer (microcomputer) 10 has a built-in central processing unit (CPU) and determines a cycle of a blink signal for blinking the lamp in accordance with a result of detection of disconnection of the lamp by the comparator CMP2.

Next, a power supply control method will be described based on the circuit configuration of the power supply control device of the present embodiment described above. Before describing the specific operation, the principle used by the power supply control device and the power supply control method of the present embodiment will be described with reference to FIGS.
Here, FIG. 4 is an explanatory diagram of a falling characteristic of a drain-source voltage at the time of transition from an off state to an on state, FIG. 5 is a conceptual circuit diagram, and FIG. FIG. 4 is an explanatory diagram illustrating characteristics with respect to voltage.

Thermal FET QA as semiconductor switch
Is used, a power supply path from the power supply 101 to the load 102 is conceptually represented as a circuit as shown in FIG. The load 102 includes a wiring inductance L0 and a wiring resistance R0 of the power supply path. The route or load 1
When a short-circuit failure occurs in 02, R0 also includes a short-circuit resistance. Here, the short-circuit resistance is about 40 [mΩ] or less in the case of the above-described complete short circuit (dead short circuit) when the load 102 is assumed to be a headlight in the vehicle to which the present embodiment is applied. In the case of a short circuit, it is about 40 to 500 [mΩ].

The drain-source voltage VDS of the thermal FET QA forming a part of such a power supply path is as shown in FIG. 4 as a falling voltage characteristic when the thermal FET QA transitions from an off state to an on state. . That is, in the case of a short circuit, in the case of a reference load (normal operation), the load 1
02 is a falling voltage characteristic when the resistance is 1 [KΩ]. As described above, the fall characteristic changes according to the state of the power supply path and the load, that is, the time constant based on the wiring inductance and the wiring resistance and the short-circuit resistance of the path.

As a method of detecting an overcurrent using such a change in the characteristic of the drain-source voltage VDS, in addition to the method described below, a comparison with a predetermined threshold value is performed at a predetermined timing. A method of detecting overcurrent is conceivable.However, components such as a capacitor and a plurality of resistors are required in order to constitute a means for defining a predetermined timing and a means for comparing with a predetermined threshold, and it is detected that these components vary. There is a problem that an error occurs. In addition, since a capacitor is required, and the capacitor cannot be mounted in a chip, external parts are required, which causes an increase in apparatus cost.

In FIG. 4, the thermal FET QA operates in a pinch-off region until the transition of the thermal FET QA to the ON state and the saturation of the drain-source voltage VDS.

The change in the drain-source voltage VDS when the resistance of the load 102 is 1 [KΩ] can be considered as follows. That is, first, for example, when "HAF2001" manufactured by Hitachi is used for the thermal FET QA, the drain current ID = 12 [mA].
The source-to-source voltage VTGS is substantially equal to the threshold voltage 1.6 [V].
Is maintained. Secondly, the charging of the gate (G) by the driving circuit 111 is continued, so that the gate-source voltage VTGS will rise if this state is maintained, but the drain-source voltage VDS will decrease. Since the capacitance value CGD between the gate and the drain is increased, the charge reaching the gate-source voltage VTGS is absorbed.
That is, the drain-source voltage VDS drops at such a rate that the charge reaching the gate-source voltage VTGS generates a capacitance that does not cause an increase in potential.
As a result, the gate-source voltage VTGS becomes approximately 1.6.
[V] is maintained.

The following interpretation is also possible for the change in the drain-source voltage VDS when the load resistance = 1 [KΩ]. In other words, at each lapse of time after the thermal FET QA transitions to the ON state, the drive circuit 111 absorbs the charge transmitted to the gate (G), and keeps the true gate (TG) voltage VTGS constant. Drain-
It shows the value of the source-to-source voltage VDS. Therefore, if the drain-source voltage VDS is above the curve at the time of load resistance = 1 [KG] in FIG. 4 after a certain elapsed time, the gate-source voltage VTGS becomes higher than 1.6 [V]. Means that. It should be noted that the drain-source voltage VDS does not fall below the curve when the load resistance = 1 [KΩ] in FIG.

Further, assuming that the distance from the curve when the load resistance in FIG. 4 is 1 [KΩ] is ΔVDSGAP, ΔVDSGAP × CGD
If the charge corresponding to the voltage is subtracted from the gate-source voltage VTGS, it means that the gate-source voltage VTGS becomes 1.6 [V]. In other words, it means that the potential of the gate-source voltage VTGS has increased from 1.6 [V] by this charge. This can be expressed by the following equation.

VTGS−1.6 = ΔVDSGAP × CGD / (CGS × CGD) That is, ΔVDSGAP is (gate-source voltage VTGS−
It is proportional to 1.6 [V].

As shown in the characteristics of FIG. 6, there is a nearly one-to-one relationship between the gate-source voltage VTGS and the drain current ID. Here, the characteristic of FIG. 6 is that of “HAF2001” manufactured by Hitachi, and VGS in the figure corresponds to the gate-source voltage VTGS here. Therefore, it can be said that ΔVDSGAP represents the drain current ID based on the correspondence shown in the characteristics of FIG. In FIG. 6, the resolution around the drain current ID = 10 [A] is about 80 [mV / A]. That is, 1
The drain current ID of [A] corresponds to the gate-source voltage VTGS of 80 [mV], and the change of the drain current ID of ± 5 [A] is ± 0.4 [V]. Changes in VTGS correspond. This resolution corresponds to the resolution equivalent to shunt resistance RS = 80 [mΩ] in the conventional example.

When the drain current ID is zero, the curve of the drain-source voltage VDS is determined only by the circuit for charging the gate and the Miller capacitance. However, when the drain current ID flows, the inductance Lc of the circuit and the entire circuit are reduced. It will be affected by the resistance Rc. When the drain current ID increases like a complete short path (dead short),
The rising gradient of the drain current ID is the inductance Lc.
And the resistance Rc, the rising slope of the drain current ID does not reach a constant value.
The curve of the source-to-source voltage VTGS also converges.

The characteristic shown in FIG. 6 has a temperature singularity. In the case of “HAF2001” manufactured by Hitachi, drain current ID = 15 [A], gate-source voltage VTGS =
It is around 3.3 to 3.4 [V]. The normal normal load current is about 15 [A] or less, and therefore comes below the singular point. In this lower region, the same drain current ID
On the other hand, the gate-source voltage VTGS
Becomes smaller. Therefore, malfunction can be reduced even under high temperature conditions, which is advantageous.

Also, if the circuit for charging the gate is different,
The curve of the drain-source voltage VDS changes for the same load current. Therefore, the gate charging current must always maintain the same condition. If the gate charging current is reduced, the curve of the drain-source voltage VDS shifts upward. If this property is used to increase the drain-source voltage VDS for the same drain current ID, overheat interruption by the overheat protection function can be promoted. The overheat cutoff promotion circuit (overheat cutoff promotion circuit) described below utilizes this.

Next, the operation of the power supply control device of the present embodiment will be described based on the above considerations. First, the thermal EFT QA and the reference voltage generating means (FET QB, resistor Rr) will be described. Thermal FETs QA and F
When the ETQB operates in the pinch-off region, a current mirror circuit is formed, and the drain current IDGA = 1000 × the drain current IDGS.

Therefore, when IDQA = 5 [A] flows as the drain current of the thermal FET QA and IDQB = 5 [mA] flows as the drain current of the FET QB, the drain-source voltage VDS of each of the thermal FET QA and the FET QB respectively. And the gate-source voltage VTGS match. That is, VDSA = VDSB, VTGSA = VT
GSB. Here, VDSA = VDSB is the drain-source voltage of the thermal FET QA and FET QB, respectively, and VTGSA = VTGSB is the thermal FET QA,
This is the gate-source voltage of the FET QB.

Therefore, when the FET QB is completely turned on, the power supply voltage VB is substantially applied to both ends of the resistor Rr, so that the load of the FET QB equivalent to the 5 [A] load connected to the thermal FET QA is applied. As the resistance R
The resistance value of r is Rr = 12 [V] / 5 [mA] -1.4.
[KΩ].

As described above, here, the thermal FET Q
A is based on the value (curve) of the drain-source voltage VDS when a load current of 5 [A] flows through A.
By configuring the reference voltage generation means using an FET QB having a smaller transistor number ratio (= current capacity ratio) than the ETQA, the required function can be realized with a smaller chip area and a smaller chip occupation area. It is.
Further, as described above, the FET QB and the thermal FET Q
By configuring on the same chip in the same process as A, the influence of lot-to-lot variation and temperature drift can be eliminated, and detection accuracy can be greatly improved.

Next, the operation in the pinch-off region will be described. When the thermal FET QA transitions to the ON state, the drain current IDQA rises toward the final load current value determined by the circuit resistance. Also, thermal F
The gate-source voltage VTGSA of ETQA takes a value determined by the drain current IDQA, and the drain-source voltage VTGSA
This starts up while the brake is applied by the Miller effect of the capacitor capacitance CGD due to the decrease in DSA. Further, the gate-source voltage VTGSB of the FET QB is the drain current IDQB = 5 [mA] (the drain current IDQA =
5 [A]), the gate-source voltage VTGSB
= VTGSA, but after that, the drain current I
Since DQB = 5 [mA] is constant (constant in the pinch-off region), the gate-source voltage VTGSB is also constant, and in the case of "HAF2001" manufactured by Hitachi, it is about 2.7.
[V] Becomes constant.

Since the gate-source voltage VTGSA of the thermal FET QA increases as the drain current IDQA increases, the gate-source voltage VTGSB
<VTGSA. VDSA = VTGSB + VTGD, VDS
Since there is a relation of B = VTSGB + VTGD, VDSA-VDSB
= VTGSA-VTGSB. Here, the gate-source voltage difference VTGSA-VTGSB is equal to the drain current IDQA-5.
[A], the difference VDS between the drain-source voltage
By detecting A-VDSB, the drain current IDQA-
5 [A] can be obtained.

The drain-source voltage VDS of the FET QB
B is directly input to the comparator CMP1 and the thermal F
The value obtained by dividing the drain-source voltage VDSA of the ETQA by R1 and the resistor R2 (here, the variable resistor RV is not taken into consideration) is input to the comparator CMP1. That is, VDSA × R1 / (R1 + R2) (1) is input to the comparator CMP1. Immediately after the thermal FEGQA transitions to the ON state, the FET Q
B drain-source voltage VDSB> (1),
(1) increases as the drain current IDQA of the thermal FET QA increases, and eventually becomes larger than the drain-source voltage VDSB of the FET QB. At this time, the output of the comparator CMP1 changes from "H" level to "L" level. And the thermal FET QA is turned off.

In the comparator CMP1, a hysteresis is formed by the diode D1 and the resistor R5.
When the thermal FET QA transitions to the off state, the gate potential is grounded by the sink transistor Q6 of the drive circuit 111, and the cathode side potential of the diode D1 becomes VDDSB.
−0.7 [V] (forward voltage of the Zener diode ZD1), so that the resistance R1 → the resistance R5 → the diode D1
The current flows through the path, and the potential of the “+” input terminal of the comparator CMP1 is lower than when the drive circuit 111 is ON-controlled. Therefore, the thermal FET QA maintains the off state until the drain-source voltage difference VDSA-VDSB is smaller than when the state changes to the off state, and then transitions to the on state. It should be noted that there are various methods for attaching the hysteresis characteristic, but this is one example.

The drain-source voltage VDSA when the thermal FET QA transitions to the off state is set to the threshold value VDSAth
Then, the following equation is established.

VDSAth−VDSA = R2 / R1 × VDSB (at 5 [mA]) (2) The overcurrent determination value is determined by equation (2). To change the overcurrent determination value, a variable resistor RV connected in parallel to the resistor R2 grounded outside the chip 110a is adjusted. With this adjustment, the overcurrent determination value can be shifted downward.

Next, the operation in the ohmic region will be described. When wiring is normal, thermal FET QA
Transitions to the ON state, the thermal FET QA continuously maintains the ON state, so that the gate-source voltages VTGSA and VTGSB reach nearly 10 [V], and both the thermal FETs QA and FETQB operate in the ohmic region. .

In this region, the drain-source voltage VDS
And the drain current ID no longer has a one-to-one relationship.
In the case of "HAF2001" manufactured by Hitachi, when the on-resistance is the drain-source voltage VDS = 10 [V], RDS (ON)
= 30 [mΩ], so that

VDSB = 5 [A] × 30 [mΩ] = 0.15 [V] VDSA = IDQA × 30 [mΩ] VDSA−VDSB = 30 [mΩ] × (IDQA−5 [A]) (3) In addition, when the drain current IDQA increases due to a short circuit of the wiring or the like, the value of the equation (3) increases. When the drain current IDQA exceeds the overcurrent determination value, the thermal FET QA is turned off. Thereafter, the state shifts to the state of the pinch-off region, and the thermal FET QA repeats the transition to the ON state and the OFF state, eventually leading to overheat interruption. If the wiring returns to normal before the overheating is shut off (an example of an intermittent short-circuit failure), the thermal FET QA continuously keeps on.
Return to the operation of the ohmic region.

FIG. 7 illustrates a waveform diagram of current and voltage of the thermal FET QA in the power supply control device of the present embodiment. Here, FIG. 7A shows the drain current ID.
FIG. 7A shows the drain-source voltage VDS in FIG. 7B, in which the case of a complete short circuit (dead short), the case of a normal operation, and the case of an incomplete short circuit, respectively.

When a complete short circuit (dead short circuit) has occurred (in the figure), when the thermal FET QA transitions from the off state to the on state, the drain current ID rapidly flows. Subsequently, the thermal FET QA is overheated, and the thermal FET QA is overheated and shut off by the overheat shutoff protection function, that is, the transition of the overheat shutoff FET QS to the ON state.

When an incomplete short circuit having a certain short-circuit resistance has occurred (in the figure), the on / off control of the thermal FET QA is repeatedly performed as described above to greatly change the drain current ID. And thermal FE
Due to the periodic heat generation function of the TQA, the overheat protection of the thermal FET QA is accelerated by the overheat protection protection function, that is, the transition of the overheat protection FET QS to the ON state.

Next, a lamp disconnection detecting operation at the time of lamp disconnection will be described with reference to FIG. First, the combined resistance value of the resistors Rr1 and Rr2 is set to an impedance such that a current similar to the lamp inrush current flows.
For example, it is assumed that the lamp 102c among the lamps is disconnected.

The current for the first time of lamp lighting becomes a relatively large rush current at time t _{1 as} shown in FIG. 3, but this current shifts to a steady current I ₀ with the passage of time. In the embodiment, the FET QB and the resistor Rr
1 and the resistor Rr2, and the combined resistance value of the resistors Rr1 and Rr2 is set to an impedance such that a current similar to the lamp inrush current flows. The blinking cycle of the first blinking signal can be the same as or substantially the same as the blinking cycle T of the second and subsequent blinking signals. For example, as shown in FIG. 3, the lighting time can be set to 200 ms.

[0083] Further, conventionally, by using a shunt resistor RS, it had detected the disconnection of the lamp when it is steady current I ₀ current flowing through the shunt resistor RS, in the embodiment, breakage of the lamp occurs In this case, the source voltage of the FET QB connected to the resistor Rr1 and the thermal FET QA
A difference voltage is generated between the source voltage of the comparator C
The MP2 can detect the disconnection of the lamp by detecting this difference voltage.

In this case, since the disconnection is detected without using the shunt resistor RS and using the difference voltage, a relatively large current before the steady current I ₀ flows as shown in FIG. _{At 12} , a disconnection of the lamp can be detected. That is, the disconnection of the lamp can be detected more reliably than the first lighting, and the detection accuracy is good, so that the reliability is improved.

The microcomputer 10 has a comparator CO
Since a blink signal having a shorter cycle is sent to the drive circuit 111 based on the lamp disconnection signal from the MP, the lamps 102a and 102b blink in a shorter cycle, so that it is confirmed that the lamp is disconnected. be able to.

As described above, the power supply control device and the power supply control method of the present embodiment eliminate the need for the conventional shunt resistor connected in series to the power supply path for detecting the current, and High-precision overcurrent detection and lamp disconnection detection are possible without using a resistor, and the heat loss of the entire device can be suppressed. An abnormal current when a rare short such as an incomplete short circuit occurs can be continuously detected by a hardware circuit.

In case of incomplete short circuit, thermal FET
The on / off control of the QA is repeatedly performed to greatly vary the current, and the periodic heat generation of the semiconductor switch can speed up the cut-off (off control) of the thermal FET QA by the overheat protection function. Furthermore, since the on / off control of the semiconductor switch can be performed by using only a hardware circuit that does not use a microcomputer, the mounting space of the power supply control device can be reduced, and the device cost can be significantly reduced.

Further, as in the present embodiment, although a change in the characteristic of the drain-source voltage VDS is used, it is compared with another method of detecting an overcurrent by comparing with a predetermined threshold at a predetermined timing. Since components such as a capacitor and a plurality of resistors are not required, detection errors due to variations in the components can be further reduced, and an external capacitor for the switching circuit 110a having the current oscillation type cutoff function is not required, so that mounting space is not required. Further, the apparatus cost can be further reduced.

Further, by adjusting the variable resistor RV, it is possible to reliably detect whether a short circuit or a complete short circuit in accordance with the type of the load 102 (head lamp, drive motor, or the like) is provided. It can be performed with high accuracy.

Further, when the lamp is disconnected, the disconnection of the lamp can be reliably detected from the first lighting, and the blinking cycle can be output at the cycle at the time of disconnection. Also, the comparator COMP
1. Since the comparator COMP2, the thermal FET QA, and the like can be incorporated in the switching circuit 110a having the current oscillation type cutoff function, an inexpensive and small circuit can be configured.

When only the disconnection of the lamp is detected without detecting the overcurrent, the disconnection of the lamp can be easily detected by using a normal FET instead of using the thermal FET QA. .

[Second Embodiment] Next, a power supply control device and a power supply control method according to a second embodiment will be described.
This will be described with reference to FIG. The configuration of the power supply control device of the present embodiment is a configuration in which resistors R3, R4, R6, R9, FETs Q1, Q2, and a Zener diode ZD2 are added to the configuration of the first embodiment of FIG. In addition,
A switching circuit 110b with a current oscillation type cutoff function surrounded by a dotted line in the drawing indicates a chip portion to be analog-integrated.

That is, the Zener diode ZD2 is connected to the gate of the FET Q1 whose gate and source are connected by the resistor R9.
The true gate TG of the thermal FET QA is connected via a resistor R6, the drain of the FET Q1 is connected to VB + 5 [V] via a resistor R4, and the source of the FET Q1 is connected to the source SA of the thermal FET QA. Also,
A circuit in which the resistor R3 and the drain of the FET Q2 are connected is connected in parallel with the resistor R1, and the voltage division of the drain-source voltage VDS of the thermal FET QA is changed by ON / OFF control of the FET Q2. .

Next, the operation of the power supply control device of the present embodiment will be described. First, the operation in the pinch-off region will be described. Similarly to the first embodiment, the voltage VDSB between the drain and the source of the FET QB is equal to the voltage of the comparator CMP1.
, And the drain-source voltage VDSA of the thermal FET QA becomes parallel resistance (Rl‖R) of the resistances R1 and R3.
3) and the value obtained by dividing the voltage by the resistor R2 (here, the variable resistor RV is not taken into account) is used as the comparator CM.
Pl.

That is, the value of the following equation is input to the comparator CMP1.

VDSA × (R1‖R3) / ((R1‖R3) + R2) ‥‥‥ (1 ′) Immediately after the thermal FET QA transitions to the ON state, FE
Although the drain-source voltage VDSB of TQB> (1 '), (1') increases as the drain current IDQA of the thermal FET QA increases, and eventually becomes larger than the drain-source voltage VDSB of the FET QB. At this time, the output of the comparator CMP1 changes from the "H" level to the "L" level, and the thermal FET QA is turned off.

The drain-source voltage VDSA when the thermal FET QA transitions to the off state is set to the threshold value VDSAt
Assuming h, the following equation holds.

VDSAth−VDSA = R2 / (R1‖R3) × VDSB (2 ′) The overcurrent determination value is determined by the equation (2 ′). In addition,
In order to change the overcurrent determination value, similarly to the first embodiment, the switching circuit 110a having the current oscillation type interruption function is used.
The variable resistor RV connected in parallel to the resistor R2 which is grounded outside of the device is adjusted. With this adjustment, the overcurrent determination value can be shifted downward.

The operation in the ohmic region, the operation described with reference to FIG. 7, and the like are the same as in the first embodiment, and will not be described.

Next, the overcurrent determination value will be considered. Here, the same value is used as the overcurrent determination value in both the pinch-off region and the ohmic region.

First, △ (VDSA) in the pinch-off region
−VDSB) / △ ID is obtained. The following equation is obtained from the characteristic curve of HAF2001.

ΔVTGSA / ΔIDQA = 80 [mV / A] (4) ΔVTGSA = △ (VDSA−VDSB) × CTGD / (CTGS + CTGD) = △ (VDSA−VDSB) × 1200 pF / (1800 pF + 1200 pF) = △ (VDSA−VDSB) × 0.4 (5) From equations (4) and (5), Δ (VDSA−VDSB) / ΔID = 200 [mV / A] (6)

Further, Δ (VDSA) in the ohmic region
−VDSB) / ΔID is given by equation (3), and Δ (VDSA−VDSB) / ΔID = 30 [mV / A] (7)

Comparing equations (6) and (7), the current sensitivity is more sensitive in the pinch-off region than in the ohmic region,
Even if the overcurrent determination value is appropriate in the ohmic region, it may be too low in the pinch-off region and may be caught too much. As a countermeasure, there is a method of changing the overcurrent determination value between the pinch-off region and the ohmic region. A circuit added in the present embodiment to the configuration of the first embodiment is this countermeasure circuit.

The determination of the pinch-off region or the ohmic region is made based on the magnitude of the gate-source voltage VTGSA. The gate-source voltage VTGSA in the pinch-off region increases as the drain current ID increases, but does not exceed 5 [V] even in the case of a complete short circuit (dead short circuit).
Therefore, if the gate-source voltage VTGSA> 5 [V], it can be determined that the transistor is in the ohmic region.

Immediately after the thermal FET QA transitions to the ON state, the FET Q1 is OFF and the FET Q2 is ON. A voltage higher than the power supply voltage VB, for example, VB + 5 [V] is required to cause the FET Q2 to transition to the ON state.

If the Zener breakdown voltage of Zener diode ZD2 is set to 5 [V] -1.6 [V] (threshold voltage of FET Q1), gate-source voltage VTGSA> 5
When the voltage becomes [V], the FET Q1 transitions to the ON state,
Since Q2 transitions to the OFF state, the resistor R3 that is in parallel with the resistor R2 is removed in a circuit.

Since the compression ratio of the drain-source voltage VDSA becomes smaller, the difference VDSA-VDSB between the drain-source voltage determined as an overcurrent becomes smaller. Thus, in the ohmic region, the overcurrent is determined with a smaller current value than before the countermeasure.

However, there is a possibility that there is no practical problem even if no countermeasures are taken by the additional circuit in the present embodiment. That is, when the final load current value is small in the pinch-off region, the voltage completely rises in the pinch-off region. That is, when the final load current value reaches the final load current value in the pinch-off region, when the final load current value is large, the current value is still rising in the pinch-off region, and the current value in the pinch-off region is even in the case of a complete short circuit (dead short). Up to 4
It is limited to 0 [A].

In other words, as the final load current value increases, the current rise characteristic with a certain gradient falls off, and the difference between the drain-source voltage VDSA becomes smaller as the final load current value increases. Due to this phenomenon, even if the current sensitivity in the pinch-off region is large, the difference VDSA-VDSB between the drain and the source does not increase, and the additional circuit as in this embodiment depends on the selection of the current value in the reference voltage generation circuit. With the configuration of the first embodiment, a power supply control device that performs practical overcurrent detection protection can be realized without using the countermeasure according to the first embodiment.

The power supply control device and the power supply control method according to the present embodiment can provide the same effects as those described in detail in the first embodiment.

Here, finally, the concept of overcurrent control will be summarized. The basic concept is as follows. First, when the wiring is normal, when the thermal FET QA transitions to the ON state, the thermal FET QA enters the ohmic region. As long as the wiring is normal, the thermal FET QA stays in the ohmic region and the thermal FET QA continues to maintain the ON state. Next, an abnormality occurs in the wiring, the current increases, and the difference between the drain-source voltage VDSA-VD
When SB exceeds the overcurrent determination value, the thermal FET QA transitions to the off state and enters a pinch-off region. As long as the wiring abnormality continues, the thermal FET QA repeats the transition between the ON state and the OFF state, stays in the pinch-off region, and finally reaches the overheat cutoff.

In order to realize the above basic concept and optimize the control, the overcurrent judgment value must satisfy the following two conditions. First, in the normal current range, the thermal F
That is, never turn off the ETQA. Secondly, after the overcurrent is determined in the ohmic region, the thermal FET QA continuously repeats the transition to the on / off state in the pinch-off region unless the wiring abnormality is improved. This is necessary to stabilize the cycle of the on / off control. Stabilizing the cycle of the on / off control leads to stability of the control, and the timer is set using the cycle of the on / off control (see the fifth embodiment described later). Stabilization is needed.

In order to satisfy the first and second conditions, the overcurrent judgment value in the ohmic region is set to the current value of “normal current maximum value + α” (corresponding VDSA−VDSB), and the pinch-off region It is necessary to set the overcurrent determination value to “normal current maximum value + β”. At this time, α> β.
That is, α-β is an offset amount necessary for staying in the pinch-off region.

In the second embodiment as well, the microcomputer 10 is provided, and the comparator CMP1 has a lamp disconnection detecting function. Therefore, when the lamp is disconnected, the disconnection of the lamp can be reliably detected from the first lighting, and the blinking cycle is set to the time of disconnection. Can be output in a cycle of Also, the comparator COMP
1. Since the thermal FET QA and the like can be built in the switching circuit 110b with the current oscillation type cutoff function, an inexpensive and small circuit can be configured.

[Third Embodiment] Next, a power supply control device and a power supply control method according to a third embodiment will be described.
This will be described with reference to FIG. The difference from the circuit configuration (FIG. 8) in the power supply control device of the second embodiment is that the FET Q
The gate of B is not connected to the true gate TG of the thermal FET QA, but R41 is added as the gate resistance of the FET QB, and the other end of the resistor R41 is connected to the gate G of the thermal FET QA. Otherwise, the circuit configuration is the same as that of the second embodiment. Note that a switching circuit 110c with a current oscillation type interruption function surrounded by a dotted line in FIG. 9 shows a chip portion which is analog-integrated.

The resistance value of the resistor R41 is R41 = 1.
000 × R7. For example, R7 = 1
If 0 [KΩ], R41 = 10 [MΩ]. Since the resistance value becomes extremely high, the ratio of the number of transistors in consideration of cost and productivity is set to about 1: 100 and R41
= 1 [MΩ].

The operation of the power supply control device of this embodiment is equivalent to that of the second embodiment, and has the same effect as that of the first embodiment.

[Fourth Embodiment] Next, a power supply control device and a power supply control method according to a fourth embodiment will be described.
This will be described with reference to FIG. The power supply control device of the present embodiment has a configuration obtained by adding an inrush current mask circuit 105 and an overheat promotion circuit 106 to the circuit configuration (FIG. 1) of the power supply control device of the first embodiment. In addition,
A switching circuit 110d with a current oscillation type cut-off function surrounded by a dotted line in FIG.

When the load 102 (for example, a headlight) is turned on, an inrush current several times to several tens times that in a stable state flows. The period during which the rush current flows varies depending on the type and capacity (magnitude) of the load 102, and is about 3 [msec] to 20 [msec]. If the overcurrent control as described in the first, second, or third embodiment is performed during the period when the inrush current flows, it takes time for the load 102 to reach a steady state, and The response of the load itself may be degraded, for example, the lighting of the LED may be delayed. In the present embodiment, such a problem is solved by adding the inrush current mask circuit 105 to the configuration of FIG.

In the first, second or third embodiment, when an overcurrent due to a complete short circuit is detected,
Immediately, protection by overheating cutoff functions and thermal FET Q
A can be overheated (off control), but in the case of an incomplete short circuit, the on / off control of the thermal FET QA is repeatedly performed to make the overheating cutoff function by the periodic heating action of the thermal FET QA. Therefore, it is conceivable that the time until the overheat interruption is relatively long. In the present embodiment, the overheat cutoff promotion circuit 106 speeds up the cutoff of the thermal FET QA even in the case of an incomplete short circuit.

Referring to FIG. 10, inrush current mask circuit 10
Reference numeral 5 includes FETs Q11 and Q12, a diode D11, resistors R11 to R13, and a capacitor C11.

Next, the operation of the inrush current mask circuit 105 will be described. When the thermal FET QA transitions to the ON state, the gate-source voltage VGSA becomes the diode D
11 and a resistor R12 to the gate of the FET Q12. Similarly, a gate-source voltage VGSA is supplied to the FET Q11 via a diode D11 and a resistor R11.
Is supplied to the gate.

The gate of the FET Q12 is connected to the capacitor C11.
, The capacitor C11 is not charged immediately after the thermal FET QA transitions to the ON state, so that the gate potential of the FET Q12 does not rise sufficiently and the FET Q12 cannot transition to the ON state. The FET Q11 is on while the FET Q12 is off, and the comparator CMP
The voltage dividing point supplied to the + terminal of 1 is coupled to the source SA of the thermal FET QA. Therefore, the comparator CM
The output of P1 is kept at the "H" level, so that even if a large rush current flows, the thermal FET QA does not transition to the off state.

As time passes, the capacitor C11 is charged via the resistor R12, and finally, the FET Q1
2 transitions to the ON state. Accordingly, the FET Q11 transitions to the off state, the mask state ends, and the overcurrent detection control functions.

Note that the resistor R13 is a discharge resistor for resetting the capacitor C11 after the thermal FET QA has turned off. It is desirable to set R12 ＲR13 so as not to affect the mask time. In addition, since the mask time is determined by the time constant of R12 × C11, the adjustment of the mask time can be performed by arbitrarily changing the capacitance value of the external capacitor C11 when one chip is formed.

Next, the overheat cutoff promotion circuit 106
Q21, diode D21, resistors R21 to R23, and capacitor C21.

Next, the operation of the overheat cutoff promotion circuit 106 will be described in detail. Enter the overcurrent control and set the thermal FET QA
The capacitor C21 is connected to the resistor R21 and the reverse current blocking diode D each time the gate potential of
The battery is charged via the power supply 21. Since the gate potential of the FET Q21 is initially lower than the threshold value, the FET Q21 is in an OFF state.
Q21 transitions to the ON state.

A terminal TG (thermal F) is connected via a resistor R21.
A current flows from the true gate of the ETQA to the ground potential (GND), and the amount of charge stored in the terminal TG decreases. Therefore, even for the same drain current ID, the voltage VDSA between the drain and the source is increased, and the power consumption of the thermal FET QA is increased, so that the overheat cutoff is accelerated. Note that the smaller the resistance R21, the earlier the overheat cutoff. Also,
The resistor R23 is a discharge resistor of the capacitor C21, and R2
It is desirable to set so that 2〓R23.

Also in the fourth embodiment, the microcomputer 10 is provided, and the comparator CMP1 has a lamp disconnection detecting function. Therefore, when the lamp is disconnected, the disconnection of the lamp can be reliably detected from the first lighting, and the blinking cycle is set to the time of disconnection. Can be output in a cycle of Also, the comparator COMP
1. Since the comparator COMP2, the thermal FET QA, and the like can be built in the switching circuit 110d with a current oscillation type cutoff function, an inexpensive and small circuit can be configured.

[Fifth Embodiment] Next, a power supply control device and a power supply control method according to a fifth embodiment will be described.
This will be described with reference to FIG. The power supply control device according to the present embodiment is different from the circuit configuration (FIG. 1) in the power supply control device according to the first embodiment in that an on / off number integration circuit 10
7 is added. Note that a switching circuit 110e with a current oscillation type interruption function surrounded by a dotted line in FIG.

In the first, second or third embodiment, in case of an incomplete short circuit, on / off control of the thermal FET QA is repeatedly performed so that the thermal FET QA functions to periodically cut off the overheat. Therefore, in the present embodiment, the problem that the time until the overheating is cut off is relatively long is solved as follows. That is,
On / off number integration circuit 1 for performing off control when the number of on / off control of thermal FET QA reaches a predetermined number
By adding 07, the cutoff of the thermal FET QA is accelerated.

Referring to FIG. 11, the on / off frequency integrating circuit 107 includes an FET Q31, diodes D31 and D32,
It comprises resistors R31 to R33 and a capacitor C31.

Next, the operation of the on / off times integration circuit 107 will be described. Enter the overcurrent control and set the thermal FE
Each time the gate potential of TQA periodically goes to "H" level, capacitor C31 is charged via resistor R31 and backflow preventing diode D31. Since the gate potential of the FET Q31 is initially lower than the threshold value, the FET Q31 is in the off state. However, when the gate potential increases with the charging of the capacitor C31, the FET Q31 transitions to the on state. At this time, the anode side of the temperature sensor 121 (four diodes) is pulled down.
The ETQS transitions to the ON state, and cuts off (OFF control) the thermal FET QA.

Note that the cutoff time based on the number of times is about 1 [se
c] is desirable. In addition, the on / off frequency integration circuit 1
07 in order to operate stably.
It is necessary to stabilize the cycle of the ETQA on / off control. In the present embodiment, the drain-source voltage VDS of the thermal FET QA with respect to a change in load current
Since the change of A is larger in the pinch-off region than in the ohmic region, the thermal FET QA transitions to the off state in the pinch-off region during the on / off control. Therefore, the cycle of the on / off control of the thermal FET QA becomes stable.

In the fifth embodiment as well, the microcomputer 10 is provided, and the comparator CMP1 has a lamp disconnection detecting function. Therefore, when the lamp is disconnected, the disconnection of the lamp can be surely detected from the first lighting, and the blinking cycle is set at the time of disconnection. Can be output in a cycle of Also, the comparator COMP
1. Since the comparator COMP2, the thermal FET QA, and the like can be incorporated in the switching circuit 110e having the current oscillation type cutoff function, an inexpensive and small circuit can be configured.

[Modification] Next, a modification of the power supply control device and the power supply control method of the first embodiment will be described with reference to FIG.
This will be described with reference to FIG. In the above description of each embodiment,
The reference voltage generating means is fixed (in the above description, fixed to a load of 5 [A]), and the change of the second load (resistance Rr) is dealt with by changing the overcurrent determination value. That is, a chip is prepared by setting the resistors R1, R2, and R3 according to the maximum load to be used. Had been lowered.

This method has the following problems. First, as the overcurrent determination value increases, the control accuracy decreases. Second, it is necessary to change the overcurrent determination value between the pinch-off region and the ohmic region. In this case, the overcurrent determination value in the pinch-off region needs to be set strictly in accordance with the rising gradient of the drain current ID. However, the rising gradient of the drain current ID changes when the wiring inductance and the wiring resistance change. Difficult to set.

As a countermeasure against this, it is effective to set the reference voltage generating means in accordance with the load 102. That is, first, the reference voltage generating means corresponding to the maximum current value of the load 102 is set. Next, the drain-source voltage VDS (that is, the drain-source voltage of the FET QB) in the reference voltage generation means.
The source-to-source voltage VDSB is applied to the load drive transistor (that is, the drain-source voltage VDS of the thermal FET QA).
If A) exceeds even a little, it is judged as an overcurrent value.

In this method, it is not necessary to change the overcurrent determination value between the pinch-off region and the ohmic region. Since it is sufficient to judge whether the voltage exceeds the drain-source voltage VDS of the reference voltage generation means or not, the detection accuracy is determined by the comparator CMP1.
Is determined only by the resolution of

Further, the effects of temperature drift, variation between IC lots, wiring inductance and wiring resistance can be eliminated, and fluctuations in power supply voltage are not affected as long as the comparator CMP1 operates normally. Therefore, a power supply control device and a power supply control method with few (almost no) error elements can be realized.

The setting of the reference voltage generating means may be changed by additionally connecting a variable resistor RV externally in parallel with the resistor Rr, or by changing the resistor Rr in the chip.

As shown in FIG. 12, several types of resistors Rr1 to Rr4 are arranged in parallel inside a chip, and when a chip is packaged or mounted on a bare chip, a switch SW2 is selected from among the resistors Rrl to Rr4. , It is possible to set the set value (reference) of the reference voltage generation means to the target specification. As a result, even when the power supply control device is integrated, a plurality of specifications can be covered by one type of chip. In addition, the variable setting of the resistance makes it possible to reliably detect a complete short circuit or an incomplete short circuit according to the type of load (head lamp, drive motor, etc.), and to accurately protect against a short circuit failure. .

In the circuit configuration of the power supply control device according to the first, second, third, fourth, and fifth embodiments and the modifications described above, the switching elements, that is, the thermal FETs QA, FETQB, the transistor Q5, Q6,
Although the n-channel type is used as the overheat shutoff FET QS and the FETs Q11 to Q54, the circuit configuration of the power supply control device according to the present invention is not limited to this. Good. However, a circuit change due to the inversion of the gate potential for performing on / off control of each switching element to the “L” / “H” level is required.

[0145]

According to the first and seventh aspects of the present invention, the difference voltage between the terminal voltage of the first semiconductor switch and the terminal voltage of the second semiconductor switch is detected and detected by the detecting means. Since the presence / absence of disconnection of the load is determined based on the difference voltage, the shunt resistance is not required, the heat loss of the device is suppressed, and even if the lamp is disconnected, the disconnection of the lamp can be reliably detected.

According to the second and eighth aspects of the present invention, when the first semiconductor switch makes a transition from an off state to an on state, the reference load causes a current similar to an inrush current flowing through the first semiconductor switch to flow. Since the impedance is set, the disconnection of the load can be reliably detected before the rush current becomes a steady current from the first lighting, and the blinking cycle from the first lighting is the same as the second and subsequent lighting cycles. And the accuracy of disconnection detection is improved.

According to the third aspect of the present invention, since the first semiconductor switch, the second semiconductor switch, the detecting means, and the judging means are formed on the same chip, an inexpensive and small circuit can be formed. .

According to the fourth and ninth aspects of the invention, when the first semiconductor switch is overheated, the first semiconductor switch is turned off to protect the first semiconductor switch. Can be.

According to the fifth and tenth aspects of the present invention, the reference load includes a plurality of resistors, and the resistance value of the reference load is variably set by selectively connecting the plurality of resistors. Thus, the inter-terminal voltage of the second semiconductor switch can be set to the target specification.

According to the sixth and eleventh aspects of the present invention, when it is determined that the load is disconnected, the cycle of the control signal is changed. It is easy to see that the load is disconnected.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of a power supply control device according to a first embodiment of the present invention.

FIG. 2 is a detailed circuit configuration diagram of a semiconductor switch (thermal FET) used in the embodiment.

FIG. 3 is a diagram showing a lamp current waveform when the lamp is disconnected in the power supply control device of the embodiment.

FIG. 4 is an explanatory diagram (part 1) for explaining the principle used by the power supply control device and the power supply control method according to the embodiment, and shows a fall of a drain-source voltage at the time of transition from an off state to an on state. FIG. 4 is an explanatory diagram of characteristics.

FIG. 5 is an explanatory diagram (part 2) illustrating the principle used by the power supply control device and the power supply control method of the embodiment, and is a conceptual circuit diagram.

FIG. 6 is an explanatory diagram (part 3) illustrating the principle used by the power supply control device and the power supply control method according to the embodiment, and illustrates the characteristics of the drain current and the gate-source voltage of the thermal FET. FIG.

FIG. 7 is a waveform diagram illustrating a current (a) and a voltage (b) of a semiconductor switch in the power supply control device according to the embodiment at the time of a short-circuit fault and at the time of normal operation.

FIG. 8 is a circuit configuration diagram of a power supply control device according to a second embodiment of the present invention.

FIG. 9 is a circuit configuration diagram of a power supply control device according to a third embodiment of the present invention.

FIG. 10 is a circuit configuration diagram of a power supply control device according to a fourth embodiment of the present invention.

FIG. 11 is a circuit configuration diagram of a power supply control device according to a fifth embodiment of the present invention.

FIG. 12 is a circuit diagram illustrating a configuration of a second load (resistance) in a power supply control device according to a modification.

FIG. 13 is a circuit configuration diagram of a power supply control device including a conventional semiconductor switch.

FIG. 14 is a circuit configuration diagram of another power supply control device including a conventional semiconductor switch.

FIG. 15 is a diagram showing a lamp current waveform at the time of lamp disconnection in another conventional power supply control device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Microcomputer 101 Power supply 102 Load 105 Inrush current mask circuit (prohibiting means) 106 Overheat cutoff promotion circuit (Overheat cutoff promotion means) 107 ON / OFF number of times integration circuit (Number of times control means) 110a to 110e Chip constituent parts 111 Drive circuit (Control means) QA, QF Thermal FET (semiconductor switch) RG Internal resistance QB FET (second semiconductor switch) Rr, Rrl to Rr4 Resistance (second load) Q5, Q6 Transistors Q11 to Q54 FET CMP1, COMP2 Comparator (detection means) Rl to R55 Resistance RV Variable resistance ZD1, ZD2 Zener diode D1 to D51 Diode C1 to C31 Capacitor 121 Temperature sensor 122 Latch circuit QS Overheat shutoff FET SW1, SW2 switch VB Power supply voltage VP Charge pump output Voltage

Continued on front page F-term (reference) 5G004 AA04 AB02 BA03 BA04 BA05 CA05 DA02 DA04 DC04 EA01 5G065 BA04 BA05 BA07 DA07 EA02 GA09 LA01 LA02 MA04 MA09 MA10 NA01 NA02 NA05 NA07 5J055 AX12 AX31 AX47 AX55 BX16 DX23 DX23 DX33 EX04 EX06 EX11 EX23 EY01 EY02 EY05 EY10 EY12 EY13 EY21 EZ04 EZ07 EZ10 EZ31 EZ39 EZ57 EZ61 FX04 FX06 FX32 GX01 GX04 GX06

Claims (11)

[Claims] 1. A first semiconductor switch which is switching-controlled in accordance with a control signal supplied to a first control signal input terminal and controls power supply from a power supply to a load, and wherein the first semiconductor switch is supplied to a second control signal input terminal. A second semiconductor switch that is switching-controlled in accordance with a control signal and controls power supply from the power supply to a reference load; and a difference voltage between a terminal voltage of the first semiconductor switch and a terminal voltage of the second semiconductor switch. A power supply control device comprising: a detection unit for detecting; and a determination unit for determining whether or not the load is disconnected based on the difference voltage detected by the detection unit. 2. The method according to claim 1, wherein the reference load has an impedance set such that a current similar to an inrush current flowing through the first semiconductor switch flows when the first semiconductor switch transitions from off to on. The power supply control device according to claim 1, wherein: 3. The power supply control device according to claim 1, wherein the first semiconductor switch, the second semiconductor switch, the detection unit, and the determination unit are formed on a same chip. 4. The power supply control device according to claim 1, further comprising overheat protection means for turning off and protecting the first semiconductor switch when the first semiconductor switch is overheated. 5. The reference load includes a plurality of resistors,
The power supply control device according to claim 1, wherein a resistance value of the reference load is variably set by selectively connecting the plurality of resistors. 6. The power supply control device according to claim 1, wherein the determining unit changes the cycle of the control signal when determining that the load is disconnected. 7. A terminal-to-terminal voltage of a first semiconductor switch, which is switching-controlled in accordance with a control signal supplied to a first control signal input terminal and controls power supply from a power supply to a load,
A detection step of detecting a voltage difference between a voltage between terminals of a second semiconductor switch that is switching-controlled in accordance with the control signal supplied to a second control signal input terminal and controls power supply from the power supply to a reference load; A determination step of determining whether or not the load is disconnected based on the difference voltage detected in the detection step. 8. The reference load, wherein the impedance is set such that a current similar to an inrush current flowing through the first semiconductor switch flows when the first semiconductor switch transitions from off to on. The power supply control method according to claim 7, wherein: 9. The power supply control method according to claim 7, further comprising an overheat protection step of turning off and protecting the first semiconductor switch when the first semiconductor switch is overheated. 10. The reference load according to claim 7, wherein the reference load includes a plurality of resistors, and a resistance value of the reference load is variably set by selectively connecting the plurality of resistors. The power supply control method described in the above. 11. The power supply control method according to claim 7, wherein the determining step changes a cycle of the control signal when it is determined that the load is disconnected.