JP2007135274A - Current abnormality detection circuit and current value adjustment method at abnormality detection - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a current abnormality detection circuit that can normally detect the abnormalities of current, even if there is variations in the manufacturing of a potential control circuit, and to provide its current value adjustment method at abnormality detection. <P>SOLUTION: Influences, generated by an offset voltage ΔV and a second abnormality threshold voltage Vfc, with respect to a "fuse abnormality" to which high accuracy is required in its detection, and by the variation of a comparator circuit 32 can be eliminated at a time, while suppressing the deterioration of the detection accuracy of an "overcurrent abnormality" by the adjustment work applied to one place, such that a first abnormality threshold voltage Voc is increased with the same amount by the same amount of the second abnormality threshold voltage Vfc by adjusting a bias voltage Vb of a bias resistor 42 arranged downstream of a voltage divide circuit 40. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a current abnormality detection circuit and a current value adjusting method at the time of abnormality detection.

  Conventionally, a power supply line connecting a power source and a load is provided with a high-power semiconductor switch such as a power MOSFET, and the power supply to the load is controlled by turning this semiconductor switch on and off. A control device is provided. In such a power supply control device, when an overcurrent flows in the power supply line, the semiconductor switch is protected by controlling the potential of the control terminal of the semiconductor switch to turn off the semiconductor switch and cut off the energization. Those having a self-protecting function are known.

In the following Patent Document 1, a sense FET that flows a sense current corresponding to the amount of current of a power MOSFET is provided, and the sense current flowing through the sense FET is passed through a current detection resistor via a potential control circuit. A voltage drop is detected, and when this voltage drop exceeds a predetermined threshold value, an overcurrent (current abnormality) is determined. Specifically, the drains of the power MOSFET and the sense FET are commonly connected to the power supply side, while the source potential of both is held at the same potential by, for example, a potential control circuit having an operational amplifier having a voltage follower connection. Yes. As a result, a sense current having a stable constant ratio (the sense ratio between the power MOSFET and the sense FET) can flow to the sense FET with respect to the load current flowing through the power MOSFET.
JP 2004-236405 A

  However, the operational amplifiers that make up the potential control circuit have variations in offset voltage due to manufacturing variations, so the source potentials of the power MOSFET and the sense FET may not be held at the same potential. As a result, a sense current having a ratio different from the predetermined ratio assumed in advance with respect to the load current flowing in the power MOSFET flows in the sense FET. Then, depending on the comparison with the threshold value determined on the assumption of the constant ratio, the load current is determined to be current abnormality at a level different from the level that is originally determined to be current abnormality, and an accurate current abnormality cannot be detected. There was a problem.

  The present invention has been completed based on the above situation, and an object of the present invention is to provide a current abnormality detection circuit capable of normally detecting a current abnormality even if there is a manufacturing variation in the potential control circuit. The current value adjustment method at the time of detecting the abnormality is provided.

  As means for achieving the above object, a current abnormality detection circuit according to the invention of claim 1 is a current abnormality detection circuit for detecting an abnormality of a current flowing in a power supply line from a power source to a load, wherein the power A resistive first circuit element provided in a supply line; a resistive second circuit element in which one end side is commonly connected to the power supply side of the first circuit element and a current from the power supply flows; and the first A current flowing through the second circuit element flows to the first circuit element by holding each potential of the circuit element and the second circuit element opposite to the common connection point at the same potential or a predetermined potential difference. A potential control circuit for outputting a current flowing through the second circuit element in a predetermined proportional relationship with respect to the current; a current-voltage conversion circuit for converting the current output from the potential control circuit into a voltage; and the current Electric A comparison circuit that outputs a current abnormality signal based on a comparison between the output voltage of the conversion circuit and the threshold voltage, and a voltage that changes in conjunction with the bias voltage generated by the bias voltage generation circuit and the bias voltage generation circuit. A threshold voltage generation circuit that outputs the threshold voltage; and a bias voltage adjustment circuit that adjusts the bias voltage generated by the bias voltage generation circuit.

  A current abnormality detection circuit according to a second aspect of the present invention is a current abnormality detection circuit that detects an abnormality of a current flowing in a power supply line from a power source to a load, and is a first resistive element provided in the power supply line. A circuit element, a resistive second circuit element in which one end side is commonly connected to the power supply side of the first circuit element and a current from the power supply flows, and among the first circuit element and the second circuit element By maintaining each potential on the side opposite to the common connection point at the same potential or a predetermined potential difference, the current flowing through the second circuit element has a predetermined proportional relationship with the current flowing through the first circuit element, A potential control circuit for outputting a current flowing through the second circuit element; a current-voltage conversion circuit for converting the current output from the potential control circuit into a voltage; and an output voltage and a threshold voltage of the current-voltage conversion circuit. Comparison A comparator circuit that outputs a current abnormality signal based on the threshold voltage generator circuit that has a bias voltage generator circuit and outputs a voltage that changes in conjunction with the bias voltage generated by the bias voltage generator circuit as the threshold voltage; and A bias voltage adjusting circuit in which the bias voltage generated by the bias voltage generating circuit is adjusted (adjusted to change the bias voltage).

  According to a third aspect of the present invention, in the current abnormality detection circuit according to the first or second aspect, the first circuit element is a power FET that is on / off controlled to control power supply to the load. The second circuit element is a sense FET through which a sense current corresponding to the current amount of the power FET flows.

  According to a fourth aspect of the present invention, in the current abnormality detection circuit according to any one of the first to third aspects, the threshold voltage generation circuit outputs a plurality of different threshold voltages, and the comparison circuit In this configuration, an abnormal current signal corresponding to each threshold voltage is output based on a comparison between the output voltage of the current-voltage conversion circuit and each of the plurality of threshold voltages.

  According to a fifth aspect of the present invention, in the current abnormality detection circuit according to the fourth aspect, the threshold voltage generation circuit includes a voltage dividing circuit that divides a reference voltage, and a plurality of divided voltages are used as the plurality of threshold voltages. The bias voltage generation circuit outputs a bias resistor connected in series downstream of the voltage dividing circuit, a constant voltage circuit, and a current generating resistor, and outputs a constant current corresponding to the bias voltage and the voltage dividing circuit. And a constant current output circuit for causing the current flowing in the voltage dividing circuit to join the current flowing through the bias resistor at a connection point with the bias resistor.

  According to a sixth aspect of the present invention, in the current abnormality detection circuit according to the fifth aspect, the bias voltage adjusting circuit is capable of adjusting a resistance value of the current generating resistor.

  According to a seventh aspect of the present invention, in the current abnormality detection circuit according to the fifth aspect, the bias voltage adjustment circuit is capable of adjusting a resistance value of the bias resistor.

  According to an eighth aspect of the present invention, in the current abnormality detection circuit according to any one of the fourth to seventh aspects, the first circuit element is a power FET for controlling on / off control to supply power to the load. The second circuit element is a sense FET through which a sense current corresponding to the current amount of the power FET flows, and the reference voltage is a source potential of the power FET.

  According to a ninth aspect of the present invention, in the current abnormality detection circuit according to any one of the first to eighth aspects, the current-voltage conversion circuit is a resistor.

  A tenth aspect of the present invention is the current abnormality detection circuit according to any one of the first to ninth aspects, wherein the first circuit element, the second circuit element, the potential control circuit, the comparison circuit, and the threshold voltage. The generation circuit and the bias voltage adjustment circuit are formed as a single chip or as a semiconductor element configured by a plurality of chips and accommodated in one package, and the semiconductor element is connected to the current output side of the potential control circuit. An external terminal is provided, and the current-voltage conversion circuit is connected to the external terminal outside the semiconductor element.

  An abnormality detection current value adjusting method according to an invention of claim 11 is a current abnormality detection circuit for detecting an abnormality of a current flowing in a power supply line from a power source to a load, and the load is detected when the current abnormality is detected. An abnormality detection current value adjusting method for adjusting a current value flowing in the power supply circuit, wherein the current abnormality detection circuit includes a resistive first circuit element provided in the power supply line and one end side of the first circuit. A resistive second circuit element that is commonly connected to the power supply side of the element and through which a current from the power supply flows, and each of the first circuit element and the second circuit element on the opposite side of the common connection point By holding the potential at the same potential or a predetermined potential difference, the current flowing through the second circuit element is set to have a predetermined proportional relationship with the current flowing through the first circuit element, and the current flowing through the second circuit element is output. The Each of the potential control circuit, the current-voltage conversion circuit that converts the current output from the potential control circuit into a voltage, and a plurality of threshold voltages different from the output voltage of the current-voltage conversion circuit. A threshold voltage that has a comparison circuit that outputs a current abnormality signal corresponding to the threshold voltage and a bias voltage generation circuit, and outputs a voltage that changes in conjunction with the bias voltage generated by the bias voltage generation circuit as the plurality of threshold voltages And a bias voltage adjustment circuit capable of adjusting the bias voltage generated by the bias voltage generation circuit, and the threshold voltage generation circuit includes a voltage dividing circuit that divides a reference voltage and includes a plurality of voltage dividing circuits. A bias voltage is output as the plurality of threshold voltages, and the bias voltage generation circuit includes a bias resistor connected in series downstream of the voltage dividing circuit. A constant current output having a constant voltage circuit and a current generating resistor, and a constant current corresponding to the current generating resistor is combined with the current flowing through the voltage dividing circuit at a connection point between the voltage dividing circuit and the bias resistor, and flows through the bias resistor. A current corresponding to the one threshold voltage while passing an original abnormality detection current to be detected by one threshold voltage of the plurality of threshold voltages from the power source to the load. The bias voltage is adjusted by the bias voltage adjustment circuit so that an abnormal signal is output from the comparison circuit.

  An abnormality detection current value adjustment method according to a twelfth aspect of the present invention relates to a current abnormality detection circuit that detects an abnormality of a current flowing in a power supply line from a power source to a load, and the load is detected when the current abnormality is detected. An abnormality detection current value adjustment method for adjusting a current value flowing in the power supply circuit, wherein the current abnormality detection circuit includes a power FET provided in the power supply line, and a sense corresponding to a current amount of the power FET. A power chip including a sense FET through which a current flows, and a current flowing through the sense FET with respect to a current flowing through the power FET by maintaining each source potential of the power FET and the sense FET at the same potential or a predetermined potential difference A potential control circuit for outputting a current flowing through the sense FET in a predetermined proportional relationship and output from the potential control circuit. A current-voltage conversion circuit that converts a sense current into a voltage, and a comparison circuit that outputs a current abnormality signal corresponding to each threshold voltage based on a comparison between each of the plurality of threshold voltages different from the output voltage of the current-voltage conversion circuit A threshold voltage generation circuit that has a bias voltage generation circuit and outputs, as the plurality of threshold voltages, a voltage that changes in conjunction with a bias voltage generated by the bias voltage generation circuit, and the bias voltage generation circuit generates the bias voltage generation circuit. A bias voltage adjustment circuit capable of adjusting a bias voltage, and the threshold voltage generation circuit includes a voltage dividing circuit that divides a reference voltage, and outputs a plurality of divided voltages as the plurality of threshold voltages. The bias voltage generation circuit has a bias resistor, a constant voltage circuit, and a current generation resistor connected in series downstream of the voltage dividing circuit. And a constant current output circuit for combining the constant current corresponding to the current flowing through the voltage dividing circuit at a connection point between the voltage dividing circuit and the bias resistor to flow through the bias resistor, and assembling the power chip Before, a temporary resistance having a resistance value equivalent to the ON resistance of the sense FET is connected between the power source and the sense FET input of the potential control circuit, and the plurality of power FET inputs of the potential control circuit are connected to the plurality of power FET inputs. Current abnormality signal corresponding to the one threshold voltage while giving a voltage equivalent to the source voltage when the current at the time of detecting an abnormality that should be detected by one of the threshold voltages is supplied to the power FET The bias voltage is adjusted by the bias voltage adjustment circuit so that is output from the comparison circuit.

  A thirteenth aspect of the invention is the abnormality detection current value adjustment method according to the eleventh or twelfth aspect, wherein among the plurality of threshold voltages, a threshold voltage having a smallest abnormality detection current corresponding thereto is selected. The one threshold voltage is used.

  In accordance with a fourteenth aspect of the present invention, in the abnormality detection current value adjusting method according to any one of the eleventh to thirteenth aspects, the bias voltage is adjusted by adjusting a resistance value of the current generating resistor.

  According to a fifteenth aspect of the present invention, in the abnormality detection current value adjusting method according to any one of the eleventh to thirteenth aspects, the bias voltage is adjusted by adjusting a resistance value of the bias resistor.

<Invention of Claims 1 and 2>
According to this configuration, even if the potential relationship of each potential on the side opposite to the common connection point of the first circuit element and the second circuit element varies due to manufacturing variations of the potential control circuit, the bias voltage adjustment is performed. By adjusting the bias voltage by the circuit to an appropriate threshold voltage, it is possible to detect a current abnormality at a desired current level.

<Invention of Claim 3>
This configuration is a sense-type current abnormality detection circuit including a sense FET in which a sense current according to the amount of current of the power FET flows. The effect of the present invention can also be obtained in this configuration.

<Invention of Claim 4>
According to this configuration, it is possible to detect an abnormality in a plurality of levels of current. Each threshold voltage can be adjusted by adjusting the bias voltage. In particular, when a plurality of individually adjustable bias voltages are generated corresponding to each of the plurality of threshold voltages, each threshold voltage can be adjusted to a more appropriate value by adjusting each bias voltage.

<Invention of Claim 5>
According to this configuration, for example, when an original abnormality detection current to be detected by one threshold voltage among a plurality of threshold voltages is passed through the current abnormality detection circuit, the current abnormality corresponding to the one threshold voltage is detected. The bias voltage is adjusted by a bias voltage adjustment circuit so that a signal is output. At this time, other threshold voltages other than the one threshold voltage also change, but the potential difference between the threshold voltages does not change. That is, each of the plurality of threshold voltages is increased or decreased by the adjustment amount of the bias voltage. Therefore, a plurality of abnormality detection current variations due to potential control circuit variations can be performed by adjusting one point.

<Inventions of Claims 6, 7, 14, 15>
As a configuration for adjusting the bias voltage, a configuration in which the resistance value of the current generating resistor can be adjusted and a configuration in which the resistance value of the bias resistor can be adjusted are conceivable. In the latter configuration, by reducing the resistance value of the bias resistor with respect to the resistance value of the upstream voltage dividing circuit, even if the resistance value of the bias resistor is adjusted, a plurality of threshold voltages are changed, An action that does not change the potential difference between the respective threshold voltages can be substantially obtained.

<Invention of Claim 8>
According to this configuration, the threshold current can be set to increase / decrease in accordance with the increase / decrease of the potential of the source terminal, so when a short circuit of the load or the like occurs compared to a configuration in which a certain level of threshold is set. Regardless of the magnitude of the power supply voltage, the output voltage of the current-voltage conversion circuit immediately reaches the threshold voltage, and current abnormality can be detected quickly.

<Invention of Claim 9>
According to this configuration, the current-voltage conversion circuit is a resistor.

<Invention of Claim 10>
According to this configuration, the threshold setting resistor can be provided outside the semiconductor element instead of being provided in the semiconductor element. Therefore, it is possible to suppress the variation in resistance value due to the manufacturing process and the variation due to the temperature characteristic, thereby reducing the threshold value. The current can be set with high accuracy, and as a result, abnormality detection can be performed with high accuracy. In addition, since the threshold current can be set freely without depending on the configuration of the semiconductor element, the degree of freedom in performing abnormality detection increases.

<Invention of Claims 11 and 12>
Regarding the current abnormality detection circuit, as a method for adjusting the current value at the time of abnormality detection when a current abnormality is detected by each threshold voltage to a value to be originally detected (current value adjustment method at the time of abnormality detection) There are the following methods. If the first circuit element (power FET) and the second circuit element (sense FET) are already incorporated, an original abnormality detection current that should be detected by a certain threshold voltage is supplied to the first circuit element. On the other hand, the bias voltage may be adjusted by the bias voltage adjustment circuit so that the current abnormality signal corresponding to the one threshold voltage is output from the comparison circuit.
On the other hand, if the first circuit element (power FET) and the second circuit element (sense FET) are not assembled, first, a temporary resistance having a resistance value equivalent to the ON resistance of the sense FET is connected to the power source and the potential control circuit. Connected to the sense FET input. Then, a voltage equivalent to the source voltage that would be generated if an original abnormality detection current to be detected by the one threshold voltage is supplied to the power FET is applied to the power FET input of the potential control circuit. . In this state, the bias voltage adjustment circuit adjusts the bias voltage so that the current abnormality signal corresponding to the one threshold voltage is output from the comparison circuit.

<Invention of Claim 13>
Variations in current at the time of abnormality detection due to manufacturing variations in the potential control circuit greatly affect current abnormality detection accuracy as the current at the time of abnormality detection decreases. Conversely, the larger the abnormality detection current, the smaller the effect. In this configuration, each threshold voltage is increased or decreased by the same value (bias voltage adjustment amount) by adjusting the bias voltage. Therefore, by adjusting the bias voltage with reference to a threshold voltage with a small current at the time of abnormality detection, the influence of manufacturing variations of the potential control circuit or the like can be suppressed as a whole with respect to a plurality of threshold voltages.

<Embodiment 1>
Embodiment 1 of the present invention will be described with reference to FIGS.
[Entire configuration of power supply control device]
The current abnormality detection circuit according to the present embodiment constitutes the power supply control device 10, and a block diagram of the overall configuration is shown in FIG. The power supply control device 10 is mounted on a vehicle (not shown) and is used as a load 11 to control driving of a vehicle lamp, a cooling fan motor, a defogger heater, and the like.

  Specifically, the power supply control device 10 includes a power MOSFET 14 (“first circuit element, power” of the present invention) provided in a power supply line 13 from a vehicle power supply (hereinafter simply “power supply 12”) to the load 11. FET ”). Then, the power supply control device 10 applies a control signal S1 such as a constant voltage signal or a PWM (Pulse Width Modulation) control signal to the gate of the power MOSFET 14 so as to perform an on / off operation. It is configured to control power supply from the power supply 12 connected to the output side to the load 11. In the present embodiment, the power supply control device 10 is configured such that the input terminal P1 is connected to an external operation switch 15, and operates when the operation switch 15 is turned on.

  As shown in FIG. 1, the power supply control device 10 includes the input terminal P1, a power supply (Vcc) terminal P2 and a tab terminal P3 connected to the power supply 12, a load connection terminal P4 connected to the load 11, An external terminal P5 connected to the ground (GND) via an external resistor 16 (corresponding to the “current-voltage conversion circuit” of the present invention), a ground terminal P6 directly connected to the ground (GND), and a diagnostic output terminal The semiconductor element 17 (semiconductor device) provided with P7 is configured. In this embodiment, the power MOSFET 14, a sense MOSFET 18 (corresponding to the “second circuit element, sense FET” of the present invention) and a temperature sensor 19 described later are integrated into a single chip as the power chip 20, and other circuits are mounted. The control chip 21 is assembled and configured.

  As shown in FIG. 1, in the power supply control device 10, the control signal S1 is input to the input interface 22 connected to the input terminal P1, and the control signal S1 is sent to the protection logic circuit 23 and the internal ground generation circuit 27. It has come to be given. The internal ground generation circuit 27 is connected to the power supply 12 and is connected to the ground terminal P6 via the resistor 29, and is energized by receiving the control signal S1. The internal ground generation circuit 27 generates an internal ground (GND2) that is lower than the power supply voltage (Vcc) by a predetermined constant voltage, and a constant voltage between the power supply voltage (Vcc) and the internal ground (GND2) is generated. This is supplied to the protection logic circuit 23. A charge pump / gate driver 24 is connected to the protection logic circuit 23, and an overcurrent detection circuit 25 and an overtemperature detection circuit 26 are also connected. A diode 36 having a cathode connected to the power supply terminal P 2 and an anode connected to the resistor 29 is provided upstream of the resistor 29.

  The charge pump / gate driver 24 operates to apply a boosted voltage between the gate and source of the power MOSFET 14 and the sense MOSFET 18 and to turn on the energized state when the protection logic circuit 23 is activated. As a result, power is supplied from the power supply 12 to the load 11. On the other hand, the charge pump / gate driver 24 calculates the operation result of the protection logic circuit 23 when the protection logic circuit 23 detects an abnormality that receives a first abnormality signal OC, a second abnormality signal FC, or a third abnormality signal OT, which will be described later. Thus, the operation is performed so that the electric charges between the gate and the source of the power MOSFET 14 and the sense MOSFET 18 are discharged and cut off. Thereby, the power supply from the power supply 12 to the load 11 is stopped.

  In the power chip 20, a plurality of MOSFETs having drains connected in common and connected to the tab terminal P3 are arranged, and the sources of most MOSFET groups are connected in common, and the power FET input 25a of the overcurrent detection circuit 25 and the load connection are connected. The power MOSFET 14 connected to the terminal P4 is configured, and the sense MOSFET 18 connected to the sense FET input 25b of the overcurrent detection circuit 25 is configured by commonly connecting the sources of some MOSFET groups. The ratio of the number of MOSFET groups constituting the power MOSFET 14 and the number of MOSFET groups constituting the sense MOSFET 18 is approximately the sense ratio k. In FIG. 1, the connection point A where the drains of the power MOSFET 14 and the sense MOSFET 18 are connected in common corresponds to the “common connection point” in the present invention.

  The overcurrent detection circuit 25 receives the first abnormality threshold voltage Voc and the second abnormality threshold voltage Vfc from the threshold voltage generation circuit 28. The threshold voltage generation circuit 28 is connected between the source (load connection terminal P4) of the power MOSFET 14 and the ground terminal P6.

  The over-temperature detection circuit 26 receives a temperature signal S <b> 2 corresponding to the temperature of the power chip 20 from the temperature sensor 19 provided in the power chip 20. The overtemperature detection circuit 26 detects a temperature abnormality when receiving a temperature signal S2 indicating a predetermined abnormal temperature, and supplies the third abnormality signal OT to the protection logic circuit 23. The diagnosis output circuit 34 outputs an abnormality detection signal via the diagnosis output terminal P7, for example, when the protection logic circuit 23 detects an abnormality when it receives the first abnormality signal OC or the second abnormality signal FC.

[Specific Configuration of Overcurrent Detection Circuit and Threshold Voltage Generation Circuit]
FIG. 2 is an enlarged circuit diagram showing the overcurrent detection circuit 25 and the threshold voltage generation circuit 28 in the power supply control device 10. In the figure, parts other than the overcurrent detection circuit 25 and the threshold voltage generation circuit 28 are partially omitted.

(1) Overcurrent detection circuit The overcurrent detection circuit 25 is for holding the source potentials of the power MOSFET 14 and the sense MOSFET 18 (corresponding to “the potentials on the side opposite to the common connection point” of the present invention) at the same potential. A potential control circuit 30 and a plurality of (two in this embodiment) comparison circuits 31 and 32 (in this embodiment, a hysteresis comparator) are provided.

  The potential control circuit 30 includes an operational amplifier 33 in which a power FET input 25a (source of the power MOSFET 14) and a sense FET input 25b (source of the sense MOSFET 18) are connected to a pair of input terminals, a sense FET input 25b, An FET 35 is provided as a switch element connected between the external terminal P5 and the output of the operational amplifier 33 to the control terminal. More specifically, the power FET input 25 a is connected to the negative phase input of the operational amplifier 33, and the sense FET input 25 b is connected to the positive phase input of the operational amplifier 33. The differential output of the operational amplifier 33 is fed back to the positive phase input via the gate and drain of the FET 35.

  By feeding back the differential output of the operational amplifier 33 in this manner, an imaginary short state is achieved in which the positive-phase input potential and the negative-phase input potential of the operational amplifier 33 are almost the same. Therefore, the drains and sources of the power MOSFET 14 and the sense MOSFET 18 have the same potential, and the sense current Is (the sense ratio k) is stable with respect to the current IL (load current) flowing through the power MOSFET 14 (the present invention). (Corresponding to “current flowing through the second circuit element”) can be passed through the sense MOSFET 18. However, in practice, in the operational amplifier 33, the offset voltage ΔV between the input terminals affects the accuracy of the abnormality detection of the variation current due to manufacturing variations and the like.

  The sense current Is from the potential control circuit 30 flows to the external resistor 16 via the external terminal P5, and the terminal voltage Vo (the “output voltage of the current-voltage conversion circuit” of the present invention) of the external terminal P5 according to the sense current Is. Is equivalent). The terminal voltage Vo is applied to one input terminal of the comparison circuit 31 and also applied to one input terminal of the comparison circuit 32.

  The comparison circuit 31 receives the first abnormality threshold voltage Voc from the threshold voltage generation circuit 28 at the other input terminal, and the first abnormality signal OC when the terminal voltage Vo exceeds the first abnormality threshold voltage Voc. (Corresponding to the “current abnormality signal” of the present invention) is output to the protection logic circuit 23. Note that the comparison circuit 31 has a first abnormality at the time of “overcurrent abnormality” when a large current (overcurrent abnormality current ILoc original current at the time of abnormality detection) flows to the load 11 due to, for example, a short circuit of the load 11. This is for outputting the signal OC.

  The comparison circuit 32 receives the second abnormality threshold voltage Vfc (<Voc) from the threshold voltage generation circuit 28 at the other input terminal, and the second abnormality threshold voltage Vfc is exceeded when the terminal voltage Vo exceeds the second abnormality threshold voltage Vfc. 2 The abnormal signal FC (corresponding to the “current abnormal signal” of the present invention) is output to the protection logic circuit 23. The comparison circuit 32 is a current smaller than the current at the time of the “overcurrent abnormality”. However, if the current is kept larger than the rated current as it is, a problem may occur such as, for example, wiring connected to the load 11 smokes. This is for outputting the second abnormality signal FC at the time of “fuse abnormality” in which a current of a certain level (current during abnormality detection of the fuse abnormality ILfc) flows.

  When receiving the first abnormality signal OC, the protection logic circuit 23 controls the charge pump / gate driver 24 so as to shut off the power MOSFET 14 immediately or after waiting for a short time, for example. The shut-off operation at this time is a shut-off operation that is not self-recoverable and maintains the shut-off state unless the control signal S1 is input again to the power supply control device 10, for example. Of course, the shut-off operation at this time may be self-recoverable on condition that the first abnormal signal OC is not received.

  Further, when the protection logic circuit 23 receives the second abnormality signal FC, the protection logic circuit 23 has a longer time than the time when the first abnormality signal OC is received (the time when the current continues to flow and the generation of wiring smoke occurs). After waiting for a short time, perform a shut-off operation that cannot be restored. Of course, the shut-off operation at this time may be self-recoverable on condition that the second abnormal signal FC is not received. Further, when receiving the third abnormal signal OT, the protection logic circuit 23 temporarily shuts off the power MOSFET 14 and no longer receives the third abnormal signal OT (the temperature of the power chip 20 falls below a predetermined abnormal temperature). On the condition that the power MOSFET 14 is returned to the energized state, a self-recoverable shut-off operation is performed.

(2) Threshold Voltage Generation Circuit As shown in FIG. 2, in the threshold voltage generation circuit 28, a voltage dividing circuit 40 and a bias resistor 42 are connected in series between the source of the power MOSFET 14 and the ground terminal P6. The voltage dividing circuit 40 is configured by connecting a plurality of resistors (in this embodiment, three resistors 40a, 40b, and 40c) in series, and the divided voltage at the connection point B between the resistors 40a and 40b is the first voltage. The first abnormal threshold voltage Voc is output, and the divided voltage at the connection point C between the resistors 40b and 40c is output as the second abnormal threshold voltage Vfc. Therefore, the source voltage Vs of the power MOSFET 14 corresponds to the “reference voltage” of the present invention.

  The bias resistor 42 is disposed on the downstream side of the voltage dividing circuit 40. The bias resistor 42 constitutes a bias voltage generating circuit 41 together with the constant current output circuit 46. The constant current output circuit 46 includes an adjusting resistor 45 (corresponding to the “current generating resistor and bias voltage adjusting circuit” of the present invention), and a constant current Ih corresponding to the resistance value of the adjusting resistor 45 is supplied to the bias resistor 42. From the connection point D of the voltage dividing circuit 40 to the bias resistor 42.

  Specifically, the constant current output circuit 46 includes a current mirror circuit 47 configured by a pair of MOS transistors 43 and 44 whose sources are commonly connected to the power supply terminal P2. The adjustment resistor 45 is connected to the drain of the MOS transistor 43 whose gate and drain are short-circuited to the internal ground generation circuit 27 (corresponding to the “constant voltage circuit” of the present invention). A constant current Ih corresponding to the resistance value of the adjustment resistor 45 is generated. The drain of the MOS transistor 44 is connected to the connection point D.

[How to adjust the current value when an abnormality is detected]
As described above, the protection logic circuit 23 performs a shut-off operation according to “overcurrent abnormality” and “fuse abnormality”. Accordingly, the load current IL flowing through the power MOSFET 14 and the load 11 is accurately detected, and the first abnormal signal is output from the comparison circuit 31 when the overcurrent abnormal current ILoc to be detected as “overcurrent abnormality” flows to the load 11 or the like. It is necessary to output the second abnormality signal FC from the comparison circuit 32 when the OC is output and the fuse abnormality current ILfc to be detected as “fuse abnormality” flows to the load 11 or the like.

  Of course, the power supply control device 10 is designed in consideration of these, but actually, the proportional relationship between the sense current Is from the potential control circuit 30 and the load current IL is proportional to the design due to manufacturing variations. Vary. That is, since the value of the sense current Is with respect to the load current IL varies, when the load current IL deviated from the overcurrent abnormal current ILoc or the fuse abnormal current ILfc flows to the load 11 or the like, the “overcurrent abnormality” or “fuse abnormality” Will be detected.

The following can be cited as causes of the variation in the current value at the time of abnormality detection. Note that, due to these factors, the power supply control device 10 as a whole varies by ± 50 to 60% (so-called half) with respect to the design value.
a. Variation in sense ratio k between power MOSFET 14 and sense MOSFET 18 b. Variation in offset voltage ΔV of operational amplifier 33 of potential control circuit 30 c. Variation of external resistor 16 as current-voltage conversion circuit d. Variation in threshold voltages (first abnormality threshold voltage Voc, second abnormality threshold voltage Vfc) generated by the threshold voltage generation circuit 28 e. Among the variations of the pair of switch elements included in the comparison circuits 31 and 32, among these, “c. Variation of the external resistor 16” is a configuration in which the external resistor 16 is provided outside the semiconductor element 17 in the present embodiment. Therefore, manufacturing variations due to this can be suppressed. Thereby, the dispersion | variation as the whole electric power supply control apparatus 10 can be suppressed to about +/- 30% with respect to a design value.

  As for “d. Variation in threshold voltage generated by the threshold voltage generation circuit 28”, in the present embodiment, a voltage dividing circuit 40 for generating these is provided in the semiconductor element 17. Accordingly, since the resistance values of the resistors 40a to 40c vary in the same direction (increase direction or decrease direction) in the manufacturing stage, variation in the ratio between the first abnormality threshold voltage Voc and the second abnormality threshold voltage Vfc is suppressed.

On the other hand, “b. Variation in offset voltage ΔV of operational amplifier 33” can greatly affect variation in current value at the time of abnormality detection. The variation of the offset voltage ΔV of the operational amplifier 33 is usually about several mV, and may be about 10 to 15 mV depending on manufacturing conditions. Here, the influence of the variation in the offset voltage ΔV on the sense current Is is expressed by the following equation.

k: Sense ratio IL: Load current Ron: On-resistance value of the power MOSFET 14 In other words, the second term of the above equation means an error due to variations in the offset voltage ΔV. This is shown in the graph of FIG.

(1) Method of adjusting offset voltage of operational amplifier As a method of adjusting (trimming) variation in current value at the time of abnormality detection due to the above factors, after mounting each of the circuits 25, 28, etc. on the semiconductor element 17 (IC package) It is conceivable to adjust the offset voltage ΔV of the operational amplifier 33 before the conversion. That is, the operational amplifier 33 is adjusted so that the source potentials of the power MOSFET 14 and the sense MOSFET 18 are the same. FIG. 4 is a graph showing the relationship between the threshold voltage and the load current IL when the offset voltage ΔV of the operational amplifier 33 is adjusted. The symbol Rx in the figure is the resistance value of the external resistor 16.

  As shown in FIG. 4, by adjusting the offset voltage ΔV of the operational amplifier 33, the influence due to the variation in the offset voltage ΔV of the operational amplifier 33 can be eliminated. However, the influence of “d. Variation in threshold voltage generated by threshold voltage generation circuit 28” and “e. Variation in comparison circuits 31 and 32” cannot be suppressed. That is, due to these factors, the influence of variations in the first abnormality threshold voltage Voc and the second abnormality threshold voltage Vfc remains. In order to eliminate the influence of the variation in threshold voltage, it is necessary to further adjust the balance (a pair of input terminal voltages) of the pair of switches included in each of the comparison circuits 31 and 32. Therefore, in this method, it is necessary to adjust the operational amplifier 33 and the comparison circuits 31 and 32.

  When the method of adjusting only the comparison circuits 31 and 32 without adopting the adjustment of the operational amplifier 33 is adopted, it is necessary to adjust the comparison circuits 31 and 32 according to the variation of the offset voltage ΔV of the operational amplifier 33, respectively. .

(2) Method for adjusting the reference voltage of the voltage dividing circuit For example, by adjusting the resistance value between the voltage dividing circuit 40 and the source of the power MOSFET 14, the reference voltage of the voltage dividing circuit 40 is adjusted to be used for the first abnormality. There is a method of adjusting the threshold voltage Voc and the second abnormality threshold voltage Vfc. As shown in FIG. 5, when the relationship line of the sense current Is-load current IL is shifted from the designed line L1 (solid line in the figure) to L2 (dotted line in the figure) due to variations in the offset voltage ΔV of the operational amplifier 33. For example, the reference voltage is adjusted so that the load current IL at the time of “fuse abnormality” becomes the fuse abnormality current ILfc. As a result, the second abnormality threshold voltage Vfc is changed to “Vfc ′”.

  However, the first abnormality threshold voltage Voc is greatly shifted to a value (Voc ′) obtained by multiplying the first abnormality threshold voltage Voc by a ratio (Vfc ′ / Vfc) before and after the change of the second abnormality threshold voltage Vfc. Here, the variation of the offset voltage ΔV of the operational amplifier 33 is larger than that when a relatively large overcurrent abnormal current ILoc flows (the drain-source voltage Vds of the power MOSFET 14 is large) as in the case of “overcurrent abnormality”. When a relatively small fuse abnormality current ILfc flows (when the drain-source voltage Vds of the power MOSFET 14 is small) as in “when the fuse is abnormal”, the influence on the detection accuracy is greater. Specifically, for example, when the variation of the offset voltage ΔV is 15 mV, when the drain-source voltage Vds of the power MOSFET 14 is 1 V (the on-resistance of the power MOSFET 14 is 3 mΩ, the supply current 333 A), the variation of the offset voltage ΔV. The variation in the sense current Is due to is 1.5%. On the other hand, when the drain-source voltage Vds of the power MOSFET 14 is 30 mV (the on-resistance 3 mΩ of the power MOSFET 14 and the supply current 10 A), the variation in the sense current Is due to the variation in the offset voltage ΔV is 33%. Since the detection of “fuse abnormality” is used as a fuse function for protecting wiring and the like from smoke as described above, it is necessary to detect it with extremely high accuracy.

  Therefore, it is not preferable to change the first abnormality threshold voltage Voc. However, in this method of adjusting the reference voltage, when the second abnormality threshold voltage is corrected from “Vfc” to “Vfc ′”, the first abnormality threshold voltage Voc is changed larger than the correction amount. As a result, the detection accuracy of the “overcurrent abnormality” is lowered.

  In addition to this, there is a method of adjusting the resistance value of the external resistor 16, but this method also has the same problem as the method of adjusting the reference voltage.

(3) Method of Adjusting Bias Voltage In this embodiment, a method of adjusting the bias voltage Vb applied to the bias resistor 42 by adjusting the resistance value of the adjusting resistor 45 of the bias voltage generating circuit 41 is adopted. Yes. The bias voltage generation circuit 41 changes a plurality of threshold voltages in accordance with changes in the bias voltage Vb due to adjustment of the resistance value of the adjustment resistor 45, and does not change the potential difference between these threshold voltages. That is, by adjusting the bias voltage Vb, as shown in FIG. 6, the first abnormality threshold voltage Voc and the second abnormality threshold voltage Vfc are raised by the same amount (in the figure, Voc ”, Vfc ").

  As a result, with respect to “fuse abnormality” that is largely affected by variations in the offset voltage ΔV of the operational amplifier 33, variations in the offset voltage ΔV, the second abnormality threshold voltage Vfc, and the comparison circuit 32 can be adjusted at a time. On the other hand, for the “overcurrent abnormality”, the variation due to the offset voltage ΔV is adjusted, and the variation in the first abnormality threshold voltage Voc and the comparison circuit 31 remains. However, in the “overcurrent abnormality”, since the first abnormality threshold voltage Voc itself is a large value, the influence due to variations in the first abnormality threshold voltage Voc and the comparison circuit 31 is small.

  A specific method for adjusting the bias voltage Vb is as follows. For example, as shown in FIG. 7, the adjustment resistor 45 includes a plurality of trimming resistors (R2, R3, and R4 in the figure) having a trimming pad TP whose both ends are short-circuited with polysilicon, for example, to one reference resistor R1. In this configuration, a short-circuit connection is opened by applying a predetermined voltage to the trimming pads TP connected to both ends of each trimming resistor R2 to R4 as necessary (in the figure, only the trimming resistor R2 is opened). The resistance value as a whole can be adjusted. As shown in FIG. 2, the resistance value of the adjustment resistor 45 is adjusted so that the second abnormal signal FC is output from the comparison circuit 32 in the state where the fuse abnormal current ILfc flows through the power MOSFET 14.

  As described above, according to the present embodiment, the bias voltage Vb of the bias resistor 42 arranged on the downstream side of the voltage dividing circuit 40 is adjusted, and the first abnormality threshold voltage Voc is equal to the second abnormality threshold voltage Vfc. In the adjustment work for one place, which is raised only by the level of the offset voltage ΔV and the second abnormality threshold voltage Vfc for the “fuse abnormality” that requires high detection accuracy while eliminating the influence of the variation of the offset voltage ΔV on the “overcurrent abnormality”. In addition, the influence of the variation of the comparison circuit 32 can be eliminated at a time.

  In the present embodiment, the reference voltage for generating the first abnormality threshold voltage Voc and the second abnormality threshold voltage Vfc is the source voltage Vs of the power MOSFET 14, and the first abnormality threshold voltage Voc, The second abnormality threshold voltage Vfc is a value corresponding to the power supply voltage Vcc. Therefore, regardless of the magnitude of the power supply voltage Vcc, the “overcurrent abnormality” and the “fuse abnormality” can be detected at an early stage when the power supply control device 10 is activated.

<Embodiment 2>
FIG. 8 shows a second embodiment. In the first embodiment, the adjustment operation of the bias voltage Vb is performed after the power chip 20 is incorporated in the control chip 21. On the other hand, in the present embodiment, the bias voltage Vb can be adjusted with only the control chip 21 before the power chip 20 is incorporated.

  In the control chip 21 of the present embodiment, a temporary resistor 50 is connected between the sense FET input 25b of the potential control circuit 30 and the tab terminal P3. The provisional resistor 50 has a resistance value corresponding to the on-resistance (= Ron × k) of the sense MOSFET 18. Then, the voltage Vds is applied between the load connection terminal P4 and the tab terminal P3 connected to the power FET input 25a. This voltage Vds corresponds to a drain-source voltage when a fuse abnormal current ILfc is passed through the power MOSFET 14. In this state, the resistance value of the adjustment resistor 45 is adjusted so that the second abnormality signal FC is output from the comparison circuit 32. In this adjustment operation, the temporary resistor 50 and the external resistor 16 (temporary external resistor) are temporarily connected to the control chip 21. After the adjustment operation, the temporary resistor 50 and the external resistor 16 (temporary resistor) are temporarily connected. The external resistor is removed, and the power chip 20 is permanently connected to the control chip 21 by wire bonding, and the external resistor 16 is permanently connected to the external terminal P5.

  With such a method, the bias voltage Vb can be adjusted only in the control chip 21 before the power chip 20 is incorporated.

<Other embodiments>
The present invention is not limited to the embodiments described with reference to the above description and drawings. For example, the following embodiments are also included in the technical scope of the present invention.
(1) In the above embodiment, the example in which the present invention is applied to the configuration in which the load current IL is detected by the sense MOS method including the sense MOSFET 18 has been described. However, the configuration is not limited to this, and the configuration illustrated in FIG. However, the same effect can be obtained by applying the present invention. In other words, in contrast to the configuration of FIG. 2, the shunt resistor 61 is provided between the power supply 12 and the drain of the power MOSFET 14, and one input terminal of the operational amplifier 33 is connected to the shunt resistor 61 (the “first circuit element” of the present invention). And a shunt resistor 62 (corresponding to the “second circuit element” of the present invention) instead of the sense MOSFET 18 is connected to the connection point between the power MOSFET 14 and the drain of the power MOSFET 14. A current corresponding to the resistance ratio of the shunt resistors 61 and 62 flows to the external resistor 16 with respect to the load current IL flowing through the power MOSFET 14.

  (2) In the above embodiment, the potential control circuit is the potential control circuit 30 having the operational amplifier 33. However, the potential control circuit is not limited to this, and the power MOSFET 14 and the sense MOSFET 18 are controlled by a level shift circuit formed by combining a pair of switch elements. The source potential may be the same. For example, the drain of the Nch type FET is connected to a constant current circuit, the gate is connected to the source of the power MOSFET 14, the source is connected to the gate of the Pch type FET, and the source of the Pch type FET is connected to the source of the sense MOSFET 18. This drain is connected to the external resistor 16 side. A combination of a pnp transistor and an npn transistor may be used.

  (3) In the above embodiment, the external resistor 16 is used as the current-voltage conversion circuit. However, the present invention is not limited to this, and an RC parallel circuit in which a capacitor and a resistor are connected in parallel may be used. Furthermore, a circuit in which another resistor is connected in series to the capacitor of the RC parallel circuit may be used.

  (4) In the above embodiment, the configuration has a plurality of threshold voltages. However, the configuration is not limited to this, and a configuration in which one current abnormality is detected by one threshold voltage may be used. Even in such a configuration, the influence of each variation factor can be eliminated by adjusting the bias voltage.

  (5) In contrast to the above-described embodiment, an adjustment resistor is provided instead of the bias resistor 42 to adjust the resistance value. (Refer to “Method for adjusting the reference voltage of the voltage dividing circuit” above.) Further, a method of adjusting a current flowing in the voltage dividing circuit 40 by providing a switching element (FET or bipolar transistor) instead of the bias resistor 42 may be used.

  (6) In the above-described embodiment, the reference voltage is the source voltage Vs of the power MOSFET 14, but the reference voltage is not limited to this, and may be a constant voltage from a constant voltage circuit constituted by a Zener diode or FET.

The block diagram which shows the whole structure of the power supply control apparatus which concerns on Embodiment 1 of this invention. Circuit diagram showing enlarged overcurrent detection circuit and threshold voltage generation circuit Sense current vs. load current graph showing the effect of op amp offset voltage variation Graph of relationship between threshold voltage and load current when adjusting offset voltage of operational amplifier Graph of relationship between threshold voltage and load current when adjusting reference voltage of voltage divider circuit Relationship graph between threshold voltage and load current when bias voltage is adjusted Schematic diagram showing the configuration of the adjustment resistor The circuit diagram which expands and shows the overcurrent detection circuit and threshold voltage generation circuit of Embodiment 2 Circuit diagram of the modified shunt resistor method

Explanation of symbols

10. Power supply control device (current abnormality detection circuit)
DESCRIPTION OF SYMBOLS 11 ... Load 12 ... Power supply 13 ... Power supply line 14 ... Power MOSFET (1st circuit element, power FET)
16 ... External resistor (current-voltage conversion circuit)
17 ... Semiconductor element 18 ... Sense MOSFET (second circuit element, sense FET)
25a ... Input for power FET 25b ... Input for sense FET 27 ... Internal ground generation circuit (constant voltage circuit)
DESCRIPTION OF SYMBOLS 28 ... Threshold voltage generation circuit 30 ... Potential control circuit 31, 32 ... Comparison circuit 40 ... Voltage division circuit 41 ... Bias voltage generation circuit 42 ... Bias resistance 45 ... Adjustment resistance (Current generation resistance, bias voltage adjustment circuit)
46 ... Constant current output circuit 47 ... Current mirror circuit ILoc ... Overcurrent abnormal current (original current at the time of abnormality detection)
ILfc… Fuse abnormal current (original current when abnormality is detected)
Is ... sense current Ih ... constant current P5 ... external terminal OC ... first abnormal signal (current abnormal signal)
FC ... Second abnormal signal (current abnormal signal)
Vb: Bias voltage Vo: Terminal voltage (output voltage of current-voltage conversion circuit)
Voc: first abnormality threshold voltage Vfc: second abnormality threshold voltage Vs: source voltage (reference voltage)

Claims (15)

A current abnormality detection circuit for detecting an abnormality of a current flowing in a power supply line from a power supply to a load,
A resistive first circuit element provided in the power supply line;
A resistive second circuit element having one end side commonly connected to the power supply side of the first circuit element and through which a current from the power supply flows;
A current flowing through the second circuit element is maintained in the first circuit element by holding each of the first circuit element and the second circuit element opposite to the common connection point at the same potential or a predetermined potential difference. A potential control circuit for outputting a current flowing through the second circuit element, having a predetermined proportional relationship with respect to a current flowing through the element;
A current-voltage conversion circuit that converts the current output from the potential control circuit into a voltage;
A comparison circuit that outputs a current abnormality signal based on a comparison between the output voltage of the current-voltage conversion circuit and a threshold voltage;
A threshold voltage generation circuit having a bias voltage generation circuit and outputting a voltage that changes in conjunction with the bias voltage generated by the bias voltage generation circuit as the threshold voltage;
A current abnormality detection circuit comprising: a bias voltage adjustment circuit capable of adjusting the bias voltage generated by the bias voltage generation circuit. A current abnormality detection circuit for detecting an abnormality of a current flowing in a power supply line from a power supply to a load,
A resistive first circuit element provided in the power supply line;
A resistive second circuit element having one end side commonly connected to the power supply side of the first circuit element and through which a current from the power supply flows;
A current flowing through the second circuit element is maintained in the first circuit element by holding each of the first circuit element and the second circuit element opposite to the common connection point at the same potential or a predetermined potential difference. A potential control circuit for outputting a current flowing through the second circuit element, having a predetermined proportional relationship with respect to a current flowing through the element;
A current-voltage conversion circuit that converts the current output from the potential control circuit into a voltage;
A comparison circuit that outputs a current abnormality signal based on a comparison between the output voltage of the current-voltage conversion circuit and a threshold voltage;
A threshold voltage generation circuit having a bias voltage generation circuit and outputting a voltage that changes in conjunction with the bias voltage generated by the bias voltage generation circuit as the threshold voltage;
A current abnormality detection circuit comprising: a bias voltage adjustment circuit in which the bias voltage generated by the bias voltage generation circuit is adjusted. The first circuit element is a power FET that is on / off controlled to control power supply to the load,
3. The current abnormality detection circuit according to claim 1, wherein the second circuit element is a sense FET through which a sense current corresponding to a current amount of the power FET flows. 4. The threshold voltage generation circuit outputs a plurality of different threshold voltages,
The said comparison circuit is a structure which outputs the current abnormal signal according to each said threshold voltage based on the comparison with the output voltage of the said current-voltage conversion circuit, and each of these threshold voltage. The current abnormality detection circuit according to any one of the above. The threshold voltage generation circuit has a voltage dividing circuit for dividing a reference voltage, and outputs a plurality of divided voltages as the plurality of threshold voltages,
The bias voltage generation circuit includes a bias resistor connected in series on the downstream side of the voltage dividing circuit, a constant voltage circuit, and a current generating resistor, and outputs a constant current corresponding to the bias voltage generating circuit and the bias resistor. The current abnormality detection circuit according to claim 4, further comprising: a constant current output circuit that joins a current flowing through the voltage dividing circuit at a connection point and flows through the bias resistor. The current abnormality detection circuit according to claim 5, wherein the bias voltage adjustment circuit is capable of adjusting a resistance value of the current generation resistor. The current abnormality detection circuit according to claim 5, wherein the bias voltage adjustment circuit is capable of adjusting a resistance value of the bias resistor. The first circuit element is a power FET that is on / off controlled to control power supply to the load,
The second circuit element is a sense FET in which a sense current corresponding to a current amount of the power FET flows,
The current abnormality detection circuit according to claim 4, wherein the reference voltage is a source potential of the power FET. The current abnormality detection circuit according to claim 1, wherein the current-voltage conversion circuit is a resistor. The first circuit element, the second circuit element, the potential control circuit, the comparison circuit, the threshold voltage generation circuit, and the bias voltage adjustment circuit may be formed into a single chip or a plurality of chips. It is a semiconductor element housed in a package,
10. The semiconductor device according to claim 1, wherein an external terminal connected to a current output side of the potential control circuit is provided, and the current-voltage conversion circuit is connected to the external terminal outside the semiconductor element. The current abnormality detection circuit described. An abnormality detection current value adjustment method for adjusting an electric current value flowing through the load when the electric current abnormality is detected with respect to an electric current abnormality detection circuit for detecting an abnormality of an electric current flowing through a power supply line from a power source to a load Because
The current abnormality detection circuit is
A resistive first circuit element provided in the power supply line;
A resistive second circuit element having one end side commonly connected to the power supply side of the first circuit element and through which a current from the power supply flows;
A current flowing through the second circuit element is maintained in the first circuit element by holding each of the first circuit element and the second circuit element opposite to the common connection point at the same potential or a predetermined potential difference. A potential control circuit for outputting a current flowing through the second circuit element, having a predetermined proportional relationship with respect to a current flowing through the element;
A current-voltage conversion circuit that converts the current output from the potential control circuit into a voltage;
A comparison circuit that outputs a current abnormality signal corresponding to each threshold voltage based on a comparison between the output voltage of the current-voltage conversion circuit and each of a plurality of different threshold voltages;
A threshold voltage generation circuit that has a bias voltage generation circuit and outputs voltages that change in conjunction with the bias voltage generated by the bias voltage generation circuit as the plurality of threshold voltages;
A bias voltage adjustment circuit capable of adjusting the bias voltage generated by the bias voltage generation circuit,
The threshold voltage generation circuit has a voltage dividing circuit for dividing a reference voltage, and outputs a plurality of divided voltages as the plurality of threshold voltages,
The bias voltage generation circuit includes a bias resistor connected in series on the downstream side of the voltage dividing circuit, a constant voltage circuit, and a current generating resistor, and outputs a constant current corresponding to the bias voltage generating circuit and the bias resistor. A constant current output circuit that flows into the bias resistor by merging with the current flowing through the voltage dividing circuit at the connection point of
A current abnormality signal corresponding to the one threshold voltage is output from the comparison circuit while flowing an original abnormality detection current to be detected by one threshold voltage of the plurality of threshold voltages from the power source to the load. An abnormality detection current value adjustment method for adjusting a bias voltage with a bias voltage adjustment circuit. An abnormality detection current value adjustment method for adjusting an electric current value flowing through the load when the electric current abnormality is detected with respect to an electric current abnormality detection circuit for detecting an abnormality of an electric current flowing through a power supply line from a power source to a load Because
The current abnormality detection circuit is
A power chip including a power FET provided in the power supply line, and a sense FET in which a sense current according to a current amount of the power FET flows;
By holding the source potentials of the power FET and the sense FET at the same potential or a predetermined potential difference, the current flowing through the sense FET has a predetermined proportional relationship with the current flowing through the power FET, and flows through the sense FET. A potential control circuit for outputting a current;
A current-voltage conversion circuit that converts the sense current output from the potential control circuit into a voltage;
A comparison circuit that outputs a current abnormality signal corresponding to each threshold voltage based on a comparison between the output voltage of the current-voltage conversion circuit and each of a plurality of different threshold voltages;
A threshold voltage generation circuit that has a bias voltage generation circuit and outputs voltages that change in conjunction with the bias voltage generated by the bias voltage generation circuit as the plurality of threshold voltages;
A bias voltage adjustment circuit capable of adjusting the bias voltage generated by the bias voltage generation circuit,
The threshold voltage generation circuit has a voltage dividing circuit for dividing a reference voltage, and outputs a plurality of divided voltages as the plurality of threshold voltages,
The bias voltage generation circuit includes a bias resistor connected in series on the downstream side of the voltage dividing circuit, a constant voltage circuit, and a current generating resistor, and outputs a constant current corresponding to the bias voltage generating circuit and the bias resistor. A constant current output circuit that flows into the bias resistor by merging with the current flowing through the voltage dividing circuit at the connection point of
Before assembling the power chip, a temporary resistor having a resistance value equivalent to the on-resistance of the sense FET is connected between the power source and the sense FET input of the potential control circuit,
A voltage corresponding to a source voltage when an original abnormality detection current to be detected by one threshold voltage of the plurality of threshold voltages is supplied to the power FET is applied to the power FET input of the potential control circuit. On the other hand, the abnormality detection current value adjustment method of adjusting a bias voltage by the bias voltage adjustment circuit so that a current abnormality signal corresponding to the one threshold voltage is output from the comparison circuit. The abnormality detection time current value adjustment method according to claim 11 or 12, wherein a threshold voltage having the smallest abnormality detection current corresponding to the plurality of threshold voltages is set as the one threshold voltage. The method of adjusting an abnormality detection current value according to claim 11, wherein the bias voltage is adjusted by adjusting a resistance value of the current generating resistor. The method for adjusting a current value during abnormality detection according to any one of claims 11 to 13, wherein the bias voltage is adjusted by adjusting a resistance value of the bias resistor.

Images